1 /* 2 * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for any 5 * purpose with or without fee is hereby granted, provided that the above 6 * copyright notice and this permission notice appear in all copies. 7 * 8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15 */ 16 17 #ifndef _MLO_STA_ID_DETAILS_H_ 18 #define _MLO_STA_ID_DETAILS_H_ 19 #if !defined(__ASSEMBLER__) 20 #endif 21 22 #define NUM_OF_WORDS_MLO_STA_ID_DETAILS 1 23 24 25 struct mlo_sta_id_details { 26 #ifndef WIFI_BIT_ORDER_BIG_ENDIAN 27 uint16_t nstr_mlo_sta_id : 10, // [9:0] 28 block_self_ml_sync : 1, // [10:10] 29 block_partner_ml_sync : 1, // [11:11] 30 nstr_mlo_sta_id_valid : 1, // [12:12] 31 reserved_0a : 3; // [15:13] 32 #else 33 uint16_t reserved_0a : 3, // [15:13] 34 nstr_mlo_sta_id_valid : 1, // [12:12] 35 block_partner_ml_sync : 1, // [11:11] 36 block_self_ml_sync : 1, // [10:10] 37 nstr_mlo_sta_id : 10; // [9:0] 38 #endif 39 }; 40 41 42 /* Description NSTR_MLO_STA_ID 43 44 ID of peer participating in non-STR MLO 45 */ 46 47 #define MLO_STA_ID_DETAILS_NSTR_MLO_STA_ID_OFFSET 0x00000000 48 #define MLO_STA_ID_DETAILS_NSTR_MLO_STA_ID_LSB 0 49 #define MLO_STA_ID_DETAILS_NSTR_MLO_STA_ID_MSB 9 50 #define MLO_STA_ID_DETAILS_NSTR_MLO_STA_ID_MASK 0x000003ff 51 52 53 /* Description BLOCK_SELF_ML_SYNC 54 55 Only valid for TX 56 57 When set, this provides an indication to block the peer 58 for self-link. 59 */ 60 61 #define MLO_STA_ID_DETAILS_BLOCK_SELF_ML_SYNC_OFFSET 0x00000000 62 #define MLO_STA_ID_DETAILS_BLOCK_SELF_ML_SYNC_LSB 10 63 #define MLO_STA_ID_DETAILS_BLOCK_SELF_ML_SYNC_MSB 10 64 #define MLO_STA_ID_DETAILS_BLOCK_SELF_ML_SYNC_MASK 0x00000400 65 66 67 /* Description BLOCK_PARTNER_ML_SYNC 68 69 Only valid for TX 70 71 When set, this provides an indication to block the peer 72 for partner links. 73 */ 74 75 #define MLO_STA_ID_DETAILS_BLOCK_PARTNER_ML_SYNC_OFFSET 0x00000000 76 #define MLO_STA_ID_DETAILS_BLOCK_PARTNER_ML_SYNC_LSB 11 77 #define MLO_STA_ID_DETAILS_BLOCK_PARTNER_ML_SYNC_MSB 11 78 #define MLO_STA_ID_DETAILS_BLOCK_PARTNER_ML_SYNC_MASK 0x00000800 79 80 81 /* Description NSTR_MLO_STA_ID_VALID 82 83 All the fields in this TLV are valid only if this bit is 84 set. 85 */ 86 87 #define MLO_STA_ID_DETAILS_NSTR_MLO_STA_ID_VALID_OFFSET 0x00000000 88 #define MLO_STA_ID_DETAILS_NSTR_MLO_STA_ID_VALID_LSB 12 89 #define MLO_STA_ID_DETAILS_NSTR_MLO_STA_ID_VALID_MSB 12 90 #define MLO_STA_ID_DETAILS_NSTR_MLO_STA_ID_VALID_MASK 0x00001000 91 92 93 /* Description RESERVED_0A 94 95 <legal 0> 96 */ 97 98 #define MLO_STA_ID_DETAILS_RESERVED_0A_OFFSET 0x00000000 99 #define MLO_STA_ID_DETAILS_RESERVED_0A_LSB 13 100 #define MLO_STA_ID_DETAILS_RESERVED_0A_MSB 15 101 #define MLO_STA_ID_DETAILS_RESERVED_0A_MASK 0x0000e000 102 103 104 105 #endif // MLO_STA_ID_DETAILS 106