1*5113495bSYour Name /* 2*5113495bSYour Name * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. 3*5113495bSYour Name * 4*5113495bSYour Name * Permission to use, copy, modify, and/or distribute this software for any 5*5113495bSYour Name * purpose with or without fee is hereby granted, provided that the above 6*5113495bSYour Name * copyright notice and this permission notice appear in all copies. 7*5113495bSYour Name * 8*5113495bSYour Name * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9*5113495bSYour Name * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10*5113495bSYour Name * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11*5113495bSYour Name * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12*5113495bSYour Name * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13*5113495bSYour Name * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14*5113495bSYour Name * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15*5113495bSYour Name */ 16*5113495bSYour Name 17*5113495bSYour Name #ifndef _PHYRX_L_SIG_A_H_ 18*5113495bSYour Name #define _PHYRX_L_SIG_A_H_ 19*5113495bSYour Name #if !defined(__ASSEMBLER__) 20*5113495bSYour Name #endif 21*5113495bSYour Name 22*5113495bSYour Name #include "l_sig_a_info.h" 23*5113495bSYour Name #define NUM_OF_DWORDS_PHYRX_L_SIG_A 2 24*5113495bSYour Name 25*5113495bSYour Name #define NUM_OF_QWORDS_PHYRX_L_SIG_A 1 26*5113495bSYour Name 27*5113495bSYour Name 28*5113495bSYour Name struct phyrx_l_sig_a { 29*5113495bSYour Name #ifndef WIFI_BIT_ORDER_BIG_ENDIAN 30*5113495bSYour Name struct l_sig_a_info phyrx_l_sig_a_info_details; 31*5113495bSYour Name uint32_t tlv64_padding : 32; // [31:0] 32*5113495bSYour Name #else 33*5113495bSYour Name struct l_sig_a_info phyrx_l_sig_a_info_details; 34*5113495bSYour Name uint32_t tlv64_padding : 32; // [31:0] 35*5113495bSYour Name #endif 36*5113495bSYour Name }; 37*5113495bSYour Name 38*5113495bSYour Name 39*5113495bSYour Name /* Description PHYRX_L_SIG_A_INFO_DETAILS 40*5113495bSYour Name 41*5113495bSYour Name See detailed description of the STRUCT 42*5113495bSYour Name */ 43*5113495bSYour Name 44*5113495bSYour Name 45*5113495bSYour Name /* Description RATE 46*5113495bSYour Name 47*5113495bSYour Name This format is originally defined for OFDM as a 4 bit field 48*5113495bSYour Name but the 5th bit was added to indicate 11b formatted frames. 49*5113495bSYour Name In the standard bit [4] is specified as reserved. For 50*5113495bSYour Name 11b frames this L-SIG is transformed in the PHY into the 51*5113495bSYour Name 11b preamble format. The following are the rates: 52*5113495bSYour Name <enum 8 ofdm_48_mbps> 64-QAM 2/3 (48 Mbps) 53*5113495bSYour Name <enum 9 ofdm_24_mbps> 16-QAM 1/2 (24 Mbps) 54*5113495bSYour Name <enum 10 ofdm_12_mbps> QPSK 1/2 (12 Mbps) 55*5113495bSYour Name <enum 11 ofdm_6_mbps> BPSK 1/2 (6 Mbps) 56*5113495bSYour Name <enum 12 ofdm_54_mbps> 64-QAM 3/4 (54 Mbps) 57*5113495bSYour Name <enum 13 ofdm_36_mbps> 16-QAM 3/4 (36 Mbps) 58*5113495bSYour Name <enum 14 ofdm_18_mbps> QPSK 1/2 (18 Mbps) 59*5113495bSYour Name <enum 15 ofdm_9_mbps> BPSK 3/4 (9 Mbps) 60*5113495bSYour Name <legal 8-15> 61*5113495bSYour Name */ 62*5113495bSYour Name 63*5113495bSYour Name #define PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_RATE_OFFSET 0x0000000000000000 64*5113495bSYour Name #define PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_RATE_LSB 0 65*5113495bSYour Name #define PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_RATE_MSB 3 66*5113495bSYour Name #define PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_RATE_MASK 0x000000000000000f 67*5113495bSYour Name 68*5113495bSYour Name 69*5113495bSYour Name /* Description LSIG_RESERVED 70*5113495bSYour Name 71*5113495bSYour Name Reserved: Should be set to 0 by the MAC and ignored by the 72*5113495bSYour Name PHY 73*5113495bSYour Name <legal 0> 74*5113495bSYour Name */ 75*5113495bSYour Name 76*5113495bSYour Name #define PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_LSIG_RESERVED_OFFSET 0x0000000000000000 77*5113495bSYour Name #define PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_LSIG_RESERVED_LSB 4 78*5113495bSYour Name #define PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_LSIG_RESERVED_MSB 4 79*5113495bSYour Name #define PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_LSIG_RESERVED_MASK 0x0000000000000010 80*5113495bSYour Name 81*5113495bSYour Name 82*5113495bSYour Name /* Description LENGTH 83*5113495bSYour Name 84*5113495bSYour Name The length indicates the number of octets in this MPDU. 85*5113495bSYour Name Note that when using mixed mode .11n preamble or .11ac/.11ax/.11ba/.11be 86*5113495bSYour Name this length provides the spoofed length for the PPDU. 87*5113495bSYour Name This length provides part of the information (viz. PPDU 88*5113495bSYour Name duration) to derive the actually PSDU length. For legacy 89*5113495bSYour Name OFDM and 11B frames the maximum length is 4095. 90*5113495bSYour Name <legal all> 91*5113495bSYour Name */ 92*5113495bSYour Name 93*5113495bSYour Name #define PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_LENGTH_OFFSET 0x0000000000000000 94*5113495bSYour Name #define PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_LENGTH_LSB 5 95*5113495bSYour Name #define PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_LENGTH_MSB 16 96*5113495bSYour Name #define PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_LENGTH_MASK 0x000000000001ffe0 97*5113495bSYour Name 98*5113495bSYour Name 99*5113495bSYour Name /* Description PARITY 100*5113495bSYour Name 101*5113495bSYour Name 11a/n/ac TX: This field provides even parity over the first 102*5113495bSYour Name 18 bits of the signal field which means that the sum of 103*5113495bSYour Name 1s in the signal field will always be even on transmission. 104*5113495bSYour Name The value of the field is computed by the MAC. 105*5113495bSYour Name 11a/n/ac RX: this field contains the received parity field 106*5113495bSYour Name from the L-SIG symbol for the current packet. 107*5113495bSYour Name <legal 0-1> 108*5113495bSYour Name */ 109*5113495bSYour Name 110*5113495bSYour Name #define PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_PARITY_OFFSET 0x0000000000000000 111*5113495bSYour Name #define PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_PARITY_LSB 17 112*5113495bSYour Name #define PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_PARITY_MSB 17 113*5113495bSYour Name #define PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_PARITY_MASK 0x0000000000020000 114*5113495bSYour Name 115*5113495bSYour Name 116*5113495bSYour Name /* Description TAIL 117*5113495bSYour Name 118*5113495bSYour Name The 6 bits of tail is always set to 0 is used to flush the 119*5113495bSYour Name BCC encoder and decoder. <legal 0> 120*5113495bSYour Name */ 121*5113495bSYour Name 122*5113495bSYour Name #define PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_TAIL_OFFSET 0x0000000000000000 123*5113495bSYour Name #define PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_TAIL_LSB 18 124*5113495bSYour Name #define PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_TAIL_MSB 23 125*5113495bSYour Name #define PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_TAIL_MASK 0x0000000000fc0000 126*5113495bSYour Name 127*5113495bSYour Name 128*5113495bSYour Name /* Description PKT_TYPE 129*5113495bSYour Name 130*5113495bSYour Name Only used on the RX side. 131*5113495bSYour Name Note: This is not really part of L-SIG 132*5113495bSYour Name 133*5113495bSYour Name Packet type: 134*5113495bSYour Name <enum 0 dot11a>802.11a PPDU type 135*5113495bSYour Name <enum 1 dot11b>802.11b PPDU type 136*5113495bSYour Name <enum 2 dot11n_mm>802.11n Mixed Mode PPDU type 137*5113495bSYour Name <enum 3 dot11ac>802.11ac PPDU type 138*5113495bSYour Name <enum 4 dot11ax>802.11ax PPDU type 139*5113495bSYour Name <enum 5 dot11ba>802.11ba (WUR) PPDU type 140*5113495bSYour Name <enum 6 dot11be>802.11be PPDU type 141*5113495bSYour Name <enum 7 dot11az>802.11az (ranging) PPDU type 142*5113495bSYour Name <enum 8 dot11n_gf>802.11n Green Field PPDU type (unsupported 143*5113495bSYour Name & aborted) 144*5113495bSYour Name */ 145*5113495bSYour Name 146*5113495bSYour Name #define PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_PKT_TYPE_OFFSET 0x0000000000000000 147*5113495bSYour Name #define PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_PKT_TYPE_LSB 24 148*5113495bSYour Name #define PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_PKT_TYPE_MSB 27 149*5113495bSYour Name #define PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_PKT_TYPE_MASK 0x000000000f000000 150*5113495bSYour Name 151*5113495bSYour Name 152*5113495bSYour Name /* Description CAPTURED_IMPLICIT_SOUNDING 153*5113495bSYour Name 154*5113495bSYour Name Only used on the RX side. 155*5113495bSYour Name Note: This is not really part of L-SIG 156*5113495bSYour Name 157*5113495bSYour Name This indicates that the PHY has captured implicit sounding. 158*5113495bSYour Name 159*5113495bSYour Name */ 160*5113495bSYour Name 161*5113495bSYour Name #define PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_CAPTURED_IMPLICIT_SOUNDING_OFFSET 0x0000000000000000 162*5113495bSYour Name #define PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_CAPTURED_IMPLICIT_SOUNDING_LSB 28 163*5113495bSYour Name #define PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_CAPTURED_IMPLICIT_SOUNDING_MSB 28 164*5113495bSYour Name #define PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_CAPTURED_IMPLICIT_SOUNDING_MASK 0x0000000010000000 165*5113495bSYour Name 166*5113495bSYour Name 167*5113495bSYour Name /* Description RESERVED 168*5113495bSYour Name 169*5113495bSYour Name Reserved: Should be set to 0 by the transmitting MAC and 170*5113495bSYour Name ignored by the PHY <legal 0> 171*5113495bSYour Name */ 172*5113495bSYour Name 173*5113495bSYour Name #define PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_RESERVED_OFFSET 0x0000000000000000 174*5113495bSYour Name #define PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_RESERVED_LSB 29 175*5113495bSYour Name #define PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_RESERVED_MSB 30 176*5113495bSYour Name #define PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_RESERVED_MASK 0x0000000060000000 177*5113495bSYour Name 178*5113495bSYour Name 179*5113495bSYour Name /* Description RX_INTEGRITY_CHECK_PASSED 180*5113495bSYour Name 181*5113495bSYour Name TX side: Set to 0 182*5113495bSYour Name RX side: Set to 1 if PHY determines the L-SIG integrity 183*5113495bSYour Name check has passed, else set to 0 184*5113495bSYour Name 185*5113495bSYour Name <legal all> 186*5113495bSYour Name */ 187*5113495bSYour Name 188*5113495bSYour Name #define PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_RX_INTEGRITY_CHECK_PASSED_OFFSET 0x0000000000000000 189*5113495bSYour Name #define PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_RX_INTEGRITY_CHECK_PASSED_LSB 31 190*5113495bSYour Name #define PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_RX_INTEGRITY_CHECK_PASSED_MSB 31 191*5113495bSYour Name #define PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_RX_INTEGRITY_CHECK_PASSED_MASK 0x0000000080000000 192*5113495bSYour Name 193*5113495bSYour Name 194*5113495bSYour Name /* Description TLV64_PADDING 195*5113495bSYour Name 196*5113495bSYour Name Automatic DWORD padding inserted while converting TLV32 197*5113495bSYour Name to TLV64 for 64 bit ARCH 198*5113495bSYour Name <legal 0> 199*5113495bSYour Name */ 200*5113495bSYour Name 201*5113495bSYour Name #define PHYRX_L_SIG_A_TLV64_PADDING_OFFSET 0x0000000000000000 202*5113495bSYour Name #define PHYRX_L_SIG_A_TLV64_PADDING_LSB 32 203*5113495bSYour Name #define PHYRX_L_SIG_A_TLV64_PADDING_MSB 63 204*5113495bSYour Name #define PHYRX_L_SIG_A_TLV64_PADDING_MASK 0xffffffff00000000 205*5113495bSYour Name 206*5113495bSYour Name 207*5113495bSYour Name 208*5113495bSYour Name #endif // PHYRX_L_SIG_A 209