xref: /wlan-driver/fw-api/hw/qcn6432/phyrx_l_sig_a.h (revision 5113495b16420b49004c444715d2daae2066e7dc)
1 /*
2  * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
3  *
4  * Permission to use, copy, modify, and/or distribute this software for any
5  * purpose with or without fee is hereby granted, provided that the above
6  * copyright notice and this permission notice appear in all copies.
7  *
8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15  */
16 
17 #ifndef _PHYRX_L_SIG_A_H_
18 #define _PHYRX_L_SIG_A_H_
19 #if !defined(__ASSEMBLER__)
20 #endif
21 
22 #include "l_sig_a_info.h"
23 #define NUM_OF_DWORDS_PHYRX_L_SIG_A 2
24 
25 #define NUM_OF_QWORDS_PHYRX_L_SIG_A 1
26 
27 
28 struct phyrx_l_sig_a {
29 #ifndef WIFI_BIT_ORDER_BIG_ENDIAN
30              struct   l_sig_a_info                                              phyrx_l_sig_a_info_details;
31              uint32_t tlv64_padding                                           : 32; // [31:0]
32 #else
33              struct   l_sig_a_info                                              phyrx_l_sig_a_info_details;
34              uint32_t tlv64_padding                                           : 32; // [31:0]
35 #endif
36 };
37 
38 
39 /* Description		PHYRX_L_SIG_A_INFO_DETAILS
40 
41 			See detailed description of the STRUCT
42 */
43 
44 
45 /* Description		RATE
46 
47 			This format is originally defined for OFDM as a 4 bit field
48 			 but the 5th bit was added to indicate 11b formatted frames.
49 			 In the standard bit [4] is specified as reserved.  For
50 			11b frames this L-SIG is transformed in the PHY into the
51 			 11b preamble format.  The following are the rates:
52 			<enum 8     ofdm_48_mbps> 64-QAM 2/3 (48 Mbps)
53 			<enum 9     ofdm_24_mbps> 16-QAM 1/2 (24 Mbps)
54 			<enum 10     ofdm_12_mbps> QPSK 1/2 (12 Mbps)
55 			<enum 11     ofdm_6_mbps> BPSK 1/2 (6 Mbps)
56 			<enum 12     ofdm_54_mbps> 64-QAM 3/4 (54 Mbps)
57 			<enum 13     ofdm_36_mbps> 16-QAM 3/4 (36 Mbps)
58 			<enum 14     ofdm_18_mbps> QPSK 1/2 (18 Mbps)
59 			<enum 15     ofdm_9_mbps> BPSK 3/4 (9 Mbps)
60 			<legal 8-15>
61 */
62 
63 #define PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_RATE_OFFSET                        0x0000000000000000
64 #define PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_RATE_LSB                           0
65 #define PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_RATE_MSB                           3
66 #define PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_RATE_MASK                          0x000000000000000f
67 
68 
69 /* Description		LSIG_RESERVED
70 
71 			Reserved: Should be set to 0 by the MAC and ignored by the
72 			 PHY
73 			<legal 0>
74 */
75 
76 #define PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_LSIG_RESERVED_OFFSET               0x0000000000000000
77 #define PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_LSIG_RESERVED_LSB                  4
78 #define PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_LSIG_RESERVED_MSB                  4
79 #define PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_LSIG_RESERVED_MASK                 0x0000000000000010
80 
81 
82 /* Description		LENGTH
83 
84 			The length indicates the number of octets in this MPDU.
85 			 Note that when using mixed mode .11n preamble or .11ac/.11ax/.11ba/.11be
86 			 this length provides the spoofed length for the PPDU.
87 			This length provides part of the information (viz. PPDU
88 			duration) to derive the actually PSDU length.  For legacy
89 			 OFDM and 11B frames the maximum length is 4095.
90 			<legal all>
91 */
92 
93 #define PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_LENGTH_OFFSET                      0x0000000000000000
94 #define PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_LENGTH_LSB                         5
95 #define PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_LENGTH_MSB                         16
96 #define PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_LENGTH_MASK                        0x000000000001ffe0
97 
98 
99 /* Description		PARITY
100 
101 			11a/n/ac TX: This field provides even parity over the first
102 			 18 bits of the signal field which means that the sum of
103 			 1s in the signal field will always be even on transmission.
104 			The value of the field is computed by the MAC.
105 			11a/n/ac RX: this field contains the received parity field
106 			 from the L-SIG symbol for the current packet.
107 			<legal 0-1>
108 */
109 
110 #define PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_PARITY_OFFSET                      0x0000000000000000
111 #define PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_PARITY_LSB                         17
112 #define PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_PARITY_MSB                         17
113 #define PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_PARITY_MASK                        0x0000000000020000
114 
115 
116 /* Description		TAIL
117 
118 			The 6 bits of tail is always set to 0 is used to flush the
119 			 BCC encoder and decoder.  <legal 0>
120 */
121 
122 #define PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_TAIL_OFFSET                        0x0000000000000000
123 #define PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_TAIL_LSB                           18
124 #define PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_TAIL_MSB                           23
125 #define PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_TAIL_MASK                          0x0000000000fc0000
126 
127 
128 /* Description		PKT_TYPE
129 
130 			Only used on the RX side.
131 			Note: This is not really part of L-SIG
132 
133 			Packet type:
134 			<enum 0 dot11a>802.11a PPDU type
135 			<enum 1 dot11b>802.11b PPDU type
136 			<enum 2 dot11n_mm>802.11n Mixed Mode PPDU type
137 			<enum 3 dot11ac>802.11ac PPDU type
138 			<enum 4 dot11ax>802.11ax PPDU type
139 			<enum 5 dot11ba>802.11ba (WUR) PPDU type
140 			<enum 6 dot11be>802.11be PPDU type
141 			<enum 7 dot11az>802.11az (ranging) PPDU type
142 			<enum 8 dot11n_gf>802.11n Green Field PPDU type (unsupported
143 			 & aborted)
144 */
145 
146 #define PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_PKT_TYPE_OFFSET                    0x0000000000000000
147 #define PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_PKT_TYPE_LSB                       24
148 #define PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_PKT_TYPE_MSB                       27
149 #define PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_PKT_TYPE_MASK                      0x000000000f000000
150 
151 
152 /* Description		CAPTURED_IMPLICIT_SOUNDING
153 
154 			Only used on the RX side.
155 			Note: This is not really part of L-SIG
156 
157 			This indicates that the PHY has captured implicit sounding.
158 
159 */
160 
161 #define PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_CAPTURED_IMPLICIT_SOUNDING_OFFSET  0x0000000000000000
162 #define PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_CAPTURED_IMPLICIT_SOUNDING_LSB     28
163 #define PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_CAPTURED_IMPLICIT_SOUNDING_MSB     28
164 #define PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_CAPTURED_IMPLICIT_SOUNDING_MASK    0x0000000010000000
165 
166 
167 /* Description		RESERVED
168 
169 			Reserved: Should be set to 0 by the transmitting MAC and
170 			 ignored by the PHY <legal 0>
171 */
172 
173 #define PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_RESERVED_OFFSET                    0x0000000000000000
174 #define PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_RESERVED_LSB                       29
175 #define PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_RESERVED_MSB                       30
176 #define PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_RESERVED_MASK                      0x0000000060000000
177 
178 
179 /* Description		RX_INTEGRITY_CHECK_PASSED
180 
181 			TX side: Set to 0
182 			RX side: Set to 1 if PHY determines the L-SIG integrity
183 			check has passed, else set to 0
184 
185 			<legal all>
186 */
187 
188 #define PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_RX_INTEGRITY_CHECK_PASSED_OFFSET   0x0000000000000000
189 #define PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_RX_INTEGRITY_CHECK_PASSED_LSB      31
190 #define PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_RX_INTEGRITY_CHECK_PASSED_MSB      31
191 #define PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_RX_INTEGRITY_CHECK_PASSED_MASK     0x0000000080000000
192 
193 
194 /* Description		TLV64_PADDING
195 
196 			Automatic DWORD padding inserted while converting TLV32
197 			to TLV64 for 64 bit ARCH
198 			<legal 0>
199 */
200 
201 #define PHYRX_L_SIG_A_TLV64_PADDING_OFFSET                                          0x0000000000000000
202 #define PHYRX_L_SIG_A_TLV64_PADDING_LSB                                             32
203 #define PHYRX_L_SIG_A_TLV64_PADDING_MSB                                             63
204 #define PHYRX_L_SIG_A_TLV64_PADDING_MASK                                            0xffffffff00000000
205 
206 
207 
208 #endif   // PHYRX_L_SIG_A
209