1 /* 2 * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for any 5 * purpose with or without fee is hereby granted, provided that the above 6 * copyright notice and this permission notice appear in all copies. 7 * 8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15 */ 16 17 #ifndef _PHYRX_L_SIG_B_H_ 18 #define _PHYRX_L_SIG_B_H_ 19 #if !defined(__ASSEMBLER__) 20 #endif 21 22 #include "l_sig_b_info.h" 23 #define NUM_OF_DWORDS_PHYRX_L_SIG_B 2 24 25 #define NUM_OF_QWORDS_PHYRX_L_SIG_B 1 26 27 28 struct phyrx_l_sig_b { 29 #ifndef WIFI_BIT_ORDER_BIG_ENDIAN 30 struct l_sig_b_info phyrx_l_sig_b_info_details; 31 uint32_t tlv64_padding : 32; // [31:0] 32 #else 33 struct l_sig_b_info phyrx_l_sig_b_info_details; 34 uint32_t tlv64_padding : 32; // [31:0] 35 #endif 36 }; 37 38 39 /* Description PHYRX_L_SIG_B_INFO_DETAILS 40 41 See detailed description of the STRUCT 42 */ 43 44 45 /* Description RATE 46 47 <enum 1 dsss_1_mpbs_long> DSSS 1 Mbps long 48 <enum 2 dsss_2_mbps_long> DSSS 2 Mbps long 49 <enum 3 cck_5_5_mbps_long> CCK 5.5 Mbps long 50 <enum 4 cck_11_mbps_long> CCK 11 Mbps long 51 <enum 5 dsss_2_mbps_short> DSSS 2 Mbps short 52 <enum 6 cck_5_5_mbps_short> CCK 5.5 Mbps short 53 <enum 7 cck_11_mbps_short> CCK 11 Mbps short 54 <legal 1-7> 55 */ 56 57 #define PHYRX_L_SIG_B_PHYRX_L_SIG_B_INFO_DETAILS_RATE_OFFSET 0x0000000000000000 58 #define PHYRX_L_SIG_B_PHYRX_L_SIG_B_INFO_DETAILS_RATE_LSB 0 59 #define PHYRX_L_SIG_B_PHYRX_L_SIG_B_INFO_DETAILS_RATE_MSB 3 60 #define PHYRX_L_SIG_B_PHYRX_L_SIG_B_INFO_DETAILS_RATE_MASK 0x000000000000000f 61 62 63 /* Description LENGTH 64 65 The length indicates the number of octets in this MPDU. 66 <legal all> 67 */ 68 69 #define PHYRX_L_SIG_B_PHYRX_L_SIG_B_INFO_DETAILS_LENGTH_OFFSET 0x0000000000000000 70 #define PHYRX_L_SIG_B_PHYRX_L_SIG_B_INFO_DETAILS_LENGTH_LSB 4 71 #define PHYRX_L_SIG_B_PHYRX_L_SIG_B_INFO_DETAILS_LENGTH_MSB 15 72 #define PHYRX_L_SIG_B_PHYRX_L_SIG_B_INFO_DETAILS_LENGTH_MASK 0x000000000000fff0 73 74 75 /* Description RESERVED 76 77 Reserved: Should be set to 0 by the transmitting MAC and 78 ignored by the PHY <legal 0> 79 */ 80 81 #define PHYRX_L_SIG_B_PHYRX_L_SIG_B_INFO_DETAILS_RESERVED_OFFSET 0x0000000000000000 82 #define PHYRX_L_SIG_B_PHYRX_L_SIG_B_INFO_DETAILS_RESERVED_LSB 16 83 #define PHYRX_L_SIG_B_PHYRX_L_SIG_B_INFO_DETAILS_RESERVED_MSB 30 84 #define PHYRX_L_SIG_B_PHYRX_L_SIG_B_INFO_DETAILS_RESERVED_MASK 0x000000007fff0000 85 86 87 /* Description RX_INTEGRITY_CHECK_PASSED 88 89 TX side: Set to 0 90 RX side: Set to 1 if PHY determines the .11b PHY header 91 CRC check has passed, else set to 0 92 93 <legal all> 94 */ 95 96 #define PHYRX_L_SIG_B_PHYRX_L_SIG_B_INFO_DETAILS_RX_INTEGRITY_CHECK_PASSED_OFFSET 0x0000000000000000 97 #define PHYRX_L_SIG_B_PHYRX_L_SIG_B_INFO_DETAILS_RX_INTEGRITY_CHECK_PASSED_LSB 31 98 #define PHYRX_L_SIG_B_PHYRX_L_SIG_B_INFO_DETAILS_RX_INTEGRITY_CHECK_PASSED_MSB 31 99 #define PHYRX_L_SIG_B_PHYRX_L_SIG_B_INFO_DETAILS_RX_INTEGRITY_CHECK_PASSED_MASK 0x0000000080000000 100 101 102 /* Description TLV64_PADDING 103 104 Automatic DWORD padding inserted while converting TLV32 105 to TLV64 for 64 bit ARCH 106 <legal 0> 107 */ 108 109 #define PHYRX_L_SIG_B_TLV64_PADDING_OFFSET 0x0000000000000000 110 #define PHYRX_L_SIG_B_TLV64_PADDING_LSB 32 111 #define PHYRX_L_SIG_B_TLV64_PADDING_MSB 63 112 #define PHYRX_L_SIG_B_TLV64_PADDING_MASK 0xffffffff00000000 113 114 115 116 #endif // PHYRX_L_SIG_B 117