xref: /wlan-driver/fw-api/hw/qcn6432/reo_flush_timeout_list.h (revision 5113495b16420b49004c444715d2daae2066e7dc)
1*5113495bSYour Name /*
2*5113495bSYour Name  * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
3*5113495bSYour Name  *
4*5113495bSYour Name  * Permission to use, copy, modify, and/or distribute this software for any
5*5113495bSYour Name  * purpose with or without fee is hereby granted, provided that the above
6*5113495bSYour Name  * copyright notice and this permission notice appear in all copies.
7*5113495bSYour Name  *
8*5113495bSYour Name  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9*5113495bSYour Name  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10*5113495bSYour Name  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11*5113495bSYour Name  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12*5113495bSYour Name  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13*5113495bSYour Name  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14*5113495bSYour Name  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15*5113495bSYour Name  */
16*5113495bSYour Name 
17*5113495bSYour Name #ifndef _REO_FLUSH_TIMEOUT_LIST_H_
18*5113495bSYour Name #define _REO_FLUSH_TIMEOUT_LIST_H_
19*5113495bSYour Name #if !defined(__ASSEMBLER__)
20*5113495bSYour Name #endif
21*5113495bSYour Name 
22*5113495bSYour Name #include "uniform_reo_cmd_header.h"
23*5113495bSYour Name #define NUM_OF_DWORDS_REO_FLUSH_TIMEOUT_LIST 10
24*5113495bSYour Name 
25*5113495bSYour Name #define NUM_OF_QWORDS_REO_FLUSH_TIMEOUT_LIST 5
26*5113495bSYour Name 
27*5113495bSYour Name 
28*5113495bSYour Name struct reo_flush_timeout_list {
29*5113495bSYour Name #ifndef WIFI_BIT_ORDER_BIG_ENDIAN
30*5113495bSYour Name              struct   uniform_reo_cmd_header                                    cmd_header;
31*5113495bSYour Name              uint32_t ac_timout_list                                          :  2, // [1:0]
32*5113495bSYour Name                       reserved_1                                              : 30; // [31:2]
33*5113495bSYour Name              uint32_t minimum_release_desc_count                              : 16, // [15:0]
34*5113495bSYour Name                       minimum_forward_buf_count                               : 16; // [31:16]
35*5113495bSYour Name              uint32_t reserved_3a                                             : 32; // [31:0]
36*5113495bSYour Name              uint32_t reserved_4a                                             : 32; // [31:0]
37*5113495bSYour Name              uint32_t reserved_5a                                             : 32; // [31:0]
38*5113495bSYour Name              uint32_t reserved_6a                                             : 32; // [31:0]
39*5113495bSYour Name              uint32_t reserved_7a                                             : 32; // [31:0]
40*5113495bSYour Name              uint32_t reserved_8a                                             : 32; // [31:0]
41*5113495bSYour Name              uint32_t tlv64_padding                                           : 32; // [31:0]
42*5113495bSYour Name #else
43*5113495bSYour Name              struct   uniform_reo_cmd_header                                    cmd_header;
44*5113495bSYour Name              uint32_t reserved_1                                              : 30, // [31:2]
45*5113495bSYour Name                       ac_timout_list                                          :  2; // [1:0]
46*5113495bSYour Name              uint32_t minimum_forward_buf_count                               : 16, // [31:16]
47*5113495bSYour Name                       minimum_release_desc_count                              : 16; // [15:0]
48*5113495bSYour Name              uint32_t reserved_3a                                             : 32; // [31:0]
49*5113495bSYour Name              uint32_t reserved_4a                                             : 32; // [31:0]
50*5113495bSYour Name              uint32_t reserved_5a                                             : 32; // [31:0]
51*5113495bSYour Name              uint32_t reserved_6a                                             : 32; // [31:0]
52*5113495bSYour Name              uint32_t reserved_7a                                             : 32; // [31:0]
53*5113495bSYour Name              uint32_t reserved_8a                                             : 32; // [31:0]
54*5113495bSYour Name              uint32_t tlv64_padding                                           : 32; // [31:0]
55*5113495bSYour Name #endif
56*5113495bSYour Name };
57*5113495bSYour Name 
58*5113495bSYour Name 
59*5113495bSYour Name /* Description		CMD_HEADER
60*5113495bSYour Name 
61*5113495bSYour Name 			Consumer: REO
62*5113495bSYour Name 			Producer: SW
63*5113495bSYour Name 
64*5113495bSYour Name 			Details for command execution tracking purposes.
65*5113495bSYour Name */
66*5113495bSYour Name 
67*5113495bSYour Name 
68*5113495bSYour Name /* Description		REO_CMD_NUMBER
69*5113495bSYour Name 
70*5113495bSYour Name 			Consumer: REO/SW/DEBUG
71*5113495bSYour Name 			Producer: SW
72*5113495bSYour Name 
73*5113495bSYour Name 			This number can be used by SW to track, identify and link
74*5113495bSYour Name 			 the created commands with the command statusses
75*5113495bSYour Name 
76*5113495bSYour Name 
77*5113495bSYour Name 			<legal all>
78*5113495bSYour Name */
79*5113495bSYour Name 
80*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_CMD_HEADER_REO_CMD_NUMBER_OFFSET                     0x0000000000000000
81*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_CMD_HEADER_REO_CMD_NUMBER_LSB                        0
82*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_CMD_HEADER_REO_CMD_NUMBER_MSB                        15
83*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_CMD_HEADER_REO_CMD_NUMBER_MASK                       0x000000000000ffff
84*5113495bSYour Name 
85*5113495bSYour Name 
86*5113495bSYour Name /* Description		REO_STATUS_REQUIRED
87*5113495bSYour Name 
88*5113495bSYour Name 			Consumer: REO
89*5113495bSYour Name 			Producer: SW
90*5113495bSYour Name 
91*5113495bSYour Name 			<enum 0 NoStatus> REO does not need to generate a status
92*5113495bSYour Name 			 TLV for the execution of this command
93*5113495bSYour Name 			<enum 1 StatusRequired> REO shall generate a status TLV
94*5113495bSYour Name 			for the execution of this command
95*5113495bSYour Name 
96*5113495bSYour Name 			<legal all>
97*5113495bSYour Name */
98*5113495bSYour Name 
99*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_CMD_HEADER_REO_STATUS_REQUIRED_OFFSET                0x0000000000000000
100*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_CMD_HEADER_REO_STATUS_REQUIRED_LSB                   16
101*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_CMD_HEADER_REO_STATUS_REQUIRED_MSB                   16
102*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_CMD_HEADER_REO_STATUS_REQUIRED_MASK                  0x0000000000010000
103*5113495bSYour Name 
104*5113495bSYour Name 
105*5113495bSYour Name /* Description		RESERVED_0A
106*5113495bSYour Name 
107*5113495bSYour Name 			<legal 0>
108*5113495bSYour Name */
109*5113495bSYour Name 
110*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_CMD_HEADER_RESERVED_0A_OFFSET                        0x0000000000000000
111*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_CMD_HEADER_RESERVED_0A_LSB                           17
112*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_CMD_HEADER_RESERVED_0A_MSB                           31
113*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_CMD_HEADER_RESERVED_0A_MASK                          0x00000000fffe0000
114*5113495bSYour Name 
115*5113495bSYour Name 
116*5113495bSYour Name /* Description		AC_TIMOUT_LIST
117*5113495bSYour Name 
118*5113495bSYour Name 			Consumer: REO
119*5113495bSYour Name 			Producer: SW
120*5113495bSYour Name 
121*5113495bSYour Name 			The AC_timeout list to be used for this command
122*5113495bSYour Name 			<legal all>
123*5113495bSYour Name */
124*5113495bSYour Name 
125*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_AC_TIMOUT_LIST_OFFSET                                0x0000000000000000
126*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_AC_TIMOUT_LIST_LSB                                   32
127*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_AC_TIMOUT_LIST_MSB                                   33
128*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_AC_TIMOUT_LIST_MASK                                  0x0000000300000000
129*5113495bSYour Name 
130*5113495bSYour Name 
131*5113495bSYour Name /* Description		RESERVED_1
132*5113495bSYour Name 
133*5113495bSYour Name 			<legal 0>
134*5113495bSYour Name */
135*5113495bSYour Name 
136*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_RESERVED_1_OFFSET                                    0x0000000000000000
137*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_RESERVED_1_LSB                                       34
138*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_RESERVED_1_MSB                                       63
139*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_RESERVED_1_MASK                                      0xfffffffc00000000
140*5113495bSYour Name 
141*5113495bSYour Name 
142*5113495bSYour Name /* Description		MINIMUM_RELEASE_DESC_COUNT
143*5113495bSYour Name 
144*5113495bSYour Name 			Consumer: REO
145*5113495bSYour Name 			Producer: SW
146*5113495bSYour Name 
147*5113495bSYour Name 			The minimum number of link descriptors requested to be released.
148*5113495bSYour Name 			If set to 0, only buffer release counts seems to be important...
149*5113495bSYour Name 			When set to very high value, likely the entire timeout list
150*5113495bSYour Name 			 will be exhausted before this count is reached or maybe
151*5113495bSYour Name 			 this count will not get reached. REO however will stop
152*5113495bSYour Name 			here as it can not do anything else.
153*5113495bSYour Name 
154*5113495bSYour Name 			When both this field and field Minimum_forward_buf_count
155*5113495bSYour Name 			 are > 0, REO needs to meet both requirements. When both
156*5113495bSYour Name 			 entries are 0 (which should be a programming error), REO
157*5113495bSYour Name 			 does not need to do anything.
158*5113495bSYour Name 
159*5113495bSYour Name 			Note that this includes counts of MPDU link Desc as well
160*5113495bSYour Name 			 as MSDU link Desc. Where the count of MSDU link Desc is
161*5113495bSYour Name 			 not known to REO it's approximated by deriving from MSDU
162*5113495bSYour Name 			 count
163*5113495bSYour Name 			<legal all>
164*5113495bSYour Name */
165*5113495bSYour Name 
166*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_MINIMUM_RELEASE_DESC_COUNT_OFFSET                    0x0000000000000008
167*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_MINIMUM_RELEASE_DESC_COUNT_LSB                       0
168*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_MINIMUM_RELEASE_DESC_COUNT_MSB                       15
169*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_MINIMUM_RELEASE_DESC_COUNT_MASK                      0x000000000000ffff
170*5113495bSYour Name 
171*5113495bSYour Name 
172*5113495bSYour Name /* Description		MINIMUM_FORWARD_BUF_COUNT
173*5113495bSYour Name 
174*5113495bSYour Name 			Consumer: REO
175*5113495bSYour Name 			Producer: SW
176*5113495bSYour Name 
177*5113495bSYour Name 			The minimum number of buffer descriptors requested to be
178*5113495bSYour Name 			 passed on to the REO destination rings.
179*5113495bSYour Name 
180*5113495bSYour Name 			If set to 0, only descriptor release counts seems to be
181*5113495bSYour Name 			important...
182*5113495bSYour Name 
183*5113495bSYour Name 			When set to very high value, likely the entire timeout list
184*5113495bSYour Name 			 will be exhausted before this count is reached or maybe
185*5113495bSYour Name 			 this count will not get reached. REO however will stop
186*5113495bSYour Name 			here as it can not do anything else.
187*5113495bSYour Name 
188*5113495bSYour Name 			Note that REO does not know the exact buffer count. This
189*5113495bSYour Name 			 can be approximated by using the MSDU_COUNT
190*5113495bSYour Name 			<legal all>
191*5113495bSYour Name */
192*5113495bSYour Name 
193*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_MINIMUM_FORWARD_BUF_COUNT_OFFSET                     0x0000000000000008
194*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_MINIMUM_FORWARD_BUF_COUNT_LSB                        16
195*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_MINIMUM_FORWARD_BUF_COUNT_MSB                        31
196*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_MINIMUM_FORWARD_BUF_COUNT_MASK                       0x00000000ffff0000
197*5113495bSYour Name 
198*5113495bSYour Name 
199*5113495bSYour Name /* Description		RESERVED_3A
200*5113495bSYour Name 
201*5113495bSYour Name 			<legal 0>
202*5113495bSYour Name */
203*5113495bSYour Name 
204*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_RESERVED_3A_OFFSET                                   0x0000000000000008
205*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_RESERVED_3A_LSB                                      32
206*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_RESERVED_3A_MSB                                      63
207*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_RESERVED_3A_MASK                                     0xffffffff00000000
208*5113495bSYour Name 
209*5113495bSYour Name 
210*5113495bSYour Name /* Description		RESERVED_4A
211*5113495bSYour Name 
212*5113495bSYour Name 			<legal 0>
213*5113495bSYour Name */
214*5113495bSYour Name 
215*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_RESERVED_4A_OFFSET                                   0x0000000000000010
216*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_RESERVED_4A_LSB                                      0
217*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_RESERVED_4A_MSB                                      31
218*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_RESERVED_4A_MASK                                     0x00000000ffffffff
219*5113495bSYour Name 
220*5113495bSYour Name 
221*5113495bSYour Name /* Description		RESERVED_5A
222*5113495bSYour Name 
223*5113495bSYour Name 			<legal 0>
224*5113495bSYour Name */
225*5113495bSYour Name 
226*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_RESERVED_5A_OFFSET                                   0x0000000000000010
227*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_RESERVED_5A_LSB                                      32
228*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_RESERVED_5A_MSB                                      63
229*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_RESERVED_5A_MASK                                     0xffffffff00000000
230*5113495bSYour Name 
231*5113495bSYour Name 
232*5113495bSYour Name /* Description		RESERVED_6A
233*5113495bSYour Name 
234*5113495bSYour Name 			<legal 0>
235*5113495bSYour Name */
236*5113495bSYour Name 
237*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_RESERVED_6A_OFFSET                                   0x0000000000000018
238*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_RESERVED_6A_LSB                                      0
239*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_RESERVED_6A_MSB                                      31
240*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_RESERVED_6A_MASK                                     0x00000000ffffffff
241*5113495bSYour Name 
242*5113495bSYour Name 
243*5113495bSYour Name /* Description		RESERVED_7A
244*5113495bSYour Name 
245*5113495bSYour Name 			<legal 0>
246*5113495bSYour Name */
247*5113495bSYour Name 
248*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_RESERVED_7A_OFFSET                                   0x0000000000000018
249*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_RESERVED_7A_LSB                                      32
250*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_RESERVED_7A_MSB                                      63
251*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_RESERVED_7A_MASK                                     0xffffffff00000000
252*5113495bSYour Name 
253*5113495bSYour Name 
254*5113495bSYour Name /* Description		RESERVED_8A
255*5113495bSYour Name 
256*5113495bSYour Name 			<legal 0>
257*5113495bSYour Name */
258*5113495bSYour Name 
259*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_RESERVED_8A_OFFSET                                   0x0000000000000020
260*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_RESERVED_8A_LSB                                      0
261*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_RESERVED_8A_MSB                                      31
262*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_RESERVED_8A_MASK                                     0x00000000ffffffff
263*5113495bSYour Name 
264*5113495bSYour Name 
265*5113495bSYour Name /* Description		TLV64_PADDING
266*5113495bSYour Name 
267*5113495bSYour Name 			Automatic DWORD padding inserted while converting TLV32
268*5113495bSYour Name 			to TLV64 for 64 bit ARCH
269*5113495bSYour Name 			<legal 0>
270*5113495bSYour Name */
271*5113495bSYour Name 
272*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_TLV64_PADDING_OFFSET                                 0x0000000000000020
273*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_TLV64_PADDING_LSB                                    32
274*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_TLV64_PADDING_MSB                                    63
275*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_TLV64_PADDING_MASK                                   0xffffffff00000000
276*5113495bSYour Name 
277*5113495bSYour Name 
278*5113495bSYour Name 
279*5113495bSYour Name #endif   // REO_FLUSH_TIMEOUT_LIST
280