xref: /wlan-driver/fw-api/hw/qcn6432/reo_get_queue_stats_status.h (revision 5113495b16420b49004c444715d2daae2066e7dc)
1 /*
2  * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
3  *
4  * Permission to use, copy, modify, and/or distribute this software for any
5  * purpose with or without fee is hereby granted, provided that the above
6  * copyright notice and this permission notice appear in all copies.
7  *
8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15  */
16 
17 #ifndef _REO_GET_QUEUE_STATS_STATUS_H_
18 #define _REO_GET_QUEUE_STATS_STATUS_H_
19 #if !defined(__ASSEMBLER__)
20 #endif
21 
22 #include "uniform_reo_status_header.h"
23 #define NUM_OF_DWORDS_REO_GET_QUEUE_STATS_STATUS 26
24 
25 #define NUM_OF_QWORDS_REO_GET_QUEUE_STATS_STATUS 13
26 
27 
28 struct reo_get_queue_stats_status {
29 #ifndef WIFI_BIT_ORDER_BIG_ENDIAN
30              struct   uniform_reo_status_header                                 status_header;
31              uint32_t ssn                                                     : 12, // [11:0]
32                       current_index                                           : 10, // [21:12]
33                       reserved_2                                              : 10; // [31:22]
34              uint32_t pn_31_0                                                 : 32; // [31:0]
35              uint32_t pn_63_32                                                : 32; // [31:0]
36              uint32_t pn_95_64                                                : 32; // [31:0]
37              uint32_t pn_127_96                                               : 32; // [31:0]
38              uint32_t last_rx_enqueue_timestamp                               : 32; // [31:0]
39              uint32_t last_rx_dequeue_timestamp                               : 32; // [31:0]
40              uint32_t rx_bitmap_31_0                                          : 32; // [31:0]
41              uint32_t rx_bitmap_63_32                                         : 32; // [31:0]
42              uint32_t rx_bitmap_95_64                                         : 32; // [31:0]
43              uint32_t rx_bitmap_127_96                                        : 32; // [31:0]
44              uint32_t rx_bitmap_159_128                                       : 32; // [31:0]
45              uint32_t rx_bitmap_191_160                                       : 32; // [31:0]
46              uint32_t rx_bitmap_223_192                                       : 32; // [31:0]
47              uint32_t rx_bitmap_255_224                                       : 32; // [31:0]
48              uint32_t rx_bitmap_287_256                                       : 32; // [31:0]
49              uint32_t current_mpdu_count                                      :  7, // [6:0]
50                       current_msdu_count                                      : 25; // [31:7]
51              uint32_t window_jump_2k                                          :  4, // [3:0]
52                       timeout_count                                           :  6, // [9:4]
53                       forward_due_to_bar_count                                :  6, // [15:10]
54                       duplicate_count                                         : 16; // [31:16]
55              uint32_t frames_in_order_count                                   : 24, // [23:0]
56                       bar_received_count                                      :  8; // [31:24]
57              uint32_t mpdu_frames_processed_count                             : 32; // [31:0]
58              uint32_t msdu_frames_processed_count                             : 32; // [31:0]
59              uint32_t total_processed_byte_count                              : 32; // [31:0]
60              uint32_t late_receive_mpdu_count                                 : 12, // [11:0]
61                       hole_count                                              : 16, // [27:12]
62                       get_queue_1k_stats_status_to_follow                     :  1, // [28:28]
63                       reserved_24a                                            :  3; // [31:29]
64              uint32_t aging_drop_mpdu_count                                   : 16, // [15:0]
65                       aging_drop_interval                                     :  8, // [23:16]
66                       reserved_25a                                            :  4, // [27:24]
67                       looping_count                                           :  4; // [31:28]
68 #else
69              struct   uniform_reo_status_header                                 status_header;
70              uint32_t reserved_2                                              : 10, // [31:22]
71                       current_index                                           : 10, // [21:12]
72                       ssn                                                     : 12; // [11:0]
73              uint32_t pn_31_0                                                 : 32; // [31:0]
74              uint32_t pn_63_32                                                : 32; // [31:0]
75              uint32_t pn_95_64                                                : 32; // [31:0]
76              uint32_t pn_127_96                                               : 32; // [31:0]
77              uint32_t last_rx_enqueue_timestamp                               : 32; // [31:0]
78              uint32_t last_rx_dequeue_timestamp                               : 32; // [31:0]
79              uint32_t rx_bitmap_31_0                                          : 32; // [31:0]
80              uint32_t rx_bitmap_63_32                                         : 32; // [31:0]
81              uint32_t rx_bitmap_95_64                                         : 32; // [31:0]
82              uint32_t rx_bitmap_127_96                                        : 32; // [31:0]
83              uint32_t rx_bitmap_159_128                                       : 32; // [31:0]
84              uint32_t rx_bitmap_191_160                                       : 32; // [31:0]
85              uint32_t rx_bitmap_223_192                                       : 32; // [31:0]
86              uint32_t rx_bitmap_255_224                                       : 32; // [31:0]
87              uint32_t rx_bitmap_287_256                                       : 32; // [31:0]
88              uint32_t current_msdu_count                                      : 25, // [31:7]
89                       current_mpdu_count                                      :  7; // [6:0]
90              uint32_t duplicate_count                                         : 16, // [31:16]
91                       forward_due_to_bar_count                                :  6, // [15:10]
92                       timeout_count                                           :  6, // [9:4]
93                       window_jump_2k                                          :  4; // [3:0]
94              uint32_t bar_received_count                                      :  8, // [31:24]
95                       frames_in_order_count                                   : 24; // [23:0]
96              uint32_t mpdu_frames_processed_count                             : 32; // [31:0]
97              uint32_t msdu_frames_processed_count                             : 32; // [31:0]
98              uint32_t total_processed_byte_count                              : 32; // [31:0]
99              uint32_t reserved_24a                                            :  3, // [31:29]
100                       get_queue_1k_stats_status_to_follow                     :  1, // [28:28]
101                       hole_count                                              : 16, // [27:12]
102                       late_receive_mpdu_count                                 : 12; // [11:0]
103              uint32_t looping_count                                           :  4, // [31:28]
104                       reserved_25a                                            :  4, // [27:24]
105                       aging_drop_interval                                     :  8, // [23:16]
106                       aging_drop_mpdu_count                                   : 16; // [15:0]
107 #endif
108 };
109 
110 
111 /* Description		STATUS_HEADER
112 
113 			Consumer: SW
114 			Producer: REO
115 
116 			Details that can link this status with the original command.
117 			It also contains info on how long REO took to execute this
118 			 command.
119 */
120 
121 
122 /* Description		REO_STATUS_NUMBER
123 
124 			Consumer: SW , DEBUG
125 			Producer: REO
126 
127 			The value in this field is equal to value of the 'REO_CMD_Number'
128 			field the REO command
129 
130 			This field helps to correlate the statuses with the REO
131 			commands.
132 
133 			<legal all>
134 */
135 
136 #define REO_GET_QUEUE_STATS_STATUS_STATUS_HEADER_REO_STATUS_NUMBER_OFFSET           0x0000000000000000
137 #define REO_GET_QUEUE_STATS_STATUS_STATUS_HEADER_REO_STATUS_NUMBER_LSB              0
138 #define REO_GET_QUEUE_STATS_STATUS_STATUS_HEADER_REO_STATUS_NUMBER_MSB              15
139 #define REO_GET_QUEUE_STATS_STATUS_STATUS_HEADER_REO_STATUS_NUMBER_MASK             0x000000000000ffff
140 
141 
142 /* Description		CMD_EXECUTION_TIME
143 
144 			Consumer: DEBUG
145 			Producer: REO
146 
147 			The amount of time REO took to excecute the command. Note
148 			 that this time does not include the duration of the command
149 			 waiting in the command ring, before the execution started.
150 
151 
152 			In us.
153 
154 			<legal all>
155 */
156 
157 #define REO_GET_QUEUE_STATS_STATUS_STATUS_HEADER_CMD_EXECUTION_TIME_OFFSET          0x0000000000000000
158 #define REO_GET_QUEUE_STATS_STATUS_STATUS_HEADER_CMD_EXECUTION_TIME_LSB             16
159 #define REO_GET_QUEUE_STATS_STATUS_STATUS_HEADER_CMD_EXECUTION_TIME_MSB             25
160 #define REO_GET_QUEUE_STATS_STATUS_STATUS_HEADER_CMD_EXECUTION_TIME_MASK            0x0000000003ff0000
161 
162 
163 /* Description		REO_CMD_EXECUTION_STATUS
164 
165 			Consumer: DEBUG
166 			Producer: REO
167 
168 			Execution status of the command.
169 
170 			<enum 0 reo_successful_execution> Command has successfully
171 			 be executed
172 			<enum 1 reo_blocked_execution> Command could not be executed
173 			 as the queue or cache was blocked
174 			<enum 2 reo_failed_execution> Command has encountered problems
175 			 when executing, like the queue descriptor not being valid.
176 			None of the status fields in the entire STATUS TLV are valid.
177 
178 			<enum 3 reo_resource_blocked> Command is NOT  executed because
179 			 one or more descriptors were blocked. This is SW programming
180 			 mistake.
181 			None of the status fields in the entire STATUS TLV are valid.
182 
183 
184 			<legal  0-3>
185 */
186 
187 #define REO_GET_QUEUE_STATS_STATUS_STATUS_HEADER_REO_CMD_EXECUTION_STATUS_OFFSET    0x0000000000000000
188 #define REO_GET_QUEUE_STATS_STATUS_STATUS_HEADER_REO_CMD_EXECUTION_STATUS_LSB       26
189 #define REO_GET_QUEUE_STATS_STATUS_STATUS_HEADER_REO_CMD_EXECUTION_STATUS_MSB       27
190 #define REO_GET_QUEUE_STATS_STATUS_STATUS_HEADER_REO_CMD_EXECUTION_STATUS_MASK      0x000000000c000000
191 
192 
193 /* Description		RESERVED_0A
194 
195 			<legal 0>
196 */
197 
198 #define REO_GET_QUEUE_STATS_STATUS_STATUS_HEADER_RESERVED_0A_OFFSET                 0x0000000000000000
199 #define REO_GET_QUEUE_STATS_STATUS_STATUS_HEADER_RESERVED_0A_LSB                    28
200 #define REO_GET_QUEUE_STATS_STATUS_STATUS_HEADER_RESERVED_0A_MSB                    31
201 #define REO_GET_QUEUE_STATS_STATUS_STATUS_HEADER_RESERVED_0A_MASK                   0x00000000f0000000
202 
203 
204 /* Description		TIMESTAMP
205 
206 			Timestamp at the moment that this status report is written.
207 
208 
209 			<legal all>
210 */
211 
212 #define REO_GET_QUEUE_STATS_STATUS_STATUS_HEADER_TIMESTAMP_OFFSET                   0x0000000000000000
213 #define REO_GET_QUEUE_STATS_STATUS_STATUS_HEADER_TIMESTAMP_LSB                      32
214 #define REO_GET_QUEUE_STATS_STATUS_STATUS_HEADER_TIMESTAMP_MSB                      63
215 #define REO_GET_QUEUE_STATS_STATUS_STATUS_HEADER_TIMESTAMP_MASK                     0xffffffff00000000
216 
217 
218 /* Description		SSN
219 
220 			Starting Sequence number of the session, this changes whenever
221 			 window moves. (can be filled by SW then maintained by REO)
222 
223 			<legal all>
224 */
225 
226 #define REO_GET_QUEUE_STATS_STATUS_SSN_OFFSET                                       0x0000000000000008
227 #define REO_GET_QUEUE_STATS_STATUS_SSN_LSB                                          0
228 #define REO_GET_QUEUE_STATS_STATUS_SSN_MSB                                          11
229 #define REO_GET_QUEUE_STATS_STATUS_SSN_MASK                                         0x0000000000000fff
230 
231 
232 /* Description		CURRENT_INDEX
233 
234 			Points to last forwarded packet
235 			<legal all>
236 */
237 
238 #define REO_GET_QUEUE_STATS_STATUS_CURRENT_INDEX_OFFSET                             0x0000000000000008
239 #define REO_GET_QUEUE_STATS_STATUS_CURRENT_INDEX_LSB                                12
240 #define REO_GET_QUEUE_STATS_STATUS_CURRENT_INDEX_MSB                                21
241 #define REO_GET_QUEUE_STATS_STATUS_CURRENT_INDEX_MASK                               0x00000000003ff000
242 
243 
244 /* Description		RESERVED_2
245 
246 			<legal 0>
247 */
248 
249 #define REO_GET_QUEUE_STATS_STATUS_RESERVED_2_OFFSET                                0x0000000000000008
250 #define REO_GET_QUEUE_STATS_STATUS_RESERVED_2_LSB                                   22
251 #define REO_GET_QUEUE_STATS_STATUS_RESERVED_2_MSB                                   31
252 #define REO_GET_QUEUE_STATS_STATUS_RESERVED_2_MASK                                  0x00000000ffc00000
253 
254 
255 /* Description		PN_31_0
256 
257 			Bits [31:0] of the PN number extracted from the IV field
258 
259 			<legal all>
260 */
261 
262 #define REO_GET_QUEUE_STATS_STATUS_PN_31_0_OFFSET                                   0x0000000000000008
263 #define REO_GET_QUEUE_STATS_STATUS_PN_31_0_LSB                                      32
264 #define REO_GET_QUEUE_STATS_STATUS_PN_31_0_MSB                                      63
265 #define REO_GET_QUEUE_STATS_STATUS_PN_31_0_MASK                                     0xffffffff00000000
266 
267 
268 /* Description		PN_63_32
269 
270 			Bits [63:32] of the PN number.
271 			<legal all>
272 */
273 
274 #define REO_GET_QUEUE_STATS_STATUS_PN_63_32_OFFSET                                  0x0000000000000010
275 #define REO_GET_QUEUE_STATS_STATUS_PN_63_32_LSB                                     0
276 #define REO_GET_QUEUE_STATS_STATUS_PN_63_32_MSB                                     31
277 #define REO_GET_QUEUE_STATS_STATUS_PN_63_32_MASK                                    0x00000000ffffffff
278 
279 
280 /* Description		PN_95_64
281 
282 			Bits [95:64] of the PN number.
283 			<legal all>
284 */
285 
286 #define REO_GET_QUEUE_STATS_STATUS_PN_95_64_OFFSET                                  0x0000000000000010
287 #define REO_GET_QUEUE_STATS_STATUS_PN_95_64_LSB                                     32
288 #define REO_GET_QUEUE_STATS_STATUS_PN_95_64_MSB                                     63
289 #define REO_GET_QUEUE_STATS_STATUS_PN_95_64_MASK                                    0xffffffff00000000
290 
291 
292 /* Description		PN_127_96
293 
294 			Bits [127:96] of the PN number.
295 			<legal all>
296 */
297 
298 #define REO_GET_QUEUE_STATS_STATUS_PN_127_96_OFFSET                                 0x0000000000000018
299 #define REO_GET_QUEUE_STATS_STATUS_PN_127_96_LSB                                    0
300 #define REO_GET_QUEUE_STATS_STATUS_PN_127_96_MSB                                    31
301 #define REO_GET_QUEUE_STATS_STATUS_PN_127_96_MASK                                   0x00000000ffffffff
302 
303 
304 /* Description		LAST_RX_ENQUEUE_TIMESTAMP
305 
306 			Timestamp of arrival of the last MPDU for this queue
307 			<legal all>
308 */
309 
310 #define REO_GET_QUEUE_STATS_STATUS_LAST_RX_ENQUEUE_TIMESTAMP_OFFSET                 0x0000000000000018
311 #define REO_GET_QUEUE_STATS_STATUS_LAST_RX_ENQUEUE_TIMESTAMP_LSB                    32
312 #define REO_GET_QUEUE_STATS_STATUS_LAST_RX_ENQUEUE_TIMESTAMP_MSB                    63
313 #define REO_GET_QUEUE_STATS_STATUS_LAST_RX_ENQUEUE_TIMESTAMP_MASK                   0xffffffff00000000
314 
315 
316 /* Description		LAST_RX_DEQUEUE_TIMESTAMP
317 
318 			Timestamp of forwarding an MPDU
319 
320 			If the queue is empty when a frame gets received, this time
321 			 shall be initialized to the 'enqueue' timestamp
322 
323 			Used for aging
324 			<legal all>
325 */
326 
327 #define REO_GET_QUEUE_STATS_STATUS_LAST_RX_DEQUEUE_TIMESTAMP_OFFSET                 0x0000000000000020
328 #define REO_GET_QUEUE_STATS_STATUS_LAST_RX_DEQUEUE_TIMESTAMP_LSB                    0
329 #define REO_GET_QUEUE_STATS_STATUS_LAST_RX_DEQUEUE_TIMESTAMP_MSB                    31
330 #define REO_GET_QUEUE_STATS_STATUS_LAST_RX_DEQUEUE_TIMESTAMP_MASK                   0x00000000ffffffff
331 
332 
333 /* Description		RX_BITMAP_31_0
334 
335 			When a bit is set, the corresponding frame is currently
336 			held in the re-order queue.
337 			The bitmap  is Fully managed by HW.
338 			SW shall init this to 0, and then never ever change it
339 			<legal all>
340 */
341 
342 #define REO_GET_QUEUE_STATS_STATUS_RX_BITMAP_31_0_OFFSET                            0x0000000000000020
343 #define REO_GET_QUEUE_STATS_STATUS_RX_BITMAP_31_0_LSB                               32
344 #define REO_GET_QUEUE_STATS_STATUS_RX_BITMAP_31_0_MSB                               63
345 #define REO_GET_QUEUE_STATS_STATUS_RX_BITMAP_31_0_MASK                              0xffffffff00000000
346 
347 
348 /* Description		RX_BITMAP_63_32
349 
350 			See Rx_bitmap_31_0 description
351 			<legal all>
352 */
353 
354 #define REO_GET_QUEUE_STATS_STATUS_RX_BITMAP_63_32_OFFSET                           0x0000000000000028
355 #define REO_GET_QUEUE_STATS_STATUS_RX_BITMAP_63_32_LSB                              0
356 #define REO_GET_QUEUE_STATS_STATUS_RX_BITMAP_63_32_MSB                              31
357 #define REO_GET_QUEUE_STATS_STATUS_RX_BITMAP_63_32_MASK                             0x00000000ffffffff
358 
359 
360 /* Description		RX_BITMAP_95_64
361 
362 			See Rx_bitmap_31_0 description
363 			<legal all>
364 */
365 
366 #define REO_GET_QUEUE_STATS_STATUS_RX_BITMAP_95_64_OFFSET                           0x0000000000000028
367 #define REO_GET_QUEUE_STATS_STATUS_RX_BITMAP_95_64_LSB                              32
368 #define REO_GET_QUEUE_STATS_STATUS_RX_BITMAP_95_64_MSB                              63
369 #define REO_GET_QUEUE_STATS_STATUS_RX_BITMAP_95_64_MASK                             0xffffffff00000000
370 
371 
372 /* Description		RX_BITMAP_127_96
373 
374 			See Rx_bitmap_31_0 description
375 			<legal all>
376 */
377 
378 #define REO_GET_QUEUE_STATS_STATUS_RX_BITMAP_127_96_OFFSET                          0x0000000000000030
379 #define REO_GET_QUEUE_STATS_STATUS_RX_BITMAP_127_96_LSB                             0
380 #define REO_GET_QUEUE_STATS_STATUS_RX_BITMAP_127_96_MSB                             31
381 #define REO_GET_QUEUE_STATS_STATUS_RX_BITMAP_127_96_MASK                            0x00000000ffffffff
382 
383 
384 /* Description		RX_BITMAP_159_128
385 
386 			See Rx_bitmap_31_0 description
387 			<legal all>
388 */
389 
390 #define REO_GET_QUEUE_STATS_STATUS_RX_BITMAP_159_128_OFFSET                         0x0000000000000030
391 #define REO_GET_QUEUE_STATS_STATUS_RX_BITMAP_159_128_LSB                            32
392 #define REO_GET_QUEUE_STATS_STATUS_RX_BITMAP_159_128_MSB                            63
393 #define REO_GET_QUEUE_STATS_STATUS_RX_BITMAP_159_128_MASK                           0xffffffff00000000
394 
395 
396 /* Description		RX_BITMAP_191_160
397 
398 			See Rx_bitmap_31_0 description
399 			<legal all>
400 */
401 
402 #define REO_GET_QUEUE_STATS_STATUS_RX_BITMAP_191_160_OFFSET                         0x0000000000000038
403 #define REO_GET_QUEUE_STATS_STATUS_RX_BITMAP_191_160_LSB                            0
404 #define REO_GET_QUEUE_STATS_STATUS_RX_BITMAP_191_160_MSB                            31
405 #define REO_GET_QUEUE_STATS_STATUS_RX_BITMAP_191_160_MASK                           0x00000000ffffffff
406 
407 
408 /* Description		RX_BITMAP_223_192
409 
410 			See Rx_bitmap_31_0 description
411 			<legal all>
412 */
413 
414 #define REO_GET_QUEUE_STATS_STATUS_RX_BITMAP_223_192_OFFSET                         0x0000000000000038
415 #define REO_GET_QUEUE_STATS_STATUS_RX_BITMAP_223_192_LSB                            32
416 #define REO_GET_QUEUE_STATS_STATUS_RX_BITMAP_223_192_MSB                            63
417 #define REO_GET_QUEUE_STATS_STATUS_RX_BITMAP_223_192_MASK                           0xffffffff00000000
418 
419 
420 /* Description		RX_BITMAP_255_224
421 
422 			See Rx_bitmap_31_0 description
423 			<legal all>
424 */
425 
426 #define REO_GET_QUEUE_STATS_STATUS_RX_BITMAP_255_224_OFFSET                         0x0000000000000040
427 #define REO_GET_QUEUE_STATS_STATUS_RX_BITMAP_255_224_LSB                            0
428 #define REO_GET_QUEUE_STATS_STATUS_RX_BITMAP_255_224_MSB                            31
429 #define REO_GET_QUEUE_STATS_STATUS_RX_BITMAP_255_224_MASK                           0x00000000ffffffff
430 
431 
432 /* Description		RX_BITMAP_287_256
433 
434 			See Rx_bitmap_31_0 description
435 			<legal all>
436 */
437 
438 #define REO_GET_QUEUE_STATS_STATUS_RX_BITMAP_287_256_OFFSET                         0x0000000000000040
439 #define REO_GET_QUEUE_STATS_STATUS_RX_BITMAP_287_256_LSB                            32
440 #define REO_GET_QUEUE_STATS_STATUS_RX_BITMAP_287_256_MSB                            63
441 #define REO_GET_QUEUE_STATS_STATUS_RX_BITMAP_287_256_MASK                           0xffffffff00000000
442 
443 
444 /* Description		CURRENT_MPDU_COUNT
445 
446 			The number of MPDUs in the queue.
447 
448 			<legal all>
449 */
450 
451 #define REO_GET_QUEUE_STATS_STATUS_CURRENT_MPDU_COUNT_OFFSET                        0x0000000000000048
452 #define REO_GET_QUEUE_STATS_STATUS_CURRENT_MPDU_COUNT_LSB                           0
453 #define REO_GET_QUEUE_STATS_STATUS_CURRENT_MPDU_COUNT_MSB                           6
454 #define REO_GET_QUEUE_STATS_STATUS_CURRENT_MPDU_COUNT_MASK                          0x000000000000007f
455 
456 
457 /* Description		CURRENT_MSDU_COUNT
458 
459 			The number of MSDUs in the queue.
460 			<legal all>
461 */
462 
463 #define REO_GET_QUEUE_STATS_STATUS_CURRENT_MSDU_COUNT_OFFSET                        0x0000000000000048
464 #define REO_GET_QUEUE_STATS_STATUS_CURRENT_MSDU_COUNT_LSB                           7
465 #define REO_GET_QUEUE_STATS_STATUS_CURRENT_MSDU_COUNT_MSB                           31
466 #define REO_GET_QUEUE_STATS_STATUS_CURRENT_MSDU_COUNT_MASK                          0x00000000ffffff80
467 
468 
469 /* Description		WINDOW_JUMP_2K
470 
471 			The number of times the window moved more then 2K
472 
473 			The counter saturates and freezes at 0xF
474 
475 			(Note: field name can not start with number: previous 2k_window_jump)
476 
477 
478 			<legal all>
479 */
480 
481 #define REO_GET_QUEUE_STATS_STATUS_WINDOW_JUMP_2K_OFFSET                            0x0000000000000048
482 #define REO_GET_QUEUE_STATS_STATUS_WINDOW_JUMP_2K_LSB                               32
483 #define REO_GET_QUEUE_STATS_STATUS_WINDOW_JUMP_2K_MSB                               35
484 #define REO_GET_QUEUE_STATS_STATUS_WINDOW_JUMP_2K_MASK                              0x0000000f00000000
485 
486 
487 /* Description		TIMEOUT_COUNT
488 
489 			The number of times that REO started forwarding frames even
490 			 though there is a hole in the bitmap. Forwarding reason
491 			 is Timeout
492 
493 			The counter saturates and freezes at 0x3F
494 
495 			<legal all>
496 */
497 
498 #define REO_GET_QUEUE_STATS_STATUS_TIMEOUT_COUNT_OFFSET                             0x0000000000000048
499 #define REO_GET_QUEUE_STATS_STATUS_TIMEOUT_COUNT_LSB                                36
500 #define REO_GET_QUEUE_STATS_STATUS_TIMEOUT_COUNT_MSB                                41
501 #define REO_GET_QUEUE_STATS_STATUS_TIMEOUT_COUNT_MASK                               0x000003f000000000
502 
503 
504 /* Description		FORWARD_DUE_TO_BAR_COUNT
505 
506 			The number of times that REO started forwarding frames even
507 			 though there is a hole in the bitmap. Forwarding reason
508 			 is reception of BAR frame.
509 
510 			The counter saturates and freezes at 0x3F
511 
512 			<legal all>
513 */
514 
515 #define REO_GET_QUEUE_STATS_STATUS_FORWARD_DUE_TO_BAR_COUNT_OFFSET                  0x0000000000000048
516 #define REO_GET_QUEUE_STATS_STATUS_FORWARD_DUE_TO_BAR_COUNT_LSB                     42
517 #define REO_GET_QUEUE_STATS_STATUS_FORWARD_DUE_TO_BAR_COUNT_MSB                     47
518 #define REO_GET_QUEUE_STATS_STATUS_FORWARD_DUE_TO_BAR_COUNT_MASK                    0x0000fc0000000000
519 
520 
521 /* Description		DUPLICATE_COUNT
522 
523 			The number of duplicate frames that have been detected
524 			<legal all>
525 */
526 
527 #define REO_GET_QUEUE_STATS_STATUS_DUPLICATE_COUNT_OFFSET                           0x0000000000000048
528 #define REO_GET_QUEUE_STATS_STATUS_DUPLICATE_COUNT_LSB                              48
529 #define REO_GET_QUEUE_STATS_STATUS_DUPLICATE_COUNT_MSB                              63
530 #define REO_GET_QUEUE_STATS_STATUS_DUPLICATE_COUNT_MASK                             0xffff000000000000
531 
532 
533 /* Description		FRAMES_IN_ORDER_COUNT
534 
535 			The number of frames that have been received in order (without
536 			 a hole that prevented them from being forwarded immediately)
537 
538 
539 			This corresponds to the Reorder opcodes:
540 			'FWDCUR' and 'FWD BUF'
541 
542 			<legal all>
543 */
544 
545 #define REO_GET_QUEUE_STATS_STATUS_FRAMES_IN_ORDER_COUNT_OFFSET                     0x0000000000000050
546 #define REO_GET_QUEUE_STATS_STATUS_FRAMES_IN_ORDER_COUNT_LSB                        0
547 #define REO_GET_QUEUE_STATS_STATUS_FRAMES_IN_ORDER_COUNT_MSB                        23
548 #define REO_GET_QUEUE_STATS_STATUS_FRAMES_IN_ORDER_COUNT_MASK                       0x0000000000ffffff
549 
550 
551 /* Description		BAR_RECEIVED_COUNT
552 
553 			The number of times a BAR frame is received.
554 
555 			This corresponds to the Reorder opcodes with 'DROP'
556 
557 			The counter saturates and freezes at 0xFF
558 			<legal all>
559 */
560 
561 #define REO_GET_QUEUE_STATS_STATUS_BAR_RECEIVED_COUNT_OFFSET                        0x0000000000000050
562 #define REO_GET_QUEUE_STATS_STATUS_BAR_RECEIVED_COUNT_LSB                           24
563 #define REO_GET_QUEUE_STATS_STATUS_BAR_RECEIVED_COUNT_MSB                           31
564 #define REO_GET_QUEUE_STATS_STATUS_BAR_RECEIVED_COUNT_MASK                          0x00000000ff000000
565 
566 
567 /* Description		MPDU_FRAMES_PROCESSED_COUNT
568 
569 			The total number of MPDU frames that have been processed
570 			 by REO. This includes the duplicates.
571 
572 			<legal all>
573 */
574 
575 #define REO_GET_QUEUE_STATS_STATUS_MPDU_FRAMES_PROCESSED_COUNT_OFFSET               0x0000000000000050
576 #define REO_GET_QUEUE_STATS_STATUS_MPDU_FRAMES_PROCESSED_COUNT_LSB                  32
577 #define REO_GET_QUEUE_STATS_STATUS_MPDU_FRAMES_PROCESSED_COUNT_MSB                  63
578 #define REO_GET_QUEUE_STATS_STATUS_MPDU_FRAMES_PROCESSED_COUNT_MASK                 0xffffffff00000000
579 
580 
581 /* Description		MSDU_FRAMES_PROCESSED_COUNT
582 
583 			The total number of MSDU frames that have been processed
584 			 by REO. This includes the duplicates.
585 
586 			<legal all>
587 */
588 
589 #define REO_GET_QUEUE_STATS_STATUS_MSDU_FRAMES_PROCESSED_COUNT_OFFSET               0x0000000000000058
590 #define REO_GET_QUEUE_STATS_STATUS_MSDU_FRAMES_PROCESSED_COUNT_LSB                  0
591 #define REO_GET_QUEUE_STATS_STATUS_MSDU_FRAMES_PROCESSED_COUNT_MSB                  31
592 #define REO_GET_QUEUE_STATS_STATUS_MSDU_FRAMES_PROCESSED_COUNT_MASK                 0x00000000ffffffff
593 
594 
595 /* Description		TOTAL_PROCESSED_BYTE_COUNT
596 
597 			An approximation of the number of bytes received for this
598 			 queue.
599 
600 			In 64 byte units
601 			<legal all>
602 */
603 
604 #define REO_GET_QUEUE_STATS_STATUS_TOTAL_PROCESSED_BYTE_COUNT_OFFSET                0x0000000000000058
605 #define REO_GET_QUEUE_STATS_STATUS_TOTAL_PROCESSED_BYTE_COUNT_LSB                   32
606 #define REO_GET_QUEUE_STATS_STATUS_TOTAL_PROCESSED_BYTE_COUNT_MSB                   63
607 #define REO_GET_QUEUE_STATS_STATUS_TOTAL_PROCESSED_BYTE_COUNT_MASK                  0xffffffff00000000
608 
609 
610 /* Description		LATE_RECEIVE_MPDU_COUNT
611 
612 			The number of MPDUs received after the window had already
613 			 moved on. The 'late' sequence window is defined as (Window
614 			 SSN - 256) - (Window SSN - 1)
615 
616 			This corresponds with Out of order detection in duplicate
617 			 detect FSM
618 
619 			The counter saturates and freezes at 0xFFF
620 
621 			<legal all>
622 */
623 
624 #define REO_GET_QUEUE_STATS_STATUS_LATE_RECEIVE_MPDU_COUNT_OFFSET                   0x0000000000000060
625 #define REO_GET_QUEUE_STATS_STATUS_LATE_RECEIVE_MPDU_COUNT_LSB                      0
626 #define REO_GET_QUEUE_STATS_STATUS_LATE_RECEIVE_MPDU_COUNT_MSB                      11
627 #define REO_GET_QUEUE_STATS_STATUS_LATE_RECEIVE_MPDU_COUNT_MASK                     0x0000000000000fff
628 
629 
630 /* Description		HOLE_COUNT
631 
632 			The number of times a hole was created in the receive bitmap.
633 
634 
635 			This corresponds to the Reorder opcodes with 'QCUR'
636 
637 			<legal all>
638 */
639 
640 #define REO_GET_QUEUE_STATS_STATUS_HOLE_COUNT_OFFSET                                0x0000000000000060
641 #define REO_GET_QUEUE_STATS_STATUS_HOLE_COUNT_LSB                                   12
642 #define REO_GET_QUEUE_STATS_STATUS_HOLE_COUNT_MSB                                   27
643 #define REO_GET_QUEUE_STATS_STATUS_HOLE_COUNT_MASK                                  0x000000000ffff000
644 
645 
646 /* Description		GET_QUEUE_1K_STATS_STATUS_TO_FOLLOW
647 
648 			Indicates that the queue supports a BA window size above
649 			 256, so a 'REO_GET_QUEUE_STATS_1K_STATUS' status TLV will
650 			 immediately follow.
651 
652 			<legal all>
653 */
654 
655 #define REO_GET_QUEUE_STATS_STATUS_GET_QUEUE_1K_STATS_STATUS_TO_FOLLOW_OFFSET       0x0000000000000060
656 #define REO_GET_QUEUE_STATS_STATUS_GET_QUEUE_1K_STATS_STATUS_TO_FOLLOW_LSB          28
657 #define REO_GET_QUEUE_STATS_STATUS_GET_QUEUE_1K_STATS_STATUS_TO_FOLLOW_MSB          28
658 #define REO_GET_QUEUE_STATS_STATUS_GET_QUEUE_1K_STATS_STATUS_TO_FOLLOW_MASK         0x0000000010000000
659 
660 
661 /* Description		RESERVED_24A
662 
663 			<legal 0>
664 */
665 
666 #define REO_GET_QUEUE_STATS_STATUS_RESERVED_24A_OFFSET                              0x0000000000000060
667 #define REO_GET_QUEUE_STATS_STATUS_RESERVED_24A_LSB                                 29
668 #define REO_GET_QUEUE_STATS_STATUS_RESERVED_24A_MSB                                 31
669 #define REO_GET_QUEUE_STATS_STATUS_RESERVED_24A_MASK                                0x00000000e0000000
670 
671 
672 /* Description		AGING_DROP_MPDU_COUNT
673 
674 			The number of holes in the bitmap that moved due to aging
675 			 counter expiry
676 			<legal all>
677 */
678 
679 #define REO_GET_QUEUE_STATS_STATUS_AGING_DROP_MPDU_COUNT_OFFSET                     0x0000000000000060
680 #define REO_GET_QUEUE_STATS_STATUS_AGING_DROP_MPDU_COUNT_LSB                        32
681 #define REO_GET_QUEUE_STATS_STATUS_AGING_DROP_MPDU_COUNT_MSB                        47
682 #define REO_GET_QUEUE_STATS_STATUS_AGING_DROP_MPDU_COUNT_MASK                       0x0000ffff00000000
683 
684 
685 /* Description		AGING_DROP_INTERVAL
686 
687 			The number of times holes got removed from the bitmap due
688 			 to aging counter expiry
689 			<legal all>
690 */
691 
692 #define REO_GET_QUEUE_STATS_STATUS_AGING_DROP_INTERVAL_OFFSET                       0x0000000000000060
693 #define REO_GET_QUEUE_STATS_STATUS_AGING_DROP_INTERVAL_LSB                          48
694 #define REO_GET_QUEUE_STATS_STATUS_AGING_DROP_INTERVAL_MSB                          55
695 #define REO_GET_QUEUE_STATS_STATUS_AGING_DROP_INTERVAL_MASK                         0x00ff000000000000
696 
697 
698 /* Description		RESERVED_25A
699 
700 			<legal 0>
701 */
702 
703 #define REO_GET_QUEUE_STATS_STATUS_RESERVED_25A_OFFSET                              0x0000000000000060
704 #define REO_GET_QUEUE_STATS_STATUS_RESERVED_25A_LSB                                 56
705 #define REO_GET_QUEUE_STATS_STATUS_RESERVED_25A_MSB                                 59
706 #define REO_GET_QUEUE_STATS_STATUS_RESERVED_25A_MASK                                0x0f00000000000000
707 
708 
709 /* Description		LOOPING_COUNT
710 
711 			A count value that indicates the number of times the producer
712 			 of entries into this Ring has looped around the ring.
713 			At initialization time, this value is set to 0. On the first
714 			 loop, this value is set to 1. After the max value is reached
715 			 allowed by the number of bits for this field, the count
716 			 value continues with 0 again.
717 
718 			In case SW is the consumer of the ring entries, it can use
719 			 this field to figure out up to where the producer of entries
720 			 has created new entries. This eliminates the need to check
721 			 where the "head pointer' of the ring is located once the
722 			 SW starts processing an interrupt indicating that new entries
723 			 have been put into this ring...
724 
725 			Also note that SW if it wants only needs to look at the
726 			LSB bit of this count value.
727 			<legal all>
728 */
729 
730 #define REO_GET_QUEUE_STATS_STATUS_LOOPING_COUNT_OFFSET                             0x0000000000000060
731 #define REO_GET_QUEUE_STATS_STATUS_LOOPING_COUNT_LSB                                60
732 #define REO_GET_QUEUE_STATS_STATUS_LOOPING_COUNT_MSB                                63
733 #define REO_GET_QUEUE_STATS_STATUS_LOOPING_COUNT_MASK                               0xf000000000000000
734 
735 
736 
737 #endif   // REO_GET_QUEUE_STATS_STATUS
738