1 /* 2 * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for any 5 * purpose with or without fee is hereby granted, provided that the above 6 * copyright notice and this permission notice appear in all copies. 7 * 8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15 */ 16 17 #ifndef _RX_MPDU_DESC_INFO_H_ 18 #define _RX_MPDU_DESC_INFO_H_ 19 #if !defined(__ASSEMBLER__) 20 #endif 21 22 #define NUM_OF_DWORDS_RX_MPDU_DESC_INFO 2 23 24 25 struct rx_mpdu_desc_info { 26 #ifndef WIFI_BIT_ORDER_BIG_ENDIAN 27 uint32_t msdu_count : 8, // [7:0] 28 fragment_flag : 1, // [8:8] 29 mpdu_retry_bit : 1, // [9:9] 30 ampdu_flag : 1, // [10:10] 31 bar_frame : 1, // [11:11] 32 pn_fields_contain_valid_info : 1, // [12:12] 33 raw_mpdu : 1, // [13:13] 34 more_fragment_flag : 1, // [14:14] 35 src_info : 12, // [26:15] 36 mpdu_qos_control_valid : 1, // [27:27] 37 tid : 4; // [31:28] 38 uint32_t peer_meta_data : 32; // [31:0] 39 #else 40 uint32_t tid : 4, // [31:28] 41 mpdu_qos_control_valid : 1, // [27:27] 42 src_info : 12, // [26:15] 43 more_fragment_flag : 1, // [14:14] 44 raw_mpdu : 1, // [13:13] 45 pn_fields_contain_valid_info : 1, // [12:12] 46 bar_frame : 1, // [11:11] 47 ampdu_flag : 1, // [10:10] 48 mpdu_retry_bit : 1, // [9:9] 49 fragment_flag : 1, // [8:8] 50 msdu_count : 8; // [7:0] 51 uint32_t peer_meta_data : 32; // [31:0] 52 #endif 53 }; 54 55 56 /* Description MSDU_COUNT 57 58 Consumer: REO/SW/FW 59 Producer: RXDMA 60 61 The number of MSDUs within the MPDU 62 <legal all> 63 */ 64 65 #define RX_MPDU_DESC_INFO_MSDU_COUNT_OFFSET 0x00000000 66 #define RX_MPDU_DESC_INFO_MSDU_COUNT_LSB 0 67 #define RX_MPDU_DESC_INFO_MSDU_COUNT_MSB 7 68 #define RX_MPDU_DESC_INFO_MSDU_COUNT_MASK 0x000000ff 69 70 71 /* Description FRAGMENT_FLAG 72 73 Consumer: REO/SW/FW 74 Producer: RXDMA 75 76 When set, this MPDU is a fragment and REO should forward 77 this fragment MPDU to the REO destination ring without 78 any reorder checks, pn checks or bitmap update. This implies 79 that REO is forwarding the pointer to the MSDU link descriptor. 80 The destination ring is coming from a programmable register 81 setting in REO 82 83 <legal all> 84 */ 85 86 #define RX_MPDU_DESC_INFO_FRAGMENT_FLAG_OFFSET 0x00000000 87 #define RX_MPDU_DESC_INFO_FRAGMENT_FLAG_LSB 8 88 #define RX_MPDU_DESC_INFO_FRAGMENT_FLAG_MSB 8 89 #define RX_MPDU_DESC_INFO_FRAGMENT_FLAG_MASK 0x00000100 90 91 92 /* Description MPDU_RETRY_BIT 93 94 Consumer: REO/SW/FW 95 Producer: RXDMA 96 97 The retry bit setting from the MPDU header of the received 98 frame 99 <legal all> 100 */ 101 102 #define RX_MPDU_DESC_INFO_MPDU_RETRY_BIT_OFFSET 0x00000000 103 #define RX_MPDU_DESC_INFO_MPDU_RETRY_BIT_LSB 9 104 #define RX_MPDU_DESC_INFO_MPDU_RETRY_BIT_MSB 9 105 #define RX_MPDU_DESC_INFO_MPDU_RETRY_BIT_MASK 0x00000200 106 107 108 /* Description AMPDU_FLAG 109 110 Consumer: REO/SW/FW 111 Producer: RXDMA 112 113 When set, the MPDU was received as part of an A-MPDU. 114 <legal all> 115 */ 116 117 #define RX_MPDU_DESC_INFO_AMPDU_FLAG_OFFSET 0x00000000 118 #define RX_MPDU_DESC_INFO_AMPDU_FLAG_LSB 10 119 #define RX_MPDU_DESC_INFO_AMPDU_FLAG_MSB 10 120 #define RX_MPDU_DESC_INFO_AMPDU_FLAG_MASK 0x00000400 121 122 123 /* Description BAR_FRAME 124 125 Consumer: REO/SW/FW 126 Producer: RXDMA 127 128 When set, the received frame is a BAR frame. After processing, 129 this frame shall be pushed to SW or deleted. 130 <legal all> 131 */ 132 133 #define RX_MPDU_DESC_INFO_BAR_FRAME_OFFSET 0x00000000 134 #define RX_MPDU_DESC_INFO_BAR_FRAME_LSB 11 135 #define RX_MPDU_DESC_INFO_BAR_FRAME_MSB 11 136 #define RX_MPDU_DESC_INFO_BAR_FRAME_MASK 0x00000800 137 138 139 /* Description PN_FIELDS_CONTAIN_VALID_INFO 140 141 Consumer: REO/SW/FW 142 Producer: RXDMA 143 144 Copied here by RXDMA from RX_MPDU_END 145 When not set, REO will Not perform a PN sequence number 146 check 147 */ 148 149 #define RX_MPDU_DESC_INFO_PN_FIELDS_CONTAIN_VALID_INFO_OFFSET 0x00000000 150 #define RX_MPDU_DESC_INFO_PN_FIELDS_CONTAIN_VALID_INFO_LSB 12 151 #define RX_MPDU_DESC_INFO_PN_FIELDS_CONTAIN_VALID_INFO_MSB 12 152 #define RX_MPDU_DESC_INFO_PN_FIELDS_CONTAIN_VALID_INFO_MASK 0x00001000 153 154 155 /* Description RAW_MPDU 156 157 Field only valid when first_msdu_in_mpdu_flag is set. 158 159 When set, the contents in the MSDU buffer contains a 'RAW' 160 MPDU. This 'RAW' MPDU might be spread out over multiple 161 MSDU buffers. 162 <legal all> 163 */ 164 165 #define RX_MPDU_DESC_INFO_RAW_MPDU_OFFSET 0x00000000 166 #define RX_MPDU_DESC_INFO_RAW_MPDU_LSB 13 167 #define RX_MPDU_DESC_INFO_RAW_MPDU_MSB 13 168 #define RX_MPDU_DESC_INFO_RAW_MPDU_MASK 0x00002000 169 170 171 /* Description MORE_FRAGMENT_FLAG 172 173 The More Fragment bit setting from the MPDU header of the 174 received frame 175 176 <legal all> 177 */ 178 179 #define RX_MPDU_DESC_INFO_MORE_FRAGMENT_FLAG_OFFSET 0x00000000 180 #define RX_MPDU_DESC_INFO_MORE_FRAGMENT_FLAG_LSB 14 181 #define RX_MPDU_DESC_INFO_MORE_FRAGMENT_FLAG_MSB 14 182 #define RX_MPDU_DESC_INFO_MORE_FRAGMENT_FLAG_MASK 0x00004000 183 184 185 /* Description SRC_INFO 186 187 Source (virtual) device/interface info. associated with 188 this peer 189 190 This field gets passed on by REO to PPE in the EDMA descriptor 191 ('REO_TO_PPE_RING'). 192 193 <legal all> 194 */ 195 196 #define RX_MPDU_DESC_INFO_SRC_INFO_OFFSET 0x00000000 197 #define RX_MPDU_DESC_INFO_SRC_INFO_LSB 15 198 #define RX_MPDU_DESC_INFO_SRC_INFO_MSB 26 199 #define RX_MPDU_DESC_INFO_SRC_INFO_MASK 0x07ff8000 200 201 202 /* Description MPDU_QOS_CONTROL_VALID 203 204 When set, the MPDU has a QoS control field. 205 206 In case of ndp or phy_err, this field will never be set. 207 208 <legal all> 209 */ 210 211 #define RX_MPDU_DESC_INFO_MPDU_QOS_CONTROL_VALID_OFFSET 0x00000000 212 #define RX_MPDU_DESC_INFO_MPDU_QOS_CONTROL_VALID_LSB 27 213 #define RX_MPDU_DESC_INFO_MPDU_QOS_CONTROL_VALID_MSB 27 214 #define RX_MPDU_DESC_INFO_MPDU_QOS_CONTROL_VALID_MASK 0x08000000 215 216 217 /* Description TID 218 219 Field only valid when mpdu_qos_control_valid is set 220 221 The TID field in the QoS control field 222 <legal all> 223 */ 224 225 #define RX_MPDU_DESC_INFO_TID_OFFSET 0x00000000 226 #define RX_MPDU_DESC_INFO_TID_LSB 28 227 #define RX_MPDU_DESC_INFO_TID_MSB 31 228 #define RX_MPDU_DESC_INFO_TID_MASK 0xf0000000 229 230 231 /* Description PEER_META_DATA 232 233 Meta data that SW has programmed in the Peer table entry 234 of the transmitting STA. 235 <legal all> 236 */ 237 238 #define RX_MPDU_DESC_INFO_PEER_META_DATA_OFFSET 0x00000004 239 #define RX_MPDU_DESC_INFO_PEER_META_DATA_LSB 0 240 #define RX_MPDU_DESC_INFO_PEER_META_DATA_MSB 31 241 #define RX_MPDU_DESC_INFO_PEER_META_DATA_MASK 0xffffffff 242 243 244 245 #endif // RX_MPDU_DESC_INFO 246