1*5113495bSYour Name /* 2*5113495bSYour Name * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. 3*5113495bSYour Name * 4*5113495bSYour Name * Permission to use, copy, modify, and/or distribute this software for any 5*5113495bSYour Name * purpose with or without fee is hereby granted, provided that the above 6*5113495bSYour Name * copyright notice and this permission notice appear in all copies. 7*5113495bSYour Name * 8*5113495bSYour Name * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9*5113495bSYour Name * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10*5113495bSYour Name * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11*5113495bSYour Name * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12*5113495bSYour Name * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13*5113495bSYour Name * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14*5113495bSYour Name * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15*5113495bSYour Name */ 16*5113495bSYour Name 17*5113495bSYour Name #ifndef _RX_MPDU_START_H_ 18*5113495bSYour Name #define _RX_MPDU_START_H_ 19*5113495bSYour Name #if !defined(__ASSEMBLER__) 20*5113495bSYour Name #endif 21*5113495bSYour Name 22*5113495bSYour Name #include "rx_mpdu_info.h" 23*5113495bSYour Name #define NUM_OF_DWORDS_RX_MPDU_START 30 24*5113495bSYour Name 25*5113495bSYour Name #define NUM_OF_QWORDS_RX_MPDU_START 15 26*5113495bSYour Name 27*5113495bSYour Name 28*5113495bSYour Name struct rx_mpdu_start { 29*5113495bSYour Name #ifndef WIFI_BIT_ORDER_BIG_ENDIAN 30*5113495bSYour Name struct rx_mpdu_info rx_mpdu_info_details; 31*5113495bSYour Name #else 32*5113495bSYour Name struct rx_mpdu_info rx_mpdu_info_details; 33*5113495bSYour Name #endif 34*5113495bSYour Name }; 35*5113495bSYour Name 36*5113495bSYour Name 37*5113495bSYour Name /* Description RX_MPDU_INFO_DETAILS 38*5113495bSYour Name 39*5113495bSYour Name Structure containing all the MPDU header details that might 40*5113495bSYour Name be needed for other modules further down the received path 41*5113495bSYour Name 42*5113495bSYour Name */ 43*5113495bSYour Name 44*5113495bSYour Name 45*5113495bSYour Name /* Description RXPT_CLASSIFY_INFO_DETAILS 46*5113495bSYour Name 47*5113495bSYour Name In case of ndp or phy_err or AST_based_lookup_valid == 0, 48*5113495bSYour Name this field will be set to 0 49*5113495bSYour Name 50*5113495bSYour Name RXOLE related classification info 51*5113495bSYour Name <legal all 52*5113495bSYour Name */ 53*5113495bSYour Name 54*5113495bSYour Name 55*5113495bSYour Name /* Description REO_DESTINATION_INDICATION 56*5113495bSYour Name 57*5113495bSYour Name The ID of the REO exit ring where the MSDU frame shall push 58*5113495bSYour Name after (MPDU level) reordering has finished. 59*5113495bSYour Name 60*5113495bSYour Name <enum 0 reo_destination_sw0> Reo will push the frame into 61*5113495bSYour Name the REO2SW0 ring 62*5113495bSYour Name <enum 1 reo_destination_sw1> Reo will push the frame into 63*5113495bSYour Name the REO2SW1 ring 64*5113495bSYour Name <enum 2 reo_destination_sw2> Reo will push the frame into 65*5113495bSYour Name the REO2SW2 ring 66*5113495bSYour Name <enum 3 reo_destination_sw3> Reo will push the frame into 67*5113495bSYour Name the REO2SW3 ring 68*5113495bSYour Name <enum 4 reo_destination_sw4> Reo will push the frame into 69*5113495bSYour Name the REO2SW4 ring 70*5113495bSYour Name <enum 5 reo_destination_release> Reo will push the frame 71*5113495bSYour Name into the REO_release ring 72*5113495bSYour Name <enum 6 reo_destination_fw> Reo will push the frame into 73*5113495bSYour Name the REO2FW ring 74*5113495bSYour Name <enum 7 reo_destination_sw5> Reo will push the frame into 75*5113495bSYour Name the REO2SW5 ring (REO remaps this in chips without REO2SW5 76*5113495bSYour Name ring) 77*5113495bSYour Name <enum 8 reo_destination_sw6> Reo will push the frame into 78*5113495bSYour Name the REO2SW6 ring (REO remaps this in chips without REO2SW6 79*5113495bSYour Name ring) 80*5113495bSYour Name <enum 9 reo_destination_sw7> Reo will push the frame into 81*5113495bSYour Name the REO2SW7 ring (REO remaps this in chips without REO2SW7 82*5113495bSYour Name ring) 83*5113495bSYour Name <enum 10 reo_destination_sw8> Reo will push the frame into 84*5113495bSYour Name the REO2SW8 ring (REO remaps this in chips without REO2SW8 85*5113495bSYour Name ring) 86*5113495bSYour Name <enum 11 reo_destination_11> REO remaps this 87*5113495bSYour Name <enum 12 reo_destination_12> REO remaps this <enum 13 reo_destination_13> 88*5113495bSYour Name REO remaps this 89*5113495bSYour Name <enum 14 reo_destination_14> REO remaps this 90*5113495bSYour Name <enum 15 reo_destination_15> REO remaps this 91*5113495bSYour Name <enum 16 reo_destination_16> REO remaps this 92*5113495bSYour Name <enum 17 reo_destination_17> REO remaps this 93*5113495bSYour Name <enum 18 reo_destination_18> REO remaps this 94*5113495bSYour Name <enum 19 reo_destination_19> REO remaps this 95*5113495bSYour Name <enum 20 reo_destination_20> REO remaps this 96*5113495bSYour Name <enum 21 reo_destination_21> REO remaps this 97*5113495bSYour Name <enum 22 reo_destination_22> REO remaps this 98*5113495bSYour Name <enum 23 reo_destination_23> REO remaps this 99*5113495bSYour Name <enum 24 reo_destination_24> REO remaps this 100*5113495bSYour Name <enum 25 reo_destination_25> REO remaps this 101*5113495bSYour Name <enum 26 reo_destination_26> REO remaps this 102*5113495bSYour Name <enum 27 reo_destination_27> REO remaps this 103*5113495bSYour Name <enum 28 reo_destination_28> REO remaps this 104*5113495bSYour Name <enum 29 reo_destination_29> REO remaps this 105*5113495bSYour Name <enum 30 reo_destination_30> REO remaps this 106*5113495bSYour Name <enum 31 reo_destination_31> REO remaps this 107*5113495bSYour Name 108*5113495bSYour Name <legal all> 109*5113495bSYour Name */ 110*5113495bSYour Name 111*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_RXPT_CLASSIFY_INFO_DETAILS_REO_DESTINATION_INDICATION_OFFSET 0x0000000000000000 112*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_RXPT_CLASSIFY_INFO_DETAILS_REO_DESTINATION_INDICATION_LSB 0 113*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_RXPT_CLASSIFY_INFO_DETAILS_REO_DESTINATION_INDICATION_MSB 4 114*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_RXPT_CLASSIFY_INFO_DETAILS_REO_DESTINATION_INDICATION_MASK 0x000000000000001f 115*5113495bSYour Name 116*5113495bSYour Name 117*5113495bSYour Name /* Description LMAC_PEER_ID_MSB 118*5113495bSYour Name 119*5113495bSYour Name If use_flow_id_toeplitz_clfy is set and lmac_peer_id_'sb 120*5113495bSYour Name is 2'b00, Rx OLE uses a REO desination indicati'n of {1'b1, 121*5113495bSYour Name hash[3:0]} using the chosen Toeplitz hash from Common Parser 122*5113495bSYour Name if flow search fails. 123*5113495bSYour Name If use_flow_id_toeplitz_clfy is set and lmac_peer_id_msb 124*5113495bSYour Name 's not 2'b00, Rx OLE uses a REO desination indication of 125*5113495bSYour Name {lmac_peer_id_msb, hash[2:0]} using the chosen Toeplitz 126*5113495bSYour Name hash from Common Parser if flow search fails. 127*5113495bSYour Name <legal all> 128*5113495bSYour Name */ 129*5113495bSYour Name 130*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_RXPT_CLASSIFY_INFO_DETAILS_LMAC_PEER_ID_MSB_OFFSET 0x0000000000000000 131*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_RXPT_CLASSIFY_INFO_DETAILS_LMAC_PEER_ID_MSB_LSB 5 132*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_RXPT_CLASSIFY_INFO_DETAILS_LMAC_PEER_ID_MSB_MSB 6 133*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_RXPT_CLASSIFY_INFO_DETAILS_LMAC_PEER_ID_MSB_MASK 0x0000000000000060 134*5113495bSYour Name 135*5113495bSYour Name 136*5113495bSYour Name /* Description USE_FLOW_ID_TOEPLITZ_CLFY 137*5113495bSYour Name 138*5113495bSYour Name Indication to Rx OLE to enable REO destination routing based 139*5113495bSYour Name on the chosen Toeplitz hash from Common Parser, in case 140*5113495bSYour Name flow search fails 141*5113495bSYour Name <legal all> 142*5113495bSYour Name */ 143*5113495bSYour Name 144*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_RXPT_CLASSIFY_INFO_DETAILS_USE_FLOW_ID_TOEPLITZ_CLFY_OFFSET 0x0000000000000000 145*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_RXPT_CLASSIFY_INFO_DETAILS_USE_FLOW_ID_TOEPLITZ_CLFY_LSB 7 146*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_RXPT_CLASSIFY_INFO_DETAILS_USE_FLOW_ID_TOEPLITZ_CLFY_MSB 7 147*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_RXPT_CLASSIFY_INFO_DETAILS_USE_FLOW_ID_TOEPLITZ_CLFY_MASK 0x0000000000000080 148*5113495bSYour Name 149*5113495bSYour Name 150*5113495bSYour Name /* Description PKT_SELECTION_FP_UCAST_DATA 151*5113495bSYour Name 152*5113495bSYour Name Filter pass Unicast data frame (matching rxpcu_filter_pass 153*5113495bSYour Name and sw_frame_group_Unicast_data) routing selection 154*5113495bSYour Name TODO: What about 'rxpcu_filter_pass_monior_ovrd'? 155*5113495bSYour Name 156*5113495bSYour Name 1'b0: source and destination rings are selected from the 157*5113495bSYour Name RxOLE register settings for the packet type 158*5113495bSYour Name 159*5113495bSYour Name 1'b1: source ring and destination ring is selected from 160*5113495bSYour Name the rxdma0_source_ring_selection and rxdma0_destination_ring_selection 161*5113495bSYour Name fields in this STRUCT 162*5113495bSYour Name <legal all> 163*5113495bSYour Name */ 164*5113495bSYour Name 165*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_RXPT_CLASSIFY_INFO_DETAILS_PKT_SELECTION_FP_UCAST_DATA_OFFSET 0x0000000000000000 166*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_RXPT_CLASSIFY_INFO_DETAILS_PKT_SELECTION_FP_UCAST_DATA_LSB 8 167*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_RXPT_CLASSIFY_INFO_DETAILS_PKT_SELECTION_FP_UCAST_DATA_MSB 8 168*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_RXPT_CLASSIFY_INFO_DETAILS_PKT_SELECTION_FP_UCAST_DATA_MASK 0x0000000000000100 169*5113495bSYour Name 170*5113495bSYour Name 171*5113495bSYour Name /* Description PKT_SELECTION_FP_MCAST_DATA 172*5113495bSYour Name 173*5113495bSYour Name Filter pass Multicast data frame (matching rxpcu_filter_pass 174*5113495bSYour Name and sw_frame_group_Multicast_data) routing selection 175*5113495bSYour Name TODO: What about 'rxpcu_filter_pass_monior_ovrd'? 176*5113495bSYour Name 177*5113495bSYour Name 1'b0: source and destination rings are selected from the 178*5113495bSYour Name RxOLE register settings for the packet type 179*5113495bSYour Name 180*5113495bSYour Name 1'b1: source ring and destination ring is selected from 181*5113495bSYour Name the rxdma0_source_ring_selection and rxdma0_destination_ring_selection 182*5113495bSYour Name fields in this STRUCT 183*5113495bSYour Name <legal all> 184*5113495bSYour Name */ 185*5113495bSYour Name 186*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_RXPT_CLASSIFY_INFO_DETAILS_PKT_SELECTION_FP_MCAST_DATA_OFFSET 0x0000000000000000 187*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_RXPT_CLASSIFY_INFO_DETAILS_PKT_SELECTION_FP_MCAST_DATA_LSB 9 188*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_RXPT_CLASSIFY_INFO_DETAILS_PKT_SELECTION_FP_MCAST_DATA_MSB 9 189*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_RXPT_CLASSIFY_INFO_DETAILS_PKT_SELECTION_FP_MCAST_DATA_MASK 0x0000000000000200 190*5113495bSYour Name 191*5113495bSYour Name 192*5113495bSYour Name /* Description PKT_SELECTION_FP_1000 193*5113495bSYour Name 194*5113495bSYour Name Filter pass BAR frame (matching rxpcu_filter_pass and sw_frame_group_ctrl_1000) 195*5113495bSYour Name routing selection 196*5113495bSYour Name TODO: What about 'rxpcu_filter_pass_monior_ovrd'? 197*5113495bSYour Name 198*5113495bSYour Name 1'b0: source and destination rings are selected from the 199*5113495bSYour Name RxOLE register settings for the packet type 200*5113495bSYour Name 201*5113495bSYour Name 1'b1: source ring and destination ring is selected from 202*5113495bSYour Name the rxdma0_source_ring_selection and rxdma0_destination_ring_selection 203*5113495bSYour Name fields in this STRUCT 204*5113495bSYour Name <legal all> 205*5113495bSYour Name */ 206*5113495bSYour Name 207*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_RXPT_CLASSIFY_INFO_DETAILS_PKT_SELECTION_FP_1000_OFFSET 0x0000000000000000 208*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_RXPT_CLASSIFY_INFO_DETAILS_PKT_SELECTION_FP_1000_LSB 10 209*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_RXPT_CLASSIFY_INFO_DETAILS_PKT_SELECTION_FP_1000_MSB 10 210*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_RXPT_CLASSIFY_INFO_DETAILS_PKT_SELECTION_FP_1000_MASK 0x0000000000000400 211*5113495bSYour Name 212*5113495bSYour Name 213*5113495bSYour Name /* Description RXDMA0_SOURCE_RING_SELECTION 214*5113495bSYour Name 215*5113495bSYour Name Field only valid when for the received frame type the corresponding 216*5113495bSYour Name pkt_selection_fp_... bit is set 217*5113495bSYour Name 218*5113495bSYour Name <enum 0 sw2rxdma0_0_buf_source_ring> The data buffer for 219*5113495bSYour Name this frame shall be sourced by sw2rxdma0 buffer source 220*5113495bSYour Name ring. 221*5113495bSYour Name <enum 1 fw2rxdma0_pmac0_buf_source_ring> The data buffer 222*5113495bSYour Name for this frame shall be sourced by fw2rxdma buffer source 223*5113495bSYour Name ring for PMAC0. 224*5113495bSYour Name <enum 2 sw2rxdma0_1_buf_source_ring> The data buffer for 225*5113495bSYour Name this frame shall be sourced by sw2rxdma1 buffer source 226*5113495bSYour Name ring. 227*5113495bSYour Name <enum 3 no_buffer_rxdma0_ring> The frame shall not be written 228*5113495bSYour Name to any data buffer. 229*5113495bSYour Name <enum 4 sw2rxdma0_exception_buf_source_ring> The data buffer 230*5113495bSYour Name for this frame shall be sourced by sw2rxdma_exception buffer 231*5113495bSYour Name source ring. 232*5113495bSYour Name <enum 5 fw2rxdma0_pmac1_buf_source_ring> The data buffer 233*5113495bSYour Name for this frame shall be sourced by fw2rxdma buffer source 234*5113495bSYour Name ring for PMAC1. 235*5113495bSYour Name 236*5113495bSYour Name <legal 0-5> 237*5113495bSYour Name */ 238*5113495bSYour Name 239*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_RXPT_CLASSIFY_INFO_DETAILS_RXDMA0_SOURCE_RING_SELECTION_OFFSET 0x0000000000000000 240*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_RXPT_CLASSIFY_INFO_DETAILS_RXDMA0_SOURCE_RING_SELECTION_LSB 11 241*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_RXPT_CLASSIFY_INFO_DETAILS_RXDMA0_SOURCE_RING_SELECTION_MSB 13 242*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_RXPT_CLASSIFY_INFO_DETAILS_RXDMA0_SOURCE_RING_SELECTION_MASK 0x0000000000003800 243*5113495bSYour Name 244*5113495bSYour Name 245*5113495bSYour Name /* Description RXDMA0_DESTINATION_RING_SELECTION 246*5113495bSYour Name 247*5113495bSYour Name Field only valid when for the received frame type the corresponding 248*5113495bSYour Name pkt_selection_fp_... bit is set 249*5113495bSYour Name 250*5113495bSYour Name <enum 0 rxdma_release_ring> RXDMA0 shall push the frame 251*5113495bSYour Name to the Release ring. Effectively this means the frame needs 252*5113495bSYour Name to be dropped. 253*5113495bSYour Name <enum 1 rxdma2fw_pmac0_ring> RXDMA0 shall push the frame 254*5113495bSYour Name to the FW ring for PMAC0. 255*5113495bSYour Name <enum 2 rxdma2sw_ring> RXDMA0 shall push the frame to the 256*5113495bSYour Name SW ring. 257*5113495bSYour Name <enum 3 rxdma2reo_ring> RXDMA0 shall push the frame to 258*5113495bSYour Name the REO entrance ring. 259*5113495bSYour Name <enum 4 rxdma2fw_pmac1_ring> RXDMA0 shall push the frame 260*5113495bSYour Name to the FW ring for PMAC1. 261*5113495bSYour Name <enum 5 rxdma2reo_remote0_ring> RXDMA0 shall push the frame 262*5113495bSYour Name to the first MLO REO entrance ring. 263*5113495bSYour Name <enum 6 rxdma2reo_remote1_ring> RXDMA0 shall push the frame 264*5113495bSYour Name to the second MLO REO entrance ring. 265*5113495bSYour Name 266*5113495bSYour Name <legal 0-6> 267*5113495bSYour Name */ 268*5113495bSYour Name 269*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_RXPT_CLASSIFY_INFO_DETAILS_RXDMA0_DESTINATION_RING_SELECTION_OFFSET 0x0000000000000000 270*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_RXPT_CLASSIFY_INFO_DETAILS_RXDMA0_DESTINATION_RING_SELECTION_LSB 14 271*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_RXPT_CLASSIFY_INFO_DETAILS_RXDMA0_DESTINATION_RING_SELECTION_MSB 16 272*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_RXPT_CLASSIFY_INFO_DETAILS_RXDMA0_DESTINATION_RING_SELECTION_MASK 0x000000000001c000 273*5113495bSYour Name 274*5113495bSYour Name 275*5113495bSYour Name /* Description MCAST_ECHO_DROP_ENABLE 276*5113495bSYour Name 277*5113495bSYour Name If set, for multicast packets, multicast echo check (i.e. 278*5113495bSYour Name SA search with mcast_echo_check = 1) shall be performed 279*5113495bSYour Name by RXOLE, and any multicast echo packets should be indicated 280*5113495bSYour Name to RXDMA for release to WBM 281*5113495bSYour Name 282*5113495bSYour Name <legal all> 283*5113495bSYour Name */ 284*5113495bSYour Name 285*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_RXPT_CLASSIFY_INFO_DETAILS_MCAST_ECHO_DROP_ENABLE_OFFSET 0x0000000000000000 286*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_RXPT_CLASSIFY_INFO_DETAILS_MCAST_ECHO_DROP_ENABLE_LSB 17 287*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_RXPT_CLASSIFY_INFO_DETAILS_MCAST_ECHO_DROP_ENABLE_MSB 17 288*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_RXPT_CLASSIFY_INFO_DETAILS_MCAST_ECHO_DROP_ENABLE_MASK 0x0000000000020000 289*5113495bSYour Name 290*5113495bSYour Name 291*5113495bSYour Name /* Description WDS_LEARNING_DETECT_EN 292*5113495bSYour Name 293*5113495bSYour Name If set, WDS learning detection based on SA search and notification 294*5113495bSYour Name to FW (using RXDMA0 status ring) is enabled and the "timestamp" 295*5113495bSYour Name field in address search failure cache-only entry should 296*5113495bSYour Name be used to avoid multiple WDS learning notifications. 297*5113495bSYour Name 298*5113495bSYour Name <legal all> 299*5113495bSYour Name */ 300*5113495bSYour Name 301*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_RXPT_CLASSIFY_INFO_DETAILS_WDS_LEARNING_DETECT_EN_OFFSET 0x0000000000000000 302*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_RXPT_CLASSIFY_INFO_DETAILS_WDS_LEARNING_DETECT_EN_LSB 18 303*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_RXPT_CLASSIFY_INFO_DETAILS_WDS_LEARNING_DETECT_EN_MSB 18 304*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_RXPT_CLASSIFY_INFO_DETAILS_WDS_LEARNING_DETECT_EN_MASK 0x0000000000040000 305*5113495bSYour Name 306*5113495bSYour Name 307*5113495bSYour Name /* Description INTRABSS_CHECK_EN 308*5113495bSYour Name 309*5113495bSYour Name If set, intra-BSS routing detection is enabled 310*5113495bSYour Name 311*5113495bSYour Name <legal all> 312*5113495bSYour Name */ 313*5113495bSYour Name 314*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_RXPT_CLASSIFY_INFO_DETAILS_INTRABSS_CHECK_EN_OFFSET 0x0000000000000000 315*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_RXPT_CLASSIFY_INFO_DETAILS_INTRABSS_CHECK_EN_LSB 19 316*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_RXPT_CLASSIFY_INFO_DETAILS_INTRABSS_CHECK_EN_MSB 19 317*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_RXPT_CLASSIFY_INFO_DETAILS_INTRABSS_CHECK_EN_MASK 0x0000000000080000 318*5113495bSYour Name 319*5113495bSYour Name 320*5113495bSYour Name /* Description USE_PPE 321*5113495bSYour Name 322*5113495bSYour Name Indicates to RXDMA to ignore the REO_destination_indication 323*5113495bSYour Name and use a programmed value corresponding to the REO2PPE 324*5113495bSYour Name ring 325*5113495bSYour Name 326*5113495bSYour Name This override to REO2PPE for packets requiring multiple 327*5113495bSYour Name buffers shall be disabled based on an RXDMA configuration, 328*5113495bSYour Name as PPE may not support such packets. 329*5113495bSYour Name 330*5113495bSYour Name <legal all> 331*5113495bSYour Name */ 332*5113495bSYour Name 333*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_RXPT_CLASSIFY_INFO_DETAILS_USE_PPE_OFFSET 0x0000000000000000 334*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_RXPT_CLASSIFY_INFO_DETAILS_USE_PPE_LSB 20 335*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_RXPT_CLASSIFY_INFO_DETAILS_USE_PPE_MSB 20 336*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_RXPT_CLASSIFY_INFO_DETAILS_USE_PPE_MASK 0x0000000000100000 337*5113495bSYour Name 338*5113495bSYour Name 339*5113495bSYour Name /* Description PPE_ROUTING_ENABLE 340*5113495bSYour Name 341*5113495bSYour Name Global enable/disable bit for routing to PPE, used to disable 342*5113495bSYour Name PPE routing even if RXOLE CCE or flow search indicate 'Use_PPE' 343*5113495bSYour Name 344*5113495bSYour Name 345*5113495bSYour Name This is set by SW for peers which are being handled by a 346*5113495bSYour Name host SW/accelerator subsystem that also handles packet 347*5113495bSYour Name buffer management for WiFi-to-PPE routing. 348*5113495bSYour Name 349*5113495bSYour Name This is cleared by SW for peers which are being handled 350*5113495bSYour Name by a different subsystem, completely disabling WiFi-to-PPE 351*5113495bSYour Name routing for such peers. 352*5113495bSYour Name 353*5113495bSYour Name <legal all> 354*5113495bSYour Name */ 355*5113495bSYour Name 356*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_RXPT_CLASSIFY_INFO_DETAILS_PPE_ROUTING_ENABLE_OFFSET 0x0000000000000000 357*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_RXPT_CLASSIFY_INFO_DETAILS_PPE_ROUTING_ENABLE_LSB 21 358*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_RXPT_CLASSIFY_INFO_DETAILS_PPE_ROUTING_ENABLE_MSB 21 359*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_RXPT_CLASSIFY_INFO_DETAILS_PPE_ROUTING_ENABLE_MASK 0x0000000000200000 360*5113495bSYour Name 361*5113495bSYour Name 362*5113495bSYour Name /* Description RESERVED_0B 363*5113495bSYour Name 364*5113495bSYour Name <legal 0> 365*5113495bSYour Name */ 366*5113495bSYour Name 367*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_RXPT_CLASSIFY_INFO_DETAILS_RESERVED_0B_OFFSET 0x0000000000000000 368*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_RXPT_CLASSIFY_INFO_DETAILS_RESERVED_0B_LSB 22 369*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_RXPT_CLASSIFY_INFO_DETAILS_RESERVED_0B_MSB 31 370*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_RXPT_CLASSIFY_INFO_DETAILS_RESERVED_0B_MASK 0x00000000ffc00000 371*5113495bSYour Name 372*5113495bSYour Name 373*5113495bSYour Name /* Description RX_REO_QUEUE_DESC_ADDR_31_0 374*5113495bSYour Name 375*5113495bSYour Name In case of ndp or phy_err or AST_based_lookup_valid == 0, 376*5113495bSYour Name this field will be set to 0 377*5113495bSYour Name 378*5113495bSYour Name Address (lower 32 bits) of the REO queue descriptor. 379*5113495bSYour Name 380*5113495bSYour Name If no Peer entry lookup happened for this frame, the value 381*5113495bSYour Name wil be set to 0, and the frame shall never be pushed to 382*5113495bSYour Name REO entrance ring. 383*5113495bSYour Name <legal all> 384*5113495bSYour Name */ 385*5113495bSYour Name 386*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_RX_REO_QUEUE_DESC_ADDR_31_0_OFFSET 0x0000000000000000 387*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_RX_REO_QUEUE_DESC_ADDR_31_0_LSB 32 388*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_RX_REO_QUEUE_DESC_ADDR_31_0_MSB 63 389*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_RX_REO_QUEUE_DESC_ADDR_31_0_MASK 0xffffffff00000000 390*5113495bSYour Name 391*5113495bSYour Name 392*5113495bSYour Name /* Description RX_REO_QUEUE_DESC_ADDR_39_32 393*5113495bSYour Name 394*5113495bSYour Name In case of ndp or phy_err or AST_based_lookup_valid == 0, 395*5113495bSYour Name this field will be set to 0 396*5113495bSYour Name 397*5113495bSYour Name Address (upper 8 bits) of the REO queue descriptor. 398*5113495bSYour Name 399*5113495bSYour Name If no Peer entry lookup happened for this frame, the value 400*5113495bSYour Name wil be set to 0, and the frame shall never be pushed to 401*5113495bSYour Name REO entrance ring. 402*5113495bSYour Name <legal all> 403*5113495bSYour Name */ 404*5113495bSYour Name 405*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_RX_REO_QUEUE_DESC_ADDR_39_32_OFFSET 0x0000000000000008 406*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_RX_REO_QUEUE_DESC_ADDR_39_32_LSB 0 407*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_RX_REO_QUEUE_DESC_ADDR_39_32_MSB 7 408*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_RX_REO_QUEUE_DESC_ADDR_39_32_MASK 0x00000000000000ff 409*5113495bSYour Name 410*5113495bSYour Name 411*5113495bSYour Name /* Description RECEIVE_QUEUE_NUMBER 412*5113495bSYour Name 413*5113495bSYour Name In case of ndp or phy_err or AST_based_lookup_valid == 0, 414*5113495bSYour Name this field will be set to 0 415*5113495bSYour Name 416*5113495bSYour Name Indicates the MPDU queue ID to which this MPDU link descriptor 417*5113495bSYour Name belongs 418*5113495bSYour Name Used for tracking and debugging 419*5113495bSYour Name <legal all> 420*5113495bSYour Name */ 421*5113495bSYour Name 422*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_RECEIVE_QUEUE_NUMBER_OFFSET 0x0000000000000008 423*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_RECEIVE_QUEUE_NUMBER_LSB 8 424*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_RECEIVE_QUEUE_NUMBER_MSB 23 425*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_RECEIVE_QUEUE_NUMBER_MASK 0x0000000000ffff00 426*5113495bSYour Name 427*5113495bSYour Name 428*5113495bSYour Name /* Description PRE_DELIM_ERR_WARNING 429*5113495bSYour Name 430*5113495bSYour Name Indicates that a delimiter FCS error was found in between 431*5113495bSYour Name the Previous MPDU and this MPDU. 432*5113495bSYour Name 433*5113495bSYour Name Note that this is just a warning, and does not mean that 434*5113495bSYour Name this MPDU is corrupted in any way. If it is, there will 435*5113495bSYour Name be other errors indicated such as FCS or decrypt errors 436*5113495bSYour Name 437*5113495bSYour Name 438*5113495bSYour Name In case of ndp or phy_err, this field will indicate at least 439*5113495bSYour Name one of delimiters located after the last MPDU in the previous 440*5113495bSYour Name PPDU has been corrupted. 441*5113495bSYour Name */ 442*5113495bSYour Name 443*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_PRE_DELIM_ERR_WARNING_OFFSET 0x0000000000000008 444*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_PRE_DELIM_ERR_WARNING_LSB 24 445*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_PRE_DELIM_ERR_WARNING_MSB 24 446*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_PRE_DELIM_ERR_WARNING_MASK 0x0000000001000000 447*5113495bSYour Name 448*5113495bSYour Name 449*5113495bSYour Name /* Description FIRST_DELIM_ERR 450*5113495bSYour Name 451*5113495bSYour Name Indicates that the first delimiter had a FCS failure. Only 452*5113495bSYour Name valid when first_mpdu and first_msdu are set. 453*5113495bSYour Name 454*5113495bSYour Name In case of ndp or phy_err, this field will never be set. 455*5113495bSYour Name 456*5113495bSYour Name */ 457*5113495bSYour Name 458*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_FIRST_DELIM_ERR_OFFSET 0x0000000000000008 459*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_FIRST_DELIM_ERR_LSB 25 460*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_FIRST_DELIM_ERR_MSB 25 461*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_FIRST_DELIM_ERR_MASK 0x0000000002000000 462*5113495bSYour Name 463*5113495bSYour Name 464*5113495bSYour Name /* Description RESERVED_2A 465*5113495bSYour Name 466*5113495bSYour Name <legal 0> 467*5113495bSYour Name */ 468*5113495bSYour Name 469*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_RESERVED_2A_OFFSET 0x0000000000000008 470*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_RESERVED_2A_LSB 26 471*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_RESERVED_2A_MSB 31 472*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_RESERVED_2A_MASK 0x00000000fc000000 473*5113495bSYour Name 474*5113495bSYour Name 475*5113495bSYour Name /* Description PN_31_0 476*5113495bSYour Name 477*5113495bSYour Name Field only valid when Frame_encryption_info_valid is set 478*5113495bSYour Name 479*5113495bSYour Name 480*5113495bSYour Name Bits [31:0] of the PN number extracted from the IV field 481*5113495bSYour Name 482*5113495bSYour Name WEP: IV = {key_id_octet, pn2, pn1, pn0}. Only pn[23:0] 483*5113495bSYour Name is valid. 484*5113495bSYour Name TKIP: IV = {pn5, pn4, pn3, pn2, key_id_octet, pn0, WEPSeed[1], 485*5113495bSYour Name pn1}. Only pn[47:0] is valid. 486*5113495bSYour Name AES-CCM: IV = {pn5, pn4, pn3, pn2, key_id_octet, 0x0, pn1, 487*5113495bSYour Name pn0}. Only pn[47:0] is valid. 488*5113495bSYour Name WAPI: IV = {key_id_octet, 0x0, pn15, pn14, pn13, pn12, pn11, 489*5113495bSYour Name pn10, pn9, pn8, pn7, pn6, pn5, pn4, pn3, pn2, pn1, pn0}. 490*5113495bSYour Name pn[127:0] are valid. 491*5113495bSYour Name 492*5113495bSYour Name In case of ndp or phy_err, this field will never be set. 493*5113495bSYour Name 494*5113495bSYour Name */ 495*5113495bSYour Name 496*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_PN_31_0_OFFSET 0x0000000000000008 497*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_PN_31_0_LSB 32 498*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_PN_31_0_MSB 63 499*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_PN_31_0_MASK 0xffffffff00000000 500*5113495bSYour Name 501*5113495bSYour Name 502*5113495bSYour Name /* Description PN_63_32 503*5113495bSYour Name 504*5113495bSYour Name Field only valid when Frame_encryption_info_valid is set 505*5113495bSYour Name 506*5113495bSYour Name 507*5113495bSYour Name Bits [63:32] of the PN number. See description for pn_31_0. 508*5113495bSYour Name 509*5113495bSYour Name 510*5113495bSYour Name In case of ndp or phy_err, this field will never be set. 511*5113495bSYour Name 512*5113495bSYour Name */ 513*5113495bSYour Name 514*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_PN_63_32_OFFSET 0x0000000000000010 515*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_PN_63_32_LSB 0 516*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_PN_63_32_MSB 31 517*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_PN_63_32_MASK 0x00000000ffffffff 518*5113495bSYour Name 519*5113495bSYour Name 520*5113495bSYour Name /* Description PN_95_64 521*5113495bSYour Name 522*5113495bSYour Name Field only valid when Frame_encryption_info_valid is set 523*5113495bSYour Name 524*5113495bSYour Name 525*5113495bSYour Name Bits [95:64] of the PN number. See description for pn_31_0. 526*5113495bSYour Name 527*5113495bSYour Name 528*5113495bSYour Name In case of ndp or phy_err, this field will never be set. 529*5113495bSYour Name 530*5113495bSYour Name */ 531*5113495bSYour Name 532*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_PN_95_64_OFFSET 0x0000000000000010 533*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_PN_95_64_LSB 32 534*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_PN_95_64_MSB 63 535*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_PN_95_64_MASK 0xffffffff00000000 536*5113495bSYour Name 537*5113495bSYour Name 538*5113495bSYour Name /* Description PN_127_96 539*5113495bSYour Name 540*5113495bSYour Name Field only valid when Frame_encryption_info_valid is set 541*5113495bSYour Name 542*5113495bSYour Name 543*5113495bSYour Name Bits [127:96] of the PN number. See description for pn_31_0. 544*5113495bSYour Name 545*5113495bSYour Name 546*5113495bSYour Name In case of ndp or phy_err, this field will never be set. 547*5113495bSYour Name 548*5113495bSYour Name */ 549*5113495bSYour Name 550*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_PN_127_96_OFFSET 0x0000000000000018 551*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_PN_127_96_LSB 0 552*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_PN_127_96_MSB 31 553*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_PN_127_96_MASK 0x00000000ffffffff 554*5113495bSYour Name 555*5113495bSYour Name 556*5113495bSYour Name /* Description EPD_EN 557*5113495bSYour Name 558*5113495bSYour Name Field only valid when AST_based_lookup_valid == 1. 559*5113495bSYour Name 560*5113495bSYour Name 561*5113495bSYour Name In case of ndp or phy_err or AST_based_lookup_valid == 0, 562*5113495bSYour Name this field will be set to 0 563*5113495bSYour Name 564*5113495bSYour Name If set to one use EPD instead of LPD 565*5113495bSYour Name 566*5113495bSYour Name In case of ndp or phy_err, this field will never be set. 567*5113495bSYour Name 568*5113495bSYour Name <legal all> 569*5113495bSYour Name */ 570*5113495bSYour Name 571*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_EPD_EN_OFFSET 0x0000000000000018 572*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_EPD_EN_LSB 32 573*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_EPD_EN_MSB 32 574*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_EPD_EN_MASK 0x0000000100000000 575*5113495bSYour Name 576*5113495bSYour Name 577*5113495bSYour Name /* Description ALL_FRAMES_SHALL_BE_ENCRYPTED 578*5113495bSYour Name 579*5113495bSYour Name In case of ndp or phy_err or AST_based_lookup_valid == 0, 580*5113495bSYour Name this field will be set to 0 581*5113495bSYour Name 582*5113495bSYour Name When set, all frames (data only ?) shall be encrypted. If 583*5113495bSYour Name not, RX CRYPTO shall set an error flag. 584*5113495bSYour Name <legal all> 585*5113495bSYour Name */ 586*5113495bSYour Name 587*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_ALL_FRAMES_SHALL_BE_ENCRYPTED_OFFSET 0x0000000000000018 588*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_ALL_FRAMES_SHALL_BE_ENCRYPTED_LSB 33 589*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_ALL_FRAMES_SHALL_BE_ENCRYPTED_MSB 33 590*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_ALL_FRAMES_SHALL_BE_ENCRYPTED_MASK 0x0000000200000000 591*5113495bSYour Name 592*5113495bSYour Name 593*5113495bSYour Name /* Description ENCRYPT_TYPE 594*5113495bSYour Name 595*5113495bSYour Name In case of ndp or phy_err or AST_based_lookup_valid == 0, 596*5113495bSYour Name this field will be set to 0 597*5113495bSYour Name 598*5113495bSYour Name Indicates type of decrypt cipher used (as defined in the 599*5113495bSYour Name peer entry) 600*5113495bSYour Name 601*5113495bSYour Name <enum 0 wep_40> WEP 40-bit 602*5113495bSYour Name <enum 1 wep_104> WEP 104-bit 603*5113495bSYour Name <enum 2 tkip_no_mic> TKIP without MIC 604*5113495bSYour Name <enum 3 wep_128> WEP 128-bit 605*5113495bSYour Name <enum 4 tkip_with_mic> TKIP with MIC 606*5113495bSYour Name <enum 5 wapi> WAPI 607*5113495bSYour Name <enum 6 aes_ccmp_128> AES CCMP 128 608*5113495bSYour Name <enum 7 no_cipher> No crypto 609*5113495bSYour Name <enum 8 aes_ccmp_256> AES CCMP 256 610*5113495bSYour Name <enum 9 aes_gcmp_128> AES CCMP 128 611*5113495bSYour Name <enum 10 aes_gcmp_256> AES CCMP 256 612*5113495bSYour Name <enum 11 wapi_gcm_sm4> WAPI GCM SM4 613*5113495bSYour Name 614*5113495bSYour Name <enum 12 wep_varied_width> WEP encryption. As for WEP per 615*5113495bSYour Name keyid the key bit width can vary, the key bit width for 616*5113495bSYour Name this MPDU will be indicated in field wep_key_width_for_variable 617*5113495bSYour Name key 618*5113495bSYour Name <legal 0-12> 619*5113495bSYour Name */ 620*5113495bSYour Name 621*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_ENCRYPT_TYPE_OFFSET 0x0000000000000018 622*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_ENCRYPT_TYPE_LSB 34 623*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_ENCRYPT_TYPE_MSB 37 624*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_ENCRYPT_TYPE_MASK 0x0000003c00000000 625*5113495bSYour Name 626*5113495bSYour Name 627*5113495bSYour Name /* Description WEP_KEY_WIDTH_FOR_VARIABLE_KEY 628*5113495bSYour Name 629*5113495bSYour Name Field only valid when key_type is set to wep_varied_width. 630*5113495bSYour Name 631*5113495bSYour Name 632*5113495bSYour Name This field indicates the size of the wep key for this MPDU. 633*5113495bSYour Name 634*5113495bSYour Name 635*5113495bSYour Name <enum 0 wep_varied_width_40> WEP 40-bit 636*5113495bSYour Name <enum 1 wep_varied_width_104> WEP 104-bit 637*5113495bSYour Name <enum 2 wep_varied_width_128> WEP 128-bit 638*5113495bSYour Name 639*5113495bSYour Name <legal 0-2> 640*5113495bSYour Name */ 641*5113495bSYour Name 642*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_WEP_KEY_WIDTH_FOR_VARIABLE_KEY_OFFSET 0x0000000000000018 643*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_WEP_KEY_WIDTH_FOR_VARIABLE_KEY_LSB 38 644*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_WEP_KEY_WIDTH_FOR_VARIABLE_KEY_MSB 39 645*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_WEP_KEY_WIDTH_FOR_VARIABLE_KEY_MASK 0x000000c000000000 646*5113495bSYour Name 647*5113495bSYour Name 648*5113495bSYour Name /* Description MESH_STA 649*5113495bSYour Name 650*5113495bSYour Name In case of ndp or phy_err or AST_based_lookup_valid == 0, 651*5113495bSYour Name this field will be set to 0 652*5113495bSYour Name 653*5113495bSYour Name When set, this is a Mesh (11s) STA. 654*5113495bSYour Name 655*5113495bSYour Name The interpretation of the A-MSDU 'Length' field in the MPDU 656*5113495bSYour Name (if any) is decided by the e-numerations below. 657*5113495bSYour Name 658*5113495bSYour Name <enum 0 MESH_DISABLE> 659*5113495bSYour Name <enum 1 MESH_Q2Q> A-MSDU 'Length' is big endian and includes 660*5113495bSYour Name the length of Mesh Control. 661*5113495bSYour Name <enum 2 MESH_11S_BE> A-MSDU 'Length' is big endian and excludes 662*5113495bSYour Name the length of Mesh Control. 663*5113495bSYour Name <enum 3 MESH_11S_LE> A-MSDU 'Length' is little endian and 664*5113495bSYour Name excludes the length of Mesh Control. This is 802.11s-compliant. 665*5113495bSYour Name 666*5113495bSYour Name <legal all> 667*5113495bSYour Name */ 668*5113495bSYour Name 669*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_MESH_STA_OFFSET 0x0000000000000018 670*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_MESH_STA_LSB 40 671*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_MESH_STA_MSB 41 672*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_MESH_STA_MASK 0x0000030000000000 673*5113495bSYour Name 674*5113495bSYour Name 675*5113495bSYour Name /* Description BSSID_HIT 676*5113495bSYour Name 677*5113495bSYour Name In case of ndp or phy_err or AST_based_lookup_valid == 0, 678*5113495bSYour Name this field will be set to 0 679*5113495bSYour Name 680*5113495bSYour Name When set, the BSSID of the incoming frame matched one of 681*5113495bSYour Name the 8 BSSID register values 682*5113495bSYour Name 683*5113495bSYour Name <legal all> 684*5113495bSYour Name */ 685*5113495bSYour Name 686*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_BSSID_HIT_OFFSET 0x0000000000000018 687*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_BSSID_HIT_LSB 42 688*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_BSSID_HIT_MSB 42 689*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_BSSID_HIT_MASK 0x0000040000000000 690*5113495bSYour Name 691*5113495bSYour Name 692*5113495bSYour Name /* Description BSSID_NUMBER 693*5113495bSYour Name 694*5113495bSYour Name Field only valid when bssid_hit is set. 695*5113495bSYour Name 696*5113495bSYour Name This number indicates which one out of the 8 BSSID register 697*5113495bSYour Name values matched the incoming frame 698*5113495bSYour Name <legal all> 699*5113495bSYour Name */ 700*5113495bSYour Name 701*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_BSSID_NUMBER_OFFSET 0x0000000000000018 702*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_BSSID_NUMBER_LSB 43 703*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_BSSID_NUMBER_MSB 46 704*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_BSSID_NUMBER_MASK 0x0000780000000000 705*5113495bSYour Name 706*5113495bSYour Name 707*5113495bSYour Name /* Description TID 708*5113495bSYour Name 709*5113495bSYour Name Field only valid when mpdu_qos_control_valid is set 710*5113495bSYour Name 711*5113495bSYour Name The TID field in the QoS control field 712*5113495bSYour Name <legal all> 713*5113495bSYour Name */ 714*5113495bSYour Name 715*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_TID_OFFSET 0x0000000000000018 716*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_TID_LSB 47 717*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_TID_MSB 50 718*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_TID_MASK 0x0007800000000000 719*5113495bSYour Name 720*5113495bSYour Name 721*5113495bSYour Name /* Description RESERVED_7A 722*5113495bSYour Name 723*5113495bSYour Name <legal 0> 724*5113495bSYour Name */ 725*5113495bSYour Name 726*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_RESERVED_7A_OFFSET 0x0000000000000018 727*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_RESERVED_7A_LSB 51 728*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_RESERVED_7A_MSB 63 729*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_RESERVED_7A_MASK 0xfff8000000000000 730*5113495bSYour Name 731*5113495bSYour Name 732*5113495bSYour Name /* Description PEER_META_DATA 733*5113495bSYour Name 734*5113495bSYour Name In case of ndp or phy_err or AST_based_lookup_valid == 0, 735*5113495bSYour Name this field will be set to 0 736*5113495bSYour Name 737*5113495bSYour Name Meta data that SW has programmed in the Peer table entry 738*5113495bSYour Name of the transmitting STA. 739*5113495bSYour Name <legal all> 740*5113495bSYour Name */ 741*5113495bSYour Name 742*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_PEER_META_DATA_OFFSET 0x0000000000000020 743*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_PEER_META_DATA_LSB 0 744*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_PEER_META_DATA_MSB 31 745*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_PEER_META_DATA_MASK 0x00000000ffffffff 746*5113495bSYour Name 747*5113495bSYour Name 748*5113495bSYour Name /* Description RXPCU_MPDU_FILTER_IN_CATEGORY 749*5113495bSYour Name 750*5113495bSYour Name Field indicates what the reason was that this MPDU frame 751*5113495bSYour Name was allowed to come into the receive path by RXPCU 752*5113495bSYour Name <enum 0 rxpcu_filter_pass> This MPDU passed the normal frame 753*5113495bSYour Name filter programming of rxpcu 754*5113495bSYour Name <enum 1 rxpcu_monitor_client> This MPDU did NOT pass the 755*5113495bSYour Name regular frame filter and would have been dropped, were 756*5113495bSYour Name it not for the frame fitting into the 'monitor_client' category. 757*5113495bSYour Name 758*5113495bSYour Name <enum 2 rxpcu_monitor_other> This MPDU did NOT pass the 759*5113495bSYour Name regular frame filter and also did not pass the rxpcu_monitor_client 760*5113495bSYour Name filter. It would have been dropped accept that it did pass 761*5113495bSYour Name the 'monitor_other' category. 762*5113495bSYour Name <enum 3 rxpcu_filter_pass_monitor_ovrd> This MPDU passed 763*5113495bSYour Name the normal frame filter programming of RXPCU but additionally 764*5113495bSYour Name fit into the 'monitor_override_client' category. 765*5113495bSYour Name 766*5113495bSYour Name Note: for ndp frame, if it was expected because the preceding 767*5113495bSYour Name NDPA was filter_pass, the setting rxpcu_filter_pass will 768*5113495bSYour Name be used. This setting will also be used for every ndp frame 769*5113495bSYour Name in case Promiscuous mode is enabled. 770*5113495bSYour Name 771*5113495bSYour Name In case promiscuous is not enabled, and an NDP is not preceded 772*5113495bSYour Name by a NPDA filter pass frame, the only other setting that 773*5113495bSYour Name could appear here for the NDP is rxpcu_monitor_other. 774*5113495bSYour Name (rxpcu has a configuration bit specifically for this scenario) 775*5113495bSYour Name 776*5113495bSYour Name 777*5113495bSYour Name Note: for 778*5113495bSYour Name <legal 0-3> 779*5113495bSYour Name */ 780*5113495bSYour Name 781*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_RXPCU_MPDU_FILTER_IN_CATEGORY_OFFSET 0x0000000000000020 782*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_RXPCU_MPDU_FILTER_IN_CATEGORY_LSB 32 783*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_RXPCU_MPDU_FILTER_IN_CATEGORY_MSB 33 784*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_RXPCU_MPDU_FILTER_IN_CATEGORY_MASK 0x0000000300000000 785*5113495bSYour Name 786*5113495bSYour Name 787*5113495bSYour Name /* Description SW_FRAME_GROUP_ID 788*5113495bSYour Name 789*5113495bSYour Name SW processes frames based on certain classifications. This 790*5113495bSYour Name field indicates to what sw classification this MPDU is 791*5113495bSYour Name mapped. 792*5113495bSYour Name The classification is given in priority order 793*5113495bSYour Name 794*5113495bSYour Name <enum 0 sw_frame_group_NDP_frame> Note: The corresponding 795*5113495bSYour Name Rxpcu_Mpdu_filter_in_category can be rxpcu_filter_pass 796*5113495bSYour Name or rxpcu_monitor_other 797*5113495bSYour Name 798*5113495bSYour Name <enum 1 sw_frame_group_Multicast_data> 799*5113495bSYour Name <enum 2 sw_frame_group_Unicast_data> 800*5113495bSYour Name <enum 3 sw_frame_group_Null_data > This includes mpdus of 801*5113495bSYour Name type Data Null. 802*5113495bSYour Name <enum 38 sw_frame_group_QoS_Null_data> This includes QoS 803*5113495bSYour Name Null frames except in UL MU or TB PPDUs. 804*5113495bSYour Name <enum 39 sw_frame_group_QoS_Null_data_TB> This includes 805*5113495bSYour Name QoS Null frames in UL MU or TB PPDUs. 806*5113495bSYour Name 807*5113495bSYour Name <enum 4 sw_frame_group_mgmt_0000 > 808*5113495bSYour Name <enum 5 sw_frame_group_mgmt_0001 > 809*5113495bSYour Name <enum 6 sw_frame_group_mgmt_0010 > 810*5113495bSYour Name <enum 7 sw_frame_group_mgmt_0011 > 811*5113495bSYour Name <enum 8 sw_frame_group_mgmt_0100 > 812*5113495bSYour Name <enum 9 sw_frame_group_mgmt_0101 > 813*5113495bSYour Name <enum 10 sw_frame_group_mgmt_0110 > 814*5113495bSYour Name <enum 11 sw_frame_group_mgmt_0111 > 815*5113495bSYour Name <enum 12 sw_frame_group_mgmt_1000 > 816*5113495bSYour Name <enum 13 sw_frame_group_mgmt_1001 > 817*5113495bSYour Name <enum 14 sw_frame_group_mgmt_1010 > 818*5113495bSYour Name <enum 15 sw_frame_group_mgmt_1011 > 819*5113495bSYour Name <enum 16 sw_frame_group_mgmt_1100 > 820*5113495bSYour Name <enum 17 sw_frame_group_mgmt_1101 > 821*5113495bSYour Name <enum 18 sw_frame_group_mgmt_1110 > 822*5113495bSYour Name <enum 19 sw_frame_group_mgmt_1111 > 823*5113495bSYour Name 824*5113495bSYour Name <enum 20 sw_frame_group_ctrl_0000 > 825*5113495bSYour Name <enum 21 sw_frame_group_ctrl_0001 > 826*5113495bSYour Name <enum 22 sw_frame_group_ctrl_0010 > 827*5113495bSYour Name <enum 23 sw_frame_group_ctrl_0011 > 828*5113495bSYour Name <enum 24 sw_frame_group_ctrl_0100 > 829*5113495bSYour Name <enum 25 sw_frame_group_ctrl_0101 > 830*5113495bSYour Name <enum 26 sw_frame_group_ctrl_0110 > 831*5113495bSYour Name <enum 27 sw_frame_group_ctrl_0111 > 832*5113495bSYour Name <enum 28 sw_frame_group_ctrl_1000 > 833*5113495bSYour Name <enum 29 sw_frame_group_ctrl_1001 > 834*5113495bSYour Name <enum 30 sw_frame_group_ctrl_1010 > 835*5113495bSYour Name <enum 31 sw_frame_group_ctrl_1011 > 836*5113495bSYour Name <enum 32 sw_frame_group_ctrl_1100 > 837*5113495bSYour Name <enum 33 sw_frame_group_ctrl_1101 > 838*5113495bSYour Name <enum 34 sw_frame_group_ctrl_1110 > 839*5113495bSYour Name <enum 35 sw_frame_group_ctrl_1111 > 840*5113495bSYour Name 841*5113495bSYour Name <enum 36 sw_frame_group_unsupported> This covers type 3 842*5113495bSYour Name and protocol version != 0 843*5113495bSYour Name Note: The corresponding Rxpcu_Mpdu_filter_in_category can 844*5113495bSYour Name only be rxpcu_monitor_other 845*5113495bSYour Name 846*5113495bSYour Name <enum 37 sw_frame_group_phy_error> PHY reported an error 847*5113495bSYour Name 848*5113495bSYour Name Note: The corresponding Rxpcu_Mpdu_filter_in_category can 849*5113495bSYour Name be rxpcu_filter_pass 850*5113495bSYour Name 851*5113495bSYour Name <legal 0-39> 852*5113495bSYour Name */ 853*5113495bSYour Name 854*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_SW_FRAME_GROUP_ID_OFFSET 0x0000000000000020 855*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_SW_FRAME_GROUP_ID_LSB 34 856*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_SW_FRAME_GROUP_ID_MSB 40 857*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_SW_FRAME_GROUP_ID_MASK 0x000001fc00000000 858*5113495bSYour Name 859*5113495bSYour Name 860*5113495bSYour Name /* Description NDP_FRAME 861*5113495bSYour Name 862*5113495bSYour Name When set, the received frame was an NDP frame, and thus 863*5113495bSYour Name there will be no MPDU data. 864*5113495bSYour Name TODO: Should this be extended to 2-bit e-num? 865*5113495bSYour Name <legal all> 866*5113495bSYour Name */ 867*5113495bSYour Name 868*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_NDP_FRAME_OFFSET 0x0000000000000020 869*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_NDP_FRAME_LSB 41 870*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_NDP_FRAME_MSB 41 871*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_NDP_FRAME_MASK 0x0000020000000000 872*5113495bSYour Name 873*5113495bSYour Name 874*5113495bSYour Name /* Description PHY_ERR 875*5113495bSYour Name 876*5113495bSYour Name When set, a PHY error was received before MAC received any 877*5113495bSYour Name data, and thus there will be no MPDU data. 878*5113495bSYour Name <legal all> 879*5113495bSYour Name */ 880*5113495bSYour Name 881*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_PHY_ERR_OFFSET 0x0000000000000020 882*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_PHY_ERR_LSB 42 883*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_PHY_ERR_MSB 42 884*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_PHY_ERR_MASK 0x0000040000000000 885*5113495bSYour Name 886*5113495bSYour Name 887*5113495bSYour Name /* Description PHY_ERR_DURING_MPDU_HEADER 888*5113495bSYour Name 889*5113495bSYour Name When set, a PHY error was received before MAC received the 890*5113495bSYour Name complete MPDU header which was needed for proper decoding 891*5113495bSYour Name 892*5113495bSYour Name <legal all> 893*5113495bSYour Name */ 894*5113495bSYour Name 895*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_PHY_ERR_DURING_MPDU_HEADER_OFFSET 0x0000000000000020 896*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_PHY_ERR_DURING_MPDU_HEADER_LSB 43 897*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_PHY_ERR_DURING_MPDU_HEADER_MSB 43 898*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_PHY_ERR_DURING_MPDU_HEADER_MASK 0x0000080000000000 899*5113495bSYour Name 900*5113495bSYour Name 901*5113495bSYour Name /* Description PROTOCOL_VERSION_ERR 902*5113495bSYour Name 903*5113495bSYour Name Set when RXPCU detected a version error in the Frame control 904*5113495bSYour Name field 905*5113495bSYour Name <legal all> 906*5113495bSYour Name */ 907*5113495bSYour Name 908*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_PROTOCOL_VERSION_ERR_OFFSET 0x0000000000000020 909*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_PROTOCOL_VERSION_ERR_LSB 44 910*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_PROTOCOL_VERSION_ERR_MSB 44 911*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_PROTOCOL_VERSION_ERR_MASK 0x0000100000000000 912*5113495bSYour Name 913*5113495bSYour Name 914*5113495bSYour Name /* Description AST_BASED_LOOKUP_VALID 915*5113495bSYour Name 916*5113495bSYour Name When set, AST based lookup for this frame has found a valid 917*5113495bSYour Name result. 918*5113495bSYour Name 919*5113495bSYour Name Note that for NDP frame this will never be set 920*5113495bSYour Name <legal all> 921*5113495bSYour Name */ 922*5113495bSYour Name 923*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_AST_BASED_LOOKUP_VALID_OFFSET 0x0000000000000020 924*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_AST_BASED_LOOKUP_VALID_LSB 45 925*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_AST_BASED_LOOKUP_VALID_MSB 45 926*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_AST_BASED_LOOKUP_VALID_MASK 0x0000200000000000 927*5113495bSYour Name 928*5113495bSYour Name 929*5113495bSYour Name /* Description RANGING 930*5113495bSYour Name 931*5113495bSYour Name When set, a ranging NDPA or a ranging NDP was received. 932*5113495bSYour Name 933*5113495bSYour Name This field is only for FW visibility. HW is not expected 934*5113495bSYour Name to take any action on this. 935*5113495bSYour Name <legal all> 936*5113495bSYour Name */ 937*5113495bSYour Name 938*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_RANGING_OFFSET 0x0000000000000020 939*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_RANGING_LSB 46 940*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_RANGING_MSB 46 941*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_RANGING_MASK 0x0000400000000000 942*5113495bSYour Name 943*5113495bSYour Name 944*5113495bSYour Name /* Description RESERVED_9A 945*5113495bSYour Name 946*5113495bSYour Name <legal 0> 947*5113495bSYour Name */ 948*5113495bSYour Name 949*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_RESERVED_9A_OFFSET 0x0000000000000020 950*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_RESERVED_9A_LSB 47 951*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_RESERVED_9A_MSB 47 952*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_RESERVED_9A_MASK 0x0000800000000000 953*5113495bSYour Name 954*5113495bSYour Name 955*5113495bSYour Name /* Description PHY_PPDU_ID 956*5113495bSYour Name 957*5113495bSYour Name A ppdu counter value that PHY increments for every PPDU 958*5113495bSYour Name received. The counter value wraps around 959*5113495bSYour Name <legal all> 960*5113495bSYour Name */ 961*5113495bSYour Name 962*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_PHY_PPDU_ID_OFFSET 0x0000000000000020 963*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_PHY_PPDU_ID_LSB 48 964*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_PHY_PPDU_ID_MSB 63 965*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_PHY_PPDU_ID_MASK 0xffff000000000000 966*5113495bSYour Name 967*5113495bSYour Name 968*5113495bSYour Name /* Description AST_INDEX 969*5113495bSYour Name 970*5113495bSYour Name This field indicates the index of the AST entry corresponding 971*5113495bSYour Name to this MPDU. It is provided by the GSE module instantiated 972*5113495bSYour Name in RXPCU. 973*5113495bSYour Name A value of 0xFFFF indicates an invalid AST index, meaning 974*5113495bSYour Name that No AST entry was found or NO AST search was performed 975*5113495bSYour Name 976*5113495bSYour Name 977*5113495bSYour Name In case of ndp or phy_err, this field will be set to 0xFFFF 978*5113495bSYour Name 979*5113495bSYour Name <legal all> 980*5113495bSYour Name */ 981*5113495bSYour Name 982*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_AST_INDEX_OFFSET 0x0000000000000028 983*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_AST_INDEX_LSB 0 984*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_AST_INDEX_MSB 15 985*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_AST_INDEX_MASK 0x000000000000ffff 986*5113495bSYour Name 987*5113495bSYour Name 988*5113495bSYour Name /* Description SW_PEER_ID 989*5113495bSYour Name 990*5113495bSYour Name In case of ndp or phy_err or AST_based_lookup_valid == 0, 991*5113495bSYour Name this field will be set to 0 992*5113495bSYour Name 993*5113495bSYour Name This field indicates a unique peer identifier. It is set 994*5113495bSYour Name equal to field 'sw_peer_id' from the AST entry 995*5113495bSYour Name 996*5113495bSYour Name <legal all> 997*5113495bSYour Name */ 998*5113495bSYour Name 999*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_SW_PEER_ID_OFFSET 0x0000000000000028 1000*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_SW_PEER_ID_LSB 16 1001*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_SW_PEER_ID_MSB 31 1002*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_SW_PEER_ID_MASK 0x00000000ffff0000 1003*5113495bSYour Name 1004*5113495bSYour Name 1005*5113495bSYour Name /* Description MPDU_FRAME_CONTROL_VALID 1006*5113495bSYour Name 1007*5113495bSYour Name When set, the field Mpdu_Frame_control_field has valid information 1008*5113495bSYour Name 1009*5113495bSYour Name 1010*5113495bSYour Name In case of ndp or phy_err, this field will never be set. 1011*5113495bSYour Name 1012*5113495bSYour Name <legal all> 1013*5113495bSYour Name */ 1014*5113495bSYour Name 1015*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_MPDU_FRAME_CONTROL_VALID_OFFSET 0x0000000000000028 1016*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_MPDU_FRAME_CONTROL_VALID_LSB 32 1017*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_MPDU_FRAME_CONTROL_VALID_MSB 32 1018*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_MPDU_FRAME_CONTROL_VALID_MASK 0x0000000100000000 1019*5113495bSYour Name 1020*5113495bSYour Name 1021*5113495bSYour Name /* Description MPDU_DURATION_VALID 1022*5113495bSYour Name 1023*5113495bSYour Name When set, the field Mpdu_duration_field has valid information 1024*5113495bSYour Name 1025*5113495bSYour Name 1026*5113495bSYour Name In case of ndp or phy_err, this field will never be set. 1027*5113495bSYour Name 1028*5113495bSYour Name <legal all> 1029*5113495bSYour Name */ 1030*5113495bSYour Name 1031*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_MPDU_DURATION_VALID_OFFSET 0x0000000000000028 1032*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_MPDU_DURATION_VALID_LSB 33 1033*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_MPDU_DURATION_VALID_MSB 33 1034*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_MPDU_DURATION_VALID_MASK 0x0000000200000000 1035*5113495bSYour Name 1036*5113495bSYour Name 1037*5113495bSYour Name /* Description MAC_ADDR_AD1_VALID 1038*5113495bSYour Name 1039*5113495bSYour Name When set, the fields mac_addr_ad1_..... have valid information 1040*5113495bSYour Name 1041*5113495bSYour Name 1042*5113495bSYour Name In case of ndp or phy_err, this field will never be set. 1043*5113495bSYour Name 1044*5113495bSYour Name <legal all> 1045*5113495bSYour Name */ 1046*5113495bSYour Name 1047*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_MAC_ADDR_AD1_VALID_OFFSET 0x0000000000000028 1048*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_MAC_ADDR_AD1_VALID_LSB 34 1049*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_MAC_ADDR_AD1_VALID_MSB 34 1050*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_MAC_ADDR_AD1_VALID_MASK 0x0000000400000000 1051*5113495bSYour Name 1052*5113495bSYour Name 1053*5113495bSYour Name /* Description MAC_ADDR_AD2_VALID 1054*5113495bSYour Name 1055*5113495bSYour Name When set, the fields mac_addr_ad2_..... have valid information 1056*5113495bSYour Name 1057*5113495bSYour Name 1058*5113495bSYour Name For MPDUs without Address 2, this field will not be set. 1059*5113495bSYour Name 1060*5113495bSYour Name 1061*5113495bSYour Name In case of ndp or phy_err, this field will never be set. 1062*5113495bSYour Name 1063*5113495bSYour Name <legal all> 1064*5113495bSYour Name */ 1065*5113495bSYour Name 1066*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_MAC_ADDR_AD2_VALID_OFFSET 0x0000000000000028 1067*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_MAC_ADDR_AD2_VALID_LSB 35 1068*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_MAC_ADDR_AD2_VALID_MSB 35 1069*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_MAC_ADDR_AD2_VALID_MASK 0x0000000800000000 1070*5113495bSYour Name 1071*5113495bSYour Name 1072*5113495bSYour Name /* Description MAC_ADDR_AD3_VALID 1073*5113495bSYour Name 1074*5113495bSYour Name When set, the fields mac_addr_ad3_..... have valid information 1075*5113495bSYour Name 1076*5113495bSYour Name 1077*5113495bSYour Name For MPDUs without Address 3, this field will not be set. 1078*5113495bSYour Name 1079*5113495bSYour Name 1080*5113495bSYour Name In case of ndp or phy_err, this field will never be set. 1081*5113495bSYour Name 1082*5113495bSYour Name <legal all> 1083*5113495bSYour Name */ 1084*5113495bSYour Name 1085*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_MAC_ADDR_AD3_VALID_OFFSET 0x0000000000000028 1086*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_MAC_ADDR_AD3_VALID_LSB 36 1087*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_MAC_ADDR_AD3_VALID_MSB 36 1088*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_MAC_ADDR_AD3_VALID_MASK 0x0000001000000000 1089*5113495bSYour Name 1090*5113495bSYour Name 1091*5113495bSYour Name /* Description MAC_ADDR_AD4_VALID 1092*5113495bSYour Name 1093*5113495bSYour Name When set, the fields mac_addr_ad4_..... have valid information 1094*5113495bSYour Name 1095*5113495bSYour Name 1096*5113495bSYour Name For MPDUs without Address 4, this field will not be set. 1097*5113495bSYour Name 1098*5113495bSYour Name 1099*5113495bSYour Name In case of ndp or phy_err, this field will never be set. 1100*5113495bSYour Name 1101*5113495bSYour Name <legal all> 1102*5113495bSYour Name */ 1103*5113495bSYour Name 1104*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_MAC_ADDR_AD4_VALID_OFFSET 0x0000000000000028 1105*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_MAC_ADDR_AD4_VALID_LSB 37 1106*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_MAC_ADDR_AD4_VALID_MSB 37 1107*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_MAC_ADDR_AD4_VALID_MASK 0x0000002000000000 1108*5113495bSYour Name 1109*5113495bSYour Name 1110*5113495bSYour Name /* Description MPDU_SEQUENCE_CONTROL_VALID 1111*5113495bSYour Name 1112*5113495bSYour Name When set, the fields mpdu_sequence_control_field and mpdu_sequence_number 1113*5113495bSYour Name have valid information as well as field 1114*5113495bSYour Name 1115*5113495bSYour Name For MPDUs without a sequence control field, this field will 1116*5113495bSYour Name not be set. 1117*5113495bSYour Name 1118*5113495bSYour Name In case of ndp or phy_err, this field will never be set. 1119*5113495bSYour Name 1120*5113495bSYour Name <legal all> 1121*5113495bSYour Name */ 1122*5113495bSYour Name 1123*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_MPDU_SEQUENCE_CONTROL_VALID_OFFSET 0x0000000000000028 1124*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_MPDU_SEQUENCE_CONTROL_VALID_LSB 38 1125*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_MPDU_SEQUENCE_CONTROL_VALID_MSB 38 1126*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_MPDU_SEQUENCE_CONTROL_VALID_MASK 0x0000004000000000 1127*5113495bSYour Name 1128*5113495bSYour Name 1129*5113495bSYour Name /* Description MPDU_QOS_CONTROL_VALID 1130*5113495bSYour Name 1131*5113495bSYour Name When set, the field mpdu_qos_control_field has valid information 1132*5113495bSYour Name 1133*5113495bSYour Name 1134*5113495bSYour Name For MPDUs without a QoS control field, this field will not 1135*5113495bSYour Name be set. 1136*5113495bSYour Name 1137*5113495bSYour Name In case of ndp or phy_err, this field will never be set. 1138*5113495bSYour Name 1139*5113495bSYour Name <legal all> 1140*5113495bSYour Name */ 1141*5113495bSYour Name 1142*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_MPDU_QOS_CONTROL_VALID_OFFSET 0x0000000000000028 1143*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_MPDU_QOS_CONTROL_VALID_LSB 39 1144*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_MPDU_QOS_CONTROL_VALID_MSB 39 1145*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_MPDU_QOS_CONTROL_VALID_MASK 0x0000008000000000 1146*5113495bSYour Name 1147*5113495bSYour Name 1148*5113495bSYour Name /* Description MPDU_HT_CONTROL_VALID 1149*5113495bSYour Name 1150*5113495bSYour Name When set, the field mpdu_HT_control_field has valid information 1151*5113495bSYour Name 1152*5113495bSYour Name 1153*5113495bSYour Name For MPDUs without a HT control field, this field will not 1154*5113495bSYour Name be set. 1155*5113495bSYour Name 1156*5113495bSYour Name In case of ndp or phy_err, this field will never be set. 1157*5113495bSYour Name 1158*5113495bSYour Name <legal all> 1159*5113495bSYour Name */ 1160*5113495bSYour Name 1161*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_MPDU_HT_CONTROL_VALID_OFFSET 0x0000000000000028 1162*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_MPDU_HT_CONTROL_VALID_LSB 40 1163*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_MPDU_HT_CONTROL_VALID_MSB 40 1164*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_MPDU_HT_CONTROL_VALID_MASK 0x0000010000000000 1165*5113495bSYour Name 1166*5113495bSYour Name 1167*5113495bSYour Name /* Description FRAME_ENCRYPTION_INFO_VALID 1168*5113495bSYour Name 1169*5113495bSYour Name When set, the encryption related info fields, like IV and 1170*5113495bSYour Name PN are valid 1171*5113495bSYour Name 1172*5113495bSYour Name For MPDUs that are not encrypted, this will not be set. 1173*5113495bSYour Name 1174*5113495bSYour Name In case of ndp or phy_err, this field will never be set. 1175*5113495bSYour Name 1176*5113495bSYour Name <legal all> 1177*5113495bSYour Name */ 1178*5113495bSYour Name 1179*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_FRAME_ENCRYPTION_INFO_VALID_OFFSET 0x0000000000000028 1180*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_FRAME_ENCRYPTION_INFO_VALID_LSB 41 1181*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_FRAME_ENCRYPTION_INFO_VALID_MSB 41 1182*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_FRAME_ENCRYPTION_INFO_VALID_MASK 0x0000020000000000 1183*5113495bSYour Name 1184*5113495bSYour Name 1185*5113495bSYour Name /* Description MPDU_FRAGMENT_NUMBER 1186*5113495bSYour Name 1187*5113495bSYour Name Field only valid when Mpdu_sequence_control_valid is set 1188*5113495bSYour Name AND Fragment_flag is set 1189*5113495bSYour Name 1190*5113495bSYour Name The fragment number from the 802.11 header 1191*5113495bSYour Name 1192*5113495bSYour Name <legal all> 1193*5113495bSYour Name */ 1194*5113495bSYour Name 1195*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_MPDU_FRAGMENT_NUMBER_OFFSET 0x0000000000000028 1196*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_MPDU_FRAGMENT_NUMBER_LSB 42 1197*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_MPDU_FRAGMENT_NUMBER_MSB 45 1198*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_MPDU_FRAGMENT_NUMBER_MASK 0x00003c0000000000 1199*5113495bSYour Name 1200*5113495bSYour Name 1201*5113495bSYour Name /* Description MORE_FRAGMENT_FLAG 1202*5113495bSYour Name 1203*5113495bSYour Name The More Fragment bit setting from the MPDU header of the 1204*5113495bSYour Name received frame 1205*5113495bSYour Name 1206*5113495bSYour Name <legal all> 1207*5113495bSYour Name */ 1208*5113495bSYour Name 1209*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_MORE_FRAGMENT_FLAG_OFFSET 0x0000000000000028 1210*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_MORE_FRAGMENT_FLAG_LSB 46 1211*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_MORE_FRAGMENT_FLAG_MSB 46 1212*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_MORE_FRAGMENT_FLAG_MASK 0x0000400000000000 1213*5113495bSYour Name 1214*5113495bSYour Name 1215*5113495bSYour Name /* Description RESERVED_11A 1216*5113495bSYour Name 1217*5113495bSYour Name <legal 0> 1218*5113495bSYour Name */ 1219*5113495bSYour Name 1220*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_RESERVED_11A_OFFSET 0x0000000000000028 1221*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_RESERVED_11A_LSB 47 1222*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_RESERVED_11A_MSB 47 1223*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_RESERVED_11A_MASK 0x0000800000000000 1224*5113495bSYour Name 1225*5113495bSYour Name 1226*5113495bSYour Name /* Description FR_DS 1227*5113495bSYour Name 1228*5113495bSYour Name Field only valid when Mpdu_frame_control_valid is set 1229*5113495bSYour Name 1230*5113495bSYour Name Set if the from DS bit is set in the frame control. 1231*5113495bSYour Name <legal all> 1232*5113495bSYour Name */ 1233*5113495bSYour Name 1234*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_FR_DS_OFFSET 0x0000000000000028 1235*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_FR_DS_LSB 48 1236*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_FR_DS_MSB 48 1237*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_FR_DS_MASK 0x0001000000000000 1238*5113495bSYour Name 1239*5113495bSYour Name 1240*5113495bSYour Name /* Description TO_DS 1241*5113495bSYour Name 1242*5113495bSYour Name Field only valid when Mpdu_frame_control_valid is set 1243*5113495bSYour Name 1244*5113495bSYour Name Set if the to DS bit is set in the frame control. 1245*5113495bSYour Name <legal all> 1246*5113495bSYour Name */ 1247*5113495bSYour Name 1248*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_TO_DS_OFFSET 0x0000000000000028 1249*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_TO_DS_LSB 49 1250*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_TO_DS_MSB 49 1251*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_TO_DS_MASK 0x0002000000000000 1252*5113495bSYour Name 1253*5113495bSYour Name 1254*5113495bSYour Name /* Description ENCRYPTED 1255*5113495bSYour Name 1256*5113495bSYour Name Field only valid when Mpdu_frame_control_valid is set. 1257*5113495bSYour Name 1258*5113495bSYour Name Protected bit from the frame control. 1259*5113495bSYour Name <legal all> 1260*5113495bSYour Name */ 1261*5113495bSYour Name 1262*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_ENCRYPTED_OFFSET 0x0000000000000028 1263*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_ENCRYPTED_LSB 50 1264*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_ENCRYPTED_MSB 50 1265*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_ENCRYPTED_MASK 0x0004000000000000 1266*5113495bSYour Name 1267*5113495bSYour Name 1268*5113495bSYour Name /* Description MPDU_RETRY 1269*5113495bSYour Name 1270*5113495bSYour Name Field only valid when Mpdu_frame_control_valid is set. 1271*5113495bSYour Name 1272*5113495bSYour Name Retry bit from the frame control. Only valid when first_msdu 1273*5113495bSYour Name is set. 1274*5113495bSYour Name <legal all> 1275*5113495bSYour Name */ 1276*5113495bSYour Name 1277*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_MPDU_RETRY_OFFSET 0x0000000000000028 1278*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_MPDU_RETRY_LSB 51 1279*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_MPDU_RETRY_MSB 51 1280*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_MPDU_RETRY_MASK 0x0008000000000000 1281*5113495bSYour Name 1282*5113495bSYour Name 1283*5113495bSYour Name /* Description MPDU_SEQUENCE_NUMBER 1284*5113495bSYour Name 1285*5113495bSYour Name Field only valid when Mpdu_sequence_control_valid is set. 1286*5113495bSYour Name 1287*5113495bSYour Name 1288*5113495bSYour Name The sequence number from the 802.11 header. 1289*5113495bSYour Name <legal all> 1290*5113495bSYour Name */ 1291*5113495bSYour Name 1292*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_MPDU_SEQUENCE_NUMBER_OFFSET 0x0000000000000028 1293*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_MPDU_SEQUENCE_NUMBER_LSB 52 1294*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_MPDU_SEQUENCE_NUMBER_MSB 63 1295*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_MPDU_SEQUENCE_NUMBER_MASK 0xfff0000000000000 1296*5113495bSYour Name 1297*5113495bSYour Name 1298*5113495bSYour Name /* Description KEY_ID_OCTET 1299*5113495bSYour Name 1300*5113495bSYour Name Field only valid when Frame_encryption_info_valid is set 1301*5113495bSYour Name 1302*5113495bSYour Name 1303*5113495bSYour Name The key ID octet from the IV. 1304*5113495bSYour Name 1305*5113495bSYour Name In case of ndp or phy_err or AST_based_lookup_valid == 0, 1306*5113495bSYour Name this field will be set to 0 1307*5113495bSYour Name <legal all> 1308*5113495bSYour Name */ 1309*5113495bSYour Name 1310*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_KEY_ID_OCTET_OFFSET 0x0000000000000030 1311*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_KEY_ID_OCTET_LSB 0 1312*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_KEY_ID_OCTET_MSB 7 1313*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_KEY_ID_OCTET_MASK 0x00000000000000ff 1314*5113495bSYour Name 1315*5113495bSYour Name 1316*5113495bSYour Name /* Description NEW_PEER_ENTRY 1317*5113495bSYour Name 1318*5113495bSYour Name In case of ndp or phy_err or AST_based_lookup_valid == 0, 1319*5113495bSYour Name this field will be set to 0 1320*5113495bSYour Name 1321*5113495bSYour Name Set if new RX_PEER_ENTRY TLV follows. If clear, RX_PEER_ENTRY 1322*5113495bSYour Name doesn't follow so RX DECRYPTION module either uses old 1323*5113495bSYour Name peer entry or not decrypt. 1324*5113495bSYour Name <legal all> 1325*5113495bSYour Name */ 1326*5113495bSYour Name 1327*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_NEW_PEER_ENTRY_OFFSET 0x0000000000000030 1328*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_NEW_PEER_ENTRY_LSB 8 1329*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_NEW_PEER_ENTRY_MSB 8 1330*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_NEW_PEER_ENTRY_MASK 0x0000000000000100 1331*5113495bSYour Name 1332*5113495bSYour Name 1333*5113495bSYour Name /* Description DECRYPT_NEEDED 1334*5113495bSYour Name 1335*5113495bSYour Name In case of ndp or phy_err or AST_based_lookup_valid == 0, 1336*5113495bSYour Name this field will be set to 0 1337*5113495bSYour Name 1338*5113495bSYour Name Set if decryption is needed. 1339*5113495bSYour Name 1340*5113495bSYour Name Note: 1341*5113495bSYour Name When RXPCU sets bit 'ast_index_not_found' and/or ast_index_timeout', 1342*5113495bSYour Name RXPCU will also ensure that this bit is NOT set 1343*5113495bSYour Name CRYPTO for that reason only needs to evaluate this bit and 1344*5113495bSYour Name non of the other ones. 1345*5113495bSYour Name <legal all> 1346*5113495bSYour Name */ 1347*5113495bSYour Name 1348*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_DECRYPT_NEEDED_OFFSET 0x0000000000000030 1349*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_DECRYPT_NEEDED_LSB 9 1350*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_DECRYPT_NEEDED_MSB 9 1351*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_DECRYPT_NEEDED_MASK 0x0000000000000200 1352*5113495bSYour Name 1353*5113495bSYour Name 1354*5113495bSYour Name /* Description DECAP_TYPE 1355*5113495bSYour Name 1356*5113495bSYour Name In case of ndp or phy_err or AST_based_lookup_valid == 0, 1357*5113495bSYour Name this field will be set to 0 1358*5113495bSYour Name 1359*5113495bSYour Name Used by the OLE during decapsulation. 1360*5113495bSYour Name 1361*5113495bSYour Name Indicates the decapsulation that HW will perform: 1362*5113495bSYour Name 1363*5113495bSYour Name <enum 0 RAW> No encapsulation 1364*5113495bSYour Name <enum 1 Native_WiFi> 1365*5113495bSYour Name <enum 2 Ethernet> Ethernet 2 (DIX) or 802.3 (uses SNAP/LLC) 1366*5113495bSYour Name 1367*5113495bSYour Name <enum 3 802_3> Indicate Ethernet 1368*5113495bSYour Name 1369*5113495bSYour Name <legal all> 1370*5113495bSYour Name */ 1371*5113495bSYour Name 1372*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_DECAP_TYPE_OFFSET 0x0000000000000030 1373*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_DECAP_TYPE_LSB 10 1374*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_DECAP_TYPE_MSB 11 1375*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_DECAP_TYPE_MASK 0x0000000000000c00 1376*5113495bSYour Name 1377*5113495bSYour Name 1378*5113495bSYour Name /* Description RX_INSERT_VLAN_C_TAG_PADDING 1379*5113495bSYour Name 1380*5113495bSYour Name In case of ndp or phy_err or AST_based_lookup_valid == 0, 1381*5113495bSYour Name this field will be set to 0 1382*5113495bSYour Name 1383*5113495bSYour Name Insert 4 byte of all zeros as VLAN tag if the rx payload 1384*5113495bSYour Name does not have VLAN. Used during decapsulation. 1385*5113495bSYour Name <legal all> 1386*5113495bSYour Name */ 1387*5113495bSYour Name 1388*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_RX_INSERT_VLAN_C_TAG_PADDING_OFFSET 0x0000000000000030 1389*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_RX_INSERT_VLAN_C_TAG_PADDING_LSB 12 1390*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_RX_INSERT_VLAN_C_TAG_PADDING_MSB 12 1391*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_RX_INSERT_VLAN_C_TAG_PADDING_MASK 0x0000000000001000 1392*5113495bSYour Name 1393*5113495bSYour Name 1394*5113495bSYour Name /* Description RX_INSERT_VLAN_S_TAG_PADDING 1395*5113495bSYour Name 1396*5113495bSYour Name In case of ndp or phy_err or AST_based_lookup_valid == 0, 1397*5113495bSYour Name this field will be set to 0 1398*5113495bSYour Name 1399*5113495bSYour Name Insert 4 byte of all zeros as double VLAN tag if the rx 1400*5113495bSYour Name payload does not have VLAN. Used during 1401*5113495bSYour Name <legal all> 1402*5113495bSYour Name */ 1403*5113495bSYour Name 1404*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_RX_INSERT_VLAN_S_TAG_PADDING_OFFSET 0x0000000000000030 1405*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_RX_INSERT_VLAN_S_TAG_PADDING_LSB 13 1406*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_RX_INSERT_VLAN_S_TAG_PADDING_MSB 13 1407*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_RX_INSERT_VLAN_S_TAG_PADDING_MASK 0x0000000000002000 1408*5113495bSYour Name 1409*5113495bSYour Name 1410*5113495bSYour Name /* Description STRIP_VLAN_C_TAG_DECAP 1411*5113495bSYour Name 1412*5113495bSYour Name In case of ndp or phy_err or AST_based_lookup_valid == 0, 1413*5113495bSYour Name this field will be set to 0 1414*5113495bSYour Name 1415*5113495bSYour Name Strip the VLAN during decapsulation. Used by the OLE. 1416*5113495bSYour Name <legal all> 1417*5113495bSYour Name */ 1418*5113495bSYour Name 1419*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_STRIP_VLAN_C_TAG_DECAP_OFFSET 0x0000000000000030 1420*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_STRIP_VLAN_C_TAG_DECAP_LSB 14 1421*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_STRIP_VLAN_C_TAG_DECAP_MSB 14 1422*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_STRIP_VLAN_C_TAG_DECAP_MASK 0x0000000000004000 1423*5113495bSYour Name 1424*5113495bSYour Name 1425*5113495bSYour Name /* Description STRIP_VLAN_S_TAG_DECAP 1426*5113495bSYour Name 1427*5113495bSYour Name In case of ndp or phy_err or AST_based_lookup_valid == 0, 1428*5113495bSYour Name this field will be set to 0 1429*5113495bSYour Name 1430*5113495bSYour Name Strip the double VLAN during decapsulation. Used by the 1431*5113495bSYour Name OLE. 1432*5113495bSYour Name <legal all> 1433*5113495bSYour Name */ 1434*5113495bSYour Name 1435*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_STRIP_VLAN_S_TAG_DECAP_OFFSET 0x0000000000000030 1436*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_STRIP_VLAN_S_TAG_DECAP_LSB 15 1437*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_STRIP_VLAN_S_TAG_DECAP_MSB 15 1438*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_STRIP_VLAN_S_TAG_DECAP_MASK 0x0000000000008000 1439*5113495bSYour Name 1440*5113495bSYour Name 1441*5113495bSYour Name /* Description PRE_DELIM_COUNT 1442*5113495bSYour Name 1443*5113495bSYour Name The number of delimiters before this MPDU. 1444*5113495bSYour Name 1445*5113495bSYour Name Note that this number is cleared at PPDU start. 1446*5113495bSYour Name 1447*5113495bSYour Name If this MPDU is the first received MPDU in the PPDU and 1448*5113495bSYour Name this MPDU gets filtered-in, this field will indicate the 1449*5113495bSYour Name number of delimiters located after the last MPDU in the 1450*5113495bSYour Name previous PPDU. 1451*5113495bSYour Name 1452*5113495bSYour Name If this MPDU is located after the first received MPDU in 1453*5113495bSYour Name an PPDU, this field will indicate the number of delimiters 1454*5113495bSYour Name located between the previous MPDU and this MPDU. 1455*5113495bSYour Name 1456*5113495bSYour Name In case of ndp or phy_err, this field will indicate the 1457*5113495bSYour Name number of delimiters located after the last MPDU in the 1458*5113495bSYour Name previous PPDU. 1459*5113495bSYour Name <legal all> 1460*5113495bSYour Name */ 1461*5113495bSYour Name 1462*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_PRE_DELIM_COUNT_OFFSET 0x0000000000000030 1463*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_PRE_DELIM_COUNT_LSB 16 1464*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_PRE_DELIM_COUNT_MSB 27 1465*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_PRE_DELIM_COUNT_MASK 0x000000000fff0000 1466*5113495bSYour Name 1467*5113495bSYour Name 1468*5113495bSYour Name /* Description AMPDU_FLAG 1469*5113495bSYour Name 1470*5113495bSYour Name When set, received frame was part of an A-MPDU. 1471*5113495bSYour Name 1472*5113495bSYour Name In case of ndp or phy_err, this field will never be set. 1473*5113495bSYour Name 1474*5113495bSYour Name <legal all> 1475*5113495bSYour Name */ 1476*5113495bSYour Name 1477*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_AMPDU_FLAG_OFFSET 0x0000000000000030 1478*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_AMPDU_FLAG_LSB 28 1479*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_AMPDU_FLAG_MSB 28 1480*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_AMPDU_FLAG_MASK 0x0000000010000000 1481*5113495bSYour Name 1482*5113495bSYour Name 1483*5113495bSYour Name /* Description BAR_FRAME 1484*5113495bSYour Name 1485*5113495bSYour Name In case of ndp or phy_err or AST_based_lookup_valid == 0, 1486*5113495bSYour Name this field will be set to 0 1487*5113495bSYour Name 1488*5113495bSYour Name When set, received frame is a BAR frame 1489*5113495bSYour Name <legal all> 1490*5113495bSYour Name */ 1491*5113495bSYour Name 1492*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_BAR_FRAME_OFFSET 0x0000000000000030 1493*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_BAR_FRAME_LSB 29 1494*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_BAR_FRAME_MSB 29 1495*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_BAR_FRAME_MASK 0x0000000020000000 1496*5113495bSYour Name 1497*5113495bSYour Name 1498*5113495bSYour Name /* Description RAW_MPDU 1499*5113495bSYour Name 1500*5113495bSYour Name Consumer: SW 1501*5113495bSYour Name Producer: RXOLE 1502*5113495bSYour Name 1503*5113495bSYour Name RXPCU sets this field to 0 and RXOLE overwrites it. 1504*5113495bSYour Name 1505*5113495bSYour Name Set to 1 by RXOLE when it has not performed any 802.11 to 1506*5113495bSYour Name Ethernet/Natvie WiFi header conversion on this MPDU. 1507*5113495bSYour Name <legal all> 1508*5113495bSYour Name */ 1509*5113495bSYour Name 1510*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_RAW_MPDU_OFFSET 0x0000000000000030 1511*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_RAW_MPDU_LSB 30 1512*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_RAW_MPDU_MSB 30 1513*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_RAW_MPDU_MASK 0x0000000040000000 1514*5113495bSYour Name 1515*5113495bSYour Name 1516*5113495bSYour Name /* Description RESERVED_12 1517*5113495bSYour Name 1518*5113495bSYour Name <legal 0> 1519*5113495bSYour Name */ 1520*5113495bSYour Name 1521*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_RESERVED_12_OFFSET 0x0000000000000030 1522*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_RESERVED_12_LSB 31 1523*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_RESERVED_12_MSB 31 1524*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_RESERVED_12_MASK 0x0000000080000000 1525*5113495bSYour Name 1526*5113495bSYour Name 1527*5113495bSYour Name /* Description MPDU_LENGTH 1528*5113495bSYour Name 1529*5113495bSYour Name In case of ndp or phy_err this field will be set to 0 1530*5113495bSYour Name 1531*5113495bSYour Name MPDU length before decapsulation. 1532*5113495bSYour Name <legal all> 1533*5113495bSYour Name */ 1534*5113495bSYour Name 1535*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_MPDU_LENGTH_OFFSET 0x0000000000000030 1536*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_MPDU_LENGTH_LSB 32 1537*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_MPDU_LENGTH_MSB 45 1538*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_MPDU_LENGTH_MASK 0x00003fff00000000 1539*5113495bSYour Name 1540*5113495bSYour Name 1541*5113495bSYour Name /* Description FIRST_MPDU 1542*5113495bSYour Name 1543*5113495bSYour Name See definition in RX attention descriptor 1544*5113495bSYour Name 1545*5113495bSYour Name In case of ndp or phy_err, this field will be set. Note 1546*5113495bSYour Name however that there will not actually be any data contents 1547*5113495bSYour Name in the MPDU. 1548*5113495bSYour Name <legal all> 1549*5113495bSYour Name */ 1550*5113495bSYour Name 1551*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_FIRST_MPDU_OFFSET 0x0000000000000030 1552*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_FIRST_MPDU_LSB 46 1553*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_FIRST_MPDU_MSB 46 1554*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_FIRST_MPDU_MASK 0x0000400000000000 1555*5113495bSYour Name 1556*5113495bSYour Name 1557*5113495bSYour Name /* Description MCAST_BCAST 1558*5113495bSYour Name 1559*5113495bSYour Name In case of ndp or phy_err or Phy_err_during_mpdu_header 1560*5113495bSYour Name this field will be set to 0 1561*5113495bSYour Name 1562*5113495bSYour Name See definition in RX attention descriptor 1563*5113495bSYour Name <legal all> 1564*5113495bSYour Name */ 1565*5113495bSYour Name 1566*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_MCAST_BCAST_OFFSET 0x0000000000000030 1567*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_MCAST_BCAST_LSB 47 1568*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_MCAST_BCAST_MSB 47 1569*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_MCAST_BCAST_MASK 0x0000800000000000 1570*5113495bSYour Name 1571*5113495bSYour Name 1572*5113495bSYour Name /* Description AST_INDEX_NOT_FOUND 1573*5113495bSYour Name 1574*5113495bSYour Name In case of ndp or phy_err or Phy_err_during_mpdu_header 1575*5113495bSYour Name this field will be set to 0 1576*5113495bSYour Name 1577*5113495bSYour Name See definition in RX attention descriptor 1578*5113495bSYour Name <legal all> 1579*5113495bSYour Name */ 1580*5113495bSYour Name 1581*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_AST_INDEX_NOT_FOUND_OFFSET 0x0000000000000030 1582*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_AST_INDEX_NOT_FOUND_LSB 48 1583*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_AST_INDEX_NOT_FOUND_MSB 48 1584*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_AST_INDEX_NOT_FOUND_MASK 0x0001000000000000 1585*5113495bSYour Name 1586*5113495bSYour Name 1587*5113495bSYour Name /* Description AST_INDEX_TIMEOUT 1588*5113495bSYour Name 1589*5113495bSYour Name In case of ndp or phy_err or Phy_err_during_mpdu_header 1590*5113495bSYour Name this field will be set to 0 1591*5113495bSYour Name 1592*5113495bSYour Name See definition in RX attention descriptor 1593*5113495bSYour Name <legal all> 1594*5113495bSYour Name */ 1595*5113495bSYour Name 1596*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_AST_INDEX_TIMEOUT_OFFSET 0x0000000000000030 1597*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_AST_INDEX_TIMEOUT_LSB 49 1598*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_AST_INDEX_TIMEOUT_MSB 49 1599*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_AST_INDEX_TIMEOUT_MASK 0x0002000000000000 1600*5113495bSYour Name 1601*5113495bSYour Name 1602*5113495bSYour Name /* Description POWER_MGMT 1603*5113495bSYour Name 1604*5113495bSYour Name In case of ndp or phy_err or Phy_err_during_mpdu_header 1605*5113495bSYour Name this field will be set to 0 1606*5113495bSYour Name 1607*5113495bSYour Name See definition in RX attention descriptor 1608*5113495bSYour Name <legal all> 1609*5113495bSYour Name */ 1610*5113495bSYour Name 1611*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_POWER_MGMT_OFFSET 0x0000000000000030 1612*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_POWER_MGMT_LSB 50 1613*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_POWER_MGMT_MSB 50 1614*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_POWER_MGMT_MASK 0x0004000000000000 1615*5113495bSYour Name 1616*5113495bSYour Name 1617*5113495bSYour Name /* Description NON_QOS 1618*5113495bSYour Name 1619*5113495bSYour Name In case of ndp or phy_err or Phy_err_during_mpdu_header 1620*5113495bSYour Name this field will be set to 1 1621*5113495bSYour Name 1622*5113495bSYour Name See definition in RX attention descriptor 1623*5113495bSYour Name <legal all> 1624*5113495bSYour Name */ 1625*5113495bSYour Name 1626*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_NON_QOS_OFFSET 0x0000000000000030 1627*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_NON_QOS_LSB 51 1628*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_NON_QOS_MSB 51 1629*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_NON_QOS_MASK 0x0008000000000000 1630*5113495bSYour Name 1631*5113495bSYour Name 1632*5113495bSYour Name /* Description NULL_DATA 1633*5113495bSYour Name 1634*5113495bSYour Name In case of ndp or phy_err or Phy_err_during_mpdu_header 1635*5113495bSYour Name this field will be set to 0 1636*5113495bSYour Name 1637*5113495bSYour Name See definition in RX attention descriptor 1638*5113495bSYour Name <legal all> 1639*5113495bSYour Name */ 1640*5113495bSYour Name 1641*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_NULL_DATA_OFFSET 0x0000000000000030 1642*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_NULL_DATA_LSB 52 1643*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_NULL_DATA_MSB 52 1644*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_NULL_DATA_MASK 0x0010000000000000 1645*5113495bSYour Name 1646*5113495bSYour Name 1647*5113495bSYour Name /* Description MGMT_TYPE 1648*5113495bSYour Name 1649*5113495bSYour Name In case of ndp or phy_err or Phy_err_during_mpdu_header 1650*5113495bSYour Name this field will be set to 0 1651*5113495bSYour Name 1652*5113495bSYour Name See definition in RX attention descriptor 1653*5113495bSYour Name <legal all> 1654*5113495bSYour Name */ 1655*5113495bSYour Name 1656*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_MGMT_TYPE_OFFSET 0x0000000000000030 1657*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_MGMT_TYPE_LSB 53 1658*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_MGMT_TYPE_MSB 53 1659*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_MGMT_TYPE_MASK 0x0020000000000000 1660*5113495bSYour Name 1661*5113495bSYour Name 1662*5113495bSYour Name /* Description CTRL_TYPE 1663*5113495bSYour Name 1664*5113495bSYour Name In case of ndp or phy_err or Phy_err_during_mpdu_header 1665*5113495bSYour Name this field will be set to 0 1666*5113495bSYour Name 1667*5113495bSYour Name See definition in RX attention descriptor 1668*5113495bSYour Name <legal all> 1669*5113495bSYour Name */ 1670*5113495bSYour Name 1671*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_CTRL_TYPE_OFFSET 0x0000000000000030 1672*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_CTRL_TYPE_LSB 54 1673*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_CTRL_TYPE_MSB 54 1674*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_CTRL_TYPE_MASK 0x0040000000000000 1675*5113495bSYour Name 1676*5113495bSYour Name 1677*5113495bSYour Name /* Description MORE_DATA 1678*5113495bSYour Name 1679*5113495bSYour Name In case of ndp or phy_err or Phy_err_during_mpdu_header 1680*5113495bSYour Name this field will be set to 0 1681*5113495bSYour Name 1682*5113495bSYour Name See definition in RX attention descriptor 1683*5113495bSYour Name <legal all> 1684*5113495bSYour Name */ 1685*5113495bSYour Name 1686*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_MORE_DATA_OFFSET 0x0000000000000030 1687*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_MORE_DATA_LSB 55 1688*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_MORE_DATA_MSB 55 1689*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_MORE_DATA_MASK 0x0080000000000000 1690*5113495bSYour Name 1691*5113495bSYour Name 1692*5113495bSYour Name /* Description EOSP 1693*5113495bSYour Name 1694*5113495bSYour Name In case of ndp or phy_err or Phy_err_during_mpdu_header 1695*5113495bSYour Name this field will be set to 0 1696*5113495bSYour Name 1697*5113495bSYour Name See definition in RX attention descriptor 1698*5113495bSYour Name <legal all> 1699*5113495bSYour Name */ 1700*5113495bSYour Name 1701*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_EOSP_OFFSET 0x0000000000000030 1702*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_EOSP_LSB 56 1703*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_EOSP_MSB 56 1704*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_EOSP_MASK 0x0100000000000000 1705*5113495bSYour Name 1706*5113495bSYour Name 1707*5113495bSYour Name /* Description FRAGMENT_FLAG 1708*5113495bSYour Name 1709*5113495bSYour Name In case of ndp or phy_err or Phy_err_during_mpdu_header 1710*5113495bSYour Name this field will be set to 0 1711*5113495bSYour Name 1712*5113495bSYour Name See definition in RX attention descriptor 1713*5113495bSYour Name <legal all> 1714*5113495bSYour Name */ 1715*5113495bSYour Name 1716*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_FRAGMENT_FLAG_OFFSET 0x0000000000000030 1717*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_FRAGMENT_FLAG_LSB 57 1718*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_FRAGMENT_FLAG_MSB 57 1719*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_FRAGMENT_FLAG_MASK 0x0200000000000000 1720*5113495bSYour Name 1721*5113495bSYour Name 1722*5113495bSYour Name /* Description ORDER 1723*5113495bSYour Name 1724*5113495bSYour Name In case of ndp or phy_err or Phy_err_during_mpdu_header 1725*5113495bSYour Name this field will be set to 0 1726*5113495bSYour Name 1727*5113495bSYour Name See definition in RX attention descriptor 1728*5113495bSYour Name 1729*5113495bSYour Name <legal all> 1730*5113495bSYour Name */ 1731*5113495bSYour Name 1732*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_ORDER_OFFSET 0x0000000000000030 1733*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_ORDER_LSB 58 1734*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_ORDER_MSB 58 1735*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_ORDER_MASK 0x0400000000000000 1736*5113495bSYour Name 1737*5113495bSYour Name 1738*5113495bSYour Name /* Description U_APSD_TRIGGER 1739*5113495bSYour Name 1740*5113495bSYour Name In case of ndp or phy_err or Phy_err_during_mpdu_header 1741*5113495bSYour Name this field will be set to 0 1742*5113495bSYour Name 1743*5113495bSYour Name See definition in RX attention descriptor 1744*5113495bSYour Name <legal all> 1745*5113495bSYour Name */ 1746*5113495bSYour Name 1747*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_U_APSD_TRIGGER_OFFSET 0x0000000000000030 1748*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_U_APSD_TRIGGER_LSB 59 1749*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_U_APSD_TRIGGER_MSB 59 1750*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_U_APSD_TRIGGER_MASK 0x0800000000000000 1751*5113495bSYour Name 1752*5113495bSYour Name 1753*5113495bSYour Name /* Description ENCRYPT_REQUIRED 1754*5113495bSYour Name 1755*5113495bSYour Name In case of ndp or phy_err or Phy_err_during_mpdu_header 1756*5113495bSYour Name this field will be set to 0 1757*5113495bSYour Name 1758*5113495bSYour Name See definition in RX attention descriptor 1759*5113495bSYour Name <legal all> 1760*5113495bSYour Name */ 1761*5113495bSYour Name 1762*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_ENCRYPT_REQUIRED_OFFSET 0x0000000000000030 1763*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_ENCRYPT_REQUIRED_LSB 60 1764*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_ENCRYPT_REQUIRED_MSB 60 1765*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_ENCRYPT_REQUIRED_MASK 0x1000000000000000 1766*5113495bSYour Name 1767*5113495bSYour Name 1768*5113495bSYour Name /* Description DIRECTED 1769*5113495bSYour Name 1770*5113495bSYour Name In case of ndp or phy_err or Phy_err_during_mpdu_header 1771*5113495bSYour Name this field will be set to 0 1772*5113495bSYour Name 1773*5113495bSYour Name See definition in RX attention descriptor 1774*5113495bSYour Name <legal all> 1775*5113495bSYour Name */ 1776*5113495bSYour Name 1777*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_DIRECTED_OFFSET 0x0000000000000030 1778*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_DIRECTED_LSB 61 1779*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_DIRECTED_MSB 61 1780*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_DIRECTED_MASK 0x2000000000000000 1781*5113495bSYour Name 1782*5113495bSYour Name 1783*5113495bSYour Name /* Description AMSDU_PRESENT 1784*5113495bSYour Name 1785*5113495bSYour Name Field only valid when Mpdu_qos_control_valid is set 1786*5113495bSYour Name 1787*5113495bSYour Name The 'amsdu_present' bit within the QoS control field of 1788*5113495bSYour Name the MPDU 1789*5113495bSYour Name <legal all> 1790*5113495bSYour Name */ 1791*5113495bSYour Name 1792*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_AMSDU_PRESENT_OFFSET 0x0000000000000030 1793*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_AMSDU_PRESENT_LSB 62 1794*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_AMSDU_PRESENT_MSB 62 1795*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_AMSDU_PRESENT_MASK 0x4000000000000000 1796*5113495bSYour Name 1797*5113495bSYour Name 1798*5113495bSYour Name /* Description RESERVED_13 1799*5113495bSYour Name 1800*5113495bSYour Name Field only valid when Mpdu_qos_control_valid is set 1801*5113495bSYour Name 1802*5113495bSYour Name This indicates whether the 'Ack policy' field within the 1803*5113495bSYour Name QoS control field of the MPDU indicates 'no-Ack.' 1804*5113495bSYour Name <legal all> 1805*5113495bSYour Name */ 1806*5113495bSYour Name 1807*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_RESERVED_13_OFFSET 0x0000000000000030 1808*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_RESERVED_13_LSB 63 1809*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_RESERVED_13_MSB 63 1810*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_RESERVED_13_MASK 0x8000000000000000 1811*5113495bSYour Name 1812*5113495bSYour Name 1813*5113495bSYour Name /* Description MPDU_FRAME_CONTROL_FIELD 1814*5113495bSYour Name 1815*5113495bSYour Name Field only valid when Mpdu_frame_control_valid is set 1816*5113495bSYour Name 1817*5113495bSYour Name The frame control field of this received MPDU. 1818*5113495bSYour Name 1819*5113495bSYour Name Field only valid when Ndp_frame and phy_err are NOT set 1820*5113495bSYour Name 1821*5113495bSYour Name Bytes 0 + 1 of the received MPDU 1822*5113495bSYour Name <legal all> 1823*5113495bSYour Name */ 1824*5113495bSYour Name 1825*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_MPDU_FRAME_CONTROL_FIELD_OFFSET 0x0000000000000038 1826*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_MPDU_FRAME_CONTROL_FIELD_LSB 0 1827*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_MPDU_FRAME_CONTROL_FIELD_MSB 15 1828*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_MPDU_FRAME_CONTROL_FIELD_MASK 0x000000000000ffff 1829*5113495bSYour Name 1830*5113495bSYour Name 1831*5113495bSYour Name /* Description MPDU_DURATION_FIELD 1832*5113495bSYour Name 1833*5113495bSYour Name Field only valid when Mpdu_duration_valid is set 1834*5113495bSYour Name 1835*5113495bSYour Name The duration field of this received MPDU. 1836*5113495bSYour Name <legal all> 1837*5113495bSYour Name */ 1838*5113495bSYour Name 1839*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_MPDU_DURATION_FIELD_OFFSET 0x0000000000000038 1840*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_MPDU_DURATION_FIELD_LSB 16 1841*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_MPDU_DURATION_FIELD_MSB 31 1842*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_MPDU_DURATION_FIELD_MASK 0x00000000ffff0000 1843*5113495bSYour Name 1844*5113495bSYour Name 1845*5113495bSYour Name /* Description MAC_ADDR_AD1_31_0 1846*5113495bSYour Name 1847*5113495bSYour Name Field only valid when mac_addr_ad1_valid is set 1848*5113495bSYour Name 1849*5113495bSYour Name The Least Significant 4 bytes of the Received Frames MAC 1850*5113495bSYour Name Address AD1 1851*5113495bSYour Name <legal all> 1852*5113495bSYour Name */ 1853*5113495bSYour Name 1854*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_MAC_ADDR_AD1_31_0_OFFSET 0x0000000000000038 1855*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_MAC_ADDR_AD1_31_0_LSB 32 1856*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_MAC_ADDR_AD1_31_0_MSB 63 1857*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_MAC_ADDR_AD1_31_0_MASK 0xffffffff00000000 1858*5113495bSYour Name 1859*5113495bSYour Name 1860*5113495bSYour Name /* Description MAC_ADDR_AD1_47_32 1861*5113495bSYour Name 1862*5113495bSYour Name Field only valid when mac_addr_ad1_valid is set 1863*5113495bSYour Name 1864*5113495bSYour Name The 2 most significant bytes of the Received Frames MAC 1865*5113495bSYour Name Address AD1 1866*5113495bSYour Name <legal all> 1867*5113495bSYour Name */ 1868*5113495bSYour Name 1869*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_MAC_ADDR_AD1_47_32_OFFSET 0x0000000000000040 1870*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_MAC_ADDR_AD1_47_32_LSB 0 1871*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_MAC_ADDR_AD1_47_32_MSB 15 1872*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_MAC_ADDR_AD1_47_32_MASK 0x000000000000ffff 1873*5113495bSYour Name 1874*5113495bSYour Name 1875*5113495bSYour Name /* Description MAC_ADDR_AD2_15_0 1876*5113495bSYour Name 1877*5113495bSYour Name Field only valid when mac_addr_ad2_valid is set 1878*5113495bSYour Name 1879*5113495bSYour Name The Least Significant 2 bytes of the Received Frames MAC 1880*5113495bSYour Name Address AD2 1881*5113495bSYour Name <legal all> 1882*5113495bSYour Name */ 1883*5113495bSYour Name 1884*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_MAC_ADDR_AD2_15_0_OFFSET 0x0000000000000040 1885*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_MAC_ADDR_AD2_15_0_LSB 16 1886*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_MAC_ADDR_AD2_15_0_MSB 31 1887*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_MAC_ADDR_AD2_15_0_MASK 0x00000000ffff0000 1888*5113495bSYour Name 1889*5113495bSYour Name 1890*5113495bSYour Name /* Description MAC_ADDR_AD2_47_16 1891*5113495bSYour Name 1892*5113495bSYour Name Field only valid when mac_addr_ad2_valid is set 1893*5113495bSYour Name 1894*5113495bSYour Name The 4 most significant bytes of the Received Frames MAC 1895*5113495bSYour Name Address AD2 1896*5113495bSYour Name <legal all> 1897*5113495bSYour Name */ 1898*5113495bSYour Name 1899*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_MAC_ADDR_AD2_47_16_OFFSET 0x0000000000000040 1900*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_MAC_ADDR_AD2_47_16_LSB 32 1901*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_MAC_ADDR_AD2_47_16_MSB 63 1902*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_MAC_ADDR_AD2_47_16_MASK 0xffffffff00000000 1903*5113495bSYour Name 1904*5113495bSYour Name 1905*5113495bSYour Name /* Description MAC_ADDR_AD3_31_0 1906*5113495bSYour Name 1907*5113495bSYour Name Field only valid when mac_addr_ad3_valid is set 1908*5113495bSYour Name 1909*5113495bSYour Name The Least Significant 4 bytes of the Received Frames MAC 1910*5113495bSYour Name Address AD3 1911*5113495bSYour Name <legal all> 1912*5113495bSYour Name */ 1913*5113495bSYour Name 1914*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_MAC_ADDR_AD3_31_0_OFFSET 0x0000000000000048 1915*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_MAC_ADDR_AD3_31_0_LSB 0 1916*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_MAC_ADDR_AD3_31_0_MSB 31 1917*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_MAC_ADDR_AD3_31_0_MASK 0x00000000ffffffff 1918*5113495bSYour Name 1919*5113495bSYour Name 1920*5113495bSYour Name /* Description MAC_ADDR_AD3_47_32 1921*5113495bSYour Name 1922*5113495bSYour Name Field only valid when mac_addr_ad3_valid is set 1923*5113495bSYour Name 1924*5113495bSYour Name The 2 most significant bytes of the Received Frames MAC 1925*5113495bSYour Name Address AD3 1926*5113495bSYour Name <legal all> 1927*5113495bSYour Name */ 1928*5113495bSYour Name 1929*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_MAC_ADDR_AD3_47_32_OFFSET 0x0000000000000048 1930*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_MAC_ADDR_AD3_47_32_LSB 32 1931*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_MAC_ADDR_AD3_47_32_MSB 47 1932*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_MAC_ADDR_AD3_47_32_MASK 0x0000ffff00000000 1933*5113495bSYour Name 1934*5113495bSYour Name 1935*5113495bSYour Name /* Description MPDU_SEQUENCE_CONTROL_FIELD 1936*5113495bSYour Name 1937*5113495bSYour Name Field only valid when mpdu_sequence_control_valid is set 1938*5113495bSYour Name 1939*5113495bSYour Name 1940*5113495bSYour Name The sequence control field of the MPDU 1941*5113495bSYour Name <legal all> 1942*5113495bSYour Name */ 1943*5113495bSYour Name 1944*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_MPDU_SEQUENCE_CONTROL_FIELD_OFFSET 0x0000000000000048 1945*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_MPDU_SEQUENCE_CONTROL_FIELD_LSB 48 1946*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_MPDU_SEQUENCE_CONTROL_FIELD_MSB 63 1947*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_MPDU_SEQUENCE_CONTROL_FIELD_MASK 0xffff000000000000 1948*5113495bSYour Name 1949*5113495bSYour Name 1950*5113495bSYour Name /* Description MAC_ADDR_AD4_31_0 1951*5113495bSYour Name 1952*5113495bSYour Name Field only valid when mac_addr_ad4_valid is set 1953*5113495bSYour Name 1954*5113495bSYour Name The Least Significant 4 bytes of the Received Frames MAC 1955*5113495bSYour Name Address AD4 1956*5113495bSYour Name <legal all> 1957*5113495bSYour Name */ 1958*5113495bSYour Name 1959*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_MAC_ADDR_AD4_31_0_OFFSET 0x0000000000000050 1960*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_MAC_ADDR_AD4_31_0_LSB 0 1961*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_MAC_ADDR_AD4_31_0_MSB 31 1962*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_MAC_ADDR_AD4_31_0_MASK 0x00000000ffffffff 1963*5113495bSYour Name 1964*5113495bSYour Name 1965*5113495bSYour Name /* Description MAC_ADDR_AD4_47_32 1966*5113495bSYour Name 1967*5113495bSYour Name Field only valid when mac_addr_ad4_valid is set 1968*5113495bSYour Name 1969*5113495bSYour Name The 2 most significant bytes of the Received Frames MAC 1970*5113495bSYour Name Address AD4 1971*5113495bSYour Name <legal all> 1972*5113495bSYour Name */ 1973*5113495bSYour Name 1974*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_MAC_ADDR_AD4_47_32_OFFSET 0x0000000000000050 1975*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_MAC_ADDR_AD4_47_32_LSB 32 1976*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_MAC_ADDR_AD4_47_32_MSB 47 1977*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_MAC_ADDR_AD4_47_32_MASK 0x0000ffff00000000 1978*5113495bSYour Name 1979*5113495bSYour Name 1980*5113495bSYour Name /* Description MPDU_QOS_CONTROL_FIELD 1981*5113495bSYour Name 1982*5113495bSYour Name Field only valid when mpdu_qos_control_valid is set 1983*5113495bSYour Name 1984*5113495bSYour Name The sequence control field of the MPDU 1985*5113495bSYour Name <legal all> 1986*5113495bSYour Name */ 1987*5113495bSYour Name 1988*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_MPDU_QOS_CONTROL_FIELD_OFFSET 0x0000000000000050 1989*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_MPDU_QOS_CONTROL_FIELD_LSB 48 1990*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_MPDU_QOS_CONTROL_FIELD_MSB 63 1991*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_MPDU_QOS_CONTROL_FIELD_MASK 0xffff000000000000 1992*5113495bSYour Name 1993*5113495bSYour Name 1994*5113495bSYour Name /* Description MPDU_HT_CONTROL_FIELD 1995*5113495bSYour Name 1996*5113495bSYour Name Field only valid when mpdu_qos_control_valid is set 1997*5113495bSYour Name 1998*5113495bSYour Name The HT control field of the MPDU 1999*5113495bSYour Name <legal all> 2000*5113495bSYour Name */ 2001*5113495bSYour Name 2002*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_MPDU_HT_CONTROL_FIELD_OFFSET 0x0000000000000058 2003*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_MPDU_HT_CONTROL_FIELD_LSB 0 2004*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_MPDU_HT_CONTROL_FIELD_MSB 31 2005*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_MPDU_HT_CONTROL_FIELD_MASK 0x00000000ffffffff 2006*5113495bSYour Name 2007*5113495bSYour Name 2008*5113495bSYour Name /* Description VDEV_ID 2009*5113495bSYour Name 2010*5113495bSYour Name Consumer: RXOLE 2011*5113495bSYour Name Producer: FW 2012*5113495bSYour Name 2013*5113495bSYour Name Virtual device associated with this peer 2014*5113495bSYour Name 2015*5113495bSYour Name RXOLE uses this to determine intra-BSS routing. 2016*5113495bSYour Name 2017*5113495bSYour Name <legal all> 2018*5113495bSYour Name */ 2019*5113495bSYour Name 2020*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_VDEV_ID_OFFSET 0x0000000000000058 2021*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_VDEV_ID_LSB 32 2022*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_VDEV_ID_MSB 39 2023*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_VDEV_ID_MASK 0x000000ff00000000 2024*5113495bSYour Name 2025*5113495bSYour Name 2026*5113495bSYour Name /* Description SERVICE_CODE 2027*5113495bSYour Name 2028*5113495bSYour Name Opaque service code between PPE and Wi-Fi 2029*5113495bSYour Name 2030*5113495bSYour Name This field gets passed on by REO to PPE in the EDMA descriptor 2031*5113495bSYour Name ('REO_TO_PPE_RING'). 2032*5113495bSYour Name 2033*5113495bSYour Name <legal all> 2034*5113495bSYour Name */ 2035*5113495bSYour Name 2036*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_SERVICE_CODE_OFFSET 0x0000000000000058 2037*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_SERVICE_CODE_LSB 40 2038*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_SERVICE_CODE_MSB 48 2039*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_SERVICE_CODE_MASK 0x0001ff0000000000 2040*5113495bSYour Name 2041*5113495bSYour Name 2042*5113495bSYour Name /* Description PRIORITY_VALID 2043*5113495bSYour Name 2044*5113495bSYour Name This field gets passed on by REO to PPE in the EDMA descriptor 2045*5113495bSYour Name ('REO_TO_PPE_RING'). 2046*5113495bSYour Name 2047*5113495bSYour Name <legal all> 2048*5113495bSYour Name */ 2049*5113495bSYour Name 2050*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_PRIORITY_VALID_OFFSET 0x0000000000000058 2051*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_PRIORITY_VALID_LSB 49 2052*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_PRIORITY_VALID_MSB 49 2053*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_PRIORITY_VALID_MASK 0x0002000000000000 2054*5113495bSYour Name 2055*5113495bSYour Name 2056*5113495bSYour Name /* Description SRC_INFO 2057*5113495bSYour Name 2058*5113495bSYour Name Source (virtual) device/interface info. associated with 2059*5113495bSYour Name this peer 2060*5113495bSYour Name 2061*5113495bSYour Name This field gets passed on by REO to PPE in the EDMA descriptor 2062*5113495bSYour Name ('REO_TO_PPE_RING'). 2063*5113495bSYour Name 2064*5113495bSYour Name <legal all> 2065*5113495bSYour Name */ 2066*5113495bSYour Name 2067*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_SRC_INFO_OFFSET 0x0000000000000058 2068*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_SRC_INFO_LSB 50 2069*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_SRC_INFO_MSB 61 2070*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_SRC_INFO_MASK 0x3ffc000000000000 2071*5113495bSYour Name 2072*5113495bSYour Name 2073*5113495bSYour Name /* Description RESERVED_23A 2074*5113495bSYour Name 2075*5113495bSYour Name <legal 0> 2076*5113495bSYour Name */ 2077*5113495bSYour Name 2078*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_RESERVED_23A_OFFSET 0x0000000000000058 2079*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_RESERVED_23A_LSB 62 2080*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_RESERVED_23A_MSB 62 2081*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_RESERVED_23A_MASK 0x4000000000000000 2082*5113495bSYour Name 2083*5113495bSYour Name 2084*5113495bSYour Name /* Description MULTI_LINK_ADDR_AD1_AD2_VALID 2085*5113495bSYour Name 2086*5113495bSYour Name If set, Rx OLE shall convert Address1 and Address2 of received 2087*5113495bSYour Name data frames to multi-link addresses during decapsulation 2088*5113495bSYour Name to Ethernet or Native WiFi 2089*5113495bSYour Name <legal all> 2090*5113495bSYour Name */ 2091*5113495bSYour Name 2092*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_MULTI_LINK_ADDR_AD1_AD2_VALID_OFFSET 0x0000000000000058 2093*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_MULTI_LINK_ADDR_AD1_AD2_VALID_LSB 63 2094*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_MULTI_LINK_ADDR_AD1_AD2_VALID_MSB 63 2095*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_MULTI_LINK_ADDR_AD1_AD2_VALID_MASK 0x8000000000000000 2096*5113495bSYour Name 2097*5113495bSYour Name 2098*5113495bSYour Name /* Description MULTI_LINK_ADDR_AD1_31_0 2099*5113495bSYour Name 2100*5113495bSYour Name Field only valid if Multi_link_addr_ad1_ad2_valid is set 2101*5113495bSYour Name 2102*5113495bSYour Name 2103*5113495bSYour Name Multi-link receiver address (address1), bits [31:0] 2104*5113495bSYour Name */ 2105*5113495bSYour Name 2106*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_MULTI_LINK_ADDR_AD1_31_0_OFFSET 0x0000000000000060 2107*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_MULTI_LINK_ADDR_AD1_31_0_LSB 0 2108*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_MULTI_LINK_ADDR_AD1_31_0_MSB 31 2109*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_MULTI_LINK_ADDR_AD1_31_0_MASK 0x00000000ffffffff 2110*5113495bSYour Name 2111*5113495bSYour Name 2112*5113495bSYour Name /* Description MULTI_LINK_ADDR_AD1_47_32 2113*5113495bSYour Name 2114*5113495bSYour Name Field only valid if Multi_link_addr_ad1_ad2_valid is set 2115*5113495bSYour Name 2116*5113495bSYour Name 2117*5113495bSYour Name Multi-link receiver address (address1), bits [47:32] 2118*5113495bSYour Name */ 2119*5113495bSYour Name 2120*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_MULTI_LINK_ADDR_AD1_47_32_OFFSET 0x0000000000000060 2121*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_MULTI_LINK_ADDR_AD1_47_32_LSB 32 2122*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_MULTI_LINK_ADDR_AD1_47_32_MSB 47 2123*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_MULTI_LINK_ADDR_AD1_47_32_MASK 0x0000ffff00000000 2124*5113495bSYour Name 2125*5113495bSYour Name 2126*5113495bSYour Name /* Description MULTI_LINK_ADDR_AD2_15_0 2127*5113495bSYour Name 2128*5113495bSYour Name Field only valid if Multi_link_addr_ad1_ad2_valid is set 2129*5113495bSYour Name 2130*5113495bSYour Name 2131*5113495bSYour Name Multi-link transmitter address (address2), bits [15:0] 2132*5113495bSYour Name */ 2133*5113495bSYour Name 2134*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_MULTI_LINK_ADDR_AD2_15_0_OFFSET 0x0000000000000060 2135*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_MULTI_LINK_ADDR_AD2_15_0_LSB 48 2136*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_MULTI_LINK_ADDR_AD2_15_0_MSB 63 2137*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_MULTI_LINK_ADDR_AD2_15_0_MASK 0xffff000000000000 2138*5113495bSYour Name 2139*5113495bSYour Name 2140*5113495bSYour Name /* Description MULTI_LINK_ADDR_AD2_47_16 2141*5113495bSYour Name 2142*5113495bSYour Name Field only valid if Multi_link_addr_ad1_ad2_valid is set 2143*5113495bSYour Name 2144*5113495bSYour Name 2145*5113495bSYour Name Multi-link transmitter address (address2), bits [47:16] 2146*5113495bSYour Name */ 2147*5113495bSYour Name 2148*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_MULTI_LINK_ADDR_AD2_47_16_OFFSET 0x0000000000000068 2149*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_MULTI_LINK_ADDR_AD2_47_16_LSB 0 2150*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_MULTI_LINK_ADDR_AD2_47_16_MSB 31 2151*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_MULTI_LINK_ADDR_AD2_47_16_MASK 0x00000000ffffffff 2152*5113495bSYour Name 2153*5113495bSYour Name 2154*5113495bSYour Name /* Description AUTHORIZED_TO_SEND_WDS 2155*5113495bSYour Name 2156*5113495bSYour Name If not set, RXDMA shall perform error-routing for WDS packets 2157*5113495bSYour Name as the sender is not authorized and might misuse WDS frame 2158*5113495bSYour Name format to inject packets with arbitrary DA/SA. 2159*5113495bSYour Name <legal all> 2160*5113495bSYour Name */ 2161*5113495bSYour Name 2162*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_AUTHORIZED_TO_SEND_WDS_OFFSET 0x0000000000000068 2163*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_AUTHORIZED_TO_SEND_WDS_LSB 32 2164*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_AUTHORIZED_TO_SEND_WDS_MSB 32 2165*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_AUTHORIZED_TO_SEND_WDS_MASK 0x0000000100000000 2166*5113495bSYour Name 2167*5113495bSYour Name 2168*5113495bSYour Name /* Description RESERVED_27A 2169*5113495bSYour Name 2170*5113495bSYour Name Bit 1: disallow_mcbc_da_in_unicast_mpdu: 2171*5113495bSYour Name 2172*5113495bSYour Name If set, RX OLE shall disallow multicast/broadcast DA in 2173*5113495bSYour Name A-MSDU subframes in case of ToDS=0 MPDUs. This may be enabled 2174*5113495bSYour Name for TDLS peers. 2175*5113495bSYour Name <legal 0-1> 2176*5113495bSYour Name */ 2177*5113495bSYour Name 2178*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_RESERVED_27A_OFFSET 0x0000000000000068 2179*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_RESERVED_27A_LSB 33 2180*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_RESERVED_27A_MSB 63 2181*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_RESERVED_27A_MASK 0xfffffffe00000000 2182*5113495bSYour Name 2183*5113495bSYour Name 2184*5113495bSYour Name /* Description RESERVED_28A 2185*5113495bSYour Name 2186*5113495bSYour Name <legal 0> 2187*5113495bSYour Name */ 2188*5113495bSYour Name 2189*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_RESERVED_28A_OFFSET 0x0000000000000070 2190*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_RESERVED_28A_LSB 0 2191*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_RESERVED_28A_MSB 31 2192*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_RESERVED_28A_MASK 0x00000000ffffffff 2193*5113495bSYour Name 2194*5113495bSYour Name 2195*5113495bSYour Name /* Description RESERVED_29A 2196*5113495bSYour Name 2197*5113495bSYour Name <legal 0> 2198*5113495bSYour Name */ 2199*5113495bSYour Name 2200*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_RESERVED_29A_OFFSET 0x0000000000000070 2201*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_RESERVED_29A_LSB 32 2202*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_RESERVED_29A_MSB 63 2203*5113495bSYour Name #define RX_MPDU_START_RX_MPDU_INFO_DETAILS_RESERVED_29A_MASK 0xffffffff00000000 2204*5113495bSYour Name 2205*5113495bSYour Name 2206*5113495bSYour Name 2207*5113495bSYour Name #endif // RX_MPDU_START 2208