xref: /wlan-driver/fw-api/hw/qcn6432/rx_ppdu_ack_report.h (revision 5113495b16420b49004c444715d2daae2066e7dc)
1 /*
2  * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
3  *
4  * Permission to use, copy, modify, and/or distribute this software for any
5  * purpose with or without fee is hereby granted, provided that the above
6  * copyright notice and this permission notice appear in all copies.
7  *
8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15  */
16 
17 #ifndef _RX_PPDU_ACK_REPORT_H_
18 #define _RX_PPDU_ACK_REPORT_H_
19 #if !defined(__ASSEMBLER__)
20 #endif
21 
22 #include "ack_report.h"
23 #define NUM_OF_DWORDS_RX_PPDU_ACK_REPORT 2
24 
25 #define NUM_OF_QWORDS_RX_PPDU_ACK_REPORT 1
26 
27 
28 struct rx_ppdu_ack_report {
29 #ifndef WIFI_BIT_ORDER_BIG_ENDIAN
30              struct   ack_report                                                ack_report_details;
31              uint32_t tlv64_padding                                           : 32; // [31:0]
32 #else
33              struct   ack_report                                                ack_report_details;
34              uint32_t tlv64_padding                                           : 32; // [31:0]
35 #endif
36 };
37 
38 
39 /* Description		ACK_REPORT_DETAILS
40 
41 			Info indicating why the received frame needed a SIFS response.
42 
43 */
44 
45 
46 /* Description		SELFGEN_RESPONSE_REASON
47 
48 			Field that indicates why the received frame needs a response
49 			 in SIFS time. The possible responses are listed in order.
50 
51 
52 			<enum 0     CTS_frame>
53 			<enum 1     ACK_frame>
54 			<enum 2     BA_frame >
55 			<enum 3     Qboost_trigger> Qboost trigger received
56 			<enum 4     PSPOLL_trigger> PSPOLL trigger received
57 			<enum 5     UAPSD_trigger > Unscheduled APSD  trigger received
58 
59 			<enum 6     CBF_frame> the CBF frame needs to be send as
60 			 a result of NDP or BRPOLL
61 			<enum 7     ax_su_trigger> 11ax trigger received for this
62 			 device
63 			<enum 8     ax_wildcard_trigger> 11ax wildcardtrigger has
64 			 been received
65 			<enum 9     ax_unassoc_wildcard_trigger> 11ax wildcard trigger
66 			 for unassociated STAs has been received
67 			<enum 12     eht_su_trigger> EHT R1 trigger received for
68 			 this device
69 
70 			<enum 10     MU_UL_response_to_response>
71 
72 			<enum 11     Ranging_NDP_LMR_frames> Ranging NDP + LMR need
73 			 to be sent in response to ranging NDPA + NDP
74 
75 			<legal 0-12>
76 */
77 
78 #define RX_PPDU_ACK_REPORT_ACK_REPORT_DETAILS_SELFGEN_RESPONSE_REASON_OFFSET        0x0000000000000000
79 #define RX_PPDU_ACK_REPORT_ACK_REPORT_DETAILS_SELFGEN_RESPONSE_REASON_LSB           0
80 #define RX_PPDU_ACK_REPORT_ACK_REPORT_DETAILS_SELFGEN_RESPONSE_REASON_MSB           3
81 #define RX_PPDU_ACK_REPORT_ACK_REPORT_DETAILS_SELFGEN_RESPONSE_REASON_MASK          0x000000000000000f
82 
83 
84 /* Description		AX_TRIGGER_TYPE
85 
86 			Field Only valid when selfgen_response_reason is an 11ax
87 			 related trigger
88 
89 			The 11AX trigger type/ trigger number:
90 			It identifies which trigger was received.
91 			<enum 0 ax_trigger_basic>
92 			<enum 1 ax_trigger_brpoll>
93 			<enum 2 ax_trigger_mu_bar>
94 			<enum 3 ax_trigger_mu_rts>
95 			<enum 4 ax_trigger_buffer_size>
96 			<enum 5 ax_trigger_gcr_mu_bar>
97 			<enum 6 ax_trigger_BQRP>
98 			<enum 7 ax_trigger_NDP_fb_report_poll>
99 			<enum 8 ax_tb_ranging_trigger>
100 			<enum 9 ax_trigger_reserved_9>
101 			<enum 10 ax_trigger_reserved_10>
102 			<enum 11 ax_trigger_reserved_11>
103 			<enum 12 ax_trigger_reserved_12>
104 			<enum 13 ax_trigger_reserved_13>
105 			<enum 14 ax_trigger_reserved_14>
106 			<enum 15 ax_trigger_reserved_15>
107 
108 			<legal all>
109 */
110 
111 #define RX_PPDU_ACK_REPORT_ACK_REPORT_DETAILS_AX_TRIGGER_TYPE_OFFSET                0x0000000000000000
112 #define RX_PPDU_ACK_REPORT_ACK_REPORT_DETAILS_AX_TRIGGER_TYPE_LSB                   4
113 #define RX_PPDU_ACK_REPORT_ACK_REPORT_DETAILS_AX_TRIGGER_TYPE_MSB                   7
114 #define RX_PPDU_ACK_REPORT_ACK_REPORT_DETAILS_AX_TRIGGER_TYPE_MASK                  0x00000000000000f0
115 
116 
117 /* Description		SR_PPDU
118 
119 			Field only valid with SRP Responder support
120 
121 			Indicates if the received frame was sent using SRP as indicated
122 			 by the 'SR PPDU' bit in the 'CAS Control' in the 'HE A-Control'
123 			in one of the MPDUs received
124 			<legal all>
125 */
126 
127 #define RX_PPDU_ACK_REPORT_ACK_REPORT_DETAILS_SR_PPDU_OFFSET                        0x0000000000000000
128 #define RX_PPDU_ACK_REPORT_ACK_REPORT_DETAILS_SR_PPDU_LSB                           8
129 #define RX_PPDU_ACK_REPORT_ACK_REPORT_DETAILS_SR_PPDU_MSB                           8
130 #define RX_PPDU_ACK_REPORT_ACK_REPORT_DETAILS_SR_PPDU_MASK                          0x0000000000000100
131 
132 
133 /* Description		RESERVED
134 
135 			<legal 0>
136 */
137 
138 #define RX_PPDU_ACK_REPORT_ACK_REPORT_DETAILS_RESERVED_OFFSET                       0x0000000000000000
139 #define RX_PPDU_ACK_REPORT_ACK_REPORT_DETAILS_RESERVED_LSB                          9
140 #define RX_PPDU_ACK_REPORT_ACK_REPORT_DETAILS_RESERVED_MSB                          15
141 #define RX_PPDU_ACK_REPORT_ACK_REPORT_DETAILS_RESERVED_MASK                         0x000000000000fe00
142 
143 
144 /* Description		FRAME_CONTROL
145 
146 			Field not valid when selfgen_response_reason is MU_UL_response_to_response
147 
148 
149 			For SU receptions:
150 			frame control field of the received frame
151 
152 			In 11ah Mode of Operation, for non-NDP frames the BW information
153 			 is extracted from Frame Control fields [11:8].
154 
155 			Decode is as follows
156 
157 			Bits[11] - Dynamic/Static
158 			Bits[10:8] - Channel BW
159 */
160 
161 #define RX_PPDU_ACK_REPORT_ACK_REPORT_DETAILS_FRAME_CONTROL_OFFSET                  0x0000000000000000
162 #define RX_PPDU_ACK_REPORT_ACK_REPORT_DETAILS_FRAME_CONTROL_LSB                     16
163 #define RX_PPDU_ACK_REPORT_ACK_REPORT_DETAILS_FRAME_CONTROL_MSB                     31
164 #define RX_PPDU_ACK_REPORT_ACK_REPORT_DETAILS_FRAME_CONTROL_MASK                    0x00000000ffff0000
165 
166 
167 /* Description		TLV64_PADDING
168 
169 			Automatic DWORD padding inserted while converting TLV32
170 			to TLV64 for 64 bit ARCH
171 			<legal 0>
172 */
173 
174 #define RX_PPDU_ACK_REPORT_TLV64_PADDING_OFFSET                                     0x0000000000000000
175 #define RX_PPDU_ACK_REPORT_TLV64_PADDING_LSB                                        32
176 #define RX_PPDU_ACK_REPORT_TLV64_PADDING_MSB                                        63
177 #define RX_PPDU_ACK_REPORT_TLV64_PADDING_MASK                                       0xffffffff00000000
178 
179 
180 
181 #endif   // RX_PPDU_ACK_REPORT
182