1*5113495bSYour Name /* 2*5113495bSYour Name * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. 3*5113495bSYour Name * 4*5113495bSYour Name * Permission to use, copy, modify, and/or distribute this software for any 5*5113495bSYour Name * purpose with or without fee is hereby granted, provided that the above 6*5113495bSYour Name * copyright notice and this permission notice appear in all copies. 7*5113495bSYour Name * 8*5113495bSYour Name * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9*5113495bSYour Name * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10*5113495bSYour Name * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11*5113495bSYour Name * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12*5113495bSYour Name * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13*5113495bSYour Name * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14*5113495bSYour Name * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15*5113495bSYour Name */ 16*5113495bSYour Name 17*5113495bSYour Name #ifndef _RX_REO_QUEUE_H_ 18*5113495bSYour Name #define _RX_REO_QUEUE_H_ 19*5113495bSYour Name #if !defined(__ASSEMBLER__) 20*5113495bSYour Name #endif 21*5113495bSYour Name 22*5113495bSYour Name #include "uniform_descriptor_header.h" 23*5113495bSYour Name #define NUM_OF_DWORDS_RX_REO_QUEUE 32 24*5113495bSYour Name 25*5113495bSYour Name 26*5113495bSYour Name struct rx_reo_queue { 27*5113495bSYour Name #ifndef WIFI_BIT_ORDER_BIG_ENDIAN 28*5113495bSYour Name struct uniform_descriptor_header descriptor_header; 29*5113495bSYour Name uint32_t receive_queue_number : 16, // [15:0] 30*5113495bSYour Name reserved_1b : 16; // [31:16] 31*5113495bSYour Name uint32_t vld : 1, // [0:0] 32*5113495bSYour Name associated_link_descriptor_counter : 2, // [2:1] 33*5113495bSYour Name disable_duplicate_detection : 1, // [3:3] 34*5113495bSYour Name soft_reorder_enable : 1, // [4:4] 35*5113495bSYour Name ac : 2, // [6:5] 36*5113495bSYour Name bar : 1, // [7:7] 37*5113495bSYour Name rty : 1, // [8:8] 38*5113495bSYour Name chk_2k_mode : 1, // [9:9] 39*5113495bSYour Name oor_mode : 1, // [10:10] 40*5113495bSYour Name ba_window_size : 10, // [20:11] 41*5113495bSYour Name pn_check_needed : 1, // [21:21] 42*5113495bSYour Name pn_shall_be_even : 1, // [22:22] 43*5113495bSYour Name pn_shall_be_uneven : 1, // [23:23] 44*5113495bSYour Name pn_handling_enable : 1, // [24:24] 45*5113495bSYour Name pn_size : 2, // [26:25] 46*5113495bSYour Name ignore_ampdu_flag : 1, // [27:27] 47*5113495bSYour Name reserved_2b : 4; // [31:28] 48*5113495bSYour Name uint32_t svld : 1, // [0:0] 49*5113495bSYour Name ssn : 12, // [12:1] 50*5113495bSYour Name current_index : 10, // [22:13] 51*5113495bSYour Name seq_2k_error_detected_flag : 1, // [23:23] 52*5113495bSYour Name pn_error_detected_flag : 1, // [24:24] 53*5113495bSYour Name reserved_3a : 6, // [30:25] 54*5113495bSYour Name pn_valid : 1; // [31:31] 55*5113495bSYour Name uint32_t pn_31_0 : 32; // [31:0] 56*5113495bSYour Name uint32_t pn_63_32 : 32; // [31:0] 57*5113495bSYour Name uint32_t pn_95_64 : 32; // [31:0] 58*5113495bSYour Name uint32_t pn_127_96 : 32; // [31:0] 59*5113495bSYour Name uint32_t last_rx_enqueue_timestamp : 32; // [31:0] 60*5113495bSYour Name uint32_t last_rx_dequeue_timestamp : 32; // [31:0] 61*5113495bSYour Name uint32_t ptr_to_next_aging_queue_31_0 : 32; // [31:0] 62*5113495bSYour Name uint32_t ptr_to_next_aging_queue_39_32 : 8, // [7:0] 63*5113495bSYour Name reserved_11a : 24; // [31:8] 64*5113495bSYour Name uint32_t ptr_to_previous_aging_queue_31_0 : 32; // [31:0] 65*5113495bSYour Name uint32_t ptr_to_previous_aging_queue_39_32 : 8, // [7:0] 66*5113495bSYour Name statistics_counter_index : 6, // [13:8] 67*5113495bSYour Name reserved_13a : 18; // [31:14] 68*5113495bSYour Name uint32_t rx_bitmap_31_0 : 32; // [31:0] 69*5113495bSYour Name uint32_t rx_bitmap_63_32 : 32; // [31:0] 70*5113495bSYour Name uint32_t rx_bitmap_95_64 : 32; // [31:0] 71*5113495bSYour Name uint32_t rx_bitmap_127_96 : 32; // [31:0] 72*5113495bSYour Name uint32_t rx_bitmap_159_128 : 32; // [31:0] 73*5113495bSYour Name uint32_t rx_bitmap_191_160 : 32; // [31:0] 74*5113495bSYour Name uint32_t rx_bitmap_223_192 : 32; // [31:0] 75*5113495bSYour Name uint32_t rx_bitmap_255_224 : 32; // [31:0] 76*5113495bSYour Name uint32_t rx_bitmap_287_256 : 32; // [31:0] 77*5113495bSYour Name uint32_t current_mpdu_count : 7, // [6:0] 78*5113495bSYour Name current_msdu_count : 25; // [31:7] 79*5113495bSYour Name uint32_t last_sn_reg_index : 4, // [3:0] 80*5113495bSYour Name timeout_count : 6, // [9:4] 81*5113495bSYour Name forward_due_to_bar_count : 6, // [15:10] 82*5113495bSYour Name duplicate_count : 16; // [31:16] 83*5113495bSYour Name uint32_t frames_in_order_count : 24, // [23:0] 84*5113495bSYour Name bar_received_count : 8; // [31:24] 85*5113495bSYour Name uint32_t mpdu_frames_processed_count : 32; // [31:0] 86*5113495bSYour Name uint32_t msdu_frames_processed_count : 32; // [31:0] 87*5113495bSYour Name uint32_t total_processed_byte_count : 32; // [31:0] 88*5113495bSYour Name uint32_t late_receive_mpdu_count : 12, // [11:0] 89*5113495bSYour Name window_jump_2k : 4, // [15:12] 90*5113495bSYour Name hole_count : 16; // [31:16] 91*5113495bSYour Name uint32_t aging_drop_mpdu_count : 16, // [15:0] 92*5113495bSYour Name aging_drop_interval : 8, // [23:16] 93*5113495bSYour Name reserved_30 : 8; // [31:24] 94*5113495bSYour Name uint32_t reserved_31 : 32; // [31:0] 95*5113495bSYour Name #else 96*5113495bSYour Name struct uniform_descriptor_header descriptor_header; 97*5113495bSYour Name uint32_t reserved_1b : 16, // [31:16] 98*5113495bSYour Name receive_queue_number : 16; // [15:0] 99*5113495bSYour Name uint32_t reserved_2b : 4, // [31:28] 100*5113495bSYour Name ignore_ampdu_flag : 1, // [27:27] 101*5113495bSYour Name pn_size : 2, // [26:25] 102*5113495bSYour Name pn_handling_enable : 1, // [24:24] 103*5113495bSYour Name pn_shall_be_uneven : 1, // [23:23] 104*5113495bSYour Name pn_shall_be_even : 1, // [22:22] 105*5113495bSYour Name pn_check_needed : 1, // [21:21] 106*5113495bSYour Name ba_window_size : 10, // [20:11] 107*5113495bSYour Name oor_mode : 1, // [10:10] 108*5113495bSYour Name chk_2k_mode : 1, // [9:9] 109*5113495bSYour Name rty : 1, // [8:8] 110*5113495bSYour Name bar : 1, // [7:7] 111*5113495bSYour Name ac : 2, // [6:5] 112*5113495bSYour Name soft_reorder_enable : 1, // [4:4] 113*5113495bSYour Name disable_duplicate_detection : 1, // [3:3] 114*5113495bSYour Name associated_link_descriptor_counter : 2, // [2:1] 115*5113495bSYour Name vld : 1; // [0:0] 116*5113495bSYour Name uint32_t pn_valid : 1, // [31:31] 117*5113495bSYour Name reserved_3a : 6, // [30:25] 118*5113495bSYour Name pn_error_detected_flag : 1, // [24:24] 119*5113495bSYour Name seq_2k_error_detected_flag : 1, // [23:23] 120*5113495bSYour Name current_index : 10, // [22:13] 121*5113495bSYour Name ssn : 12, // [12:1] 122*5113495bSYour Name svld : 1; // [0:0] 123*5113495bSYour Name uint32_t pn_31_0 : 32; // [31:0] 124*5113495bSYour Name uint32_t pn_63_32 : 32; // [31:0] 125*5113495bSYour Name uint32_t pn_95_64 : 32; // [31:0] 126*5113495bSYour Name uint32_t pn_127_96 : 32; // [31:0] 127*5113495bSYour Name uint32_t last_rx_enqueue_timestamp : 32; // [31:0] 128*5113495bSYour Name uint32_t last_rx_dequeue_timestamp : 32; // [31:0] 129*5113495bSYour Name uint32_t ptr_to_next_aging_queue_31_0 : 32; // [31:0] 130*5113495bSYour Name uint32_t reserved_11a : 24, // [31:8] 131*5113495bSYour Name ptr_to_next_aging_queue_39_32 : 8; // [7:0] 132*5113495bSYour Name uint32_t ptr_to_previous_aging_queue_31_0 : 32; // [31:0] 133*5113495bSYour Name uint32_t reserved_13a : 18, // [31:14] 134*5113495bSYour Name statistics_counter_index : 6, // [13:8] 135*5113495bSYour Name ptr_to_previous_aging_queue_39_32 : 8; // [7:0] 136*5113495bSYour Name uint32_t rx_bitmap_31_0 : 32; // [31:0] 137*5113495bSYour Name uint32_t rx_bitmap_63_32 : 32; // [31:0] 138*5113495bSYour Name uint32_t rx_bitmap_95_64 : 32; // [31:0] 139*5113495bSYour Name uint32_t rx_bitmap_127_96 : 32; // [31:0] 140*5113495bSYour Name uint32_t rx_bitmap_159_128 : 32; // [31:0] 141*5113495bSYour Name uint32_t rx_bitmap_191_160 : 32; // [31:0] 142*5113495bSYour Name uint32_t rx_bitmap_223_192 : 32; // [31:0] 143*5113495bSYour Name uint32_t rx_bitmap_255_224 : 32; // [31:0] 144*5113495bSYour Name uint32_t rx_bitmap_287_256 : 32; // [31:0] 145*5113495bSYour Name uint32_t current_msdu_count : 25, // [31:7] 146*5113495bSYour Name current_mpdu_count : 7; // [6:0] 147*5113495bSYour Name uint32_t duplicate_count : 16, // [31:16] 148*5113495bSYour Name forward_due_to_bar_count : 6, // [15:10] 149*5113495bSYour Name timeout_count : 6, // [9:4] 150*5113495bSYour Name last_sn_reg_index : 4; // [3:0] 151*5113495bSYour Name uint32_t bar_received_count : 8, // [31:24] 152*5113495bSYour Name frames_in_order_count : 24; // [23:0] 153*5113495bSYour Name uint32_t mpdu_frames_processed_count : 32; // [31:0] 154*5113495bSYour Name uint32_t msdu_frames_processed_count : 32; // [31:0] 155*5113495bSYour Name uint32_t total_processed_byte_count : 32; // [31:0] 156*5113495bSYour Name uint32_t hole_count : 16, // [31:16] 157*5113495bSYour Name window_jump_2k : 4, // [15:12] 158*5113495bSYour Name late_receive_mpdu_count : 12; // [11:0] 159*5113495bSYour Name uint32_t reserved_30 : 8, // [31:24] 160*5113495bSYour Name aging_drop_interval : 8, // [23:16] 161*5113495bSYour Name aging_drop_mpdu_count : 16; // [15:0] 162*5113495bSYour Name uint32_t reserved_31 : 32; // [31:0] 163*5113495bSYour Name #endif 164*5113495bSYour Name }; 165*5113495bSYour Name 166*5113495bSYour Name 167*5113495bSYour Name /* Description DESCRIPTOR_HEADER 168*5113495bSYour Name 169*5113495bSYour Name Details about which module owns this struct. 170*5113495bSYour Name Note that sub field "Buffer_type" shall be set to "Receive_REO_queue_descriptor" 171*5113495bSYour Name 172*5113495bSYour Name */ 173*5113495bSYour Name 174*5113495bSYour Name 175*5113495bSYour Name /* Description OWNER 176*5113495bSYour Name 177*5113495bSYour Name Consumer: In DEBUG mode: WBM, TQM, TXDMA, RXDMA, REO 178*5113495bSYour Name Producer: In DEBUG mode: WBM, TQM, TXDMA, RXDMA, REO 179*5113495bSYour Name 180*5113495bSYour Name The owner of this data structure: 181*5113495bSYour Name <enum 0 WBM_owned> Buffer Manager currently owns this data 182*5113495bSYour Name structure. 183*5113495bSYour Name <enum 1 SW_OR_FW_owned> Software of FW currently owns this 184*5113495bSYour Name data structure. 185*5113495bSYour Name <enum 2 TQM_owned> Transmit Queue Manager currently owns 186*5113495bSYour Name this data structure. 187*5113495bSYour Name <enum 3 RXDMA_owned> Receive DMA currently owns this data 188*5113495bSYour Name structure. 189*5113495bSYour Name <enum 4 REO_owned> Reorder currently owns this data structure. 190*5113495bSYour Name 191*5113495bSYour Name <enum 5 SWITCH_owned> SWITCH currently owns this data structure. 192*5113495bSYour Name 193*5113495bSYour Name 194*5113495bSYour Name <legal 0-5> 195*5113495bSYour Name */ 196*5113495bSYour Name 197*5113495bSYour Name #define RX_REO_QUEUE_DESCRIPTOR_HEADER_OWNER_OFFSET 0x00000000 198*5113495bSYour Name #define RX_REO_QUEUE_DESCRIPTOR_HEADER_OWNER_LSB 0 199*5113495bSYour Name #define RX_REO_QUEUE_DESCRIPTOR_HEADER_OWNER_MSB 3 200*5113495bSYour Name #define RX_REO_QUEUE_DESCRIPTOR_HEADER_OWNER_MASK 0x0000000f 201*5113495bSYour Name 202*5113495bSYour Name 203*5113495bSYour Name /* Description BUFFER_TYPE 204*5113495bSYour Name 205*5113495bSYour Name Consumer: In DEBUG mode: WBM, TQM, TXDMA, RXDMA, REO 206*5113495bSYour Name Producer: In DEBUG mode: WBM, TQM, TXDMA, RXDMA, REO 207*5113495bSYour Name 208*5113495bSYour Name Field describing what contents format is of this descriptor 209*5113495bSYour Name 210*5113495bSYour Name 211*5113495bSYour Name <enum 0 Transmit_MSDU_Link_descriptor> 212*5113495bSYour Name <enum 1 Transmit_MPDU_Link_descriptor> 213*5113495bSYour Name <enum 2 Transmit_MPDU_Queue_head_descriptor> 214*5113495bSYour Name <enum 3 Transmit_MPDU_Queue_ext_descriptor> 215*5113495bSYour Name <enum 4 Transmit_flow_descriptor> 216*5113495bSYour Name <enum 5 Transmit_buffer> NOT TO BE USED: 217*5113495bSYour Name 218*5113495bSYour Name <enum 6 Receive_MSDU_Link_descriptor> 219*5113495bSYour Name <enum 7 Receive_MPDU_Link_descriptor> 220*5113495bSYour Name <enum 8 Receive_REO_queue_descriptor> 221*5113495bSYour Name <enum 9 Receive_REO_queue_1k_descriptor> 222*5113495bSYour Name <enum 10 Receive_REO_queue_ext_descriptor> 223*5113495bSYour Name 224*5113495bSYour Name <enum 11 Receive_buffer> 225*5113495bSYour Name 226*5113495bSYour Name <enum 12 Idle_link_list_entry> 227*5113495bSYour Name 228*5113495bSYour Name <legal 0-12> 229*5113495bSYour Name */ 230*5113495bSYour Name 231*5113495bSYour Name #define RX_REO_QUEUE_DESCRIPTOR_HEADER_BUFFER_TYPE_OFFSET 0x00000000 232*5113495bSYour Name #define RX_REO_QUEUE_DESCRIPTOR_HEADER_BUFFER_TYPE_LSB 4 233*5113495bSYour Name #define RX_REO_QUEUE_DESCRIPTOR_HEADER_BUFFER_TYPE_MSB 7 234*5113495bSYour Name #define RX_REO_QUEUE_DESCRIPTOR_HEADER_BUFFER_TYPE_MASK 0x000000f0 235*5113495bSYour Name 236*5113495bSYour Name 237*5113495bSYour Name /* Description TX_MPDU_QUEUE_NUMBER 238*5113495bSYour Name 239*5113495bSYour Name Consumer: TQM/Debug 240*5113495bSYour Name Producer: SW (in 'TX_MPDU_QUEUE_HEAD')/TQM (elsewhere) 241*5113495bSYour Name 242*5113495bSYour Name Field only valid if Buffer_type is any of Transmit_MPDU_*_descriptor 243*5113495bSYour Name 244*5113495bSYour Name 245*5113495bSYour Name Indicates the MPDU queue ID to which this MPDU descriptor 246*5113495bSYour Name belongs 247*5113495bSYour Name Used for tracking and debugging 248*5113495bSYour Name 249*5113495bSYour Name <legal all> 250*5113495bSYour Name */ 251*5113495bSYour Name 252*5113495bSYour Name #define RX_REO_QUEUE_DESCRIPTOR_HEADER_TX_MPDU_QUEUE_NUMBER_OFFSET 0x00000000 253*5113495bSYour Name #define RX_REO_QUEUE_DESCRIPTOR_HEADER_TX_MPDU_QUEUE_NUMBER_LSB 8 254*5113495bSYour Name #define RX_REO_QUEUE_DESCRIPTOR_HEADER_TX_MPDU_QUEUE_NUMBER_MSB 27 255*5113495bSYour Name #define RX_REO_QUEUE_DESCRIPTOR_HEADER_TX_MPDU_QUEUE_NUMBER_MASK 0x0fffff00 256*5113495bSYour Name 257*5113495bSYour Name 258*5113495bSYour Name /* Description RESERVED_0A 259*5113495bSYour Name 260*5113495bSYour Name <legal 0> 261*5113495bSYour Name */ 262*5113495bSYour Name 263*5113495bSYour Name #define RX_REO_QUEUE_DESCRIPTOR_HEADER_RESERVED_0A_OFFSET 0x00000000 264*5113495bSYour Name #define RX_REO_QUEUE_DESCRIPTOR_HEADER_RESERVED_0A_LSB 28 265*5113495bSYour Name #define RX_REO_QUEUE_DESCRIPTOR_HEADER_RESERVED_0A_MSB 31 266*5113495bSYour Name #define RX_REO_QUEUE_DESCRIPTOR_HEADER_RESERVED_0A_MASK 0xf0000000 267*5113495bSYour Name 268*5113495bSYour Name 269*5113495bSYour Name /* Description RECEIVE_QUEUE_NUMBER 270*5113495bSYour Name 271*5113495bSYour Name Indicates the MPDU queue ID to which this MPDU link descriptor 272*5113495bSYour Name belongs 273*5113495bSYour Name Used for tracking and debugging 274*5113495bSYour Name <legal all> 275*5113495bSYour Name */ 276*5113495bSYour Name 277*5113495bSYour Name #define RX_REO_QUEUE_RECEIVE_QUEUE_NUMBER_OFFSET 0x00000004 278*5113495bSYour Name #define RX_REO_QUEUE_RECEIVE_QUEUE_NUMBER_LSB 0 279*5113495bSYour Name #define RX_REO_QUEUE_RECEIVE_QUEUE_NUMBER_MSB 15 280*5113495bSYour Name #define RX_REO_QUEUE_RECEIVE_QUEUE_NUMBER_MASK 0x0000ffff 281*5113495bSYour Name 282*5113495bSYour Name 283*5113495bSYour Name /* Description RESERVED_1B 284*5113495bSYour Name 285*5113495bSYour Name <legal 0> 286*5113495bSYour Name */ 287*5113495bSYour Name 288*5113495bSYour Name #define RX_REO_QUEUE_RESERVED_1B_OFFSET 0x00000004 289*5113495bSYour Name #define RX_REO_QUEUE_RESERVED_1B_LSB 16 290*5113495bSYour Name #define RX_REO_QUEUE_RESERVED_1B_MSB 31 291*5113495bSYour Name #define RX_REO_QUEUE_RESERVED_1B_MASK 0xffff0000 292*5113495bSYour Name 293*5113495bSYour Name 294*5113495bSYour Name /* Description VLD 295*5113495bSYour Name 296*5113495bSYour Name Valid bit indicating a session is established and the queue 297*5113495bSYour Name descriptor is valid(Filled by SW) 298*5113495bSYour Name <legal all> 299*5113495bSYour Name */ 300*5113495bSYour Name 301*5113495bSYour Name #define RX_REO_QUEUE_VLD_OFFSET 0x00000008 302*5113495bSYour Name #define RX_REO_QUEUE_VLD_LSB 0 303*5113495bSYour Name #define RX_REO_QUEUE_VLD_MSB 0 304*5113495bSYour Name #define RX_REO_QUEUE_VLD_MASK 0x00000001 305*5113495bSYour Name 306*5113495bSYour Name 307*5113495bSYour Name /* Description ASSOCIATED_LINK_DESCRIPTOR_COUNTER 308*5113495bSYour Name 309*5113495bSYour Name Indicates which of the 3 link descriptor counters shall 310*5113495bSYour Name be incremented or decremented when link descriptors are 311*5113495bSYour Name added or removed from this flow queue. 312*5113495bSYour Name MSDU link descriptors related with MPDUs stored in the re-order 313*5113495bSYour Name buffer shall also be included in this count. 314*5113495bSYour Name 315*5113495bSYour Name <legal 0-2> 316*5113495bSYour Name */ 317*5113495bSYour Name 318*5113495bSYour Name #define RX_REO_QUEUE_ASSOCIATED_LINK_DESCRIPTOR_COUNTER_OFFSET 0x00000008 319*5113495bSYour Name #define RX_REO_QUEUE_ASSOCIATED_LINK_DESCRIPTOR_COUNTER_LSB 1 320*5113495bSYour Name #define RX_REO_QUEUE_ASSOCIATED_LINK_DESCRIPTOR_COUNTER_MSB 2 321*5113495bSYour Name #define RX_REO_QUEUE_ASSOCIATED_LINK_DESCRIPTOR_COUNTER_MASK 0x00000006 322*5113495bSYour Name 323*5113495bSYour Name 324*5113495bSYour Name /* Description DISABLE_DUPLICATE_DETECTION 325*5113495bSYour Name 326*5113495bSYour Name When set, do not perform any duplicate detection. 327*5113495bSYour Name 328*5113495bSYour Name <legal all> 329*5113495bSYour Name */ 330*5113495bSYour Name 331*5113495bSYour Name #define RX_REO_QUEUE_DISABLE_DUPLICATE_DETECTION_OFFSET 0x00000008 332*5113495bSYour Name #define RX_REO_QUEUE_DISABLE_DUPLICATE_DETECTION_LSB 3 333*5113495bSYour Name #define RX_REO_QUEUE_DISABLE_DUPLICATE_DETECTION_MSB 3 334*5113495bSYour Name #define RX_REO_QUEUE_DISABLE_DUPLICATE_DETECTION_MASK 0x00000008 335*5113495bSYour Name 336*5113495bSYour Name 337*5113495bSYour Name /* Description SOFT_REORDER_ENABLE 338*5113495bSYour Name 339*5113495bSYour Name When set, REO has been instructed to not perform the actual 340*5113495bSYour Name re-ordering of frames for this queue, but just to insert 341*5113495bSYour Name the reorder opcodes. 342*5113495bSYour Name 343*5113495bSYour Name Note that this implies that REO is also not going to perform 344*5113495bSYour Name any MSDU level operations, and the entire MPDU (and thus 345*5113495bSYour Name pointer to the MSDU link descriptor) will be pushed to 346*5113495bSYour Name a destination ring that SW has programmed in a SW programmable 347*5113495bSYour Name configuration register in REO 348*5113495bSYour Name 349*5113495bSYour Name <legal all> 350*5113495bSYour Name */ 351*5113495bSYour Name 352*5113495bSYour Name #define RX_REO_QUEUE_SOFT_REORDER_ENABLE_OFFSET 0x00000008 353*5113495bSYour Name #define RX_REO_QUEUE_SOFT_REORDER_ENABLE_LSB 4 354*5113495bSYour Name #define RX_REO_QUEUE_SOFT_REORDER_ENABLE_MSB 4 355*5113495bSYour Name #define RX_REO_QUEUE_SOFT_REORDER_ENABLE_MASK 0x00000010 356*5113495bSYour Name 357*5113495bSYour Name 358*5113495bSYour Name /* Description AC 359*5113495bSYour Name 360*5113495bSYour Name Indicates which access category the queue descriptor belongs 361*5113495bSYour Name to(filled by SW) 362*5113495bSYour Name <legal all> 363*5113495bSYour Name */ 364*5113495bSYour Name 365*5113495bSYour Name #define RX_REO_QUEUE_AC_OFFSET 0x00000008 366*5113495bSYour Name #define RX_REO_QUEUE_AC_LSB 5 367*5113495bSYour Name #define RX_REO_QUEUE_AC_MSB 6 368*5113495bSYour Name #define RX_REO_QUEUE_AC_MASK 0x00000060 369*5113495bSYour Name 370*5113495bSYour Name 371*5113495bSYour Name /* Description BAR 372*5113495bSYour Name 373*5113495bSYour Name Indicates if BAR has been received (mostly used for debug 374*5113495bSYour Name purpose and this is filled by REO) 375*5113495bSYour Name <legal all> 376*5113495bSYour Name */ 377*5113495bSYour Name 378*5113495bSYour Name #define RX_REO_QUEUE_BAR_OFFSET 0x00000008 379*5113495bSYour Name #define RX_REO_QUEUE_BAR_LSB 7 380*5113495bSYour Name #define RX_REO_QUEUE_BAR_MSB 7 381*5113495bSYour Name #define RX_REO_QUEUE_BAR_MASK 0x00000080 382*5113495bSYour Name 383*5113495bSYour Name 384*5113495bSYour Name /* Description RTY 385*5113495bSYour Name 386*5113495bSYour Name Retry bit is checked if this bit is set. 387*5113495bSYour Name <legal all> 388*5113495bSYour Name */ 389*5113495bSYour Name 390*5113495bSYour Name #define RX_REO_QUEUE_RTY_OFFSET 0x00000008 391*5113495bSYour Name #define RX_REO_QUEUE_RTY_LSB 8 392*5113495bSYour Name #define RX_REO_QUEUE_RTY_MSB 8 393*5113495bSYour Name #define RX_REO_QUEUE_RTY_MASK 0x00000100 394*5113495bSYour Name 395*5113495bSYour Name 396*5113495bSYour Name /* Description CHK_2K_MODE 397*5113495bSYour Name 398*5113495bSYour Name Indicates what type of operation is expected from Reo when 399*5113495bSYour Name the received frame SN falls within the 2K window 400*5113495bSYour Name 401*5113495bSYour Name <legal all> 402*5113495bSYour Name */ 403*5113495bSYour Name 404*5113495bSYour Name #define RX_REO_QUEUE_CHK_2K_MODE_OFFSET 0x00000008 405*5113495bSYour Name #define RX_REO_QUEUE_CHK_2K_MODE_LSB 9 406*5113495bSYour Name #define RX_REO_QUEUE_CHK_2K_MODE_MSB 9 407*5113495bSYour Name #define RX_REO_QUEUE_CHK_2K_MODE_MASK 0x00000200 408*5113495bSYour Name 409*5113495bSYour Name 410*5113495bSYour Name /* Description OOR_MODE 411*5113495bSYour Name 412*5113495bSYour Name Out of Order mode: 413*5113495bSYour Name Indicates what type of operation is expected when the received 414*5113495bSYour Name frame falls within the OOR window. 415*5113495bSYour Name 416*5113495bSYour Name <legal all> 417*5113495bSYour Name */ 418*5113495bSYour Name 419*5113495bSYour Name #define RX_REO_QUEUE_OOR_MODE_OFFSET 0x00000008 420*5113495bSYour Name #define RX_REO_QUEUE_OOR_MODE_LSB 10 421*5113495bSYour Name #define RX_REO_QUEUE_OOR_MODE_MSB 10 422*5113495bSYour Name #define RX_REO_QUEUE_OOR_MODE_MASK 0x00000400 423*5113495bSYour Name 424*5113495bSYour Name 425*5113495bSYour Name /* Description BA_WINDOW_SIZE 426*5113495bSYour Name 427*5113495bSYour Name Indicates the negotiated (window size + 1). 428*5113495bSYour Name It can go up to Max of 256bits. 429*5113495bSYour Name 430*5113495bSYour Name A value 255 means 256 bitmap, 63 means 64 bitmap, 0 (means 431*5113495bSYour Name non-BA session, with window size of 0). The 3 values here 432*5113495bSYour Name are the main values validated, but other values should 433*5113495bSYour Name work as well. 434*5113495bSYour Name 435*5113495bSYour Name A value 1023 means 1024 bitmap, 511 means 512 bitmap. The 436*5113495bSYour Name 2 values here are the main values validated for 1k-bitmap 437*5113495bSYour Name support, but other values should work as well. 438*5113495bSYour Name 439*5113495bSYour Name A BA window size of 0 (=> one frame entry bitmap), means 440*5113495bSYour Name that there is NO RX_REO_QUEUE_EXT descriptor following 441*5113495bSYour Name this RX_REO_QUEUE STRUCT in memory 442*5113495bSYour Name 443*5113495bSYour Name A BA window size of 1 - 105 means that there is 1 RX_REO_QUEUE_EXT 444*5113495bSYour Name descriptor directly following this RX_REO_QUEUE STRUCT 445*5113495bSYour Name in memory. 446*5113495bSYour Name 447*5113495bSYour Name A BA window size of 106 - 210 means that there are 2 RX_REO_QUEUE_EXT 448*5113495bSYour Name descriptors directly following this RX_REO_QUEUE STRUCT 449*5113495bSYour Name in memory 450*5113495bSYour Name 451*5113495bSYour Name A BA window size of 211 - 256 means that there are 3 RX_REO_QUEUE_EXT 452*5113495bSYour Name descriptors directly following this RX_REO_QUEUE STRUCT 453*5113495bSYour Name in memory 454*5113495bSYour Name 455*5113495bSYour Name A BA window size of 257 - 315 means that there is one RX_REO_QUEUE_1K 456*5113495bSYour Name descriptor followed by 3 RX_REO_QUEUE_EXT descriptors directly 457*5113495bSYour Name following this RX_REO_QUEUE STRUCT in memory 458*5113495bSYour Name 459*5113495bSYour Name A BA window size of 316 - 420 means that there is one RX_REO_QUEUE_1K 460*5113495bSYour Name descriptor followed by 4 RX_REO_QUEUE_EXT descriptors directly 461*5113495bSYour Name following this RX_REO_QUEUE STRUCT in memory 462*5113495bSYour Name ... 463*5113495bSYour Name A BA window size of 946 - 1024 means that there is one RX_REO_QUEUE_1K 464*5113495bSYour Name descriptor followed by 10 RX_REO_QUEUE_EXT descriptors 465*5113495bSYour Name directly following this RX_REO_QUEUE STRUCT in memory 466*5113495bSYour Name 467*5113495bSYour Name TODO: Should the above text use '255' and '1023' instead 468*5113495bSYour Name of '256' and '1024'? 469*5113495bSYour Name <legal 0 - 1023> 470*5113495bSYour Name */ 471*5113495bSYour Name 472*5113495bSYour Name #define RX_REO_QUEUE_BA_WINDOW_SIZE_OFFSET 0x00000008 473*5113495bSYour Name #define RX_REO_QUEUE_BA_WINDOW_SIZE_LSB 11 474*5113495bSYour Name #define RX_REO_QUEUE_BA_WINDOW_SIZE_MSB 20 475*5113495bSYour Name #define RX_REO_QUEUE_BA_WINDOW_SIZE_MASK 0x001ff800 476*5113495bSYour Name 477*5113495bSYour Name 478*5113495bSYour Name /* Description PN_CHECK_NEEDED 479*5113495bSYour Name 480*5113495bSYour Name When set, REO shall perform the PN increment check 481*5113495bSYour Name <legal all> 482*5113495bSYour Name */ 483*5113495bSYour Name 484*5113495bSYour Name #define RX_REO_QUEUE_PN_CHECK_NEEDED_OFFSET 0x00000008 485*5113495bSYour Name #define RX_REO_QUEUE_PN_CHECK_NEEDED_LSB 21 486*5113495bSYour Name #define RX_REO_QUEUE_PN_CHECK_NEEDED_MSB 21 487*5113495bSYour Name #define RX_REO_QUEUE_PN_CHECK_NEEDED_MASK 0x00200000 488*5113495bSYour Name 489*5113495bSYour Name 490*5113495bSYour Name /* Description PN_SHALL_BE_EVEN 491*5113495bSYour Name 492*5113495bSYour Name Field only valid when 'pn_check_needed' is set. 493*5113495bSYour Name 494*5113495bSYour Name When set, REO shall confirm that the received PN number 495*5113495bSYour Name is not only incremented, but also always an even number 496*5113495bSYour Name <legal all> 497*5113495bSYour Name */ 498*5113495bSYour Name 499*5113495bSYour Name #define RX_REO_QUEUE_PN_SHALL_BE_EVEN_OFFSET 0x00000008 500*5113495bSYour Name #define RX_REO_QUEUE_PN_SHALL_BE_EVEN_LSB 22 501*5113495bSYour Name #define RX_REO_QUEUE_PN_SHALL_BE_EVEN_MSB 22 502*5113495bSYour Name #define RX_REO_QUEUE_PN_SHALL_BE_EVEN_MASK 0x00400000 503*5113495bSYour Name 504*5113495bSYour Name 505*5113495bSYour Name /* Description PN_SHALL_BE_UNEVEN 506*5113495bSYour Name 507*5113495bSYour Name Field only valid when 'pn_check_needed' is set. 508*5113495bSYour Name 509*5113495bSYour Name When set, REO shall confirm that the received PN number 510*5113495bSYour Name is not only incremented, but also always an uneven number 511*5113495bSYour Name 512*5113495bSYour Name <legal all> 513*5113495bSYour Name */ 514*5113495bSYour Name 515*5113495bSYour Name #define RX_REO_QUEUE_PN_SHALL_BE_UNEVEN_OFFSET 0x00000008 516*5113495bSYour Name #define RX_REO_QUEUE_PN_SHALL_BE_UNEVEN_LSB 23 517*5113495bSYour Name #define RX_REO_QUEUE_PN_SHALL_BE_UNEVEN_MSB 23 518*5113495bSYour Name #define RX_REO_QUEUE_PN_SHALL_BE_UNEVEN_MASK 0x00800000 519*5113495bSYour Name 520*5113495bSYour Name 521*5113495bSYour Name /* Description PN_HANDLING_ENABLE 522*5113495bSYour Name 523*5113495bSYour Name Field only valid when 'pn_check_needed' is set. 524*5113495bSYour Name 525*5113495bSYour Name When set, and REO detected a PN error, HW shall set the 'pn_error_detected_flag'. 526*5113495bSYour Name 527*5113495bSYour Name <legal all> 528*5113495bSYour Name */ 529*5113495bSYour Name 530*5113495bSYour Name #define RX_REO_QUEUE_PN_HANDLING_ENABLE_OFFSET 0x00000008 531*5113495bSYour Name #define RX_REO_QUEUE_PN_HANDLING_ENABLE_LSB 24 532*5113495bSYour Name #define RX_REO_QUEUE_PN_HANDLING_ENABLE_MSB 24 533*5113495bSYour Name #define RX_REO_QUEUE_PN_HANDLING_ENABLE_MASK 0x01000000 534*5113495bSYour Name 535*5113495bSYour Name 536*5113495bSYour Name /* Description PN_SIZE 537*5113495bSYour Name 538*5113495bSYour Name Size of the PN field check. 539*5113495bSYour Name Needed for wrap around handling... 540*5113495bSYour Name 541*5113495bSYour Name <enum 0 pn_size_24> 542*5113495bSYour Name <enum 1 pn_size_48> 543*5113495bSYour Name <enum 2 pn_size_128> 544*5113495bSYour Name 545*5113495bSYour Name <legal 0-2> 546*5113495bSYour Name */ 547*5113495bSYour Name 548*5113495bSYour Name #define RX_REO_QUEUE_PN_SIZE_OFFSET 0x00000008 549*5113495bSYour Name #define RX_REO_QUEUE_PN_SIZE_LSB 25 550*5113495bSYour Name #define RX_REO_QUEUE_PN_SIZE_MSB 26 551*5113495bSYour Name #define RX_REO_QUEUE_PN_SIZE_MASK 0x06000000 552*5113495bSYour Name 553*5113495bSYour Name 554*5113495bSYour Name /* Description IGNORE_AMPDU_FLAG 555*5113495bSYour Name 556*5113495bSYour Name When set, REO shall ignore the ampdu_flag on the entrance 557*5113495bSYour Name descriptor for this queue. 558*5113495bSYour Name <legal all> 559*5113495bSYour Name */ 560*5113495bSYour Name 561*5113495bSYour Name #define RX_REO_QUEUE_IGNORE_AMPDU_FLAG_OFFSET 0x00000008 562*5113495bSYour Name #define RX_REO_QUEUE_IGNORE_AMPDU_FLAG_LSB 27 563*5113495bSYour Name #define RX_REO_QUEUE_IGNORE_AMPDU_FLAG_MSB 27 564*5113495bSYour Name #define RX_REO_QUEUE_IGNORE_AMPDU_FLAG_MASK 0x08000000 565*5113495bSYour Name 566*5113495bSYour Name 567*5113495bSYour Name /* Description RESERVED_2B 568*5113495bSYour Name 569*5113495bSYour Name <legal 0> 570*5113495bSYour Name */ 571*5113495bSYour Name 572*5113495bSYour Name #define RX_REO_QUEUE_RESERVED_2B_OFFSET 0x00000008 573*5113495bSYour Name #define RX_REO_QUEUE_RESERVED_2B_LSB 28 574*5113495bSYour Name #define RX_REO_QUEUE_RESERVED_2B_MSB 31 575*5113495bSYour Name #define RX_REO_QUEUE_RESERVED_2B_MASK 0xf0000000 576*5113495bSYour Name 577*5113495bSYour Name 578*5113495bSYour Name /* Description SVLD 579*5113495bSYour Name 580*5113495bSYour Name Sequence number in next field is valid one. It can be filled 581*5113495bSYour Name by SW if the want to fill in the any negotiated SSN, otherwise 582*5113495bSYour Name REO will fill the sequence number of first received packet 583*5113495bSYour Name and set this bit to 1. 584*5113495bSYour Name <legal all> 585*5113495bSYour Name */ 586*5113495bSYour Name 587*5113495bSYour Name #define RX_REO_QUEUE_SVLD_OFFSET 0x0000000c 588*5113495bSYour Name #define RX_REO_QUEUE_SVLD_LSB 0 589*5113495bSYour Name #define RX_REO_QUEUE_SVLD_MSB 0 590*5113495bSYour Name #define RX_REO_QUEUE_SVLD_MASK 0x00000001 591*5113495bSYour Name 592*5113495bSYour Name 593*5113495bSYour Name /* Description SSN 594*5113495bSYour Name 595*5113495bSYour Name Starting Sequence number of the session, this changes whenever 596*5113495bSYour Name window moves. (can be filled by SW then maintained by REO) 597*5113495bSYour Name 598*5113495bSYour Name <legal all> 599*5113495bSYour Name */ 600*5113495bSYour Name 601*5113495bSYour Name #define RX_REO_QUEUE_SSN_OFFSET 0x0000000c 602*5113495bSYour Name #define RX_REO_QUEUE_SSN_LSB 1 603*5113495bSYour Name #define RX_REO_QUEUE_SSN_MSB 12 604*5113495bSYour Name #define RX_REO_QUEUE_SSN_MASK 0x00001ffe 605*5113495bSYour Name 606*5113495bSYour Name 607*5113495bSYour Name /* Description CURRENT_INDEX 608*5113495bSYour Name 609*5113495bSYour Name Points to last forwarded packet 610*5113495bSYour Name <legal all> 611*5113495bSYour Name */ 612*5113495bSYour Name 613*5113495bSYour Name #define RX_REO_QUEUE_CURRENT_INDEX_OFFSET 0x0000000c 614*5113495bSYour Name #define RX_REO_QUEUE_CURRENT_INDEX_LSB 13 615*5113495bSYour Name #define RX_REO_QUEUE_CURRENT_INDEX_MSB 22 616*5113495bSYour Name #define RX_REO_QUEUE_CURRENT_INDEX_MASK 0x007fe000 617*5113495bSYour Name 618*5113495bSYour Name 619*5113495bSYour Name /* Description SEQ_2K_ERROR_DETECTED_FLAG 620*5113495bSYour Name 621*5113495bSYour Name Set by REO, can only be cleared by SW 622*5113495bSYour Name 623*5113495bSYour Name When set, REO has detected a 2k error jump in the sequence 624*5113495bSYour Name number and from that moment forward, all new frames are 625*5113495bSYour Name forwarded directly to FW, without duplicate detect, reordering, 626*5113495bSYour Name etc. 627*5113495bSYour Name <legal all> 628*5113495bSYour Name */ 629*5113495bSYour Name 630*5113495bSYour Name #define RX_REO_QUEUE_SEQ_2K_ERROR_DETECTED_FLAG_OFFSET 0x0000000c 631*5113495bSYour Name #define RX_REO_QUEUE_SEQ_2K_ERROR_DETECTED_FLAG_LSB 23 632*5113495bSYour Name #define RX_REO_QUEUE_SEQ_2K_ERROR_DETECTED_FLAG_MSB 23 633*5113495bSYour Name #define RX_REO_QUEUE_SEQ_2K_ERROR_DETECTED_FLAG_MASK 0x00800000 634*5113495bSYour Name 635*5113495bSYour Name 636*5113495bSYour Name /* Description PN_ERROR_DETECTED_FLAG 637*5113495bSYour Name 638*5113495bSYour Name Set by REO, can only be cleared by SW 639*5113495bSYour Name 640*5113495bSYour Name When set, REO has detected a PN error and from that moment 641*5113495bSYour Name forward, all new frames are forwarded directly to FW, without 642*5113495bSYour Name duplicate detect, reordering, etc. 643*5113495bSYour Name <legal all> 644*5113495bSYour Name */ 645*5113495bSYour Name 646*5113495bSYour Name #define RX_REO_QUEUE_PN_ERROR_DETECTED_FLAG_OFFSET 0x0000000c 647*5113495bSYour Name #define RX_REO_QUEUE_PN_ERROR_DETECTED_FLAG_LSB 24 648*5113495bSYour Name #define RX_REO_QUEUE_PN_ERROR_DETECTED_FLAG_MSB 24 649*5113495bSYour Name #define RX_REO_QUEUE_PN_ERROR_DETECTED_FLAG_MASK 0x01000000 650*5113495bSYour Name 651*5113495bSYour Name 652*5113495bSYour Name /* Description RESERVED_3A 653*5113495bSYour Name 654*5113495bSYour Name <legal 0> 655*5113495bSYour Name */ 656*5113495bSYour Name 657*5113495bSYour Name #define RX_REO_QUEUE_RESERVED_3A_OFFSET 0x0000000c 658*5113495bSYour Name #define RX_REO_QUEUE_RESERVED_3A_LSB 25 659*5113495bSYour Name #define RX_REO_QUEUE_RESERVED_3A_MSB 30 660*5113495bSYour Name #define RX_REO_QUEUE_RESERVED_3A_MASK 0x7e000000 661*5113495bSYour Name 662*5113495bSYour Name 663*5113495bSYour Name /* Description PN_VALID 664*5113495bSYour Name 665*5113495bSYour Name PN number in next fields are valid. It can be filled by 666*5113495bSYour Name SW if it wants to fill in the any negotiated SSN, otherwise 667*5113495bSYour Name REO will fill the pn based on the first received packet 668*5113495bSYour Name and set this bit to 1. 669*5113495bSYour Name <legal all> 670*5113495bSYour Name */ 671*5113495bSYour Name 672*5113495bSYour Name #define RX_REO_QUEUE_PN_VALID_OFFSET 0x0000000c 673*5113495bSYour Name #define RX_REO_QUEUE_PN_VALID_LSB 31 674*5113495bSYour Name #define RX_REO_QUEUE_PN_VALID_MSB 31 675*5113495bSYour Name #define RX_REO_QUEUE_PN_VALID_MASK 0x80000000 676*5113495bSYour Name 677*5113495bSYour Name 678*5113495bSYour Name /* Description PN_31_0 679*5113495bSYour Name 680*5113495bSYour Name Bits [31:0] of the PN number extracted from the IV field 681*5113495bSYour Name 682*5113495bSYour Name <legal all> 683*5113495bSYour Name */ 684*5113495bSYour Name 685*5113495bSYour Name #define RX_REO_QUEUE_PN_31_0_OFFSET 0x00000010 686*5113495bSYour Name #define RX_REO_QUEUE_PN_31_0_LSB 0 687*5113495bSYour Name #define RX_REO_QUEUE_PN_31_0_MSB 31 688*5113495bSYour Name #define RX_REO_QUEUE_PN_31_0_MASK 0xffffffff 689*5113495bSYour Name 690*5113495bSYour Name 691*5113495bSYour Name /* Description PN_63_32 692*5113495bSYour Name 693*5113495bSYour Name Bits [63:32] of the PN number. 694*5113495bSYour Name <legal all> 695*5113495bSYour Name */ 696*5113495bSYour Name 697*5113495bSYour Name #define RX_REO_QUEUE_PN_63_32_OFFSET 0x00000014 698*5113495bSYour Name #define RX_REO_QUEUE_PN_63_32_LSB 0 699*5113495bSYour Name #define RX_REO_QUEUE_PN_63_32_MSB 31 700*5113495bSYour Name #define RX_REO_QUEUE_PN_63_32_MASK 0xffffffff 701*5113495bSYour Name 702*5113495bSYour Name 703*5113495bSYour Name /* Description PN_95_64 704*5113495bSYour Name 705*5113495bSYour Name Bits [95:64] of the PN number. 706*5113495bSYour Name <legal all> 707*5113495bSYour Name */ 708*5113495bSYour Name 709*5113495bSYour Name #define RX_REO_QUEUE_PN_95_64_OFFSET 0x00000018 710*5113495bSYour Name #define RX_REO_QUEUE_PN_95_64_LSB 0 711*5113495bSYour Name #define RX_REO_QUEUE_PN_95_64_MSB 31 712*5113495bSYour Name #define RX_REO_QUEUE_PN_95_64_MASK 0xffffffff 713*5113495bSYour Name 714*5113495bSYour Name 715*5113495bSYour Name /* Description PN_127_96 716*5113495bSYour Name 717*5113495bSYour Name Bits [127:96] of the PN number. 718*5113495bSYour Name <legal all> 719*5113495bSYour Name */ 720*5113495bSYour Name 721*5113495bSYour Name #define RX_REO_QUEUE_PN_127_96_OFFSET 0x0000001c 722*5113495bSYour Name #define RX_REO_QUEUE_PN_127_96_LSB 0 723*5113495bSYour Name #define RX_REO_QUEUE_PN_127_96_MSB 31 724*5113495bSYour Name #define RX_REO_QUEUE_PN_127_96_MASK 0xffffffff 725*5113495bSYour Name 726*5113495bSYour Name 727*5113495bSYour Name /* Description LAST_RX_ENQUEUE_TIMESTAMP 728*5113495bSYour Name 729*5113495bSYour Name This timestamp is updated when an MPDU is received and accesses 730*5113495bSYour Name this Queue Descriptor. It does not include the access due 731*5113495bSYour Name to Command TLVs or Aging (which will be updated in Last_rx_dequeue_timestamp). 732*5113495bSYour Name 733*5113495bSYour Name <legal all> 734*5113495bSYour Name */ 735*5113495bSYour Name 736*5113495bSYour Name #define RX_REO_QUEUE_LAST_RX_ENQUEUE_TIMESTAMP_OFFSET 0x00000020 737*5113495bSYour Name #define RX_REO_QUEUE_LAST_RX_ENQUEUE_TIMESTAMP_LSB 0 738*5113495bSYour Name #define RX_REO_QUEUE_LAST_RX_ENQUEUE_TIMESTAMP_MSB 31 739*5113495bSYour Name #define RX_REO_QUEUE_LAST_RX_ENQUEUE_TIMESTAMP_MASK 0xffffffff 740*5113495bSYour Name 741*5113495bSYour Name 742*5113495bSYour Name /* Description LAST_RX_DEQUEUE_TIMESTAMP 743*5113495bSYour Name 744*5113495bSYour Name This timestamp is used for Aging. When an MPDU or multiple 745*5113495bSYour Name MPDUs are forwarded, either due to window movement, bar, 746*5113495bSYour Name aging or command flush, this timestamp is updated. Also 747*5113495bSYour Name when the bitmap is all zero and the first time an MPDU is 748*5113495bSYour Name queued (opcode=QCUR), this timestamp is updated for aging. 749*5113495bSYour Name 750*5113495bSYour Name <legal all> 751*5113495bSYour Name */ 752*5113495bSYour Name 753*5113495bSYour Name #define RX_REO_QUEUE_LAST_RX_DEQUEUE_TIMESTAMP_OFFSET 0x00000024 754*5113495bSYour Name #define RX_REO_QUEUE_LAST_RX_DEQUEUE_TIMESTAMP_LSB 0 755*5113495bSYour Name #define RX_REO_QUEUE_LAST_RX_DEQUEUE_TIMESTAMP_MSB 31 756*5113495bSYour Name #define RX_REO_QUEUE_LAST_RX_DEQUEUE_TIMESTAMP_MASK 0xffffffff 757*5113495bSYour Name 758*5113495bSYour Name 759*5113495bSYour Name /* Description PTR_TO_NEXT_AGING_QUEUE_31_0 760*5113495bSYour Name 761*5113495bSYour Name Address (address bits 31-0)of next RX_REO_QUEUE descriptor 762*5113495bSYour Name in the 'receive timestamp' ordered list. 763*5113495bSYour Name From it the Position of this queue descriptor in the per 764*5113495bSYour Name AC aging waitlist can be derived. 765*5113495bSYour Name Value 0x0 indicates the 'NULL' pointer which implies that 766*5113495bSYour Name this is the last entry in the list. 767*5113495bSYour Name <legal all> 768*5113495bSYour Name */ 769*5113495bSYour Name 770*5113495bSYour Name #define RX_REO_QUEUE_PTR_TO_NEXT_AGING_QUEUE_31_0_OFFSET 0x00000028 771*5113495bSYour Name #define RX_REO_QUEUE_PTR_TO_NEXT_AGING_QUEUE_31_0_LSB 0 772*5113495bSYour Name #define RX_REO_QUEUE_PTR_TO_NEXT_AGING_QUEUE_31_0_MSB 31 773*5113495bSYour Name #define RX_REO_QUEUE_PTR_TO_NEXT_AGING_QUEUE_31_0_MASK 0xffffffff 774*5113495bSYour Name 775*5113495bSYour Name 776*5113495bSYour Name /* Description PTR_TO_NEXT_AGING_QUEUE_39_32 777*5113495bSYour Name 778*5113495bSYour Name Address (address bits 39-32)of next RX_REO_QUEUE descriptor 779*5113495bSYour Name in the 'receive timestamp' ordered list. 780*5113495bSYour Name From it the Position of this queue descriptor in the per 781*5113495bSYour Name AC aging waitlist can be derived. 782*5113495bSYour Name Value 0x0 indicates the 'NULL' pointer which implies that 783*5113495bSYour Name this is the last entry in the list. 784*5113495bSYour Name <legal all> 785*5113495bSYour Name */ 786*5113495bSYour Name 787*5113495bSYour Name #define RX_REO_QUEUE_PTR_TO_NEXT_AGING_QUEUE_39_32_OFFSET 0x0000002c 788*5113495bSYour Name #define RX_REO_QUEUE_PTR_TO_NEXT_AGING_QUEUE_39_32_LSB 0 789*5113495bSYour Name #define RX_REO_QUEUE_PTR_TO_NEXT_AGING_QUEUE_39_32_MSB 7 790*5113495bSYour Name #define RX_REO_QUEUE_PTR_TO_NEXT_AGING_QUEUE_39_32_MASK 0x000000ff 791*5113495bSYour Name 792*5113495bSYour Name 793*5113495bSYour Name /* Description RESERVED_11A 794*5113495bSYour Name 795*5113495bSYour Name <legal 0> 796*5113495bSYour Name */ 797*5113495bSYour Name 798*5113495bSYour Name #define RX_REO_QUEUE_RESERVED_11A_OFFSET 0x0000002c 799*5113495bSYour Name #define RX_REO_QUEUE_RESERVED_11A_LSB 8 800*5113495bSYour Name #define RX_REO_QUEUE_RESERVED_11A_MSB 31 801*5113495bSYour Name #define RX_REO_QUEUE_RESERVED_11A_MASK 0xffffff00 802*5113495bSYour Name 803*5113495bSYour Name 804*5113495bSYour Name /* Description PTR_TO_PREVIOUS_AGING_QUEUE_31_0 805*5113495bSYour Name 806*5113495bSYour Name Address (address bits 31-0)of next RX_REO_QUEUE descriptor 807*5113495bSYour Name in the 'receive timestamp' ordered list. 808*5113495bSYour Name From it the Position of this queue descriptor in the per 809*5113495bSYour Name AC aging waitlist can be derived. 810*5113495bSYour Name Value 0x0 indicates the 'NULL' pointer which implies that 811*5113495bSYour Name this is the first entry in the list. 812*5113495bSYour Name <legal all> 813*5113495bSYour Name */ 814*5113495bSYour Name 815*5113495bSYour Name #define RX_REO_QUEUE_PTR_TO_PREVIOUS_AGING_QUEUE_31_0_OFFSET 0x00000030 816*5113495bSYour Name #define RX_REO_QUEUE_PTR_TO_PREVIOUS_AGING_QUEUE_31_0_LSB 0 817*5113495bSYour Name #define RX_REO_QUEUE_PTR_TO_PREVIOUS_AGING_QUEUE_31_0_MSB 31 818*5113495bSYour Name #define RX_REO_QUEUE_PTR_TO_PREVIOUS_AGING_QUEUE_31_0_MASK 0xffffffff 819*5113495bSYour Name 820*5113495bSYour Name 821*5113495bSYour Name /* Description PTR_TO_PREVIOUS_AGING_QUEUE_39_32 822*5113495bSYour Name 823*5113495bSYour Name Address (address bits 39-32)of next RX_REO_QUEUE descriptor 824*5113495bSYour Name in the 'receive timestamp' ordered list. 825*5113495bSYour Name From it the Position of this queue descriptor in the per 826*5113495bSYour Name AC aging waitlist can be derived. 827*5113495bSYour Name Value 0x0 indicates the 'NULL' pointer which implies that 828*5113495bSYour Name this is the first entry in the list. 829*5113495bSYour Name <legal all> 830*5113495bSYour Name */ 831*5113495bSYour Name 832*5113495bSYour Name #define RX_REO_QUEUE_PTR_TO_PREVIOUS_AGING_QUEUE_39_32_OFFSET 0x00000034 833*5113495bSYour Name #define RX_REO_QUEUE_PTR_TO_PREVIOUS_AGING_QUEUE_39_32_LSB 0 834*5113495bSYour Name #define RX_REO_QUEUE_PTR_TO_PREVIOUS_AGING_QUEUE_39_32_MSB 7 835*5113495bSYour Name #define RX_REO_QUEUE_PTR_TO_PREVIOUS_AGING_QUEUE_39_32_MASK 0x000000ff 836*5113495bSYour Name 837*5113495bSYour Name 838*5113495bSYour Name /* Description STATISTICS_COUNTER_INDEX 839*5113495bSYour Name 840*5113495bSYour Name Usually all the queues pertaining to one virtual device 841*5113495bSYour Name use one statistics register set, and each virtual device 842*5113495bSYour Name maps to a different set in case of not too many virtual 843*5113495bSYour Name devices. 844*5113495bSYour Name <legal 0-47> 845*5113495bSYour Name */ 846*5113495bSYour Name 847*5113495bSYour Name #define RX_REO_QUEUE_STATISTICS_COUNTER_INDEX_OFFSET 0x00000034 848*5113495bSYour Name #define RX_REO_QUEUE_STATISTICS_COUNTER_INDEX_LSB 8 849*5113495bSYour Name #define RX_REO_QUEUE_STATISTICS_COUNTER_INDEX_MSB 13 850*5113495bSYour Name #define RX_REO_QUEUE_STATISTICS_COUNTER_INDEX_MASK 0x00003f00 851*5113495bSYour Name 852*5113495bSYour Name 853*5113495bSYour Name /* Description RESERVED_13A 854*5113495bSYour Name 855*5113495bSYour Name <legal 0> 856*5113495bSYour Name */ 857*5113495bSYour Name 858*5113495bSYour Name #define RX_REO_QUEUE_RESERVED_13A_OFFSET 0x00000034 859*5113495bSYour Name #define RX_REO_QUEUE_RESERVED_13A_LSB 14 860*5113495bSYour Name #define RX_REO_QUEUE_RESERVED_13A_MSB 31 861*5113495bSYour Name #define RX_REO_QUEUE_RESERVED_13A_MASK 0xffffc000 862*5113495bSYour Name 863*5113495bSYour Name 864*5113495bSYour Name /* Description RX_BITMAP_31_0 865*5113495bSYour Name 866*5113495bSYour Name When a bit is set, the corresponding frame is currently 867*5113495bSYour Name held in the re-order queue. 868*5113495bSYour Name The bitmap is Fully managed by HW. 869*5113495bSYour Name SW shall init this to 0, and then never ever change it 870*5113495bSYour Name <legal all> 871*5113495bSYour Name */ 872*5113495bSYour Name 873*5113495bSYour Name #define RX_REO_QUEUE_RX_BITMAP_31_0_OFFSET 0x00000038 874*5113495bSYour Name #define RX_REO_QUEUE_RX_BITMAP_31_0_LSB 0 875*5113495bSYour Name #define RX_REO_QUEUE_RX_BITMAP_31_0_MSB 31 876*5113495bSYour Name #define RX_REO_QUEUE_RX_BITMAP_31_0_MASK 0xffffffff 877*5113495bSYour Name 878*5113495bSYour Name 879*5113495bSYour Name /* Description RX_BITMAP_63_32 880*5113495bSYour Name 881*5113495bSYour Name See Rx_bitmap_31_0 description 882*5113495bSYour Name <legal all> 883*5113495bSYour Name */ 884*5113495bSYour Name 885*5113495bSYour Name #define RX_REO_QUEUE_RX_BITMAP_63_32_OFFSET 0x0000003c 886*5113495bSYour Name #define RX_REO_QUEUE_RX_BITMAP_63_32_LSB 0 887*5113495bSYour Name #define RX_REO_QUEUE_RX_BITMAP_63_32_MSB 31 888*5113495bSYour Name #define RX_REO_QUEUE_RX_BITMAP_63_32_MASK 0xffffffff 889*5113495bSYour Name 890*5113495bSYour Name 891*5113495bSYour Name /* Description RX_BITMAP_95_64 892*5113495bSYour Name 893*5113495bSYour Name See Rx_bitmap_31_0 description 894*5113495bSYour Name <legal all> 895*5113495bSYour Name */ 896*5113495bSYour Name 897*5113495bSYour Name #define RX_REO_QUEUE_RX_BITMAP_95_64_OFFSET 0x00000040 898*5113495bSYour Name #define RX_REO_QUEUE_RX_BITMAP_95_64_LSB 0 899*5113495bSYour Name #define RX_REO_QUEUE_RX_BITMAP_95_64_MSB 31 900*5113495bSYour Name #define RX_REO_QUEUE_RX_BITMAP_95_64_MASK 0xffffffff 901*5113495bSYour Name 902*5113495bSYour Name 903*5113495bSYour Name /* Description RX_BITMAP_127_96 904*5113495bSYour Name 905*5113495bSYour Name See Rx_bitmap_31_0 description 906*5113495bSYour Name <legal all> 907*5113495bSYour Name */ 908*5113495bSYour Name 909*5113495bSYour Name #define RX_REO_QUEUE_RX_BITMAP_127_96_OFFSET 0x00000044 910*5113495bSYour Name #define RX_REO_QUEUE_RX_BITMAP_127_96_LSB 0 911*5113495bSYour Name #define RX_REO_QUEUE_RX_BITMAP_127_96_MSB 31 912*5113495bSYour Name #define RX_REO_QUEUE_RX_BITMAP_127_96_MASK 0xffffffff 913*5113495bSYour Name 914*5113495bSYour Name 915*5113495bSYour Name /* Description RX_BITMAP_159_128 916*5113495bSYour Name 917*5113495bSYour Name See Rx_bitmap_31_0 description 918*5113495bSYour Name <legal all> 919*5113495bSYour Name */ 920*5113495bSYour Name 921*5113495bSYour Name #define RX_REO_QUEUE_RX_BITMAP_159_128_OFFSET 0x00000048 922*5113495bSYour Name #define RX_REO_QUEUE_RX_BITMAP_159_128_LSB 0 923*5113495bSYour Name #define RX_REO_QUEUE_RX_BITMAP_159_128_MSB 31 924*5113495bSYour Name #define RX_REO_QUEUE_RX_BITMAP_159_128_MASK 0xffffffff 925*5113495bSYour Name 926*5113495bSYour Name 927*5113495bSYour Name /* Description RX_BITMAP_191_160 928*5113495bSYour Name 929*5113495bSYour Name See Rx_bitmap_31_0 description 930*5113495bSYour Name <legal all> 931*5113495bSYour Name */ 932*5113495bSYour Name 933*5113495bSYour Name #define RX_REO_QUEUE_RX_BITMAP_191_160_OFFSET 0x0000004c 934*5113495bSYour Name #define RX_REO_QUEUE_RX_BITMAP_191_160_LSB 0 935*5113495bSYour Name #define RX_REO_QUEUE_RX_BITMAP_191_160_MSB 31 936*5113495bSYour Name #define RX_REO_QUEUE_RX_BITMAP_191_160_MASK 0xffffffff 937*5113495bSYour Name 938*5113495bSYour Name 939*5113495bSYour Name /* Description RX_BITMAP_223_192 940*5113495bSYour Name 941*5113495bSYour Name See Rx_bitmap_31_0 description 942*5113495bSYour Name <legal all> 943*5113495bSYour Name */ 944*5113495bSYour Name 945*5113495bSYour Name #define RX_REO_QUEUE_RX_BITMAP_223_192_OFFSET 0x00000050 946*5113495bSYour Name #define RX_REO_QUEUE_RX_BITMAP_223_192_LSB 0 947*5113495bSYour Name #define RX_REO_QUEUE_RX_BITMAP_223_192_MSB 31 948*5113495bSYour Name #define RX_REO_QUEUE_RX_BITMAP_223_192_MASK 0xffffffff 949*5113495bSYour Name 950*5113495bSYour Name 951*5113495bSYour Name /* Description RX_BITMAP_255_224 952*5113495bSYour Name 953*5113495bSYour Name See Rx_bitmap_31_0 description 954*5113495bSYour Name <legal all> 955*5113495bSYour Name */ 956*5113495bSYour Name 957*5113495bSYour Name #define RX_REO_QUEUE_RX_BITMAP_255_224_OFFSET 0x00000054 958*5113495bSYour Name #define RX_REO_QUEUE_RX_BITMAP_255_224_LSB 0 959*5113495bSYour Name #define RX_REO_QUEUE_RX_BITMAP_255_224_MSB 31 960*5113495bSYour Name #define RX_REO_QUEUE_RX_BITMAP_255_224_MASK 0xffffffff 961*5113495bSYour Name 962*5113495bSYour Name 963*5113495bSYour Name /* Description RX_BITMAP_287_256 964*5113495bSYour Name 965*5113495bSYour Name See Rx_bitmap_31_0 description 966*5113495bSYour Name <legal all> 967*5113495bSYour Name */ 968*5113495bSYour Name 969*5113495bSYour Name #define RX_REO_QUEUE_RX_BITMAP_287_256_OFFSET 0x00000058 970*5113495bSYour Name #define RX_REO_QUEUE_RX_BITMAP_287_256_LSB 0 971*5113495bSYour Name #define RX_REO_QUEUE_RX_BITMAP_287_256_MSB 31 972*5113495bSYour Name #define RX_REO_QUEUE_RX_BITMAP_287_256_MASK 0xffffffff 973*5113495bSYour Name 974*5113495bSYour Name 975*5113495bSYour Name /* Description CURRENT_MPDU_COUNT 976*5113495bSYour Name 977*5113495bSYour Name The number of MPDUs in the queue. 978*5113495bSYour Name 979*5113495bSYour Name <legal all> 980*5113495bSYour Name */ 981*5113495bSYour Name 982*5113495bSYour Name #define RX_REO_QUEUE_CURRENT_MPDU_COUNT_OFFSET 0x0000005c 983*5113495bSYour Name #define RX_REO_QUEUE_CURRENT_MPDU_COUNT_LSB 0 984*5113495bSYour Name #define RX_REO_QUEUE_CURRENT_MPDU_COUNT_MSB 6 985*5113495bSYour Name #define RX_REO_QUEUE_CURRENT_MPDU_COUNT_MASK 0x0000007f 986*5113495bSYour Name 987*5113495bSYour Name 988*5113495bSYour Name /* Description CURRENT_MSDU_COUNT 989*5113495bSYour Name 990*5113495bSYour Name The number of MSDUs in the queue. 991*5113495bSYour Name <legal all> 992*5113495bSYour Name */ 993*5113495bSYour Name 994*5113495bSYour Name #define RX_REO_QUEUE_CURRENT_MSDU_COUNT_OFFSET 0x0000005c 995*5113495bSYour Name #define RX_REO_QUEUE_CURRENT_MSDU_COUNT_LSB 7 996*5113495bSYour Name #define RX_REO_QUEUE_CURRENT_MSDU_COUNT_MSB 31 997*5113495bSYour Name #define RX_REO_QUEUE_CURRENT_MSDU_COUNT_MASK 0xffffff80 998*5113495bSYour Name 999*5113495bSYour Name 1000*5113495bSYour Name /* Description LAST_SN_REG_INDEX 1001*5113495bSYour Name 1002*5113495bSYour Name REO has registers to save the last SN seen in up to 9 REO 1003*5113495bSYour Name queues, to support "leaky APs." 1004*5113495bSYour Name 1005*5113495bSYour Name This field gives the register number to use for saving the 1006*5113495bSYour Name last SN of this REO queue. 1007*5113495bSYour Name <legal 0-8> 1008*5113495bSYour Name */ 1009*5113495bSYour Name 1010*5113495bSYour Name #define RX_REO_QUEUE_LAST_SN_REG_INDEX_OFFSET 0x00000060 1011*5113495bSYour Name #define RX_REO_QUEUE_LAST_SN_REG_INDEX_LSB 0 1012*5113495bSYour Name #define RX_REO_QUEUE_LAST_SN_REG_INDEX_MSB 3 1013*5113495bSYour Name #define RX_REO_QUEUE_LAST_SN_REG_INDEX_MASK 0x0000000f 1014*5113495bSYour Name 1015*5113495bSYour Name 1016*5113495bSYour Name /* Description TIMEOUT_COUNT 1017*5113495bSYour Name 1018*5113495bSYour Name The number of times that REO started forwarding frames even 1019*5113495bSYour Name though there is a hole in the bitmap. Forwarding reason 1020*5113495bSYour Name is Timeout 1021*5113495bSYour Name 1022*5113495bSYour Name The counter saturates and freezes at 0x3F 1023*5113495bSYour Name 1024*5113495bSYour Name <legal all> 1025*5113495bSYour Name */ 1026*5113495bSYour Name 1027*5113495bSYour Name #define RX_REO_QUEUE_TIMEOUT_COUNT_OFFSET 0x00000060 1028*5113495bSYour Name #define RX_REO_QUEUE_TIMEOUT_COUNT_LSB 4 1029*5113495bSYour Name #define RX_REO_QUEUE_TIMEOUT_COUNT_MSB 9 1030*5113495bSYour Name #define RX_REO_QUEUE_TIMEOUT_COUNT_MASK 0x000003f0 1031*5113495bSYour Name 1032*5113495bSYour Name 1033*5113495bSYour Name /* Description FORWARD_DUE_TO_BAR_COUNT 1034*5113495bSYour Name 1035*5113495bSYour Name The number of times that REO started forwarding frames even 1036*5113495bSYour Name though there is a hole in the bitmap. Forwarding reason 1037*5113495bSYour Name is reception of BAR frame. 1038*5113495bSYour Name 1039*5113495bSYour Name The counter saturates and freezes at 0x3F 1040*5113495bSYour Name 1041*5113495bSYour Name <legal all> 1042*5113495bSYour Name */ 1043*5113495bSYour Name 1044*5113495bSYour Name #define RX_REO_QUEUE_FORWARD_DUE_TO_BAR_COUNT_OFFSET 0x00000060 1045*5113495bSYour Name #define RX_REO_QUEUE_FORWARD_DUE_TO_BAR_COUNT_LSB 10 1046*5113495bSYour Name #define RX_REO_QUEUE_FORWARD_DUE_TO_BAR_COUNT_MSB 15 1047*5113495bSYour Name #define RX_REO_QUEUE_FORWARD_DUE_TO_BAR_COUNT_MASK 0x0000fc00 1048*5113495bSYour Name 1049*5113495bSYour Name 1050*5113495bSYour Name /* Description DUPLICATE_COUNT 1051*5113495bSYour Name 1052*5113495bSYour Name The number of duplicate frames that have been detected 1053*5113495bSYour Name <legal all> 1054*5113495bSYour Name */ 1055*5113495bSYour Name 1056*5113495bSYour Name #define RX_REO_QUEUE_DUPLICATE_COUNT_OFFSET 0x00000060 1057*5113495bSYour Name #define RX_REO_QUEUE_DUPLICATE_COUNT_LSB 16 1058*5113495bSYour Name #define RX_REO_QUEUE_DUPLICATE_COUNT_MSB 31 1059*5113495bSYour Name #define RX_REO_QUEUE_DUPLICATE_COUNT_MASK 0xffff0000 1060*5113495bSYour Name 1061*5113495bSYour Name 1062*5113495bSYour Name /* Description FRAMES_IN_ORDER_COUNT 1063*5113495bSYour Name 1064*5113495bSYour Name The number of frames that have been received in order (without 1065*5113495bSYour Name a hole that prevented them from being forwarded immediately) 1066*5113495bSYour Name 1067*5113495bSYour Name 1068*5113495bSYour Name This corresponds to the Reorder opcodes: 1069*5113495bSYour Name 'FWDCUR' and 'FWD BUF' 1070*5113495bSYour Name 1071*5113495bSYour Name <legal all> 1072*5113495bSYour Name */ 1073*5113495bSYour Name 1074*5113495bSYour Name #define RX_REO_QUEUE_FRAMES_IN_ORDER_COUNT_OFFSET 0x00000064 1075*5113495bSYour Name #define RX_REO_QUEUE_FRAMES_IN_ORDER_COUNT_LSB 0 1076*5113495bSYour Name #define RX_REO_QUEUE_FRAMES_IN_ORDER_COUNT_MSB 23 1077*5113495bSYour Name #define RX_REO_QUEUE_FRAMES_IN_ORDER_COUNT_MASK 0x00ffffff 1078*5113495bSYour Name 1079*5113495bSYour Name 1080*5113495bSYour Name /* Description BAR_RECEIVED_COUNT 1081*5113495bSYour Name 1082*5113495bSYour Name The number of times a BAR frame is received. 1083*5113495bSYour Name 1084*5113495bSYour Name This corresponds to the Reorder opcodes with 'DROP' 1085*5113495bSYour Name 1086*5113495bSYour Name The counter saturates and freezes at 0xFF 1087*5113495bSYour Name <legal all> 1088*5113495bSYour Name */ 1089*5113495bSYour Name 1090*5113495bSYour Name #define RX_REO_QUEUE_BAR_RECEIVED_COUNT_OFFSET 0x00000064 1091*5113495bSYour Name #define RX_REO_QUEUE_BAR_RECEIVED_COUNT_LSB 24 1092*5113495bSYour Name #define RX_REO_QUEUE_BAR_RECEIVED_COUNT_MSB 31 1093*5113495bSYour Name #define RX_REO_QUEUE_BAR_RECEIVED_COUNT_MASK 0xff000000 1094*5113495bSYour Name 1095*5113495bSYour Name 1096*5113495bSYour Name /* Description MPDU_FRAMES_PROCESSED_COUNT 1097*5113495bSYour Name 1098*5113495bSYour Name The total number of MPDU frames that have been processed 1099*5113495bSYour Name by REO. 'Processing' here means that REO has received them 1100*5113495bSYour Name out of the entrance ring, and retrieved the corresponding 1101*5113495bSYour Name RX_REO_QUEUE Descriptor. 1102*5113495bSYour Name 1103*5113495bSYour Name Note that this count includes duplicates, frames that later 1104*5113495bSYour Name had errors, etc. 1105*5113495bSYour Name 1106*5113495bSYour Name Note that field 'Duplicate_count' indicates how many of 1107*5113495bSYour Name these MPDUs were duplicates. 1108*5113495bSYour Name 1109*5113495bSYour Name <legal all> 1110*5113495bSYour Name */ 1111*5113495bSYour Name 1112*5113495bSYour Name #define RX_REO_QUEUE_MPDU_FRAMES_PROCESSED_COUNT_OFFSET 0x00000068 1113*5113495bSYour Name #define RX_REO_QUEUE_MPDU_FRAMES_PROCESSED_COUNT_LSB 0 1114*5113495bSYour Name #define RX_REO_QUEUE_MPDU_FRAMES_PROCESSED_COUNT_MSB 31 1115*5113495bSYour Name #define RX_REO_QUEUE_MPDU_FRAMES_PROCESSED_COUNT_MASK 0xffffffff 1116*5113495bSYour Name 1117*5113495bSYour Name 1118*5113495bSYour Name /* Description MSDU_FRAMES_PROCESSED_COUNT 1119*5113495bSYour Name 1120*5113495bSYour Name The total number of MSDU frames that have been processed 1121*5113495bSYour Name by REO. 'Processing' here means that REO has received them 1122*5113495bSYour Name out of the entrance ring, and retrieved the corresponding 1123*5113495bSYour Name RX_REO_QUEUE Descriptor. 1124*5113495bSYour Name 1125*5113495bSYour Name Note that this count includes duplicates, frames that later 1126*5113495bSYour Name had errors, etc. 1127*5113495bSYour Name 1128*5113495bSYour Name <legal all> 1129*5113495bSYour Name */ 1130*5113495bSYour Name 1131*5113495bSYour Name #define RX_REO_QUEUE_MSDU_FRAMES_PROCESSED_COUNT_OFFSET 0x0000006c 1132*5113495bSYour Name #define RX_REO_QUEUE_MSDU_FRAMES_PROCESSED_COUNT_LSB 0 1133*5113495bSYour Name #define RX_REO_QUEUE_MSDU_FRAMES_PROCESSED_COUNT_MSB 31 1134*5113495bSYour Name #define RX_REO_QUEUE_MSDU_FRAMES_PROCESSED_COUNT_MASK 0xffffffff 1135*5113495bSYour Name 1136*5113495bSYour Name 1137*5113495bSYour Name /* Description TOTAL_PROCESSED_BYTE_COUNT 1138*5113495bSYour Name 1139*5113495bSYour Name An approximation of the number of bytes processed for this 1140*5113495bSYour Name queue. 1141*5113495bSYour Name 'Processing' here means that REO has received them out of 1142*5113495bSYour Name the entrance ring, and retrieved the corresponding RX_REO_QUEUE 1143*5113495bSYour Name Descriptor. 1144*5113495bSYour Name 1145*5113495bSYour Name Note that this count includes duplicates, frames that later 1146*5113495bSYour Name had errors, etc. 1147*5113495bSYour Name 1148*5113495bSYour Name In 64 byte units 1149*5113495bSYour Name <legal all> 1150*5113495bSYour Name */ 1151*5113495bSYour Name 1152*5113495bSYour Name #define RX_REO_QUEUE_TOTAL_PROCESSED_BYTE_COUNT_OFFSET 0x00000070 1153*5113495bSYour Name #define RX_REO_QUEUE_TOTAL_PROCESSED_BYTE_COUNT_LSB 0 1154*5113495bSYour Name #define RX_REO_QUEUE_TOTAL_PROCESSED_BYTE_COUNT_MSB 31 1155*5113495bSYour Name #define RX_REO_QUEUE_TOTAL_PROCESSED_BYTE_COUNT_MASK 0xffffffff 1156*5113495bSYour Name 1157*5113495bSYour Name 1158*5113495bSYour Name /* Description LATE_RECEIVE_MPDU_COUNT 1159*5113495bSYour Name 1160*5113495bSYour Name The number of MPDUs received after the window had already 1161*5113495bSYour Name moved on. The 'late' sequence window is defined as (Window 1162*5113495bSYour Name SSN - 256) - (Window SSN - 1) 1163*5113495bSYour Name 1164*5113495bSYour Name This corresponds with Out of order detection in duplicate 1165*5113495bSYour Name detect FSM 1166*5113495bSYour Name 1167*5113495bSYour Name The counter saturates and freezes at 0xFFF 1168*5113495bSYour Name 1169*5113495bSYour Name <legal all> 1170*5113495bSYour Name */ 1171*5113495bSYour Name 1172*5113495bSYour Name #define RX_REO_QUEUE_LATE_RECEIVE_MPDU_COUNT_OFFSET 0x00000074 1173*5113495bSYour Name #define RX_REO_QUEUE_LATE_RECEIVE_MPDU_COUNT_LSB 0 1174*5113495bSYour Name #define RX_REO_QUEUE_LATE_RECEIVE_MPDU_COUNT_MSB 11 1175*5113495bSYour Name #define RX_REO_QUEUE_LATE_RECEIVE_MPDU_COUNT_MASK 0x00000fff 1176*5113495bSYour Name 1177*5113495bSYour Name 1178*5113495bSYour Name /* Description WINDOW_JUMP_2K 1179*5113495bSYour Name 1180*5113495bSYour Name The number of times the window moved more then 2K 1181*5113495bSYour Name 1182*5113495bSYour Name The counter saturates and freezes at 0xF 1183*5113495bSYour Name 1184*5113495bSYour Name (Note: field name can not start with number: previous 2k_window_jump) 1185*5113495bSYour Name 1186*5113495bSYour Name 1187*5113495bSYour Name <legal all> 1188*5113495bSYour Name */ 1189*5113495bSYour Name 1190*5113495bSYour Name #define RX_REO_QUEUE_WINDOW_JUMP_2K_OFFSET 0x00000074 1191*5113495bSYour Name #define RX_REO_QUEUE_WINDOW_JUMP_2K_LSB 12 1192*5113495bSYour Name #define RX_REO_QUEUE_WINDOW_JUMP_2K_MSB 15 1193*5113495bSYour Name #define RX_REO_QUEUE_WINDOW_JUMP_2K_MASK 0x0000f000 1194*5113495bSYour Name 1195*5113495bSYour Name 1196*5113495bSYour Name /* Description HOLE_COUNT 1197*5113495bSYour Name 1198*5113495bSYour Name The number of times a hole was created in the receive bitmap. 1199*5113495bSYour Name 1200*5113495bSYour Name 1201*5113495bSYour Name This corresponds to the Reorder opcodes with 'QCUR' 1202*5113495bSYour Name 1203*5113495bSYour Name <legal all> 1204*5113495bSYour Name */ 1205*5113495bSYour Name 1206*5113495bSYour Name #define RX_REO_QUEUE_HOLE_COUNT_OFFSET 0x00000074 1207*5113495bSYour Name #define RX_REO_QUEUE_HOLE_COUNT_LSB 16 1208*5113495bSYour Name #define RX_REO_QUEUE_HOLE_COUNT_MSB 31 1209*5113495bSYour Name #define RX_REO_QUEUE_HOLE_COUNT_MASK 0xffff0000 1210*5113495bSYour Name 1211*5113495bSYour Name 1212*5113495bSYour Name /* Description AGING_DROP_MPDU_COUNT 1213*5113495bSYour Name 1214*5113495bSYour Name The number of holes in the bitmap that moved due to aging 1215*5113495bSYour Name counter expiry 1216*5113495bSYour Name <legal all> 1217*5113495bSYour Name */ 1218*5113495bSYour Name 1219*5113495bSYour Name #define RX_REO_QUEUE_AGING_DROP_MPDU_COUNT_OFFSET 0x00000078 1220*5113495bSYour Name #define RX_REO_QUEUE_AGING_DROP_MPDU_COUNT_LSB 0 1221*5113495bSYour Name #define RX_REO_QUEUE_AGING_DROP_MPDU_COUNT_MSB 15 1222*5113495bSYour Name #define RX_REO_QUEUE_AGING_DROP_MPDU_COUNT_MASK 0x0000ffff 1223*5113495bSYour Name 1224*5113495bSYour Name 1225*5113495bSYour Name /* Description AGING_DROP_INTERVAL 1226*5113495bSYour Name 1227*5113495bSYour Name The number of times holes got removed from the bitmap due 1228*5113495bSYour Name to aging counter expiry 1229*5113495bSYour Name <legal all> 1230*5113495bSYour Name */ 1231*5113495bSYour Name 1232*5113495bSYour Name #define RX_REO_QUEUE_AGING_DROP_INTERVAL_OFFSET 0x00000078 1233*5113495bSYour Name #define RX_REO_QUEUE_AGING_DROP_INTERVAL_LSB 16 1234*5113495bSYour Name #define RX_REO_QUEUE_AGING_DROP_INTERVAL_MSB 23 1235*5113495bSYour Name #define RX_REO_QUEUE_AGING_DROP_INTERVAL_MASK 0x00ff0000 1236*5113495bSYour Name 1237*5113495bSYour Name 1238*5113495bSYour Name /* Description RESERVED_30 1239*5113495bSYour Name 1240*5113495bSYour Name <legal 0> 1241*5113495bSYour Name */ 1242*5113495bSYour Name 1243*5113495bSYour Name #define RX_REO_QUEUE_RESERVED_30_OFFSET 0x00000078 1244*5113495bSYour Name #define RX_REO_QUEUE_RESERVED_30_LSB 24 1245*5113495bSYour Name #define RX_REO_QUEUE_RESERVED_30_MSB 31 1246*5113495bSYour Name #define RX_REO_QUEUE_RESERVED_30_MASK 0xff000000 1247*5113495bSYour Name 1248*5113495bSYour Name 1249*5113495bSYour Name /* Description RESERVED_31 1250*5113495bSYour Name 1251*5113495bSYour Name <legal 0> 1252*5113495bSYour Name */ 1253*5113495bSYour Name 1254*5113495bSYour Name #define RX_REO_QUEUE_RESERVED_31_OFFSET 0x0000007c 1255*5113495bSYour Name #define RX_REO_QUEUE_RESERVED_31_LSB 0 1256*5113495bSYour Name #define RX_REO_QUEUE_RESERVED_31_MSB 31 1257*5113495bSYour Name #define RX_REO_QUEUE_RESERVED_31_MASK 0xffffffff 1258*5113495bSYour Name 1259*5113495bSYour Name 1260*5113495bSYour Name 1261*5113495bSYour Name #endif // RX_REO_QUEUE 1262