1*5113495bSYour Name /* 2*5113495bSYour Name * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. 3*5113495bSYour Name * 4*5113495bSYour Name * Permission to use, copy, modify, and/or distribute this software for any 5*5113495bSYour Name * purpose with or without fee is hereby granted, provided that the above 6*5113495bSYour Name * copyright notice and this permission notice appear in all copies. 7*5113495bSYour Name * 8*5113495bSYour Name * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9*5113495bSYour Name * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10*5113495bSYour Name * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11*5113495bSYour Name * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12*5113495bSYour Name * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13*5113495bSYour Name * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14*5113495bSYour Name * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15*5113495bSYour Name */ 16*5113495bSYour Name 17*5113495bSYour Name #ifndef _RX_REO_QUEUE_1K_H_ 18*5113495bSYour Name #define _RX_REO_QUEUE_1K_H_ 19*5113495bSYour Name #if !defined(__ASSEMBLER__) 20*5113495bSYour Name #endif 21*5113495bSYour Name 22*5113495bSYour Name #include "uniform_descriptor_header.h" 23*5113495bSYour Name #define NUM_OF_DWORDS_RX_REO_QUEUE_1K 32 24*5113495bSYour Name 25*5113495bSYour Name 26*5113495bSYour Name struct rx_reo_queue_1k { 27*5113495bSYour Name #ifndef WIFI_BIT_ORDER_BIG_ENDIAN 28*5113495bSYour Name struct uniform_descriptor_header descriptor_header; 29*5113495bSYour Name uint32_t rx_bitmap_319_288 : 32; // [31:0] 30*5113495bSYour Name uint32_t rx_bitmap_351_320 : 32; // [31:0] 31*5113495bSYour Name uint32_t rx_bitmap_383_352 : 32; // [31:0] 32*5113495bSYour Name uint32_t rx_bitmap_415_384 : 32; // [31:0] 33*5113495bSYour Name uint32_t rx_bitmap_447_416 : 32; // [31:0] 34*5113495bSYour Name uint32_t rx_bitmap_479_448 : 32; // [31:0] 35*5113495bSYour Name uint32_t rx_bitmap_511_480 : 32; // [31:0] 36*5113495bSYour Name uint32_t rx_bitmap_543_512 : 32; // [31:0] 37*5113495bSYour Name uint32_t rx_bitmap_575_544 : 32; // [31:0] 38*5113495bSYour Name uint32_t rx_bitmap_607_576 : 32; // [31:0] 39*5113495bSYour Name uint32_t rx_bitmap_639_608 : 32; // [31:0] 40*5113495bSYour Name uint32_t rx_bitmap_671_640 : 32; // [31:0] 41*5113495bSYour Name uint32_t rx_bitmap_703_672 : 32; // [31:0] 42*5113495bSYour Name uint32_t rx_bitmap_735_704 : 32; // [31:0] 43*5113495bSYour Name uint32_t rx_bitmap_767_736 : 32; // [31:0] 44*5113495bSYour Name uint32_t rx_bitmap_799_768 : 32; // [31:0] 45*5113495bSYour Name uint32_t rx_bitmap_831_800 : 32; // [31:0] 46*5113495bSYour Name uint32_t rx_bitmap_863_832 : 32; // [31:0] 47*5113495bSYour Name uint32_t rx_bitmap_895_864 : 32; // [31:0] 48*5113495bSYour Name uint32_t rx_bitmap_927_896 : 32; // [31:0] 49*5113495bSYour Name uint32_t rx_bitmap_959_928 : 32; // [31:0] 50*5113495bSYour Name uint32_t rx_bitmap_991_960 : 32; // [31:0] 51*5113495bSYour Name uint32_t rx_bitmap_1023_992 : 32; // [31:0] 52*5113495bSYour Name uint32_t reserved_24 : 32; // [31:0] 53*5113495bSYour Name uint32_t reserved_25 : 32; // [31:0] 54*5113495bSYour Name uint32_t reserved_26 : 32; // [31:0] 55*5113495bSYour Name uint32_t reserved_27 : 32; // [31:0] 56*5113495bSYour Name uint32_t reserved_28 : 32; // [31:0] 57*5113495bSYour Name uint32_t reserved_29 : 32; // [31:0] 58*5113495bSYour Name uint32_t reserved_30 : 32; // [31:0] 59*5113495bSYour Name uint32_t reserved_31 : 32; // [31:0] 60*5113495bSYour Name #else 61*5113495bSYour Name struct uniform_descriptor_header descriptor_header; 62*5113495bSYour Name uint32_t rx_bitmap_319_288 : 32; // [31:0] 63*5113495bSYour Name uint32_t rx_bitmap_351_320 : 32; // [31:0] 64*5113495bSYour Name uint32_t rx_bitmap_383_352 : 32; // [31:0] 65*5113495bSYour Name uint32_t rx_bitmap_415_384 : 32; // [31:0] 66*5113495bSYour Name uint32_t rx_bitmap_447_416 : 32; // [31:0] 67*5113495bSYour Name uint32_t rx_bitmap_479_448 : 32; // [31:0] 68*5113495bSYour Name uint32_t rx_bitmap_511_480 : 32; // [31:0] 69*5113495bSYour Name uint32_t rx_bitmap_543_512 : 32; // [31:0] 70*5113495bSYour Name uint32_t rx_bitmap_575_544 : 32; // [31:0] 71*5113495bSYour Name uint32_t rx_bitmap_607_576 : 32; // [31:0] 72*5113495bSYour Name uint32_t rx_bitmap_639_608 : 32; // [31:0] 73*5113495bSYour Name uint32_t rx_bitmap_671_640 : 32; // [31:0] 74*5113495bSYour Name uint32_t rx_bitmap_703_672 : 32; // [31:0] 75*5113495bSYour Name uint32_t rx_bitmap_735_704 : 32; // [31:0] 76*5113495bSYour Name uint32_t rx_bitmap_767_736 : 32; // [31:0] 77*5113495bSYour Name uint32_t rx_bitmap_799_768 : 32; // [31:0] 78*5113495bSYour Name uint32_t rx_bitmap_831_800 : 32; // [31:0] 79*5113495bSYour Name uint32_t rx_bitmap_863_832 : 32; // [31:0] 80*5113495bSYour Name uint32_t rx_bitmap_895_864 : 32; // [31:0] 81*5113495bSYour Name uint32_t rx_bitmap_927_896 : 32; // [31:0] 82*5113495bSYour Name uint32_t rx_bitmap_959_928 : 32; // [31:0] 83*5113495bSYour Name uint32_t rx_bitmap_991_960 : 32; // [31:0] 84*5113495bSYour Name uint32_t rx_bitmap_1023_992 : 32; // [31:0] 85*5113495bSYour Name uint32_t reserved_24 : 32; // [31:0] 86*5113495bSYour Name uint32_t reserved_25 : 32; // [31:0] 87*5113495bSYour Name uint32_t reserved_26 : 32; // [31:0] 88*5113495bSYour Name uint32_t reserved_27 : 32; // [31:0] 89*5113495bSYour Name uint32_t reserved_28 : 32; // [31:0] 90*5113495bSYour Name uint32_t reserved_29 : 32; // [31:0] 91*5113495bSYour Name uint32_t reserved_30 : 32; // [31:0] 92*5113495bSYour Name uint32_t reserved_31 : 32; // [31:0] 93*5113495bSYour Name #endif 94*5113495bSYour Name }; 95*5113495bSYour Name 96*5113495bSYour Name 97*5113495bSYour Name /* Description DESCRIPTOR_HEADER 98*5113495bSYour Name 99*5113495bSYour Name Details about which module owns this struct. 100*5113495bSYour Name Note that sub field "Buffer_type" shall be set to "Receive_REO_queue_1k_descriptor" 101*5113495bSYour Name 102*5113495bSYour Name */ 103*5113495bSYour Name 104*5113495bSYour Name 105*5113495bSYour Name /* Description OWNER 106*5113495bSYour Name 107*5113495bSYour Name Consumer: In DEBUG mode: WBM, TQM, TXDMA, RXDMA, REO 108*5113495bSYour Name Producer: In DEBUG mode: WBM, TQM, TXDMA, RXDMA, REO 109*5113495bSYour Name 110*5113495bSYour Name The owner of this data structure: 111*5113495bSYour Name <enum 0 WBM_owned> Buffer Manager currently owns this data 112*5113495bSYour Name structure. 113*5113495bSYour Name <enum 1 SW_OR_FW_owned> Software of FW currently owns this 114*5113495bSYour Name data structure. 115*5113495bSYour Name <enum 2 TQM_owned> Transmit Queue Manager currently owns 116*5113495bSYour Name this data structure. 117*5113495bSYour Name <enum 3 RXDMA_owned> Receive DMA currently owns this data 118*5113495bSYour Name structure. 119*5113495bSYour Name <enum 4 REO_owned> Reorder currently owns this data structure. 120*5113495bSYour Name 121*5113495bSYour Name <enum 5 SWITCH_owned> SWITCH currently owns this data structure. 122*5113495bSYour Name 123*5113495bSYour Name 124*5113495bSYour Name <legal 0-5> 125*5113495bSYour Name */ 126*5113495bSYour Name 127*5113495bSYour Name #define RX_REO_QUEUE_1K_DESCRIPTOR_HEADER_OWNER_OFFSET 0x00000000 128*5113495bSYour Name #define RX_REO_QUEUE_1K_DESCRIPTOR_HEADER_OWNER_LSB 0 129*5113495bSYour Name #define RX_REO_QUEUE_1K_DESCRIPTOR_HEADER_OWNER_MSB 3 130*5113495bSYour Name #define RX_REO_QUEUE_1K_DESCRIPTOR_HEADER_OWNER_MASK 0x0000000f 131*5113495bSYour Name 132*5113495bSYour Name 133*5113495bSYour Name /* Description BUFFER_TYPE 134*5113495bSYour Name 135*5113495bSYour Name Consumer: In DEBUG mode: WBM, TQM, TXDMA, RXDMA, REO 136*5113495bSYour Name Producer: In DEBUG mode: WBM, TQM, TXDMA, RXDMA, REO 137*5113495bSYour Name 138*5113495bSYour Name Field describing what contents format is of this descriptor 139*5113495bSYour Name 140*5113495bSYour Name 141*5113495bSYour Name <enum 0 Transmit_MSDU_Link_descriptor> 142*5113495bSYour Name <enum 1 Transmit_MPDU_Link_descriptor> 143*5113495bSYour Name <enum 2 Transmit_MPDU_Queue_head_descriptor> 144*5113495bSYour Name <enum 3 Transmit_MPDU_Queue_ext_descriptor> 145*5113495bSYour Name <enum 4 Transmit_flow_descriptor> 146*5113495bSYour Name <enum 5 Transmit_buffer> NOT TO BE USED: 147*5113495bSYour Name 148*5113495bSYour Name <enum 6 Receive_MSDU_Link_descriptor> 149*5113495bSYour Name <enum 7 Receive_MPDU_Link_descriptor> 150*5113495bSYour Name <enum 8 Receive_REO_queue_descriptor> 151*5113495bSYour Name <enum 9 Receive_REO_queue_1k_descriptor> 152*5113495bSYour Name <enum 10 Receive_REO_queue_ext_descriptor> 153*5113495bSYour Name 154*5113495bSYour Name <enum 11 Receive_buffer> 155*5113495bSYour Name 156*5113495bSYour Name <enum 12 Idle_link_list_entry> 157*5113495bSYour Name 158*5113495bSYour Name <legal 0-12> 159*5113495bSYour Name */ 160*5113495bSYour Name 161*5113495bSYour Name #define RX_REO_QUEUE_1K_DESCRIPTOR_HEADER_BUFFER_TYPE_OFFSET 0x00000000 162*5113495bSYour Name #define RX_REO_QUEUE_1K_DESCRIPTOR_HEADER_BUFFER_TYPE_LSB 4 163*5113495bSYour Name #define RX_REO_QUEUE_1K_DESCRIPTOR_HEADER_BUFFER_TYPE_MSB 7 164*5113495bSYour Name #define RX_REO_QUEUE_1K_DESCRIPTOR_HEADER_BUFFER_TYPE_MASK 0x000000f0 165*5113495bSYour Name 166*5113495bSYour Name 167*5113495bSYour Name /* Description TX_MPDU_QUEUE_NUMBER 168*5113495bSYour Name 169*5113495bSYour Name Consumer: TQM/Debug 170*5113495bSYour Name Producer: SW (in 'TX_MPDU_QUEUE_HEAD')/TQM (elsewhere) 171*5113495bSYour Name 172*5113495bSYour Name Field only valid if Buffer_type is any of Transmit_MPDU_*_descriptor 173*5113495bSYour Name 174*5113495bSYour Name 175*5113495bSYour Name Indicates the MPDU queue ID to which this MPDU descriptor 176*5113495bSYour Name belongs 177*5113495bSYour Name Used for tracking and debugging 178*5113495bSYour Name 179*5113495bSYour Name <legal all> 180*5113495bSYour Name */ 181*5113495bSYour Name 182*5113495bSYour Name #define RX_REO_QUEUE_1K_DESCRIPTOR_HEADER_TX_MPDU_QUEUE_NUMBER_OFFSET 0x00000000 183*5113495bSYour Name #define RX_REO_QUEUE_1K_DESCRIPTOR_HEADER_TX_MPDU_QUEUE_NUMBER_LSB 8 184*5113495bSYour Name #define RX_REO_QUEUE_1K_DESCRIPTOR_HEADER_TX_MPDU_QUEUE_NUMBER_MSB 27 185*5113495bSYour Name #define RX_REO_QUEUE_1K_DESCRIPTOR_HEADER_TX_MPDU_QUEUE_NUMBER_MASK 0x0fffff00 186*5113495bSYour Name 187*5113495bSYour Name 188*5113495bSYour Name /* Description RESERVED_0A 189*5113495bSYour Name 190*5113495bSYour Name <legal 0> 191*5113495bSYour Name */ 192*5113495bSYour Name 193*5113495bSYour Name #define RX_REO_QUEUE_1K_DESCRIPTOR_HEADER_RESERVED_0A_OFFSET 0x00000000 194*5113495bSYour Name #define RX_REO_QUEUE_1K_DESCRIPTOR_HEADER_RESERVED_0A_LSB 28 195*5113495bSYour Name #define RX_REO_QUEUE_1K_DESCRIPTOR_HEADER_RESERVED_0A_MSB 31 196*5113495bSYour Name #define RX_REO_QUEUE_1K_DESCRIPTOR_HEADER_RESERVED_0A_MASK 0xf0000000 197*5113495bSYour Name 198*5113495bSYour Name 199*5113495bSYour Name /* Description RX_BITMAP_319_288 200*5113495bSYour Name 201*5113495bSYour Name When a bit is set, the corresponding frame is currently 202*5113495bSYour Name held in the re-order queue. 203*5113495bSYour Name The bitmap is Fully managed by HW. 204*5113495bSYour Name SW shall init this to 0, and then never ever change it 205*5113495bSYour Name <legal all> 206*5113495bSYour Name */ 207*5113495bSYour Name 208*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_319_288_OFFSET 0x00000004 209*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_319_288_LSB 0 210*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_319_288_MSB 31 211*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_319_288_MASK 0xffffffff 212*5113495bSYour Name 213*5113495bSYour Name 214*5113495bSYour Name /* Description RX_BITMAP_351_320 215*5113495bSYour Name 216*5113495bSYour Name See Rx_bitmap_319_288 description 217*5113495bSYour Name <legal all> 218*5113495bSYour Name */ 219*5113495bSYour Name 220*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_351_320_OFFSET 0x00000008 221*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_351_320_LSB 0 222*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_351_320_MSB 31 223*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_351_320_MASK 0xffffffff 224*5113495bSYour Name 225*5113495bSYour Name 226*5113495bSYour Name /* Description RX_BITMAP_383_352 227*5113495bSYour Name 228*5113495bSYour Name See Rx_bitmap_319_288 description 229*5113495bSYour Name <legal all> 230*5113495bSYour Name */ 231*5113495bSYour Name 232*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_383_352_OFFSET 0x0000000c 233*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_383_352_LSB 0 234*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_383_352_MSB 31 235*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_383_352_MASK 0xffffffff 236*5113495bSYour Name 237*5113495bSYour Name 238*5113495bSYour Name /* Description RX_BITMAP_415_384 239*5113495bSYour Name 240*5113495bSYour Name See Rx_bitmap_319_288 description 241*5113495bSYour Name <legal all> 242*5113495bSYour Name */ 243*5113495bSYour Name 244*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_415_384_OFFSET 0x00000010 245*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_415_384_LSB 0 246*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_415_384_MSB 31 247*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_415_384_MASK 0xffffffff 248*5113495bSYour Name 249*5113495bSYour Name 250*5113495bSYour Name /* Description RX_BITMAP_447_416 251*5113495bSYour Name 252*5113495bSYour Name See Rx_bitmap_319_288 description 253*5113495bSYour Name <legal all> 254*5113495bSYour Name */ 255*5113495bSYour Name 256*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_447_416_OFFSET 0x00000014 257*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_447_416_LSB 0 258*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_447_416_MSB 31 259*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_447_416_MASK 0xffffffff 260*5113495bSYour Name 261*5113495bSYour Name 262*5113495bSYour Name /* Description RX_BITMAP_479_448 263*5113495bSYour Name 264*5113495bSYour Name See Rx_bitmap_319_288 description 265*5113495bSYour Name <legal all> 266*5113495bSYour Name */ 267*5113495bSYour Name 268*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_479_448_OFFSET 0x00000018 269*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_479_448_LSB 0 270*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_479_448_MSB 31 271*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_479_448_MASK 0xffffffff 272*5113495bSYour Name 273*5113495bSYour Name 274*5113495bSYour Name /* Description RX_BITMAP_511_480 275*5113495bSYour Name 276*5113495bSYour Name See Rx_bitmap_319_288 description 277*5113495bSYour Name <legal all> 278*5113495bSYour Name */ 279*5113495bSYour Name 280*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_511_480_OFFSET 0x0000001c 281*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_511_480_LSB 0 282*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_511_480_MSB 31 283*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_511_480_MASK 0xffffffff 284*5113495bSYour Name 285*5113495bSYour Name 286*5113495bSYour Name /* Description RX_BITMAP_543_512 287*5113495bSYour Name 288*5113495bSYour Name See Rx_bitmap_319_288 description 289*5113495bSYour Name <legal all> 290*5113495bSYour Name */ 291*5113495bSYour Name 292*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_543_512_OFFSET 0x00000020 293*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_543_512_LSB 0 294*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_543_512_MSB 31 295*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_543_512_MASK 0xffffffff 296*5113495bSYour Name 297*5113495bSYour Name 298*5113495bSYour Name /* Description RX_BITMAP_575_544 299*5113495bSYour Name 300*5113495bSYour Name See Rx_bitmap_319_288 description 301*5113495bSYour Name <legal all> 302*5113495bSYour Name */ 303*5113495bSYour Name 304*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_575_544_OFFSET 0x00000024 305*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_575_544_LSB 0 306*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_575_544_MSB 31 307*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_575_544_MASK 0xffffffff 308*5113495bSYour Name 309*5113495bSYour Name 310*5113495bSYour Name /* Description RX_BITMAP_607_576 311*5113495bSYour Name 312*5113495bSYour Name See Rx_bitmap_319_288 description 313*5113495bSYour Name <legal all> 314*5113495bSYour Name */ 315*5113495bSYour Name 316*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_607_576_OFFSET 0x00000028 317*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_607_576_LSB 0 318*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_607_576_MSB 31 319*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_607_576_MASK 0xffffffff 320*5113495bSYour Name 321*5113495bSYour Name 322*5113495bSYour Name /* Description RX_BITMAP_639_608 323*5113495bSYour Name 324*5113495bSYour Name See Rx_bitmap_319_288 description 325*5113495bSYour Name <legal all> 326*5113495bSYour Name */ 327*5113495bSYour Name 328*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_639_608_OFFSET 0x0000002c 329*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_639_608_LSB 0 330*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_639_608_MSB 31 331*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_639_608_MASK 0xffffffff 332*5113495bSYour Name 333*5113495bSYour Name 334*5113495bSYour Name /* Description RX_BITMAP_671_640 335*5113495bSYour Name 336*5113495bSYour Name See Rx_bitmap_319_288 description 337*5113495bSYour Name <legal all> 338*5113495bSYour Name */ 339*5113495bSYour Name 340*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_671_640_OFFSET 0x00000030 341*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_671_640_LSB 0 342*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_671_640_MSB 31 343*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_671_640_MASK 0xffffffff 344*5113495bSYour Name 345*5113495bSYour Name 346*5113495bSYour Name /* Description RX_BITMAP_703_672 347*5113495bSYour Name 348*5113495bSYour Name See Rx_bitmap_319_288 description 349*5113495bSYour Name <legal all> 350*5113495bSYour Name */ 351*5113495bSYour Name 352*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_703_672_OFFSET 0x00000034 353*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_703_672_LSB 0 354*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_703_672_MSB 31 355*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_703_672_MASK 0xffffffff 356*5113495bSYour Name 357*5113495bSYour Name 358*5113495bSYour Name /* Description RX_BITMAP_735_704 359*5113495bSYour Name 360*5113495bSYour Name See Rx_bitmap_319_288 description 361*5113495bSYour Name <legal all> 362*5113495bSYour Name */ 363*5113495bSYour Name 364*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_735_704_OFFSET 0x00000038 365*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_735_704_LSB 0 366*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_735_704_MSB 31 367*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_735_704_MASK 0xffffffff 368*5113495bSYour Name 369*5113495bSYour Name 370*5113495bSYour Name /* Description RX_BITMAP_767_736 371*5113495bSYour Name 372*5113495bSYour Name See Rx_bitmap_319_288 description 373*5113495bSYour Name <legal all> 374*5113495bSYour Name */ 375*5113495bSYour Name 376*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_767_736_OFFSET 0x0000003c 377*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_767_736_LSB 0 378*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_767_736_MSB 31 379*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_767_736_MASK 0xffffffff 380*5113495bSYour Name 381*5113495bSYour Name 382*5113495bSYour Name /* Description RX_BITMAP_799_768 383*5113495bSYour Name 384*5113495bSYour Name See Rx_bitmap_319_288 description 385*5113495bSYour Name <legal all> 386*5113495bSYour Name */ 387*5113495bSYour Name 388*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_799_768_OFFSET 0x00000040 389*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_799_768_LSB 0 390*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_799_768_MSB 31 391*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_799_768_MASK 0xffffffff 392*5113495bSYour Name 393*5113495bSYour Name 394*5113495bSYour Name /* Description RX_BITMAP_831_800 395*5113495bSYour Name 396*5113495bSYour Name See Rx_bitmap_319_288 description 397*5113495bSYour Name <legal all> 398*5113495bSYour Name */ 399*5113495bSYour Name 400*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_831_800_OFFSET 0x00000044 401*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_831_800_LSB 0 402*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_831_800_MSB 31 403*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_831_800_MASK 0xffffffff 404*5113495bSYour Name 405*5113495bSYour Name 406*5113495bSYour Name /* Description RX_BITMAP_863_832 407*5113495bSYour Name 408*5113495bSYour Name See Rx_bitmap_319_288 description 409*5113495bSYour Name <legal all> 410*5113495bSYour Name */ 411*5113495bSYour Name 412*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_863_832_OFFSET 0x00000048 413*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_863_832_LSB 0 414*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_863_832_MSB 31 415*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_863_832_MASK 0xffffffff 416*5113495bSYour Name 417*5113495bSYour Name 418*5113495bSYour Name /* Description RX_BITMAP_895_864 419*5113495bSYour Name 420*5113495bSYour Name See Rx_bitmap_319_288 description 421*5113495bSYour Name <legal all> 422*5113495bSYour Name */ 423*5113495bSYour Name 424*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_895_864_OFFSET 0x0000004c 425*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_895_864_LSB 0 426*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_895_864_MSB 31 427*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_895_864_MASK 0xffffffff 428*5113495bSYour Name 429*5113495bSYour Name 430*5113495bSYour Name /* Description RX_BITMAP_927_896 431*5113495bSYour Name 432*5113495bSYour Name See Rx_bitmap_319_288 description 433*5113495bSYour Name <legal all> 434*5113495bSYour Name */ 435*5113495bSYour Name 436*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_927_896_OFFSET 0x00000050 437*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_927_896_LSB 0 438*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_927_896_MSB 31 439*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_927_896_MASK 0xffffffff 440*5113495bSYour Name 441*5113495bSYour Name 442*5113495bSYour Name /* Description RX_BITMAP_959_928 443*5113495bSYour Name 444*5113495bSYour Name See Rx_bitmap_319_288 description 445*5113495bSYour Name <legal all> 446*5113495bSYour Name */ 447*5113495bSYour Name 448*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_959_928_OFFSET 0x00000054 449*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_959_928_LSB 0 450*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_959_928_MSB 31 451*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_959_928_MASK 0xffffffff 452*5113495bSYour Name 453*5113495bSYour Name 454*5113495bSYour Name /* Description RX_BITMAP_991_960 455*5113495bSYour Name 456*5113495bSYour Name See Rx_bitmap_319_288 description 457*5113495bSYour Name <legal all> 458*5113495bSYour Name */ 459*5113495bSYour Name 460*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_991_960_OFFSET 0x00000058 461*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_991_960_LSB 0 462*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_991_960_MSB 31 463*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_991_960_MASK 0xffffffff 464*5113495bSYour Name 465*5113495bSYour Name 466*5113495bSYour Name /* Description RX_BITMAP_1023_992 467*5113495bSYour Name 468*5113495bSYour Name See Rx_bitmap_319_288 description 469*5113495bSYour Name <legal all> 470*5113495bSYour Name */ 471*5113495bSYour Name 472*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_1023_992_OFFSET 0x0000005c 473*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_1023_992_LSB 0 474*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_1023_992_MSB 31 475*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_1023_992_MASK 0xffffffff 476*5113495bSYour Name 477*5113495bSYour Name 478*5113495bSYour Name /* Description RESERVED_24 479*5113495bSYour Name 480*5113495bSYour Name <legal 0> 481*5113495bSYour Name */ 482*5113495bSYour Name 483*5113495bSYour Name #define RX_REO_QUEUE_1K_RESERVED_24_OFFSET 0x00000060 484*5113495bSYour Name #define RX_REO_QUEUE_1K_RESERVED_24_LSB 0 485*5113495bSYour Name #define RX_REO_QUEUE_1K_RESERVED_24_MSB 31 486*5113495bSYour Name #define RX_REO_QUEUE_1K_RESERVED_24_MASK 0xffffffff 487*5113495bSYour Name 488*5113495bSYour Name 489*5113495bSYour Name /* Description RESERVED_25 490*5113495bSYour Name 491*5113495bSYour Name <legal 0> 492*5113495bSYour Name */ 493*5113495bSYour Name 494*5113495bSYour Name #define RX_REO_QUEUE_1K_RESERVED_25_OFFSET 0x00000064 495*5113495bSYour Name #define RX_REO_QUEUE_1K_RESERVED_25_LSB 0 496*5113495bSYour Name #define RX_REO_QUEUE_1K_RESERVED_25_MSB 31 497*5113495bSYour Name #define RX_REO_QUEUE_1K_RESERVED_25_MASK 0xffffffff 498*5113495bSYour Name 499*5113495bSYour Name 500*5113495bSYour Name /* Description RESERVED_26 501*5113495bSYour Name 502*5113495bSYour Name <legal 0> 503*5113495bSYour Name */ 504*5113495bSYour Name 505*5113495bSYour Name #define RX_REO_QUEUE_1K_RESERVED_26_OFFSET 0x00000068 506*5113495bSYour Name #define RX_REO_QUEUE_1K_RESERVED_26_LSB 0 507*5113495bSYour Name #define RX_REO_QUEUE_1K_RESERVED_26_MSB 31 508*5113495bSYour Name #define RX_REO_QUEUE_1K_RESERVED_26_MASK 0xffffffff 509*5113495bSYour Name 510*5113495bSYour Name 511*5113495bSYour Name /* Description RESERVED_27 512*5113495bSYour Name 513*5113495bSYour Name <legal 0> 514*5113495bSYour Name */ 515*5113495bSYour Name 516*5113495bSYour Name #define RX_REO_QUEUE_1K_RESERVED_27_OFFSET 0x0000006c 517*5113495bSYour Name #define RX_REO_QUEUE_1K_RESERVED_27_LSB 0 518*5113495bSYour Name #define RX_REO_QUEUE_1K_RESERVED_27_MSB 31 519*5113495bSYour Name #define RX_REO_QUEUE_1K_RESERVED_27_MASK 0xffffffff 520*5113495bSYour Name 521*5113495bSYour Name 522*5113495bSYour Name /* Description RESERVED_28 523*5113495bSYour Name 524*5113495bSYour Name <legal 0> 525*5113495bSYour Name */ 526*5113495bSYour Name 527*5113495bSYour Name #define RX_REO_QUEUE_1K_RESERVED_28_OFFSET 0x00000070 528*5113495bSYour Name #define RX_REO_QUEUE_1K_RESERVED_28_LSB 0 529*5113495bSYour Name #define RX_REO_QUEUE_1K_RESERVED_28_MSB 31 530*5113495bSYour Name #define RX_REO_QUEUE_1K_RESERVED_28_MASK 0xffffffff 531*5113495bSYour Name 532*5113495bSYour Name 533*5113495bSYour Name /* Description RESERVED_29 534*5113495bSYour Name 535*5113495bSYour Name <legal 0> 536*5113495bSYour Name */ 537*5113495bSYour Name 538*5113495bSYour Name #define RX_REO_QUEUE_1K_RESERVED_29_OFFSET 0x00000074 539*5113495bSYour Name #define RX_REO_QUEUE_1K_RESERVED_29_LSB 0 540*5113495bSYour Name #define RX_REO_QUEUE_1K_RESERVED_29_MSB 31 541*5113495bSYour Name #define RX_REO_QUEUE_1K_RESERVED_29_MASK 0xffffffff 542*5113495bSYour Name 543*5113495bSYour Name 544*5113495bSYour Name /* Description RESERVED_30 545*5113495bSYour Name 546*5113495bSYour Name <legal 0> 547*5113495bSYour Name */ 548*5113495bSYour Name 549*5113495bSYour Name #define RX_REO_QUEUE_1K_RESERVED_30_OFFSET 0x00000078 550*5113495bSYour Name #define RX_REO_QUEUE_1K_RESERVED_30_LSB 0 551*5113495bSYour Name #define RX_REO_QUEUE_1K_RESERVED_30_MSB 31 552*5113495bSYour Name #define RX_REO_QUEUE_1K_RESERVED_30_MASK 0xffffffff 553*5113495bSYour Name 554*5113495bSYour Name 555*5113495bSYour Name /* Description RESERVED_31 556*5113495bSYour Name 557*5113495bSYour Name <legal 0> 558*5113495bSYour Name */ 559*5113495bSYour Name 560*5113495bSYour Name #define RX_REO_QUEUE_1K_RESERVED_31_OFFSET 0x0000007c 561*5113495bSYour Name #define RX_REO_QUEUE_1K_RESERVED_31_LSB 0 562*5113495bSYour Name #define RX_REO_QUEUE_1K_RESERVED_31_MSB 31 563*5113495bSYour Name #define RX_REO_QUEUE_1K_RESERVED_31_MASK 0xffffffff 564*5113495bSYour Name 565*5113495bSYour Name 566*5113495bSYour Name 567*5113495bSYour Name #endif // RX_REO_QUEUE_1K 568