1 /* 2 * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for any 5 * purpose with or without fee is hereby granted, provided that the above 6 * copyright notice and this permission notice appear in all copies. 7 * 8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15 */ 16 17 #ifndef _RXPT_CLASSIFY_INFO_H_ 18 #define _RXPT_CLASSIFY_INFO_H_ 19 #if !defined(__ASSEMBLER__) 20 #endif 21 22 #define NUM_OF_DWORDS_RXPT_CLASSIFY_INFO 1 23 24 25 struct rxpt_classify_info { 26 #ifndef WIFI_BIT_ORDER_BIG_ENDIAN 27 uint32_t reo_destination_indication : 5, // [4:0] 28 lmac_peer_id_msb : 2, // [6:5] 29 use_flow_id_toeplitz_clfy : 1, // [7:7] 30 pkt_selection_fp_ucast_data : 1, // [8:8] 31 pkt_selection_fp_mcast_data : 1, // [9:9] 32 pkt_selection_fp_1000 : 1, // [10:10] 33 rxdma0_source_ring_selection : 3, // [13:11] 34 rxdma0_destination_ring_selection : 3, // [16:14] 35 mcast_echo_drop_enable : 1, // [17:17] 36 wds_learning_detect_en : 1, // [18:18] 37 intrabss_check_en : 1, // [19:19] 38 use_ppe : 1, // [20:20] 39 ppe_routing_enable : 1, // [21:21] 40 reserved_0b : 10; // [31:22] 41 #else 42 uint32_t reserved_0b : 10, // [31:22] 43 ppe_routing_enable : 1, // [21:21] 44 use_ppe : 1, // [20:20] 45 intrabss_check_en : 1, // [19:19] 46 wds_learning_detect_en : 1, // [18:18] 47 mcast_echo_drop_enable : 1, // [17:17] 48 rxdma0_destination_ring_selection : 3, // [16:14] 49 rxdma0_source_ring_selection : 3, // [13:11] 50 pkt_selection_fp_1000 : 1, // [10:10] 51 pkt_selection_fp_mcast_data : 1, // [9:9] 52 pkt_selection_fp_ucast_data : 1, // [8:8] 53 use_flow_id_toeplitz_clfy : 1, // [7:7] 54 lmac_peer_id_msb : 2, // [6:5] 55 reo_destination_indication : 5; // [4:0] 56 #endif 57 }; 58 59 60 /* Description REO_DESTINATION_INDICATION 61 62 The ID of the REO exit ring where the MSDU frame shall push 63 after (MPDU level) reordering has finished. 64 65 <enum 0 reo_destination_sw0> Reo will push the frame into 66 the REO2SW0 ring 67 <enum 1 reo_destination_sw1> Reo will push the frame into 68 the REO2SW1 ring 69 <enum 2 reo_destination_sw2> Reo will push the frame into 70 the REO2SW2 ring 71 <enum 3 reo_destination_sw3> Reo will push the frame into 72 the REO2SW3 ring 73 <enum 4 reo_destination_sw4> Reo will push the frame into 74 the REO2SW4 ring 75 <enum 5 reo_destination_release> Reo will push the frame 76 into the REO_release ring 77 <enum 6 reo_destination_fw> Reo will push the frame into 78 the REO2FW ring 79 <enum 7 reo_destination_sw5> Reo will push the frame into 80 the REO2SW5 ring (REO remaps this in chips without REO2SW5 81 ring) 82 <enum 8 reo_destination_sw6> Reo will push the frame into 83 the REO2SW6 ring (REO remaps this in chips without REO2SW6 84 ring) 85 <enum 9 reo_destination_sw7> Reo will push the frame into 86 the REO2SW7 ring (REO remaps this in chips without REO2SW7 87 ring) 88 <enum 10 reo_destination_sw8> Reo will push the frame into 89 the REO2SW8 ring (REO remaps this in chips without REO2SW8 90 ring) 91 <enum 11 reo_destination_11> REO remaps this 92 <enum 12 reo_destination_12> REO remaps this <enum 13 reo_destination_13> 93 REO remaps this 94 <enum 14 reo_destination_14> REO remaps this 95 <enum 15 reo_destination_15> REO remaps this 96 <enum 16 reo_destination_16> REO remaps this 97 <enum 17 reo_destination_17> REO remaps this 98 <enum 18 reo_destination_18> REO remaps this 99 <enum 19 reo_destination_19> REO remaps this 100 <enum 20 reo_destination_20> REO remaps this 101 <enum 21 reo_destination_21> REO remaps this 102 <enum 22 reo_destination_22> REO remaps this 103 <enum 23 reo_destination_23> REO remaps this 104 <enum 24 reo_destination_24> REO remaps this 105 <enum 25 reo_destination_25> REO remaps this 106 <enum 26 reo_destination_26> REO remaps this 107 <enum 27 reo_destination_27> REO remaps this 108 <enum 28 reo_destination_28> REO remaps this 109 <enum 29 reo_destination_29> REO remaps this 110 <enum 30 reo_destination_30> REO remaps this 111 <enum 31 reo_destination_31> REO remaps this 112 113 <legal all> 114 */ 115 116 #define RXPT_CLASSIFY_INFO_REO_DESTINATION_INDICATION_OFFSET 0x00000000 117 #define RXPT_CLASSIFY_INFO_REO_DESTINATION_INDICATION_LSB 0 118 #define RXPT_CLASSIFY_INFO_REO_DESTINATION_INDICATION_MSB 4 119 #define RXPT_CLASSIFY_INFO_REO_DESTINATION_INDICATION_MASK 0x0000001f 120 121 122 /* Description LMAC_PEER_ID_MSB 123 124 If use_flow_id_toeplitz_clfy is set and lmac_peer_id_'sb 125 is 2'b00, Rx OLE uses a REO desination indicati'n of {1'b1, 126 hash[3:0]} using the chosen Toeplitz hash from Common Parser 127 if flow search fails. 128 If use_flow_id_toeplitz_clfy is set and lmac_peer_id_msb 129 's not 2'b00, Rx OLE uses a REO desination indication of 130 {lmac_peer_id_msb, hash[2:0]} using the chosen Toeplitz 131 hash from Common Parser if flow search fails. 132 <legal all> 133 */ 134 135 #define RXPT_CLASSIFY_INFO_LMAC_PEER_ID_MSB_OFFSET 0x00000000 136 #define RXPT_CLASSIFY_INFO_LMAC_PEER_ID_MSB_LSB 5 137 #define RXPT_CLASSIFY_INFO_LMAC_PEER_ID_MSB_MSB 6 138 #define RXPT_CLASSIFY_INFO_LMAC_PEER_ID_MSB_MASK 0x00000060 139 140 141 /* Description USE_FLOW_ID_TOEPLITZ_CLFY 142 143 Indication to Rx OLE to enable REO destination routing based 144 on the chosen Toeplitz hash from Common Parser, in case 145 flow search fails 146 <legal all> 147 */ 148 149 #define RXPT_CLASSIFY_INFO_USE_FLOW_ID_TOEPLITZ_CLFY_OFFSET 0x00000000 150 #define RXPT_CLASSIFY_INFO_USE_FLOW_ID_TOEPLITZ_CLFY_LSB 7 151 #define RXPT_CLASSIFY_INFO_USE_FLOW_ID_TOEPLITZ_CLFY_MSB 7 152 #define RXPT_CLASSIFY_INFO_USE_FLOW_ID_TOEPLITZ_CLFY_MASK 0x00000080 153 154 155 /* Description PKT_SELECTION_FP_UCAST_DATA 156 157 Filter pass Unicast data frame (matching rxpcu_filter_pass 158 and sw_frame_group_Unicast_data) routing selection 159 TODO: What about 'rxpcu_filter_pass_monior_ovrd'? 160 161 1'b0: source and destination rings are selected from the 162 RxOLE register settings for the packet type 163 164 1'b1: source ring and destination ring is selected from 165 the rxdma0_source_ring_selection and rxdma0_destination_ring_selection 166 fields in this STRUCT 167 <legal all> 168 */ 169 170 #define RXPT_CLASSIFY_INFO_PKT_SELECTION_FP_UCAST_DATA_OFFSET 0x00000000 171 #define RXPT_CLASSIFY_INFO_PKT_SELECTION_FP_UCAST_DATA_LSB 8 172 #define RXPT_CLASSIFY_INFO_PKT_SELECTION_FP_UCAST_DATA_MSB 8 173 #define RXPT_CLASSIFY_INFO_PKT_SELECTION_FP_UCAST_DATA_MASK 0x00000100 174 175 176 /* Description PKT_SELECTION_FP_MCAST_DATA 177 178 Filter pass Multicast data frame (matching rxpcu_filter_pass 179 and sw_frame_group_Multicast_data) routing selection 180 TODO: What about 'rxpcu_filter_pass_monior_ovrd'? 181 182 1'b0: source and destination rings are selected from the 183 RxOLE register settings for the packet type 184 185 1'b1: source ring and destination ring is selected from 186 the rxdma0_source_ring_selection and rxdma0_destination_ring_selection 187 fields in this STRUCT 188 <legal all> 189 */ 190 191 #define RXPT_CLASSIFY_INFO_PKT_SELECTION_FP_MCAST_DATA_OFFSET 0x00000000 192 #define RXPT_CLASSIFY_INFO_PKT_SELECTION_FP_MCAST_DATA_LSB 9 193 #define RXPT_CLASSIFY_INFO_PKT_SELECTION_FP_MCAST_DATA_MSB 9 194 #define RXPT_CLASSIFY_INFO_PKT_SELECTION_FP_MCAST_DATA_MASK 0x00000200 195 196 197 /* Description PKT_SELECTION_FP_1000 198 199 Filter pass BAR frame (matching rxpcu_filter_pass and sw_frame_group_ctrl_1000) 200 routing selection 201 TODO: What about 'rxpcu_filter_pass_monior_ovrd'? 202 203 1'b0: source and destination rings are selected from the 204 RxOLE register settings for the packet type 205 206 1'b1: source ring and destination ring is selected from 207 the rxdma0_source_ring_selection and rxdma0_destination_ring_selection 208 fields in this STRUCT 209 <legal all> 210 */ 211 212 #define RXPT_CLASSIFY_INFO_PKT_SELECTION_FP_1000_OFFSET 0x00000000 213 #define RXPT_CLASSIFY_INFO_PKT_SELECTION_FP_1000_LSB 10 214 #define RXPT_CLASSIFY_INFO_PKT_SELECTION_FP_1000_MSB 10 215 #define RXPT_CLASSIFY_INFO_PKT_SELECTION_FP_1000_MASK 0x00000400 216 217 218 /* Description RXDMA0_SOURCE_RING_SELECTION 219 220 Field only valid when for the received frame type the corresponding 221 pkt_selection_fp_... bit is set 222 223 <enum 0 sw2rxdma0_0_buf_source_ring> The data buffer for 224 this frame shall be sourced by sw2rxdma0 buffer source 225 ring. 226 <enum 1 fw2rxdma0_pmac0_buf_source_ring> The data buffer 227 for this frame shall be sourced by fw2rxdma buffer source 228 ring for PMAC0. 229 <enum 2 sw2rxdma0_1_buf_source_ring> The data buffer for 230 this frame shall be sourced by sw2rxdma1 buffer source 231 ring. 232 <enum 3 no_buffer_rxdma0_ring> The frame shall not be written 233 to any data buffer. 234 <enum 4 sw2rxdma0_exception_buf_source_ring> The data buffer 235 for this frame shall be sourced by sw2rxdma_exception buffer 236 source ring. 237 <enum 5 fw2rxdma0_pmac1_buf_source_ring> The data buffer 238 for this frame shall be sourced by fw2rxdma buffer source 239 ring for PMAC1. 240 241 <legal 0-5> 242 */ 243 244 #define RXPT_CLASSIFY_INFO_RXDMA0_SOURCE_RING_SELECTION_OFFSET 0x00000000 245 #define RXPT_CLASSIFY_INFO_RXDMA0_SOURCE_RING_SELECTION_LSB 11 246 #define RXPT_CLASSIFY_INFO_RXDMA0_SOURCE_RING_SELECTION_MSB 13 247 #define RXPT_CLASSIFY_INFO_RXDMA0_SOURCE_RING_SELECTION_MASK 0x00003800 248 249 250 /* Description RXDMA0_DESTINATION_RING_SELECTION 251 252 Field only valid when for the received frame type the corresponding 253 pkt_selection_fp_... bit is set 254 255 <enum 0 rxdma_release_ring> RXDMA0 shall push the frame 256 to the Release ring. Effectively this means the frame needs 257 to be dropped. 258 <enum 1 rxdma2fw_pmac0_ring> RXDMA0 shall push the frame 259 to the FW ring for PMAC0. 260 <enum 2 rxdma2sw_ring> RXDMA0 shall push the frame to the 261 SW ring. 262 <enum 3 rxdma2reo_ring> RXDMA0 shall push the frame to 263 the REO entrance ring. 264 <enum 4 rxdma2fw_pmac1_ring> RXDMA0 shall push the frame 265 to the FW ring for PMAC1. 266 <enum 5 rxdma2reo_remote0_ring> RXDMA0 shall push the frame 267 to the first MLO REO entrance ring. 268 <enum 6 rxdma2reo_remote1_ring> RXDMA0 shall push the frame 269 to the second MLO REO entrance ring. 270 271 <legal 0-6> 272 */ 273 274 #define RXPT_CLASSIFY_INFO_RXDMA0_DESTINATION_RING_SELECTION_OFFSET 0x00000000 275 #define RXPT_CLASSIFY_INFO_RXDMA0_DESTINATION_RING_SELECTION_LSB 14 276 #define RXPT_CLASSIFY_INFO_RXDMA0_DESTINATION_RING_SELECTION_MSB 16 277 #define RXPT_CLASSIFY_INFO_RXDMA0_DESTINATION_RING_SELECTION_MASK 0x0001c000 278 279 280 /* Description MCAST_ECHO_DROP_ENABLE 281 282 If set, for multicast packets, multicast echo check (i.e. 283 SA search with mcast_echo_check = 1) shall be performed 284 by RXOLE, and any multicast echo packets should be indicated 285 to RXDMA for release to WBM 286 287 <legal all> 288 */ 289 290 #define RXPT_CLASSIFY_INFO_MCAST_ECHO_DROP_ENABLE_OFFSET 0x00000000 291 #define RXPT_CLASSIFY_INFO_MCAST_ECHO_DROP_ENABLE_LSB 17 292 #define RXPT_CLASSIFY_INFO_MCAST_ECHO_DROP_ENABLE_MSB 17 293 #define RXPT_CLASSIFY_INFO_MCAST_ECHO_DROP_ENABLE_MASK 0x00020000 294 295 296 /* Description WDS_LEARNING_DETECT_EN 297 298 If set, WDS learning detection based on SA search and notification 299 to FW (using RXDMA0 status ring) is enabled and the "timestamp" 300 field in address search failure cache-only entry should 301 be used to avoid multiple WDS learning notifications. 302 303 <legal all> 304 */ 305 306 #define RXPT_CLASSIFY_INFO_WDS_LEARNING_DETECT_EN_OFFSET 0x00000000 307 #define RXPT_CLASSIFY_INFO_WDS_LEARNING_DETECT_EN_LSB 18 308 #define RXPT_CLASSIFY_INFO_WDS_LEARNING_DETECT_EN_MSB 18 309 #define RXPT_CLASSIFY_INFO_WDS_LEARNING_DETECT_EN_MASK 0x00040000 310 311 312 /* Description INTRABSS_CHECK_EN 313 314 If set, intra-BSS routing detection is enabled 315 316 <legal all> 317 */ 318 319 #define RXPT_CLASSIFY_INFO_INTRABSS_CHECK_EN_OFFSET 0x00000000 320 #define RXPT_CLASSIFY_INFO_INTRABSS_CHECK_EN_LSB 19 321 #define RXPT_CLASSIFY_INFO_INTRABSS_CHECK_EN_MSB 19 322 #define RXPT_CLASSIFY_INFO_INTRABSS_CHECK_EN_MASK 0x00080000 323 324 325 /* Description USE_PPE 326 327 Indicates to RXDMA to ignore the REO_destination_indication 328 and use a programmed value corresponding to the REO2PPE 329 ring 330 331 This override to REO2PPE for packets requiring multiple 332 buffers shall be disabled based on an RXDMA configuration, 333 as PPE may not support such packets. 334 335 <legal all> 336 */ 337 338 #define RXPT_CLASSIFY_INFO_USE_PPE_OFFSET 0x00000000 339 #define RXPT_CLASSIFY_INFO_USE_PPE_LSB 20 340 #define RXPT_CLASSIFY_INFO_USE_PPE_MSB 20 341 #define RXPT_CLASSIFY_INFO_USE_PPE_MASK 0x00100000 342 343 344 /* Description PPE_ROUTING_ENABLE 345 346 Global enable/disable bit for routing to PPE, used to disable 347 PPE routing even if RXOLE CCE or flow search indicate 'Use_PPE' 348 349 350 This is set by SW for peers which are being handled by a 351 host SW/accelerator subsystem that also handles packet 352 buffer management for WiFi-to-PPE routing. 353 354 This is cleared by SW for peers which are being handled 355 by a different subsystem, completely disabling WiFi-to-PPE 356 routing for such peers. 357 358 <legal all> 359 */ 360 361 #define RXPT_CLASSIFY_INFO_PPE_ROUTING_ENABLE_OFFSET 0x00000000 362 #define RXPT_CLASSIFY_INFO_PPE_ROUTING_ENABLE_LSB 21 363 #define RXPT_CLASSIFY_INFO_PPE_ROUTING_ENABLE_MSB 21 364 #define RXPT_CLASSIFY_INFO_PPE_ROUTING_ENABLE_MASK 0x00200000 365 366 367 /* Description RESERVED_0B 368 369 <legal 0> 370 */ 371 372 #define RXPT_CLASSIFY_INFO_RESERVED_0B_OFFSET 0x00000000 373 #define RXPT_CLASSIFY_INFO_RESERVED_0B_LSB 22 374 #define RXPT_CLASSIFY_INFO_RESERVED_0B_MSB 31 375 #define RXPT_CLASSIFY_INFO_RESERVED_0B_MASK 0xffc00000 376 377 378 379 #endif // RXPT_CLASSIFY_INFO 380