1*5113495bSYour Name /* 2*5113495bSYour Name * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. 3*5113495bSYour Name * 4*5113495bSYour Name * Permission to use, copy, modify, and/or distribute this software for any 5*5113495bSYour Name * purpose with or without fee is hereby granted, provided that the above 6*5113495bSYour Name * copyright notice and this permission notice appear in all copies. 7*5113495bSYour Name * 8*5113495bSYour Name * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9*5113495bSYour Name * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10*5113495bSYour Name * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11*5113495bSYour Name * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12*5113495bSYour Name * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13*5113495bSYour Name * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14*5113495bSYour Name * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15*5113495bSYour Name */ 16*5113495bSYour Name 17*5113495bSYour Name #ifndef _TCL_ENTRANCE_FROM_PPE_RING_H_ 18*5113495bSYour Name #define _TCL_ENTRANCE_FROM_PPE_RING_H_ 19*5113495bSYour Name #if !defined(__ASSEMBLER__) 20*5113495bSYour Name #endif 21*5113495bSYour Name 22*5113495bSYour Name #define NUM_OF_DWORDS_TCL_ENTRANCE_FROM_PPE_RING 8 23*5113495bSYour Name 24*5113495bSYour Name 25*5113495bSYour Name struct tcl_entrance_from_ppe_ring { 26*5113495bSYour Name #ifndef WIFI_BIT_ORDER_BIG_ENDIAN 27*5113495bSYour Name uint32_t buffer_addr_lo : 32; // [31:0] 28*5113495bSYour Name uint32_t buffer_addr_hi : 8, // [7:0] 29*5113495bSYour Name drop_prec : 2, // [9:8] 30*5113495bSYour Name fake_mac_header : 1, // [10:10] 31*5113495bSYour Name known_ind : 1, // [11:11] 32*5113495bSYour Name cpu_code_valid : 1, // [12:12] 33*5113495bSYour Name tunnel_term_ind : 1, // [13:13] 34*5113495bSYour Name tunnel_type : 1, // [14:14] 35*5113495bSYour Name wifi_qos_flag : 1, // [15:15] 36*5113495bSYour Name service_code : 9, // [24:16] 37*5113495bSYour Name reserved_1b : 1, // [25:25] 38*5113495bSYour Name int_pri : 4, // [29:26] 39*5113495bSYour Name more : 1, // [30:30] 40*5113495bSYour Name reserved_1a : 1; // [31:31] 41*5113495bSYour Name uint32_t opaque_lo : 32; // [31:0] 42*5113495bSYour Name uint32_t opaque_hi : 32; // [31:0] 43*5113495bSYour Name uint32_t src_info : 16, // [15:0] 44*5113495bSYour Name dst_info : 16; // [31:16] 45*5113495bSYour Name uint32_t data_length : 18, // [17:0] 46*5113495bSYour Name pool_id : 6, // [23:18] 47*5113495bSYour Name wifi_qos : 8; // [31:24] 48*5113495bSYour Name uint32_t data_offset : 12, // [11:0] 49*5113495bSYour Name l4_csum_status : 1, // [12:12] 50*5113495bSYour Name l3_csum_status : 1, // [13:13] 51*5113495bSYour Name hash_flag : 2, // [15:14] 52*5113495bSYour Name hash_value : 16; // [31:16] 53*5113495bSYour Name uint32_t dscp : 8, // [7:0] 54*5113495bSYour Name valid_toggle : 1, // [8:8] 55*5113495bSYour Name pppoe_flag : 1, // [9:9] 56*5113495bSYour Name svlan_flag : 1, // [10:10] 57*5113495bSYour Name cvlan_flag : 1, // [11:11] 58*5113495bSYour Name pid : 4, // [15:12] 59*5113495bSYour Name l3_offset : 8, // [23:16] 60*5113495bSYour Name l4_offset : 8; // [31:24] 61*5113495bSYour Name #else 62*5113495bSYour Name uint32_t buffer_addr_lo : 32; // [31:0] 63*5113495bSYour Name uint32_t reserved_1a : 1, // [31:31] 64*5113495bSYour Name more : 1, // [30:30] 65*5113495bSYour Name int_pri : 4, // [29:26] 66*5113495bSYour Name reserved_1b : 1, // [25:25] 67*5113495bSYour Name service_code : 9, // [24:16] 68*5113495bSYour Name wifi_qos_flag : 1, // [15:15] 69*5113495bSYour Name tunnel_type : 1, // [14:14] 70*5113495bSYour Name tunnel_term_ind : 1, // [13:13] 71*5113495bSYour Name cpu_code_valid : 1, // [12:12] 72*5113495bSYour Name known_ind : 1, // [11:11] 73*5113495bSYour Name fake_mac_header : 1, // [10:10] 74*5113495bSYour Name drop_prec : 2, // [9:8] 75*5113495bSYour Name buffer_addr_hi : 8; // [7:0] 76*5113495bSYour Name uint32_t opaque_lo : 32; // [31:0] 77*5113495bSYour Name uint32_t opaque_hi : 32; // [31:0] 78*5113495bSYour Name uint32_t dst_info : 16, // [31:16] 79*5113495bSYour Name src_info : 16; // [15:0] 80*5113495bSYour Name uint32_t wifi_qos : 8, // [31:24] 81*5113495bSYour Name pool_id : 6, // [23:18] 82*5113495bSYour Name data_length : 18; // [17:0] 83*5113495bSYour Name uint32_t hash_value : 16, // [31:16] 84*5113495bSYour Name hash_flag : 2, // [15:14] 85*5113495bSYour Name l3_csum_status : 1, // [13:13] 86*5113495bSYour Name l4_csum_status : 1, // [12:12] 87*5113495bSYour Name data_offset : 12; // [11:0] 88*5113495bSYour Name uint32_t l4_offset : 8, // [31:24] 89*5113495bSYour Name l3_offset : 8, // [23:16] 90*5113495bSYour Name pid : 4, // [15:12] 91*5113495bSYour Name cvlan_flag : 1, // [11:11] 92*5113495bSYour Name svlan_flag : 1, // [10:10] 93*5113495bSYour Name pppoe_flag : 1, // [9:9] 94*5113495bSYour Name valid_toggle : 1, // [8:8] 95*5113495bSYour Name dscp : 8; // [7:0] 96*5113495bSYour Name #endif 97*5113495bSYour Name }; 98*5113495bSYour Name 99*5113495bSYour Name 100*5113495bSYour Name /* Description BUFFER_ADDR_LO 101*5113495bSYour Name 102*5113495bSYour Name Consumer: TCL 103*5113495bSYour Name Producer: PPE DMA/SW 104*5113495bSYour Name 105*5113495bSYour Name Lower 32 bits of the buffer address buffer_addr_31_0. 106*5113495bSYour Name 107*5113495bSYour Name This is the address of the starting point of the buffer 108*5113495bSYour Name directly from the PPE Rx Fill descriptor. TCL needs to calculate 109*5113495bSYour Name the packet data address based on DATA_OFFSET. 110*5113495bSYour Name <legal all> 111*5113495bSYour Name */ 112*5113495bSYour Name 113*5113495bSYour Name #define TCL_ENTRANCE_FROM_PPE_RING_BUFFER_ADDR_LO_OFFSET 0x00000000 114*5113495bSYour Name #define TCL_ENTRANCE_FROM_PPE_RING_BUFFER_ADDR_LO_LSB 0 115*5113495bSYour Name #define TCL_ENTRANCE_FROM_PPE_RING_BUFFER_ADDR_LO_MSB 31 116*5113495bSYour Name #define TCL_ENTRANCE_FROM_PPE_RING_BUFFER_ADDR_LO_MASK 0xffffffff 117*5113495bSYour Name 118*5113495bSYour Name 119*5113495bSYour Name /* Description BUFFER_ADDR_HI 120*5113495bSYour Name 121*5113495bSYour Name Consumer: TCL/TXDMA 122*5113495bSYour Name Producer: PPE DMA/SW 123*5113495bSYour Name 124*5113495bSYour Name Higher 8 bits of the buffer address buffer_addr_39_32 (Not 125*5113495bSYour Name supported PPE but could be supported by PPE in 126*5113495bSYour Name future). Also see BUFFER_ADDR_LO. 127*5113495bSYour Name <legal all> 128*5113495bSYour Name */ 129*5113495bSYour Name 130*5113495bSYour Name #define TCL_ENTRANCE_FROM_PPE_RING_BUFFER_ADDR_HI_OFFSET 0x00000004 131*5113495bSYour Name #define TCL_ENTRANCE_FROM_PPE_RING_BUFFER_ADDR_HI_LSB 0 132*5113495bSYour Name #define TCL_ENTRANCE_FROM_PPE_RING_BUFFER_ADDR_HI_MSB 7 133*5113495bSYour Name #define TCL_ENTRANCE_FROM_PPE_RING_BUFFER_ADDR_HI_MASK 0x000000ff 134*5113495bSYour Name 135*5113495bSYour Name 136*5113495bSYour Name /* Description DROP_PREC 137*5113495bSYour Name 138*5113495bSYour Name Consumer: TCL/TQM 139*5113495bSYour Name Producer: Switch Core 140*5113495bSYour Name 141*5113495bSYour Name Packet drop precedence 142*5113495bSYour Name 143*5113495bSYour Name TCL maps DROP_PREC to field msdu_color in structure 144*5113495bSYour Name 'TX_MSDU_DETAILS' in 'TQM_ENTRANCE_RING' if the internal 145*5113495bSYour Name parameter 'DROP_PREC_ENABLE' is set (see field DST_INFO) 146*5113495bSYour Name and DROP_PREC is set to a legal value. Otherwise msdu_color 147*5113495bSYour Name is set to MSDU_COLORLESS. 148*5113495bSYour Name 149*5113495bSYour Name <enum 0 PPE_drop_prec_green> 150*5113495bSYour Name <enum 1 PPE_drop_prec_yellow> 151*5113495bSYour Name <enum 2 PPE_drop_prec_red> 152*5113495bSYour Name <legal 0-2> 153*5113495bSYour Name */ 154*5113495bSYour Name 155*5113495bSYour Name #define TCL_ENTRANCE_FROM_PPE_RING_DROP_PREC_OFFSET 0x00000004 156*5113495bSYour Name #define TCL_ENTRANCE_FROM_PPE_RING_DROP_PREC_LSB 8 157*5113495bSYour Name #define TCL_ENTRANCE_FROM_PPE_RING_DROP_PREC_MSB 9 158*5113495bSYour Name #define TCL_ENTRANCE_FROM_PPE_RING_DROP_PREC_MASK 0x00000300 159*5113495bSYour Name 160*5113495bSYour Name 161*5113495bSYour Name /* Description FAKE_MAC_HEADER 162*5113495bSYour Name 163*5113495bSYour Name Consumer: SW 164*5113495bSYour Name Producer: Switch Core 165*5113495bSYour Name 166*5113495bSYour Name Indicates the MAC header is fake (Not supported for direct 167*5113495bSYour Name switch connect) 168*5113495bSYour Name 0: No fake MAC header 169*5113495bSYour Name 1: Fake MAC header 170*5113495bSYour Name <legal 0> 171*5113495bSYour Name */ 172*5113495bSYour Name 173*5113495bSYour Name #define TCL_ENTRANCE_FROM_PPE_RING_FAKE_MAC_HEADER_OFFSET 0x00000004 174*5113495bSYour Name #define TCL_ENTRANCE_FROM_PPE_RING_FAKE_MAC_HEADER_LSB 10 175*5113495bSYour Name #define TCL_ENTRANCE_FROM_PPE_RING_FAKE_MAC_HEADER_MSB 10 176*5113495bSYour Name #define TCL_ENTRANCE_FROM_PPE_RING_FAKE_MAC_HEADER_MASK 0x00000400 177*5113495bSYour Name 178*5113495bSYour Name 179*5113495bSYour Name /* Description KNOWN_IND 180*5113495bSYour Name 181*5113495bSYour Name Consumer: TCL 182*5113495bSYour Name Producer: Switch Core 183*5113495bSYour Name 184*5113495bSYour Name Known packet indication 185*5113495bSYour Name 0: packet is unknown flooding. 186*5113495bSYour Name 1: packet is forwarded by any known entry. 187*5113495bSYour Name <legal all> 188*5113495bSYour Name */ 189*5113495bSYour Name 190*5113495bSYour Name #define TCL_ENTRANCE_FROM_PPE_RING_KNOWN_IND_OFFSET 0x00000004 191*5113495bSYour Name #define TCL_ENTRANCE_FROM_PPE_RING_KNOWN_IND_LSB 11 192*5113495bSYour Name #define TCL_ENTRANCE_FROM_PPE_RING_KNOWN_IND_MSB 11 193*5113495bSYour Name #define TCL_ENTRANCE_FROM_PPE_RING_KNOWN_IND_MASK 0x00000800 194*5113495bSYour Name 195*5113495bSYour Name 196*5113495bSYour Name /* Description CPU_CODE_VALID 197*5113495bSYour Name 198*5113495bSYour Name Consumer: SW 199*5113495bSYour Name Producer: Switch Core 200*5113495bSYour Name 201*5113495bSYour Name Indicates validity of 'CPU_CODE' (used to indicate the reason 202*5113495bSYour Name the packet is sent to the CPU) (Not supported for direct 203*5113495bSYour Name switch connect) 204*5113495bSYour Name 0: Invalid 205*5113495bSYour Name 1: Valid 206*5113495bSYour Name <legal 0> 207*5113495bSYour Name */ 208*5113495bSYour Name 209*5113495bSYour Name #define TCL_ENTRANCE_FROM_PPE_RING_CPU_CODE_VALID_OFFSET 0x00000004 210*5113495bSYour Name #define TCL_ENTRANCE_FROM_PPE_RING_CPU_CODE_VALID_LSB 12 211*5113495bSYour Name #define TCL_ENTRANCE_FROM_PPE_RING_CPU_CODE_VALID_MSB 12 212*5113495bSYour Name #define TCL_ENTRANCE_FROM_PPE_RING_CPU_CODE_VALID_MASK 0x00001000 213*5113495bSYour Name 214*5113495bSYour Name 215*5113495bSYour Name /* Description TUNNEL_TERM_IND 216*5113495bSYour Name 217*5113495bSYour Name Consumer: TCL 218*5113495bSYour Name Producer: Switch Core 219*5113495bSYour Name 220*5113495bSYour Name Tunnel termination indication 221*5113495bSYour Name 0: packet is not decapsulated 222*5113495bSYour Name 1: packet is decapsulated 223*5113495bSYour Name <legal all> 224*5113495bSYour Name */ 225*5113495bSYour Name 226*5113495bSYour Name #define TCL_ENTRANCE_FROM_PPE_RING_TUNNEL_TERM_IND_OFFSET 0x00000004 227*5113495bSYour Name #define TCL_ENTRANCE_FROM_PPE_RING_TUNNEL_TERM_IND_LSB 13 228*5113495bSYour Name #define TCL_ENTRANCE_FROM_PPE_RING_TUNNEL_TERM_IND_MSB 13 229*5113495bSYour Name #define TCL_ENTRANCE_FROM_PPE_RING_TUNNEL_TERM_IND_MASK 0x00002000 230*5113495bSYour Name 231*5113495bSYour Name 232*5113495bSYour Name /* Description TUNNEL_TYPE 233*5113495bSYour Name 234*5113495bSYour Name Consumer: TCL 235*5113495bSYour Name Producer: Switch Core 236*5113495bSYour Name 237*5113495bSYour Name Tunnel Type 238*5113495bSYour Name 0: Layer 2 tunnel 239*5113495bSYour Name 1: Layer 3 tunnel 240*5113495bSYour Name <legal all> 241*5113495bSYour Name */ 242*5113495bSYour Name 243*5113495bSYour Name #define TCL_ENTRANCE_FROM_PPE_RING_TUNNEL_TYPE_OFFSET 0x00000004 244*5113495bSYour Name #define TCL_ENTRANCE_FROM_PPE_RING_TUNNEL_TYPE_LSB 14 245*5113495bSYour Name #define TCL_ENTRANCE_FROM_PPE_RING_TUNNEL_TYPE_MSB 14 246*5113495bSYour Name #define TCL_ENTRANCE_FROM_PPE_RING_TUNNEL_TYPE_MASK 0x00004000 247*5113495bSYour Name 248*5113495bSYour Name 249*5113495bSYour Name /* Description WIFI_QOS_FLAG 250*5113495bSYour Name 251*5113495bSYour Name Consumer: TCL 252*5113495bSYour Name Producer: Switch Core 253*5113495bSYour Name 254*5113495bSYour Name Wi-Fi QoS Flag 255*5113495bSYour Name 0: If WIFI_QOS[7] is set, WIFI_QOS[3:1] provides a 3-bit 256*5113495bSYour Name HLOS_TID value and HLOS_TID_overwrite is enabled, else 257*5113495bSYour Name there is no overwrite. 258*5113495bSYour Name 1: WIFI_QOS[5:0] provides a 6-bit "flow pointer override" 259*5113495bSYour Name value by using: 260*5113495bSYour Name who_classify_info_sel = WIFI_QOS[5:4], 261*5113495bSYour Name HLOS_TID = WIFI_QOS[3:1], 262*5113495bSYour Name flow_override = WIFI_QOS[0], 263*5113495bSYour Name and HLOS_TID_overwrite and flow_override_enable are set. 264*5113495bSYour Name 265*5113495bSYour Name 266*5113495bSYour Name Also see field INT_PRI for another way to enable HLOS_TID_overwrite. 267*5113495bSYour Name 268*5113495bSYour Name <legal all> 269*5113495bSYour Name */ 270*5113495bSYour Name 271*5113495bSYour Name #define TCL_ENTRANCE_FROM_PPE_RING_WIFI_QOS_FLAG_OFFSET 0x00000004 272*5113495bSYour Name #define TCL_ENTRANCE_FROM_PPE_RING_WIFI_QOS_FLAG_LSB 15 273*5113495bSYour Name #define TCL_ENTRANCE_FROM_PPE_RING_WIFI_QOS_FLAG_MSB 15 274*5113495bSYour Name #define TCL_ENTRANCE_FROM_PPE_RING_WIFI_QOS_FLAG_MASK 0x00008000 275*5113495bSYour Name 276*5113495bSYour Name 277*5113495bSYour Name /* Description SERVICE_CODE 278*5113495bSYour Name 279*5113495bSYour Name Consumer: TCL 280*5113495bSYour Name Producer: Switch Core 281*5113495bSYour Name 282*5113495bSYour Name Opaque service code between engines 283*5113495bSYour Name 0: Indicates the end of service path 284*5113495bSYour Name <legal all> 285*5113495bSYour Name */ 286*5113495bSYour Name 287*5113495bSYour Name #define TCL_ENTRANCE_FROM_PPE_RING_SERVICE_CODE_OFFSET 0x00000004 288*5113495bSYour Name #define TCL_ENTRANCE_FROM_PPE_RING_SERVICE_CODE_LSB 16 289*5113495bSYour Name #define TCL_ENTRANCE_FROM_PPE_RING_SERVICE_CODE_MSB 24 290*5113495bSYour Name #define TCL_ENTRANCE_FROM_PPE_RING_SERVICE_CODE_MASK 0x01ff0000 291*5113495bSYour Name 292*5113495bSYour Name 293*5113495bSYour Name /* Description RESERVED_1B 294*5113495bSYour Name 295*5113495bSYour Name <legal 0, 1> 296*5113495bSYour Name */ 297*5113495bSYour Name 298*5113495bSYour Name #define TCL_ENTRANCE_FROM_PPE_RING_RESERVED_1B_OFFSET 0x00000004 299*5113495bSYour Name #define TCL_ENTRANCE_FROM_PPE_RING_RESERVED_1B_LSB 25 300*5113495bSYour Name #define TCL_ENTRANCE_FROM_PPE_RING_RESERVED_1B_MSB 25 301*5113495bSYour Name #define TCL_ENTRANCE_FROM_PPE_RING_RESERVED_1B_MASK 0x02000000 302*5113495bSYour Name 303*5113495bSYour Name 304*5113495bSYour Name /* Description INT_PRI 305*5113495bSYour Name 306*5113495bSYour Name Consumer: TCL 307*5113495bSYour Name Producer: Switch Core 308*5113495bSYour Name 309*5113495bSYour Name Internal/User Priority 310*5113495bSYour Name 311*5113495bSYour Name TCL maps INT_PRI to HLOS_TID using an internal mapping 312*5113495bSYour Name table if the internal parameter 'USE_PPE_INT_PRI_FOR_TID' 313*5113495bSYour Name is set (see field DST_INFO) and WIFI_QOS_FLAG is unset and 314*5113495bSYour Name WIFI_QOS[7] is unset. 315*5113495bSYour Name <legal all> 316*5113495bSYour Name */ 317*5113495bSYour Name 318*5113495bSYour Name #define TCL_ENTRANCE_FROM_PPE_RING_INT_PRI_OFFSET 0x00000004 319*5113495bSYour Name #define TCL_ENTRANCE_FROM_PPE_RING_INT_PRI_LSB 26 320*5113495bSYour Name #define TCL_ENTRANCE_FROM_PPE_RING_INT_PRI_MSB 29 321*5113495bSYour Name #define TCL_ENTRANCE_FROM_PPE_RING_INT_PRI_MASK 0x3c000000 322*5113495bSYour Name 323*5113495bSYour Name 324*5113495bSYour Name /* Description MORE 325*5113495bSYour Name 326*5113495bSYour Name Consumer: TCL 327*5113495bSYour Name Producer: PPE DMA 328*5113495bSYour Name 329*5113495bSYour Name 0: The last segment of packet 330*5113495bSYour Name 1: More segments to follow, indicating scatter/gather 331*5113495bSYour Name <legal all> 332*5113495bSYour Name */ 333*5113495bSYour Name 334*5113495bSYour Name #define TCL_ENTRANCE_FROM_PPE_RING_MORE_OFFSET 0x00000004 335*5113495bSYour Name #define TCL_ENTRANCE_FROM_PPE_RING_MORE_LSB 30 336*5113495bSYour Name #define TCL_ENTRANCE_FROM_PPE_RING_MORE_MSB 30 337*5113495bSYour Name #define TCL_ENTRANCE_FROM_PPE_RING_MORE_MASK 0x40000000 338*5113495bSYour Name 339*5113495bSYour Name 340*5113495bSYour Name /* Description RESERVED_1A 341*5113495bSYour Name 342*5113495bSYour Name <legal 0> 343*5113495bSYour Name */ 344*5113495bSYour Name 345*5113495bSYour Name #define TCL_ENTRANCE_FROM_PPE_RING_RESERVED_1A_OFFSET 0x00000004 346*5113495bSYour Name #define TCL_ENTRANCE_FROM_PPE_RING_RESERVED_1A_LSB 31 347*5113495bSYour Name #define TCL_ENTRANCE_FROM_PPE_RING_RESERVED_1A_MSB 31 348*5113495bSYour Name #define TCL_ENTRANCE_FROM_PPE_RING_RESERVED_1A_MASK 0x80000000 349*5113495bSYour Name 350*5113495bSYour Name 351*5113495bSYour Name /* Description OPAQUE_LO 352*5113495bSYour Name 353*5113495bSYour Name Consumer: TCL/WBM/SW 354*5113495bSYour Name Producer: PPE DMA/SW 355*5113495bSYour Name 356*5113495bSYour Name Lower 32 bits of opaque SW value 357*5113495bSYour Name 358*5113495bSYour Name OPAQUE_LO[19:0] are used for Sw_buffer_cookie with OPAQUE_LO[31:20] 359*5113495bSYour Name ignored, for direct switch connect. 360*5113495bSYour Name <legal all> 361*5113495bSYour Name */ 362*5113495bSYour Name 363*5113495bSYour Name #define TCL_ENTRANCE_FROM_PPE_RING_OPAQUE_LO_OFFSET 0x00000008 364*5113495bSYour Name #define TCL_ENTRANCE_FROM_PPE_RING_OPAQUE_LO_LSB 0 365*5113495bSYour Name #define TCL_ENTRANCE_FROM_PPE_RING_OPAQUE_LO_MSB 31 366*5113495bSYour Name #define TCL_ENTRANCE_FROM_PPE_RING_OPAQUE_LO_MASK 0xffffffff 367*5113495bSYour Name 368*5113495bSYour Name 369*5113495bSYour Name /* Description OPAQUE_HI 370*5113495bSYour Name 371*5113495bSYour Name Consumer: SW 372*5113495bSYour Name Producer: PPE DMA/SW 373*5113495bSYour Name 374*5113495bSYour Name Higher 32 bits of opaque SW value, ignored completely for 375*5113495bSYour Name direct switch connect 376*5113495bSYour Name <legal all> 377*5113495bSYour Name */ 378*5113495bSYour Name 379*5113495bSYour Name #define TCL_ENTRANCE_FROM_PPE_RING_OPAQUE_HI_OFFSET 0x0000000c 380*5113495bSYour Name #define TCL_ENTRANCE_FROM_PPE_RING_OPAQUE_HI_LSB 0 381*5113495bSYour Name #define TCL_ENTRANCE_FROM_PPE_RING_OPAQUE_HI_MSB 31 382*5113495bSYour Name #define TCL_ENTRANCE_FROM_PPE_RING_OPAQUE_HI_MASK 0xffffffff 383*5113495bSYour Name 384*5113495bSYour Name 385*5113495bSYour Name /* Description SRC_INFO 386*5113495bSYour Name 387*5113495bSYour Name Consumer: TCL 388*5113495bSYour Name Producer: Switch Core 389*5113495bSYour Name 390*5113495bSYour Name Source port: SRC_INFO[15:12] = 'b0010, SRC_INFO[11:0] is 391*5113495bSYour Name the PORT_ID. 392*5113495bSYour Name See DST_INFO for PORT_ID values. 393*5113495bSYour Name <legal 8192-8447> 394*5113495bSYour Name */ 395*5113495bSYour Name 396*5113495bSYour Name #define TCL_ENTRANCE_FROM_PPE_RING_SRC_INFO_OFFSET 0x00000010 397*5113495bSYour Name #define TCL_ENTRANCE_FROM_PPE_RING_SRC_INFO_LSB 0 398*5113495bSYour Name #define TCL_ENTRANCE_FROM_PPE_RING_SRC_INFO_MSB 15 399*5113495bSYour Name #define TCL_ENTRANCE_FROM_PPE_RING_SRC_INFO_MASK 0x0000ffff 400*5113495bSYour Name 401*5113495bSYour Name 402*5113495bSYour Name /* Description DST_INFO 403*5113495bSYour Name 404*5113495bSYour Name Consumer: TCL 405*5113495bSYour Name Producer: Switch Core 406*5113495bSYour Name 407*5113495bSYour Name Destination port or next hop information 408*5113495bSYour Name 409*5113495bSYour Name DST_INFO[15:12] = 'b0000 indicates invalid information. 410*5113495bSYour Name If DST_INFO[15:12] = 'b0001, DST_INFO[11:0] is the next 411*5113495bSYour Name hop index (Not supported for direct switch connect). 412*5113495bSYour Name If DST_INFO[15:12] = 'b0010, DST_INFO[11:0] is the PORT_ID, 413*5113495bSYour Name which TCL can process. 414*5113495bSYour Name If DST_INFO[15:12] = 'b0011, DST_INFO[11:0] is the destination 415*5113495bSYour Name port bitmap (Not supported for direct switch connect). 416*5113495bSYour Name 417*5113495bSYour Name PORT_ID: 418*5113495bSYour Name 0-31 indicates a physical Ethernet port. 419*5113495bSYour Name 32-63 indicates a link aggregation group (LAG) of ports (Not 420*5113495bSYour Name supported for direct switch connect). 421*5113495bSYour Name 64-255 indicates a virtual port, which TCL maps 422*5113495bSYour Name to Bank_id, PMAC_ID, vdev_id, To_FW and Search_index. 423*5113495bSYour Name TCL also maps this to internal parameters 'USE_PPE_INT_PRI_FOR_TID' 424*5113495bSYour Name and 'DROP_PREC_ENABLE' (see fields INT_PRI and DROP_PREC). 425*5113495bSYour Name 426*5113495bSYour Name Other values are reserved. 427*5113495bSYour Name <legal 0-8447,12288-16383> 428*5113495bSYour Name */ 429*5113495bSYour Name 430*5113495bSYour Name #define TCL_ENTRANCE_FROM_PPE_RING_DST_INFO_OFFSET 0x00000010 431*5113495bSYour Name #define TCL_ENTRANCE_FROM_PPE_RING_DST_INFO_LSB 16 432*5113495bSYour Name #define TCL_ENTRANCE_FROM_PPE_RING_DST_INFO_MSB 31 433*5113495bSYour Name #define TCL_ENTRANCE_FROM_PPE_RING_DST_INFO_MASK 0xffff0000 434*5113495bSYour Name 435*5113495bSYour Name 436*5113495bSYour Name /* Description DATA_LENGTH 437*5113495bSYour Name 438*5113495bSYour Name Consumer: TCL/TXDMA 439*5113495bSYour Name Producer: PPE DMA 440*5113495bSYour Name 441*5113495bSYour Name Length of valid packet data in the current buffer in bytes 442*5113495bSYour Name (Bits [17:16] not supported PPE and bits [17:14] 443*5113495bSYour Name not supported) 444*5113495bSYour Name <legal all> 445*5113495bSYour Name */ 446*5113495bSYour Name 447*5113495bSYour Name #define TCL_ENTRANCE_FROM_PPE_RING_DATA_LENGTH_OFFSET 0x00000014 448*5113495bSYour Name #define TCL_ENTRANCE_FROM_PPE_RING_DATA_LENGTH_LSB 0 449*5113495bSYour Name #define TCL_ENTRANCE_FROM_PPE_RING_DATA_LENGTH_MSB 17 450*5113495bSYour Name #define TCL_ENTRANCE_FROM_PPE_RING_DATA_LENGTH_MASK 0x0003ffff 451*5113495bSYour Name 452*5113495bSYour Name 453*5113495bSYour Name /* Description POOL_ID 454*5113495bSYour Name 455*5113495bSYour Name Consumer: TCL/SW 456*5113495bSYour Name Producer: PPE DMA/SW 457*5113495bSYour Name 458*5113495bSYour Name To be used for hardware buffer management 459*5113495bSYour Name 460*5113495bSYour Name SW must ensure 1:1 mapping between PPE Rx Fill and PPE Rx 461*5113495bSYour Name completion descriptors. 462*5113495bSYour Name <legal all> 463*5113495bSYour Name */ 464*5113495bSYour Name 465*5113495bSYour Name #define TCL_ENTRANCE_FROM_PPE_RING_POOL_ID_OFFSET 0x00000014 466*5113495bSYour Name #define TCL_ENTRANCE_FROM_PPE_RING_POOL_ID_LSB 18 467*5113495bSYour Name #define TCL_ENTRANCE_FROM_PPE_RING_POOL_ID_MSB 23 468*5113495bSYour Name #define TCL_ENTRANCE_FROM_PPE_RING_POOL_ID_MASK 0x00fc0000 469*5113495bSYour Name 470*5113495bSYour Name 471*5113495bSYour Name /* Description WIFI_QOS 472*5113495bSYour Name 473*5113495bSYour Name Consumer: TCL 474*5113495bSYour Name Producer: Switch Core 475*5113495bSYour Name 476*5113495bSYour Name Wi-Fi QoS Value 477*5113495bSYour Name 478*5113495bSYour Name TCL maps as follows: 479*5113495bSYour Name who_classify_info_sel = WIFI_QOS[5:4] if WIFI_QOS_FLAG set 480*5113495bSYour Name 481*5113495bSYour Name HLOS_TID = WIFI_QOS[3:1] if HLOS_TID_overwrite enabled 482*5113495bSYour Name flow_override = WIFI_QOS [0] if WIFI_QOS_FLAG set 483*5113495bSYour Name flow_override_enable = WIFI_QOS_FLAG 484*5113495bSYour Name HLOS_TID_overwrite = WIFI_QOS_FLAG || WIFI_QOS[7] 485*5113495bSYour Name 486*5113495bSYour Name WIFI_QOS[6] is ignored by TCL. 487*5113495bSYour Name 488*5113495bSYour Name Also see field INT_PRI for another way to enable HLOS_TID_overwrite. 489*5113495bSYour Name 490*5113495bSYour Name <legal all> 491*5113495bSYour Name */ 492*5113495bSYour Name 493*5113495bSYour Name #define TCL_ENTRANCE_FROM_PPE_RING_WIFI_QOS_OFFSET 0x00000014 494*5113495bSYour Name #define TCL_ENTRANCE_FROM_PPE_RING_WIFI_QOS_LSB 24 495*5113495bSYour Name #define TCL_ENTRANCE_FROM_PPE_RING_WIFI_QOS_MSB 31 496*5113495bSYour Name #define TCL_ENTRANCE_FROM_PPE_RING_WIFI_QOS_MASK 0xff000000 497*5113495bSYour Name 498*5113495bSYour Name 499*5113495bSYour Name /* Description DATA_OFFSET 500*5113495bSYour Name 501*5113495bSYour Name Consumer: TCL 502*5113495bSYour Name Producer: PPE DMA 503*5113495bSYour Name 504*5113495bSYour Name Offset to the packet data from the buffer address 505*5113495bSYour Name <legal all> 506*5113495bSYour Name */ 507*5113495bSYour Name 508*5113495bSYour Name #define TCL_ENTRANCE_FROM_PPE_RING_DATA_OFFSET_OFFSET 0x00000018 509*5113495bSYour Name #define TCL_ENTRANCE_FROM_PPE_RING_DATA_OFFSET_LSB 0 510*5113495bSYour Name #define TCL_ENTRANCE_FROM_PPE_RING_DATA_OFFSET_MSB 11 511*5113495bSYour Name #define TCL_ENTRANCE_FROM_PPE_RING_DATA_OFFSET_MASK 0x00000fff 512*5113495bSYour Name 513*5113495bSYour Name 514*5113495bSYour Name /* Description L4_CSUM_STATUS 515*5113495bSYour Name 516*5113495bSYour Name Consumer: TCL 517*5113495bSYour Name Producer: PPE DMA/Switch Core 518*5113495bSYour Name 519*5113495bSYour Name Layer 4 checksum verification result 520*5113495bSYour Name 0: Unknown or invalid 521*5113495bSYour Name 1: Valid 522*5113495bSYour Name The default value is 0. Only when PPE DMA performs the checksum 523*5113495bSYour Name calculation and the result is correct, is this bit set. 524*5113495bSYour Name 525*5113495bSYour Name <legal all> 526*5113495bSYour Name */ 527*5113495bSYour Name 528*5113495bSYour Name #define TCL_ENTRANCE_FROM_PPE_RING_L4_CSUM_STATUS_OFFSET 0x00000018 529*5113495bSYour Name #define TCL_ENTRANCE_FROM_PPE_RING_L4_CSUM_STATUS_LSB 12 530*5113495bSYour Name #define TCL_ENTRANCE_FROM_PPE_RING_L4_CSUM_STATUS_MSB 12 531*5113495bSYour Name #define TCL_ENTRANCE_FROM_PPE_RING_L4_CSUM_STATUS_MASK 0x00001000 532*5113495bSYour Name 533*5113495bSYour Name 534*5113495bSYour Name /* Description L3_CSUM_STATUS 535*5113495bSYour Name 536*5113495bSYour Name Consumer: TCL 537*5113495bSYour Name Producer: PPE DMA/Switch Core 538*5113495bSYour Name 539*5113495bSYour Name Layer 3 checksum verification result 540*5113495bSYour Name 0: Unknown or invalid 541*5113495bSYour Name 1: Valid 542*5113495bSYour Name The default value is 0. Only when PPE DMA performs the checksum 543*5113495bSYour Name calculation and the result is correct, is this bit set. 544*5113495bSYour Name 545*5113495bSYour Name <legal all> 546*5113495bSYour Name */ 547*5113495bSYour Name 548*5113495bSYour Name #define TCL_ENTRANCE_FROM_PPE_RING_L3_CSUM_STATUS_OFFSET 0x00000018 549*5113495bSYour Name #define TCL_ENTRANCE_FROM_PPE_RING_L3_CSUM_STATUS_LSB 13 550*5113495bSYour Name #define TCL_ENTRANCE_FROM_PPE_RING_L3_CSUM_STATUS_MSB 13 551*5113495bSYour Name #define TCL_ENTRANCE_FROM_PPE_RING_L3_CSUM_STATUS_MASK 0x00002000 552*5113495bSYour Name 553*5113495bSYour Name 554*5113495bSYour Name /* Description HASH_FLAG 555*5113495bSYour Name 556*5113495bSYour Name Consumer: SW 557*5113495bSYour Name Producer: Switch Core 558*5113495bSYour Name 559*5113495bSYour Name Hash type 560*5113495bSYour Name 00: Hash invalid 561*5113495bSYour Name 01: 5-tuple hash 562*5113495bSYour Name 10: 3-tuple hash 563*5113495bSYour Name 11: Reserved 564*5113495bSYour Name <legal 0-2> 565*5113495bSYour Name */ 566*5113495bSYour Name 567*5113495bSYour Name #define TCL_ENTRANCE_FROM_PPE_RING_HASH_FLAG_OFFSET 0x00000018 568*5113495bSYour Name #define TCL_ENTRANCE_FROM_PPE_RING_HASH_FLAG_LSB 14 569*5113495bSYour Name #define TCL_ENTRANCE_FROM_PPE_RING_HASH_FLAG_MSB 15 570*5113495bSYour Name #define TCL_ENTRANCE_FROM_PPE_RING_HASH_FLAG_MASK 0x0000c000 571*5113495bSYour Name 572*5113495bSYour Name 573*5113495bSYour Name /* Description HASH_VALUE 574*5113495bSYour Name 575*5113495bSYour Name Consumer: SW 576*5113495bSYour Name Producer: Switch Core 577*5113495bSYour Name 578*5113495bSYour Name Hash value 579*5113495bSYour Name <legal all> 580*5113495bSYour Name */ 581*5113495bSYour Name 582*5113495bSYour Name #define TCL_ENTRANCE_FROM_PPE_RING_HASH_VALUE_OFFSET 0x00000018 583*5113495bSYour Name #define TCL_ENTRANCE_FROM_PPE_RING_HASH_VALUE_LSB 16 584*5113495bSYour Name #define TCL_ENTRANCE_FROM_PPE_RING_HASH_VALUE_MSB 31 585*5113495bSYour Name #define TCL_ENTRANCE_FROM_PPE_RING_HASH_VALUE_MASK 0xffff0000 586*5113495bSYour Name 587*5113495bSYour Name 588*5113495bSYour Name /* Description DSCP 589*5113495bSYour Name 590*5113495bSYour Name Consumer: TCL 591*5113495bSYour Name Producer: PPE DMA/Switch Core 592*5113495bSYour Name 593*5113495bSYour Name Differential Services Code Point value 594*5113495bSYour Name <legal all> 595*5113495bSYour Name */ 596*5113495bSYour Name 597*5113495bSYour Name #define TCL_ENTRANCE_FROM_PPE_RING_DSCP_OFFSET 0x0000001c 598*5113495bSYour Name #define TCL_ENTRANCE_FROM_PPE_RING_DSCP_LSB 0 599*5113495bSYour Name #define TCL_ENTRANCE_FROM_PPE_RING_DSCP_MSB 7 600*5113495bSYour Name #define TCL_ENTRANCE_FROM_PPE_RING_DSCP_MASK 0x000000ff 601*5113495bSYour Name 602*5113495bSYour Name 603*5113495bSYour Name /* Description VALID_TOGGLE 604*5113495bSYour Name 605*5113495bSYour Name Consumer: TCL 606*5113495bSYour Name Producer: PPE DMA 607*5113495bSYour Name 608*5113495bSYour Name Toggle bit to indicate the validity of the descriptor 609*5113495bSYour Name The value is toggled when the producer pointer wraps around. 610*5113495bSYour Name 611*5113495bSYour Name <legal all> 612*5113495bSYour Name */ 613*5113495bSYour Name 614*5113495bSYour Name #define TCL_ENTRANCE_FROM_PPE_RING_VALID_TOGGLE_OFFSET 0x0000001c 615*5113495bSYour Name #define TCL_ENTRANCE_FROM_PPE_RING_VALID_TOGGLE_LSB 8 616*5113495bSYour Name #define TCL_ENTRANCE_FROM_PPE_RING_VALID_TOGGLE_MSB 8 617*5113495bSYour Name #define TCL_ENTRANCE_FROM_PPE_RING_VALID_TOGGLE_MASK 0x00000100 618*5113495bSYour Name 619*5113495bSYour Name 620*5113495bSYour Name /* Description PPPOE_FLAG 621*5113495bSYour Name 622*5113495bSYour Name Consumer: TCL 623*5113495bSYour Name Producer: Switch Core 624*5113495bSYour Name 625*5113495bSYour Name Indicates a PPPoE packet 626*5113495bSYour Name 0: No PPPoE header 627*5113495bSYour Name 1: PPPoE header exists 628*5113495bSYour Name <legal all> 629*5113495bSYour Name */ 630*5113495bSYour Name 631*5113495bSYour Name #define TCL_ENTRANCE_FROM_PPE_RING_PPPOE_FLAG_OFFSET 0x0000001c 632*5113495bSYour Name #define TCL_ENTRANCE_FROM_PPE_RING_PPPOE_FLAG_LSB 9 633*5113495bSYour Name #define TCL_ENTRANCE_FROM_PPE_RING_PPPOE_FLAG_MSB 9 634*5113495bSYour Name #define TCL_ENTRANCE_FROM_PPE_RING_PPPOE_FLAG_MASK 0x00000200 635*5113495bSYour Name 636*5113495bSYour Name 637*5113495bSYour Name /* Description SVLAN_FLAG 638*5113495bSYour Name 639*5113495bSYour Name Consumer: TCL 640*5113495bSYour Name Producer: PPE DMA/Switch Core 641*5113495bSYour Name 642*5113495bSYour Name Indicates the existence of S-VLAN tag 643*5113495bSYour Name 0: No S-VLAN 644*5113495bSYour Name 1: S-VLAN exists, including priority 645*5113495bSYour Name <legal all> 646*5113495bSYour Name */ 647*5113495bSYour Name 648*5113495bSYour Name #define TCL_ENTRANCE_FROM_PPE_RING_SVLAN_FLAG_OFFSET 0x0000001c 649*5113495bSYour Name #define TCL_ENTRANCE_FROM_PPE_RING_SVLAN_FLAG_LSB 10 650*5113495bSYour Name #define TCL_ENTRANCE_FROM_PPE_RING_SVLAN_FLAG_MSB 10 651*5113495bSYour Name #define TCL_ENTRANCE_FROM_PPE_RING_SVLAN_FLAG_MASK 0x00000400 652*5113495bSYour Name 653*5113495bSYour Name 654*5113495bSYour Name /* Description CVLAN_FLAG 655*5113495bSYour Name 656*5113495bSYour Name Consumer: TCL 657*5113495bSYour Name Producer: PPE DMA/Switch Core 658*5113495bSYour Name 659*5113495bSYour Name Indicates the existence of C-VLAN tag 660*5113495bSYour Name 0: No C-VLAN 661*5113495bSYour Name 1: C-VLAN exists, including priority 662*5113495bSYour Name <legal all> 663*5113495bSYour Name */ 664*5113495bSYour Name 665*5113495bSYour Name #define TCL_ENTRANCE_FROM_PPE_RING_CVLAN_FLAG_OFFSET 0x0000001c 666*5113495bSYour Name #define TCL_ENTRANCE_FROM_PPE_RING_CVLAN_FLAG_LSB 11 667*5113495bSYour Name #define TCL_ENTRANCE_FROM_PPE_RING_CVLAN_FLAG_MSB 11 668*5113495bSYour Name #define TCL_ENTRANCE_FROM_PPE_RING_CVLAN_FLAG_MASK 0x00000800 669*5113495bSYour Name 670*5113495bSYour Name 671*5113495bSYour Name /* Description PID 672*5113495bSYour Name 673*5113495bSYour Name Consumer: TCL 674*5113495bSYour Name Producer: Switch Core 675*5113495bSYour Name 676*5113495bSYour Name Protocol ID, indicating the protocol type of the packet 677*5113495bSYour Name 0: IPv4 (no supported L4) 678*5113495bSYour Name 1: TCP over IPv4 679*5113495bSYour Name 2: UDP over IPv4 680*5113495bSYour Name 3: UDP-Lite over IPv4 681*5113495bSYour Name 4: IPv6 (no supported L4) 682*5113495bSYour Name 5: TCP over IPv6 683*5113495bSYour Name 6: UDP over IPv6 684*5113495bSYour Name 7: UDP-Lite over IPv6 685*5113495bSYour Name 8: Non-IP 686*5113495bSYour Name Other values are reserved 687*5113495bSYour Name <legal 0-8> 688*5113495bSYour Name */ 689*5113495bSYour Name 690*5113495bSYour Name #define TCL_ENTRANCE_FROM_PPE_RING_PID_OFFSET 0x0000001c 691*5113495bSYour Name #define TCL_ENTRANCE_FROM_PPE_RING_PID_LSB 12 692*5113495bSYour Name #define TCL_ENTRANCE_FROM_PPE_RING_PID_MSB 15 693*5113495bSYour Name #define TCL_ENTRANCE_FROM_PPE_RING_PID_MASK 0x0000f000 694*5113495bSYour Name 695*5113495bSYour Name 696*5113495bSYour Name /* Description L3_OFFSET 697*5113495bSYour Name 698*5113495bSYour Name Consumer: TCL 699*5113495bSYour Name Producer: PPE DMA 700*5113495bSYour Name 701*5113495bSYour Name Layer 3 header offset from DATA_OFFSET 702*5113495bSYour Name <legal all> 703*5113495bSYour Name */ 704*5113495bSYour Name 705*5113495bSYour Name #define TCL_ENTRANCE_FROM_PPE_RING_L3_OFFSET_OFFSET 0x0000001c 706*5113495bSYour Name #define TCL_ENTRANCE_FROM_PPE_RING_L3_OFFSET_LSB 16 707*5113495bSYour Name #define TCL_ENTRANCE_FROM_PPE_RING_L3_OFFSET_MSB 23 708*5113495bSYour Name #define TCL_ENTRANCE_FROM_PPE_RING_L3_OFFSET_MASK 0x00ff0000 709*5113495bSYour Name 710*5113495bSYour Name 711*5113495bSYour Name /* Description L4_OFFSET 712*5113495bSYour Name 713*5113495bSYour Name Consumer: TCL 714*5113495bSYour Name Producer: PPE DMA 715*5113495bSYour Name 716*5113495bSYour Name Layer 4 header offset from DATA_OFFSET 717*5113495bSYour Name <legal all> 718*5113495bSYour Name */ 719*5113495bSYour Name 720*5113495bSYour Name #define TCL_ENTRANCE_FROM_PPE_RING_L4_OFFSET_OFFSET 0x0000001c 721*5113495bSYour Name #define TCL_ENTRANCE_FROM_PPE_RING_L4_OFFSET_LSB 24 722*5113495bSYour Name #define TCL_ENTRANCE_FROM_PPE_RING_L4_OFFSET_MSB 31 723*5113495bSYour Name #define TCL_ENTRANCE_FROM_PPE_RING_L4_OFFSET_MASK 0xff000000 724*5113495bSYour Name 725*5113495bSYour Name 726*5113495bSYour Name 727*5113495bSYour Name #endif // TCL_ENTRANCE_FROM_PPE_RING 728