1 /* 2 * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for any 5 * purpose with or without fee is hereby granted, provided that the above 6 * copyright notice and this permission notice appear in all copies. 7 * 8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15 */ 16 17 #ifndef _TX_FES_SETUP_H_ 18 #define _TX_FES_SETUP_H_ 19 #if !defined(__ASSEMBLER__) 20 #endif 21 22 #define NUM_OF_DWORDS_TX_FES_SETUP 10 23 24 #define NUM_OF_QWORDS_TX_FES_SETUP 5 25 26 27 struct tx_fes_setup { 28 #ifndef WIFI_BIT_ORDER_BIG_ENDIAN 29 uint32_t schedule_id : 32; // [31:0] 30 uint32_t fes_in_11ax_trigger_response_config : 1, // [0:0] 31 bo_based_tid_aggregation_limit : 4, // [4:1] 32 ranging : 1, // [5:5] 33 expect_i2r_lmr : 1, // [6:6] 34 transmit_start_reason : 3, // [9:7] 35 use_alt_power_sr : 1, // [10:10] 36 static_2_pwr_mode_status : 1, // [11:11] 37 obss_srg_opport_transmit_status : 1, // [12:12] 38 srp_based_transmit_status : 1, // [13:13] 39 obss_pd_based_transmit_status : 1, // [14:14] 40 puncture_from_all_allowed_modes : 1, // [15:15] 41 schedule_cmd_ring_id : 5, // [20:16] 42 fes_control_mode : 2, // [22:21] 43 number_of_users : 6, // [28:23] 44 mu_type : 1, // [29:29] 45 ofdma_triggered_response : 1, // [30:30] 46 response_to_response_cmd : 1; // [31:31] 47 uint32_t schedule_try : 4, // [3:0] 48 ndp_frame : 2, // [5:4] 49 txbf : 1, // [6:6] 50 allow_txop_exceed_in_1st_pkt : 1, // [7:7] 51 ignore_bw_available : 1, // [8:8] 52 ignore_tbtt : 1, // [9:9] 53 static_bandwidth : 3, // [12:10] 54 set_txop_duration_all_ones : 1, // [13:13] 55 transmission_contains_mu_rts : 1, // [14:14] 56 bw_restricted_frames_embedded : 1, // [15:15] 57 ast_index : 16; // [31:16] 58 uint32_t cv_id : 8, // [7:0] 59 trigger_resp_txpdu_ppdu_boundary : 2, // [9:8] 60 rxpcu_setup_complete_present : 1, // [10:10] 61 rbo_must_have_data_user_limit : 4, // [14:11] 62 mu_ndp : 1, // [15:15] 63 bf_type : 2, // [17:16] 64 cbf_nc_index_mask : 1, // [18:18] 65 cbf_nc_index : 3, // [21:19] 66 cbf_nr_index_mask : 1, // [22:22] 67 cbf_nr_index : 3, // [25:23] 68 secure_ranging_ista : 1, // [26:26] 69 ndpa : 1, // [27:27] 70 wait_sifs : 2, // [29:28] 71 cbf_feedback_type_mask : 1, // [30:30] 72 cbf_feedback_type : 1; // [31:31] 73 uint32_t cbf_sounding_token : 6, // [5:0] 74 cbf_sounding_token_mask : 1, // [6:6] 75 cbf_bw_mask : 1, // [7:7] 76 cbf_bw : 3, // [10:8] 77 use_static_bw : 1, // [11:11] 78 coex_nack_count : 5, // [16:12] 79 sch_tx_burst_ongoing : 1, // [17:17] 80 gen_tqm_update_mpdu_count_tlv : 1, // [18:18] 81 transmit_vif : 4, // [22:19] 82 optimal_bw_retry_count : 4, // [26:23] 83 fes_continuation_ratio_threshold : 5; // [31:27] 84 uint32_t transmit_cca_bitmap : 32; // [31:0] 85 uint32_t tb_ranging : 1, // [0:0] 86 ranging_trigger_subtype : 4, // [4:1] 87 min_cts2self_count : 4, // [8:5] 88 max_cts2self_count : 4, // [12:9] 89 wifi_radar_enable : 1, // [13:13] 90 reserved_6a : 18; // [31:14] 91 uint32_t monitor_override_sta_31_0 : 32; // [31:0] 92 uint32_t monitor_override_sta_36_32 : 5, // [4:0] 93 reserved_8a : 27; // [31:5] 94 uint32_t fw2sw_info : 32; // [31:0] 95 #else 96 uint32_t schedule_id : 32; // [31:0] 97 uint32_t response_to_response_cmd : 1, // [31:31] 98 ofdma_triggered_response : 1, // [30:30] 99 mu_type : 1, // [29:29] 100 number_of_users : 6, // [28:23] 101 fes_control_mode : 2, // [22:21] 102 schedule_cmd_ring_id : 5, // [20:16] 103 puncture_from_all_allowed_modes : 1, // [15:15] 104 obss_pd_based_transmit_status : 1, // [14:14] 105 srp_based_transmit_status : 1, // [13:13] 106 obss_srg_opport_transmit_status : 1, // [12:12] 107 static_2_pwr_mode_status : 1, // [11:11] 108 use_alt_power_sr : 1, // [10:10] 109 transmit_start_reason : 3, // [9:7] 110 expect_i2r_lmr : 1, // [6:6] 111 ranging : 1, // [5:5] 112 bo_based_tid_aggregation_limit : 4, // [4:1] 113 fes_in_11ax_trigger_response_config : 1; // [0:0] 114 uint32_t ast_index : 16, // [31:16] 115 bw_restricted_frames_embedded : 1, // [15:15] 116 transmission_contains_mu_rts : 1, // [14:14] 117 set_txop_duration_all_ones : 1, // [13:13] 118 static_bandwidth : 3, // [12:10] 119 ignore_tbtt : 1, // [9:9] 120 ignore_bw_available : 1, // [8:8] 121 allow_txop_exceed_in_1st_pkt : 1, // [7:7] 122 txbf : 1, // [6:6] 123 ndp_frame : 2, // [5:4] 124 schedule_try : 4; // [3:0] 125 uint32_t cbf_feedback_type : 1, // [31:31] 126 cbf_feedback_type_mask : 1, // [30:30] 127 wait_sifs : 2, // [29:28] 128 ndpa : 1, // [27:27] 129 secure_ranging_ista : 1, // [26:26] 130 cbf_nr_index : 3, // [25:23] 131 cbf_nr_index_mask : 1, // [22:22] 132 cbf_nc_index : 3, // [21:19] 133 cbf_nc_index_mask : 1, // [18:18] 134 bf_type : 2, // [17:16] 135 mu_ndp : 1, // [15:15] 136 rbo_must_have_data_user_limit : 4, // [14:11] 137 rxpcu_setup_complete_present : 1, // [10:10] 138 trigger_resp_txpdu_ppdu_boundary : 2, // [9:8] 139 cv_id : 8; // [7:0] 140 uint32_t fes_continuation_ratio_threshold : 5, // [31:27] 141 optimal_bw_retry_count : 4, // [26:23] 142 transmit_vif : 4, // [22:19] 143 gen_tqm_update_mpdu_count_tlv : 1, // [18:18] 144 sch_tx_burst_ongoing : 1, // [17:17] 145 coex_nack_count : 5, // [16:12] 146 use_static_bw : 1, // [11:11] 147 cbf_bw : 3, // [10:8] 148 cbf_bw_mask : 1, // [7:7] 149 cbf_sounding_token_mask : 1, // [6:6] 150 cbf_sounding_token : 6; // [5:0] 151 uint32_t transmit_cca_bitmap : 32; // [31:0] 152 uint32_t reserved_6a : 18, // [31:14] 153 wifi_radar_enable : 1, // [13:13] 154 max_cts2self_count : 4, // [12:9] 155 min_cts2self_count : 4, // [8:5] 156 ranging_trigger_subtype : 4, // [4:1] 157 tb_ranging : 1; // [0:0] 158 uint32_t monitor_override_sta_31_0 : 32; // [31:0] 159 uint32_t reserved_8a : 27, // [31:5] 160 monitor_override_sta_36_32 : 5; // [4:0] 161 uint32_t fw2sw_info : 32; // [31:0] 162 #endif 163 }; 164 165 166 /* Description SCHEDULE_ID 167 168 Consumer: PDG/TXDMA/TXOLE/TXCRYPTO/TXPCU 169 Producer: SCH 170 171 This field is overwritten by the scheduler module and it's 172 value is coming from the"schedule_id" field in the Scheduler 173 command. 174 175 Configured by scheduler in HW transmit mode 176 A field that HW copies over into the scheduling status report, 177 so that SW can determine to which scheduler command the 178 status report belongs. 179 This schedule ID is also reported in the PPDU status. 180 181 <legal all> 182 */ 183 184 #define TX_FES_SETUP_SCHEDULE_ID_OFFSET 0x0000000000000000 185 #define TX_FES_SETUP_SCHEDULE_ID_LSB 0 186 #define TX_FES_SETUP_SCHEDULE_ID_MSB 31 187 #define TX_FES_SETUP_SCHEDULE_ID_MASK 0x00000000ffffffff 188 189 190 /* Description FES_IN_11AX_TRIGGER_RESPONSE_CONFIG 191 192 Consumer: PDG/TXPCU 193 Producer: SW 194 When set, this scheduler command has some additional settings 195 that PDG and TXPCU need to take into account, depending 196 on if the transmission has been iniated as a backoff expiration 197 or as the result of an 11ax trigger reception. 198 199 0: not in special trigger response config 200 1: command is special trigger response config. 201 202 When set to 1, there are some programming limitations: There 203 can only be 1 group, up to 8 users, SW shall have specified 204 the AC for each user, and AC order per user is from BE 205 to VO 206 (see PDG_USER_SETUP, fields Triggered_mpdu_AC_category) 207 208 <legal all> 209 */ 210 211 #define TX_FES_SETUP_FES_IN_11AX_TRIGGER_RESPONSE_CONFIG_OFFSET 0x0000000000000000 212 #define TX_FES_SETUP_FES_IN_11AX_TRIGGER_RESPONSE_CONFIG_LSB 32 213 #define TX_FES_SETUP_FES_IN_11AX_TRIGGER_RESPONSE_CONFIG_MSB 32 214 #define TX_FES_SETUP_FES_IN_11AX_TRIGGER_RESPONSE_CONFIG_MASK 0x0000000100000000 215 216 217 /* Description BO_BASED_TID_AGGREGATION_LIMIT 218 219 Consumer: PDG 220 Producer: SW 221 222 Field only valid when Ofdma_triggered_response is NOT set 223 (=> implies transmission started due to backoff expiration) 224 225 226 Field only valid for SU and "MU_SU" transmissions. 227 228 The requirements for what to transmit depend on what the 229 reason is that this transmission started. If it is 11ax 230 trigger based, the trigger frame will specify all the constrains 231 like max TID count, prefered AC, etc. 232 However if this command starts executing due to backoff 233 expiration, the requirements could be different from those 234 that might have come from the trigger frame. 235 This field specifies what the constaints are when the transmission 236 is Backoff initiated. 237 238 If zero, this feature is disabled. 239 If non-zero, this indicates the number of users within a 240 group that can be aggregated by a STA in a multi-TID A-MPDU. 241 This can also be used to block the series of QoS-null MPDUs 242 when an RBO+Trig queue transmits using RBO. 243 244 Based on this number, PDG will mask of user numbers >= this 245 count 246 <legal all> 247 */ 248 249 #define TX_FES_SETUP_BO_BASED_TID_AGGREGATION_LIMIT_OFFSET 0x0000000000000000 250 #define TX_FES_SETUP_BO_BASED_TID_AGGREGATION_LIMIT_LSB 33 251 #define TX_FES_SETUP_BO_BASED_TID_AGGREGATION_LIMIT_MSB 36 252 #define TX_FES_SETUP_BO_BASED_TID_AGGREGATION_LIMIT_MASK 0x0000001e00000000 253 254 255 /* Description RANGING 256 257 Consumer: TXPCU 258 Producer: SW 259 260 Set to 1 in case the frame queued is: 261 a .11az ranging NDPA, 262 a .11az ranging NDP, or 263 an ISTA2RSTA LMR. 264 Set to 0 for all other cases. 265 */ 266 267 #define TX_FES_SETUP_RANGING_OFFSET 0x0000000000000000 268 #define TX_FES_SETUP_RANGING_LSB 37 269 #define TX_FES_SETUP_RANGING_MSB 37 270 #define TX_FES_SETUP_RANGING_MASK 0x0000002000000000 271 272 273 /* Description EXPECT_I2R_LMR 274 275 Consumer: TXPCU 276 Producer: SW 277 278 Set to 1 in case the frame queued is a .11az randing NDPA/NDP 279 and if the ISTA2RSTA LMR frame is also queued after SIFS. 280 281 282 Set to 0 otherwise. 283 */ 284 285 #define TX_FES_SETUP_EXPECT_I2R_LMR_OFFSET 0x0000000000000000 286 #define TX_FES_SETUP_EXPECT_I2R_LMR_LSB 38 287 #define TX_FES_SETUP_EXPECT_I2R_LMR_MSB 38 288 #define TX_FES_SETUP_EXPECT_I2R_LMR_MASK 0x0000004000000000 289 290 291 /* Description TRANSMIT_START_REASON 292 293 Indicates what the SCH start reason reason was for initiating 294 this transmission. 295 296 <enum 0 BO_based_transmit_start> The transmission of this 297 PPDU got initiated by the scheduler due to Backoff expiration 298 299 <enum 1 Trigger_based_transmit_start> The transmission of 300 this PPDU got initiated by the scheduler due to reception 301 (by the SCH) of the TLV RECEIVED_TRIGGER_INFO that RXPCU 302 generated. Note that this can be an OFDMA trigger frame 303 based transmission as well as some legacy trigger (PS-POLL, 304 Qboost, U-APSD, etc.) based transmission 305 <enum 2 Sifs_continuation_in_ongoing_burst> This transmission 306 of this PPDU got initiated as part of SIFS continuation. 307 An earlier PPDU was transmitted due to RBO expiration. Next 308 command is also expected to be transmitted in SIFS burst. 309 310 <enum 3 Sifs_continuation_last_command> This transmission 311 of this PPDU got initiated as part of SIFS continuation 312 and this is the last command in the burst. An earlier PPDU 313 was transmitted due to RBO expiration. 314 <enum 4 NTBR_response_start> DO NOT USE 315 <legal 0-4> 316 */ 317 318 #define TX_FES_SETUP_TRANSMIT_START_REASON_OFFSET 0x0000000000000000 319 #define TX_FES_SETUP_TRANSMIT_START_REASON_LSB 39 320 #define TX_FES_SETUP_TRANSMIT_START_REASON_MSB 41 321 #define TX_FES_SETUP_TRANSMIT_START_REASON_MASK 0x0000038000000000 322 323 324 /* Description USE_ALT_POWER_SR 325 326 0: Primary/default power1: Alternate power 327 <legal all> 328 */ 329 330 #define TX_FES_SETUP_USE_ALT_POWER_SR_OFFSET 0x0000000000000000 331 #define TX_FES_SETUP_USE_ALT_POWER_SR_LSB 42 332 #define TX_FES_SETUP_USE_ALT_POWER_SR_MSB 42 333 #define TX_FES_SETUP_USE_ALT_POWER_SR_MASK 0x0000040000000000 334 335 336 /* Description STATIC_2_PWR_MODE_STATUS 337 338 0: Static 2 power mode disabled1: Static 2 power mode enabled 339 340 <legal all> 341 */ 342 343 #define TX_FES_SETUP_STATIC_2_PWR_MODE_STATUS_OFFSET 0x0000000000000000 344 #define TX_FES_SETUP_STATIC_2_PWR_MODE_STATUS_LSB 43 345 #define TX_FES_SETUP_STATIC_2_PWR_MODE_STATUS_MSB 43 346 #define TX_FES_SETUP_STATIC_2_PWR_MODE_STATUS_MASK 0x0000080000000000 347 348 349 /* Description OBSS_SRG_OPPORT_TRANSMIT_STATUS 350 351 0: Transmit based on SRG OBSS_PD opportunity initiated1: 352 Transmit based on non-SRG OBSS_PD opportunity initiated 353 <legal all> 354 */ 355 356 #define TX_FES_SETUP_OBSS_SRG_OPPORT_TRANSMIT_STATUS_OFFSET 0x0000000000000000 357 #define TX_FES_SETUP_OBSS_SRG_OPPORT_TRANSMIT_STATUS_LSB 44 358 #define TX_FES_SETUP_OBSS_SRG_OPPORT_TRANSMIT_STATUS_MSB 44 359 #define TX_FES_SETUP_OBSS_SRG_OPPORT_TRANSMIT_STATUS_MASK 0x0000100000000000 360 361 362 /* Description SRP_BASED_TRANSMIT_STATUS 363 364 0: non-SRP based transmit initiated1: SRP based transmit 365 initiated 366 <legal all> 367 */ 368 369 #define TX_FES_SETUP_SRP_BASED_TRANSMIT_STATUS_OFFSET 0x0000000000000000 370 #define TX_FES_SETUP_SRP_BASED_TRANSMIT_STATUS_LSB 45 371 #define TX_FES_SETUP_SRP_BASED_TRANSMIT_STATUS_MSB 45 372 #define TX_FES_SETUP_SRP_BASED_TRANSMIT_STATUS_MASK 0x0000200000000000 373 374 375 /* Description OBSS_PD_BASED_TRANSMIT_STATUS 376 377 0: non-OBSS_PD based transmit initiated1: obss_pd based 378 transmit initiated 379 <legal all> 380 */ 381 382 #define TX_FES_SETUP_OBSS_PD_BASED_TRANSMIT_STATUS_OFFSET 0x0000000000000000 383 #define TX_FES_SETUP_OBSS_PD_BASED_TRANSMIT_STATUS_LSB 46 384 #define TX_FES_SETUP_OBSS_PD_BASED_TRANSMIT_STATUS_MSB 46 385 #define TX_FES_SETUP_OBSS_PD_BASED_TRANSMIT_STATUS_MASK 0x0000400000000000 386 387 388 #define TX_FES_SETUP_PUNCTURE_FROM_ALL_ALLOWED_MODES_OFFSET 0x0000000000000000 389 #define TX_FES_SETUP_PUNCTURE_FROM_ALL_ALLOWED_MODES_LSB 47 390 #define TX_FES_SETUP_PUNCTURE_FROM_ALL_ALLOWED_MODES_MSB 47 391 #define TX_FES_SETUP_PUNCTURE_FROM_ALL_ALLOWED_MODES_MASK 0x0000800000000000 392 393 394 /* Description SCHEDULE_CMD_RING_ID 395 396 Consumer: PDG/TXDMA/TXOLE/TXCRYPTO/TXPCU 397 Producer: SCH 398 399 This field is overwritten by the scheduler module and its 400 value is based on the scheduler ring where the command 401 is initiated. 402 403 The schedule command ring that originated this transmission 404 405 <enum 0 sch_cmd_ring_number0> 406 <enum 1 sch_cmd_ring_number1> 407 <enum 2 sch_cmd_ring_number2> 408 <enum 3 sch_cmd_ring_number3> 409 <enum 4 sch_cmd_ring_number4> 410 <enum 5 sch_cmd_ring_number5> 411 <enum 6 sch_cmd_ring_number6> 412 <enum 7 sch_cmd_ring_number7> 413 <enum 8 sch_cmd_ring_number8> 414 <enum 9 sch_cmd_ring_number9> 415 <enum 10 sch_cmd_ring_number10> 416 <enum 11 sch_cmd_ring_number11> 417 <enum 12 sch_cmd_ring_number12> 418 <enum 13 sch_cmd_ring_number13> 419 <enum 14 sch_cmd_ring_number14> 420 <enum 15 sch_cmd_ring_number15> 421 <enum 16 sch_cmd_ring_number16> 422 <enum 17 sch_cmd_ring_number17> 423 <enum 18 sch_cmd_ring_number18> 424 <enum 19 sch_cmd_ring_number19> 425 <enum 20 sch_cmd_ring_number20> 426 427 <legal 0-20> 428 */ 429 430 #define TX_FES_SETUP_SCHEDULE_CMD_RING_ID_OFFSET 0x0000000000000000 431 #define TX_FES_SETUP_SCHEDULE_CMD_RING_ID_LSB 48 432 #define TX_FES_SETUP_SCHEDULE_CMD_RING_ID_MSB 52 433 #define TX_FES_SETUP_SCHEDULE_CMD_RING_ID_MASK 0x001f000000000000 434 435 436 /* Description FES_CONTROL_MODE 437 438 Consumer: PDG/TXDMA/TXOLE/TXCRYPTO/TXPCU 439 Producer: SCH 440 441 This field is overwritten by the scheduler module and it's 442 value is coming from the "FES_control_mode" field in the 443 Scheduler command. 444 445 <enum 0 SW_transmit_mode> No HW generated TLVs 446 <enum 1 PDG_transmit_mode> PDG is activated to generate 447 TLVs 448 449 Note: Final Bandwidth selection is always performed by TX 450 PCU. 451 <legal 0-1> 452 */ 453 454 #define TX_FES_SETUP_FES_CONTROL_MODE_OFFSET 0x0000000000000000 455 #define TX_FES_SETUP_FES_CONTROL_MODE_LSB 53 456 #define TX_FES_SETUP_FES_CONTROL_MODE_MSB 54 457 #define TX_FES_SETUP_FES_CONTROL_MODE_MASK 0x0060000000000000 458 459 460 /* Description NUMBER_OF_USERS 461 462 Consumer: PDG/TXDMA/TXOLE/TXCRYPTO/TXPCU 463 Producer: SCH 464 465 The number of users in this transmission. Can be MU-MIMO 466 or OFDMA in case the number is > 1 467 <legal 1-63> 468 */ 469 470 #define TX_FES_SETUP_NUMBER_OF_USERS_OFFSET 0x0000000000000000 471 #define TX_FES_SETUP_NUMBER_OF_USERS_LSB 55 472 #define TX_FES_SETUP_NUMBER_OF_USERS_MSB 60 473 #define TX_FES_SETUP_NUMBER_OF_USERS_MASK 0x1f80000000000000 474 475 476 /* Description MU_TYPE 477 478 In case the Number_of_users > 1, the transmission could 479 be MU or OFDMA. 480 This field indicates which one it is. 481 482 0: MU-MIMO 483 1: OFDMA 484 485 486 In case the number_of_user == 1, and PDG_FES_SETUP.mu_su_transmission 487 is set, this field indicates:0: SU transmitted in MU MIMO 488 format in compressed mode;1: SU transmitted in MU-OFDMA 489 format in uncompressed mode 490 491 Note: Within OFDMA classification, it could be that within 492 one or more RUs there will be MIMO transmission...This 493 is still considered as an 'OFDMA' class of MU transmission. 494 495 496 <legal all> 497 */ 498 499 #define TX_FES_SETUP_MU_TYPE_OFFSET 0x0000000000000000 500 #define TX_FES_SETUP_MU_TYPE_LSB 61 501 #define TX_FES_SETUP_MU_TYPE_MSB 61 502 #define TX_FES_SETUP_MU_TYPE_MASK 0x2000000000000000 503 504 505 /* Description OFDMA_TRIGGERED_RESPONSE 506 507 Consumer: TXPCU/PDG 508 Producer: SCH/SW 509 510 SW should always set this bit to 0 511 SCH will always overwrite this field and set it to the appropriate 512 value for the upcoming transmission. 513 514 When set (by SCH), this FES is initiated as a result of 515 receiving an OFDMA transmit trigger. PDG already has received 516 all transmit info from RXPCU. PDG can ignore most of the 517 transmit initialization info. 518 519 <legal all> 520 */ 521 522 #define TX_FES_SETUP_OFDMA_TRIGGERED_RESPONSE_OFFSET 0x0000000000000000 523 #define TX_FES_SETUP_OFDMA_TRIGGERED_RESPONSE_LSB 62 524 #define TX_FES_SETUP_OFDMA_TRIGGERED_RESPONSE_MSB 62 525 #define TX_FES_SETUP_OFDMA_TRIGGERED_RESPONSE_MASK 0x4000000000000000 526 527 528 /* Description RESPONSE_TO_RESPONSE_CMD 529 530 When set, this scheduler command contains the transmission 531 control for the response_to_response transmission 532 <legal all> 533 */ 534 535 #define TX_FES_SETUP_RESPONSE_TO_RESPONSE_CMD_OFFSET 0x0000000000000000 536 #define TX_FES_SETUP_RESPONSE_TO_RESPONSE_CMD_LSB 63 537 #define TX_FES_SETUP_RESPONSE_TO_RESPONSE_CMD_MSB 63 538 #define TX_FES_SETUP_RESPONSE_TO_RESPONSE_CMD_MASK 0x8000000000000000 539 540 541 /* Description SCHEDULE_TRY 542 543 Consumer: TXPCU 544 Producer: SCH 545 546 This field is overwritten by the scheduler module and it's 547 value is coming from an internal counter in the scheduler 548 that keeps track of how many times a scheduling command 549 has been tried. 550 551 This count indicates how many times the FES did not successfully 552 complete as the ACK/BA frame did not get received. 553 <legal all> 554 */ 555 556 #define TX_FES_SETUP_SCHEDULE_TRY_OFFSET 0x0000000000000008 557 #define TX_FES_SETUP_SCHEDULE_TRY_LSB 0 558 #define TX_FES_SETUP_SCHEDULE_TRY_MSB 3 559 #define TX_FES_SETUP_SCHEDULE_TRY_MASK 0x000000000000000f 560 561 562 /* Description NDP_FRAME 563 564 Consumer: PDG/TXPCU 565 Producer: SCH 566 567 When set, the scheduling command contains an NDP frame. 568 This can only be done using the SW transmit mode. 569 570 <enum 0 no_ndp>No NDP transmission 571 <enum 1 beamforming_ndp>Beamforming NDP 572 <enum 2 he_ranging_ndp>11az NDP (HE Ranging NDP) 573 <enum 3 he_feedback_ndp>Short TB (HE Feedback NDP) 574 */ 575 576 #define TX_FES_SETUP_NDP_FRAME_OFFSET 0x0000000000000008 577 #define TX_FES_SETUP_NDP_FRAME_LSB 4 578 #define TX_FES_SETUP_NDP_FRAME_MSB 5 579 #define TX_FES_SETUP_NDP_FRAME_MASK 0x0000000000000030 580 581 582 /* Description TXBF 583 584 Consumer: PDG/TXPCU 585 Producer: SCH 586 587 If set, this bit indicates that this is a TX beamformed 588 SU transaction or MU transaction 589 590 591 In case of a beamformed transmission, note that in the PCU_PPDU_SETUP_INIT 592 TLV, SW can narrow down for which of the BW the beamforming 593 shall take place. For example, SW can decide that BW is 594 only desired for 40MHz BW, but not for 20... 595 If for any of the allowed BW, beamforming is desired, this 596 field should be set, and the 'bf_type' shall be properly 597 programmed. 598 599 TXPCU controls with bit 'beamforming' in the MACTX_PRE_PHY_DESC 600 if the final actual transmission shall be beamformed. 601 */ 602 603 #define TX_FES_SETUP_TXBF_OFFSET 0x0000000000000008 604 #define TX_FES_SETUP_TXBF_LSB 6 605 #define TX_FES_SETUP_TXBF_MSB 6 606 #define TX_FES_SETUP_TXBF_MASK 0x0000000000000040 607 608 609 /* Description ALLOW_TXOP_EXCEED_IN_1ST_PKT 610 611 Consumer: PDG 612 Producer: SCH 613 614 Field only valid for SU transmissions. 615 616 When set, a single MPDU transmission after RBO is allowed 617 to exceed TXOP. In this setting, this field has priority 618 over the setting of the duration_field_boundary. Reason 619 for this is that if Coex issues on the receiver STA start 620 preventing the transmission of frames on this device, it 621 can lead to a death spiral. With some luck, this frame 622 although maybe too long, might still be received. 623 624 When 0, single MPDU after RBO is not allowed to exceed TXOP. 625 626 <legal all> 627 */ 628 629 #define TX_FES_SETUP_ALLOW_TXOP_EXCEED_IN_1ST_PKT_OFFSET 0x0000000000000008 630 #define TX_FES_SETUP_ALLOW_TXOP_EXCEED_IN_1ST_PKT_LSB 7 631 #define TX_FES_SETUP_ALLOW_TXOP_EXCEED_IN_1ST_PKT_MSB 7 632 #define TX_FES_SETUP_ALLOW_TXOP_EXCEED_IN_1ST_PKT_MASK 0x0000000000000080 633 634 635 /* Description IGNORE_BW_AVAILABLE 636 637 Consumer: TXPCU 638 Producer: SCH 639 640 If set, TXPCU ignores 'BW available signals' from the scheduler 641 and transmit using the single BW that SW has programmed 642 the transmission to go out in. This bit should be set for 643 SIFS response frame to PS-Poll/uAPSD/QBoost and note that 644 for this mode, SW is only allowed to program a single transmit 645 BW. 646 Also note that this bit can not be set in combination with 647 preamble puncturing. 648 <legal all> 649 */ 650 651 #define TX_FES_SETUP_IGNORE_BW_AVAILABLE_OFFSET 0x0000000000000008 652 #define TX_FES_SETUP_IGNORE_BW_AVAILABLE_LSB 8 653 #define TX_FES_SETUP_IGNORE_BW_AVAILABLE_MSB 8 654 #define TX_FES_SETUP_IGNORE_BW_AVAILABLE_MASK 0x0000000000000100 655 656 657 /* Description IGNORE_TBTT 658 659 Consumer: PDG 660 Producer: SCH 661 662 If set, PDG ignores remaining TBTTs in PPDU time calculation. 663 664 <legal all> 665 */ 666 667 #define TX_FES_SETUP_IGNORE_TBTT_OFFSET 0x0000000000000008 668 #define TX_FES_SETUP_IGNORE_TBTT_LSB 9 669 #define TX_FES_SETUP_IGNORE_TBTT_MSB 9 670 #define TX_FES_SETUP_IGNORE_TBTT_MASK 0x0000000000000200 671 672 673 /* Description STATIC_BANDWIDTH 674 675 Consumer: PDG/TXPCU 676 Producer: SCH 677 678 Field is reserved when use_static_bw is clear. 679 680 <enum 0 20_mhz>20 Mhz BW 681 <enum 1 40_mhz>40 Mhz BW 682 <enum 2 80_mhz>80 Mhz BW 683 <enum 3 160_mhz>160 Mhz BW 684 <enum 4 320_mhz>320 Mhz BW 685 <enum 5 240_mhz>240 Mhz BW 686 */ 687 688 #define TX_FES_SETUP_STATIC_BANDWIDTH_OFFSET 0x0000000000000008 689 #define TX_FES_SETUP_STATIC_BANDWIDTH_LSB 10 690 #define TX_FES_SETUP_STATIC_BANDWIDTH_MSB 12 691 #define TX_FES_SETUP_STATIC_BANDWIDTH_MASK 0x0000000000001c00 692 693 694 /* Description SET_TXOP_DURATION_ALL_ONES 695 696 Consumer: PDG 697 Producer: SCH 698 699 When set, SW embedded a PS_POLL frame in this transmission 700 or the frame in this transmission is for a BSS with BSS 701 Color disabled, e.g. due to BSS color collision. 702 PDG sets the TXOP_DURATION of the transmit PPDU to all 1s. 703 704 <legal all> 705 */ 706 707 #define TX_FES_SETUP_SET_TXOP_DURATION_ALL_ONES_OFFSET 0x0000000000000008 708 #define TX_FES_SETUP_SET_TXOP_DURATION_ALL_ONES_LSB 13 709 #define TX_FES_SETUP_SET_TXOP_DURATION_ALL_ONES_MSB 13 710 #define TX_FES_SETUP_SET_TXOP_DURATION_ALL_ONES_MASK 0x0000000000002000 711 712 713 /* Description TRANSMISSION_CONTAINS_MU_RTS 714 715 Consumer: PDG 716 Producer: SCH 717 718 When set, SW embedded a MU-RTS trigger frame in this transmission. 719 720 TXPCU will have to do something special for this with the 721 CTS response timeout (whose value comes from a MU-CTS timeout 722 register) 723 724 <legal all> 725 */ 726 727 #define TX_FES_SETUP_TRANSMISSION_CONTAINS_MU_RTS_OFFSET 0x0000000000000008 728 #define TX_FES_SETUP_TRANSMISSION_CONTAINS_MU_RTS_LSB 14 729 #define TX_FES_SETUP_TRANSMISSION_CONTAINS_MU_RTS_MSB 14 730 #define TX_FES_SETUP_TRANSMISSION_CONTAINS_MU_RTS_MASK 0x0000000000004000 731 732 733 /* Description BW_RESTRICTED_FRAMES_EMBEDDED 734 735 Consumer: TXPCU 736 Producer: SW 737 738 This bit should be set by SW when the transmission includes 739 bandwidth restricted frames. As a result of this bit being 740 set, TXPCU will hold of indicating that buffer space is 741 available to TXDMA till the BW decision is done. This allows 742 TXPCU to drop the BW restricted frames at SFM input. 743 744 <legal all> 745 */ 746 747 #define TX_FES_SETUP_BW_RESTRICTED_FRAMES_EMBEDDED_OFFSET 0x0000000000000008 748 #define TX_FES_SETUP_BW_RESTRICTED_FRAMES_EMBEDDED_LSB 15 749 #define TX_FES_SETUP_BW_RESTRICTED_FRAMES_EMBEDDED_MSB 15 750 #define TX_FES_SETUP_BW_RESTRICTED_FRAMES_EMBEDDED_MASK 0x0000000000008000 751 752 753 /* Description AST_INDEX 754 755 Consumer: RXPCU 756 Producer: SCH 757 758 Used for implicit BF sounding capture on receive Ack/BA. 759 The RXPCU needs to tag the receive sounding with ast_index 760 so FW will know which STA is associated with Ack/BA sounding. 761 762 763 <legal all> 764 */ 765 766 #define TX_FES_SETUP_AST_INDEX_OFFSET 0x0000000000000008 767 #define TX_FES_SETUP_AST_INDEX_LSB 16 768 #define TX_FES_SETUP_AST_INDEX_MSB 31 769 #define TX_FES_SETUP_AST_INDEX_MASK 0x00000000ffff0000 770 771 772 /* Description CV_ID 773 774 Consumer: TXPCU 775 Producer: SCH 776 777 This field is only valid when expect_cbf is set. 778 779 A unique ID corresponding to the CV data expected from the 780 CBF frame. 781 782 TXPCU copies this field over to the TX_FES_STATUS TLV 783 <legal all> 784 */ 785 786 #define TX_FES_SETUP_CV_ID_OFFSET 0x0000000000000008 787 #define TX_FES_SETUP_CV_ID_LSB 32 788 #define TX_FES_SETUP_CV_ID_MSB 39 789 #define TX_FES_SETUP_CV_ID_MASK 0x000000ff00000000 790 791 792 /* Description TRIGGER_RESP_TXPDU_PPDU_BOUNDARY 793 794 This field indicates to TXPCU how far into the 11ax trigger 795 response transmission, TXPCU should still accept Trigger 796 response related configuration info from the SCHEDULER (and 797 PDG) to be processed. 798 799 The field indicates a percentage of the total byte count 800 to be given to the PHY, up to which point TXPCU will still 801 accept all the setup related TLVS to arrive. After that, 802 TXPCU will ignore any remaining setup TLVs to come in and 803 not initiate any MPDU based transfers to the PHY anymore. 804 This is to help avoid corner cases. 805 If any setup TLVs did arrive after this point, TXPCU will 806 keep on continuing giving NULL data to the PHY, but once 807 PHYTX_PKT_END is received, TXPCU shall issue a FLUSH request 808 to the SCH, with flush code: TXPCU_TRIG_RESPONSE_INFO_TOO_LATE 809 810 TXPCU should not abort the transmission halfway, as that 811 can cause problems for the MU UL receiver... 812 813 <enum 0 txpcu_trig_response_boundary_75> TXPCU will not 814 initiate SCH based MPDU transfers after 75% of the PPDU 815 octed count has already been given to the PHY. 816 817 <enum 1 txpcu_trig_response_boundary_50> TXPCU will not 818 initiate SCH based MPDU transfers after 50% of the PPDU 819 octed count has already been given to the PHY. 820 821 <enum 2 txpcu_trig_response_boundary_25> TXPCU will not 822 initiate SCH based MPDU transfers after 75% of the PPDU 823 octed count has already been given to the PHY. 824 825 Note that if TXPCU receives a TX_FES_SETUP with "11ax trigger 826 response transmission" set, and it had already finished 827 sending a response , it should generate a flush with code: 828 TXPCU_TRIG_RESPONSE_MODE_CORRUPTION 829 830 <legal 0-2> 831 */ 832 833 #define TX_FES_SETUP_TRIGGER_RESP_TXPDU_PPDU_BOUNDARY_OFFSET 0x0000000000000008 834 #define TX_FES_SETUP_TRIGGER_RESP_TXPDU_PPDU_BOUNDARY_LSB 40 835 #define TX_FES_SETUP_TRIGGER_RESP_TXPDU_PPDU_BOUNDARY_MSB 41 836 #define TX_FES_SETUP_TRIGGER_RESP_TXPDU_PPDU_BOUNDARY_MASK 0x0000030000000000 837 838 839 /* Description RXPCU_SETUP_COMPLETE_PRESENT 840 841 To notify current TXFES use new mode and delay "RXPCU_*_SETUP" 842 for HWSCH/TXPCU/RXPCU module 843 <legal all> 844 */ 845 846 #define TX_FES_SETUP_RXPCU_SETUP_COMPLETE_PRESENT_OFFSET 0x0000000000000008 847 #define TX_FES_SETUP_RXPCU_SETUP_COMPLETE_PRESENT_LSB 42 848 #define TX_FES_SETUP_RXPCU_SETUP_COMPLETE_PRESENT_MSB 42 849 #define TX_FES_SETUP_RXPCU_SETUP_COMPLETE_PRESENT_MASK 0x0000040000000000 850 851 852 /* Description RBO_MUST_HAVE_DATA_USER_LIMIT 853 854 Consumer: PDG 855 Producer: SW 856 857 Field only valid when Ofdma_triggered_response is NOT set 858 (=> implies transmission started due to backoff expiration) 859 860 861 Field only valid for SU and "MU_SU" transmissions. 862 863 The requirements for what to transmit depend on what the 864 reason is that this transmission started. If it is 11ax 865 trigger based, the trigger frame will specify all the constrains 866 like max TID count, prefered AC, etc. 867 However if this command starts executing due to backoff 868 expiration, the requirements could be different from those 869 that might have come from the trigger frame. 870 This field specifies what the constaints are when the transmission 871 is Backoff initiated. 872 873 When set to 0, this feature is disabled 874 When set to 1, user 0 must have data otherwise PDG should 875 flush the transmission 876 When set to 2, user 0 AND/OR user 1 must have data otherwise 877 PDG should flush the transmission 878 When set to 3, user 0 AND/OR user 1 AND/OR user 2 must have 879 data otherwise PDG should flush the transmission 880 ... 881 <legal all> 882 */ 883 884 #define TX_FES_SETUP_RBO_MUST_HAVE_DATA_USER_LIMIT_OFFSET 0x0000000000000008 885 #define TX_FES_SETUP_RBO_MUST_HAVE_DATA_USER_LIMIT_LSB 43 886 #define TX_FES_SETUP_RBO_MUST_HAVE_DATA_USER_LIMIT_MSB 46 887 #define TX_FES_SETUP_RBO_MUST_HAVE_DATA_USER_LIMIT_MASK 0x0000780000000000 888 889 890 /* Description MU_NDP 891 892 Field only valid when ndp_frame is set. 893 894 If set indicates that this packet is an NDP used for MU 895 channel estimation. This bit will be used by the TPC to 896 signal that the analog gain settings can be updated. The 897 analog gain settings will not change for subsequent MU 898 data packets. 899 <legal all> 900 */ 901 902 #define TX_FES_SETUP_MU_NDP_OFFSET 0x0000000000000008 903 #define TX_FES_SETUP_MU_NDP_LSB 47 904 #define TX_FES_SETUP_MU_NDP_MSB 47 905 #define TX_FES_SETUP_MU_NDP_MASK 0x0000800000000000 906 907 908 /* Description BF_TYPE 909 910 Consumer: PDG/TXPCU 911 Producer: SCH 912 913 Field is ONLY valid when 'txbf' is set... 914 915 Defines the type of beamforming that is required using this 916 transmission. 917 Note that in the PCU_PPDU_SETUP_INIT TLV, SW can narrow 918 down for which BW the beamforming shall take place. For 919 example, SW can decide that BW is only desired for 40MHz 920 BW, but not for 20... 921 If for any of the allowed BW, beamforming is desired, this 922 field should indicate which type of BF. 923 924 <enum 0 NO_BF> 925 <enum 1 LEGACY_BF> 926 <enum 2 SU_BF> 927 <enum 3 MU_BF> 928 <legal all> 929 */ 930 931 #define TX_FES_SETUP_BF_TYPE_OFFSET 0x0000000000000008 932 #define TX_FES_SETUP_BF_TYPE_LSB 48 933 #define TX_FES_SETUP_BF_TYPE_MSB 49 934 #define TX_FES_SETUP_BF_TYPE_MASK 0x0003000000000000 935 936 937 /* Description CBF_NC_INDEX_MASK 938 939 Consumer: TXPCU 940 Producer: SCH 941 942 When set, TXPCU shall confirm that the received cbf_nc_index 943 is equal to the expected one, indicated by field: cbf_nc_index 944 945 946 This field is only allowed to be set in case of a single 947 SU CBF reception. 948 949 <legal all> 950 */ 951 952 #define TX_FES_SETUP_CBF_NC_INDEX_MASK_OFFSET 0x0000000000000008 953 #define TX_FES_SETUP_CBF_NC_INDEX_MASK_LSB 50 954 #define TX_FES_SETUP_CBF_NC_INDEX_MASK_MSB 50 955 #define TX_FES_SETUP_CBF_NC_INDEX_MASK_MASK 0x0004000000000000 956 957 958 /* Description CBF_NC_INDEX 959 960 Consumer: TXPCU 961 Producer: SCH 962 963 Field only valid when cbf_nc_index_mask is set 964 965 Expected Nc_index of received CBF frame after sending NDP 966 or BR-Poll. 967 968 <enum 0 nc_1> 969 <enum 1 nc_2> 970 <enum 2 nc_3> 971 <enum 3 nc_4> 972 <enum 4 nc_5> 973 <enum 5 nc_6> 974 <enum 6 nc_7> 975 <enum 7 nc_8> 976 <legal 0-7> 977 */ 978 979 #define TX_FES_SETUP_CBF_NC_INDEX_OFFSET 0x0000000000000008 980 #define TX_FES_SETUP_CBF_NC_INDEX_LSB 51 981 #define TX_FES_SETUP_CBF_NC_INDEX_MSB 53 982 #define TX_FES_SETUP_CBF_NC_INDEX_MASK 0x0038000000000000 983 984 985 /* Description CBF_NR_INDEX_MASK 986 987 Consumer: TXPCU 988 Producer: SCH 989 990 When set, TXPCU shall confirm that the received cbf_nr_index 991 is equal to the expected one, indicated in the field: cbf_nr_index 992 993 994 This field is only allowed to be set in case of a single 995 SU CBF reception. 996 <legal all> 997 */ 998 999 #define TX_FES_SETUP_CBF_NR_INDEX_MASK_OFFSET 0x0000000000000008 1000 #define TX_FES_SETUP_CBF_NR_INDEX_MASK_LSB 54 1001 #define TX_FES_SETUP_CBF_NR_INDEX_MASK_MSB 54 1002 #define TX_FES_SETUP_CBF_NR_INDEX_MASK_MASK 0x0040000000000000 1003 1004 1005 /* Description CBF_NR_INDEX 1006 1007 Expected Nr_index of received CBF frame after sending NDP 1008 or BR-Poll. This field is compared only if cbf_nr_index_mask 1009 is set to 1. 1010 <enum 0 nr_1> 1011 <enum 1 nr_2> 1012 <enum 2 nr_3> 1013 <enum 3 nr_4> 1014 <enum 4 nr_5> 1015 <enum 5 nr_6> 1016 <enum 6 nr_7> 1017 <enum 7 nr_8> 1018 <legal 0-7> 1019 */ 1020 1021 #define TX_FES_SETUP_CBF_NR_INDEX_OFFSET 0x0000000000000008 1022 #define TX_FES_SETUP_CBF_NR_INDEX_LSB 55 1023 #define TX_FES_SETUP_CBF_NR_INDEX_MSB 57 1024 #define TX_FES_SETUP_CBF_NR_INDEX_MASK 0x0380000000000000 1025 1026 1027 /* Description SECURE_RANGING_ISTA 1028 1029 Consumer: Crypto 1030 Producer: SW 1031 1032 If set to 1, Crypto will use the 'TX_PEER_ENTRY' for encryption 1033 but not for the 'TX_DATA' from TXOLE interface but will 1034 wait for 'LMR_{MPDU_START, DATA, MPDU_END}' TLVs from TXPCU 1035 to encrypt the ISTA2RSTA LMR. 1036 1037 If set to 0, Crypto will encrypt 'TX_DATA' as for any non-.11az-ranging 1038 frame. 1039 */ 1040 1041 #define TX_FES_SETUP_SECURE_RANGING_ISTA_OFFSET 0x0000000000000008 1042 #define TX_FES_SETUP_SECURE_RANGING_ISTA_LSB 58 1043 #define TX_FES_SETUP_SECURE_RANGING_ISTA_MSB 58 1044 #define TX_FES_SETUP_SECURE_RANGING_ISTA_MASK 0x0400000000000000 1045 1046 1047 /* Description NDPA 1048 1049 When set, this packet is an NDP announcement. 1050 */ 1051 1052 #define TX_FES_SETUP_NDPA_OFFSET 0x0000000000000008 1053 #define TX_FES_SETUP_NDPA_LSB 59 1054 #define TX_FES_SETUP_NDPA_MSB 59 1055 #define TX_FES_SETUP_NDPA_MASK 0x0800000000000000 1056 1057 1058 /* Description WAIT_SIFS 1059 1060 Consumer: TXPCU 1061 Producer: SCH 1062 1063 This field is passed over to the tx_phy_desc by the PDG 1064 module. If set, the AMPI will hold this tx_phy_desc TLV 1065 from the TX PCU until SIFS has elapsed and then forward 1066 the tx_phy_desc to the PHY. The PHY should ignore this 1067 bit. This bit is used to make sure that transmit SIFS response 1068 to a receive frame is cycle accurate and consistent to 1069 enable accurate RTT measurement. 1070 1071 <enum 0 NO_SIFS_TIMING> Transmission shall start with the 1072 normal delay in PHY after receiving this notification 1073 <enum 1 SIFS_TIMING_DESIRED> Transmission shall be made 1074 at the SIFS boundary. If shall never start before SIFS boundary, 1075 but if it a little later, it is not ideal and should be 1076 flagged, but transmission shall not be aborted. 1077 <enum 2 SIFS_TIMING_MANDATED> Transmission shall be made 1078 at exactly SIFS boundary. If this notification is received 1079 by the PHY after SIFS boundary already passed, the PHY 1080 shall abort the transmission 1081 <legal 0-2> 1082 */ 1083 1084 #define TX_FES_SETUP_WAIT_SIFS_OFFSET 0x0000000000000008 1085 #define TX_FES_SETUP_WAIT_SIFS_LSB 60 1086 #define TX_FES_SETUP_WAIT_SIFS_MSB 61 1087 #define TX_FES_SETUP_WAIT_SIFS_MASK 0x3000000000000000 1088 1089 1090 /* Description CBF_FEEDBACK_TYPE_MASK 1091 1092 Consumer: TXPCU 1093 Producer: SCH 1094 1095 When set, TXPCU shall confirm that the cbf_feedback_type 1096 is equal to the expected one, indicated in the field: cbf_feedback_type 1097 1098 1099 This field is only allowed to be set in case of a single 1100 SU CBF reception. 1101 <legal all> 1102 */ 1103 1104 #define TX_FES_SETUP_CBF_FEEDBACK_TYPE_MASK_OFFSET 0x0000000000000008 1105 #define TX_FES_SETUP_CBF_FEEDBACK_TYPE_MASK_LSB 62 1106 #define TX_FES_SETUP_CBF_FEEDBACK_TYPE_MASK_MSB 62 1107 #define TX_FES_SETUP_CBF_FEEDBACK_TYPE_MASK_MASK 0x4000000000000000 1108 1109 1110 /* Description CBF_FEEDBACK_TYPE 1111 1112 Consumer: TXPCU 1113 Producer: SCH 1114 1115 Expected feedback type of received CBF frame after sending 1116 NDP or BR-Poll. This field is compared only if cbf_feedback_type_mask 1117 is set to 1. 1118 <enum 0 SU> 1119 <enum 1 MU> 1120 <legal all> 1121 */ 1122 1123 #define TX_FES_SETUP_CBF_FEEDBACK_TYPE_OFFSET 0x0000000000000008 1124 #define TX_FES_SETUP_CBF_FEEDBACK_TYPE_LSB 63 1125 #define TX_FES_SETUP_CBF_FEEDBACK_TYPE_MSB 63 1126 #define TX_FES_SETUP_CBF_FEEDBACK_TYPE_MASK 0x8000000000000000 1127 1128 1129 /* Description CBF_SOUNDING_TOKEN 1130 1131 Consumer: TXPCU 1132 Producer: SCH 1133 1134 Expected sounding token of received CBF frame after sending 1135 NDP or BR-Poll. This field is compared only if cbf_sounding_token_mask 1136 is set to 1. 1137 <legal all> 1138 */ 1139 1140 #define TX_FES_SETUP_CBF_SOUNDING_TOKEN_OFFSET 0x0000000000000010 1141 #define TX_FES_SETUP_CBF_SOUNDING_TOKEN_LSB 0 1142 #define TX_FES_SETUP_CBF_SOUNDING_TOKEN_MSB 5 1143 #define TX_FES_SETUP_CBF_SOUNDING_TOKEN_MASK 0x000000000000003f 1144 1145 1146 /* Description CBF_SOUNDING_TOKEN_MASK 1147 1148 Consumer: TXPCU 1149 Producer: SCH 1150 1151 When set, TXPCU shall confirm that the cbf_sounding_token 1152 is equal to the expected one, indicated in the field: cbf_sounding_token 1153 1154 1155 This field is only allowed to be set in case of a single 1156 SU CBF reception. 1157 <legal all> 1158 */ 1159 1160 #define TX_FES_SETUP_CBF_SOUNDING_TOKEN_MASK_OFFSET 0x0000000000000010 1161 #define TX_FES_SETUP_CBF_SOUNDING_TOKEN_MASK_LSB 6 1162 #define TX_FES_SETUP_CBF_SOUNDING_TOKEN_MASK_MSB 6 1163 #define TX_FES_SETUP_CBF_SOUNDING_TOKEN_MASK_MASK 0x0000000000000040 1164 1165 1166 /* Description CBF_BW_MASK 1167 1168 Consumer: TXPCU 1169 Producer: SCH 1170 1171 When set, TXPCU shall confirm that the cbf_bw_mask is equal 1172 to the expected one, indicated in the field: cbf_bw 1173 1174 This field is only allowed to be set in case of a single 1175 SU CBF reception. 1176 <legal all> 1177 */ 1178 1179 #define TX_FES_SETUP_CBF_BW_MASK_OFFSET 0x0000000000000010 1180 #define TX_FES_SETUP_CBF_BW_MASK_LSB 7 1181 #define TX_FES_SETUP_CBF_BW_MASK_MSB 7 1182 #define TX_FES_SETUP_CBF_BW_MASK_MASK 0x0000000000000080 1183 1184 1185 /* Description CBF_BW 1186 1187 Consumer: TXPCU 1188 Producer: SCH 1189 1190 Expected channel width of received CBF frame after sending 1191 NDP or BR-Poll. This field is compared only if cbf_bw_mask 1192 is set to 1. 1193 1194 <enum 0 20_mhz>20 Mhz BW 1195 <enum 1 40_mhz>40 Mhz BW 1196 <enum 2 80_mhz>80 Mhz BW 1197 <enum 3 160_mhz>160 Mhz BW 1198 <enum 4 320_mhz>320 Mhz BW 1199 <enum 5 240_mhz>240 Mhz BW 1200 */ 1201 1202 #define TX_FES_SETUP_CBF_BW_OFFSET 0x0000000000000010 1203 #define TX_FES_SETUP_CBF_BW_LSB 8 1204 #define TX_FES_SETUP_CBF_BW_MSB 10 1205 #define TX_FES_SETUP_CBF_BW_MASK 0x0000000000000700 1206 1207 1208 /* Description USE_STATIC_BW 1209 1210 Consumer: TXPCU 1211 Producer: SCH 1212 1213 Part of TX_BF_PARAMS: This field is used to indicate to 1214 the SVD that the b/w that will be defined in the TX_PHY_DESC 1215 for the upcoming TXBF packet will be the same as the static 1216 bandwidth, i.e. the bandwidth that was in operation during 1217 sounding for the clients in question 1218 <legal all> 1219 */ 1220 1221 #define TX_FES_SETUP_USE_STATIC_BW_OFFSET 0x0000000000000010 1222 #define TX_FES_SETUP_USE_STATIC_BW_LSB 11 1223 #define TX_FES_SETUP_USE_STATIC_BW_MSB 11 1224 #define TX_FES_SETUP_USE_STATIC_BW_MASK 0x0000000000000800 1225 1226 1227 /* Description COEX_NACK_COUNT 1228 1229 Consumer: TXPCU 1230 Producer: SCH 1231 1232 The number of times PDG informed the SCHeduler module that 1233 for this scheduling command, the WLAN transmission can 1234 not be initialized due to getting a NACK response from the 1235 Coex engine, or PDG not being able to fit a transmission 1236 within the timing constraints given by Coex. 1237 1238 Note that SCH will (re)set this count to 0 at the start 1239 of reading a new SCH command. 1240 This count is maintained on a per ring basis by the SCHeduler 1241 1242 1243 <legal all> 1244 */ 1245 1246 #define TX_FES_SETUP_COEX_NACK_COUNT_OFFSET 0x0000000000000010 1247 #define TX_FES_SETUP_COEX_NACK_COUNT_LSB 12 1248 #define TX_FES_SETUP_COEX_NACK_COUNT_MSB 16 1249 #define TX_FES_SETUP_COEX_NACK_COUNT_MASK 0x000000000001f000 1250 1251 1252 /* Description SCH_TX_BURST_ONGOING 1253 1254 Consumer: PDG/TXPCU 1255 Producer: SCH 1256 1257 This field is overwritten by the scheduler module and it's 1258 value is coming from the" sifs_burst_continuation" field 1259 in the Scheduler command. 1260 1261 0: No action 1262 1: The next scheduling command needs to start at SIFS time 1263 after finishing the frame transmissions in this command. 1264 This allows for SIFS based bursting 1265 <legal all> 1266 */ 1267 1268 #define TX_FES_SETUP_SCH_TX_BURST_ONGOING_OFFSET 0x0000000000000010 1269 #define TX_FES_SETUP_SCH_TX_BURST_ONGOING_LSB 17 1270 #define TX_FES_SETUP_SCH_TX_BURST_ONGOING_MSB 17 1271 #define TX_FES_SETUP_SCH_TX_BURST_ONGOING_MASK 0x0000000000020000 1272 1273 1274 /* Description GEN_TQM_UPDATE_MPDU_COUNT_TLV 1275 1276 Consumer: TXPCU 1277 Producer: SW 1278 1279 NOTE: When PDG is configured to do transmissions in SW mode, 1280 this bit shall NEVER be set. 1281 1282 When set, TXPCU shall generate the TQM_UPDATE_TX_MPDU_COUNT 1283 TLV immediately after PPDU transmission has finished (and 1284 before any response frame might have been received) 1285 1286 When set, SW shall also generate the RXPCU_USER_SETUP TLVs 1287 as this is where TXPCU will get the MPDU_queue addresses. 1288 1289 <legal all> 1290 */ 1291 1292 #define TX_FES_SETUP_GEN_TQM_UPDATE_MPDU_COUNT_TLV_OFFSET 0x0000000000000010 1293 #define TX_FES_SETUP_GEN_TQM_UPDATE_MPDU_COUNT_TLV_LSB 18 1294 #define TX_FES_SETUP_GEN_TQM_UPDATE_MPDU_COUNT_TLV_MSB 18 1295 #define TX_FES_SETUP_GEN_TQM_UPDATE_MPDU_COUNT_TLV_MASK 0x0000000000040000 1296 1297 1298 /* Description TRANSMIT_VIF 1299 1300 Consumer: TXOLE 1301 Producer: SW 1302 1303 The VIF for this transmission. Used in MCC mode to control/overwrite 1304 the PM bit settings. Based on this VIF value, TXOLE gets 1305 the pm bit control instructions from the pm_state_overwrite_per_vif 1306 register 1307 1308 <legal all> 1309 */ 1310 1311 #define TX_FES_SETUP_TRANSMIT_VIF_OFFSET 0x0000000000000010 1312 #define TX_FES_SETUP_TRANSMIT_VIF_LSB 19 1313 #define TX_FES_SETUP_TRANSMIT_VIF_MSB 22 1314 #define TX_FES_SETUP_TRANSMIT_VIF_MASK 0x0000000000780000 1315 1316 1317 /* Description OPTIMAL_BW_RETRY_COUNT 1318 1319 Consumer: TXPCU 1320 Producer: SCH 1321 1322 This field is overwritten by the scheduler module and it's 1323 value is coming from an internal counter in the scheduler 1324 that keeps track of how many times this scheduling command 1325 has been flushed by TXPCU as a result of most desired BW 1326 not being available (=> flush code: TXPCU_FLREQ_RETRY_FOR_OPTIMAL_BW) 1327 1328 1329 For the first transmission, this count is always set to 1330 0. 1331 <legal all> 1332 */ 1333 1334 #define TX_FES_SETUP_OPTIMAL_BW_RETRY_COUNT_OFFSET 0x0000000000000010 1335 #define TX_FES_SETUP_OPTIMAL_BW_RETRY_COUNT_LSB 23 1336 #define TX_FES_SETUP_OPTIMAL_BW_RETRY_COUNT_MSB 26 1337 #define TX_FES_SETUP_OPTIMAL_BW_RETRY_COUNT_MASK 0x0000000007800000 1338 1339 1340 /* Description FES_CONTINUATION_RATIO_THRESHOLD 1341 1342 Field evaluated by TXPCU only. 1343 1344 Field can be used in both SU and MU transmissions, but might 1345 be most useful in MU transmissions. 1346 1347 TXPCU keeps track of how many MPDU data words are transmited 1348 as well as how many Null delimiters are transmitted. In 1349 case of an MU and/or multi TID transmission, these two 1350 counters are the aggregates over all the users. 1351 1352 At the end of the FES, TXPCU determines the ratio between 1353 the actual MPDU data words and Null delimiters. If this 1354 ratio is LESS then the ratio indicated here, TXPCU should 1355 indicate "Transmit_data_null_ratio_not_met" in the TX_FES_STATUS_END 1356 1357 1358 <enum 0 No_Data_Null_ratio_requirement> TXPCU does not need 1359 to do any evaluation on the ratio between actual data transmitted 1360 and NULL delimiters inserted. 1361 <enum 1 Data_Null_ratio_16_1> At the end of the FES, TXPCU 1362 shall confirm that the DATA:NULL delimiter ratio was at 1363 least 16:1. If not met, TXPCU should terminate FES. 1364 <enum 2 Data_Null_ratio_8_1> At the end of the FES, TXPCU 1365 shall confirm that the DATA:NULL delimiter ratio was at 1366 least 8:1. If not met, TXPCU should terminate FES. 1367 <enum 3 Data_Null_ratio_4_1> At the end of the FES, TXPCU 1368 shall confirm that the DATA:NULL delimiter ratio was at 1369 least 4:1. If not met, TXPCU should terminate FES. 1370 <enum 4 Data_Null_ratio_2_1> At the end of the FES, TXPCU 1371 shall confirm that the DATA:NULL delimiter ratio was at 1372 least 2:1. If not met, TXPCU should terminate FES. 1373 <enum 5 Data_Null_ratio_1_1> At the end of the FES, TXPCU 1374 shall confirm that the DATA:NULL delimiter ratio was at 1375 least 1:1. If not met, TXPCU should terminate FES. 1376 <enum 6 Data_Null_ratio_1_2> At the end of the FES, TXPCU 1377 shall confirm that the DATA:NULL delimiter ratio was at 1378 least 1:2. If not met, TXPCU should terminate FES. 1379 <enum 7 Data_Null_ratio_1_4> At the end of the FES, TXPCU 1380 shall confirm that the DATA:NULL delimiter ratio was at 1381 least 1:4. If not met, TXPCU should terminate FES. 1382 <enum 8 Data_Null_ratio_1_8> At the end of the FES, TXPCU 1383 shall confirm that the DATA:NULL delimiter ratio was at 1384 least 1:8. If not met, TXPCU should terminate FES. 1385 <enum 9 Data_Null_ratio_1_16> At the end of the FES, TXPCU 1386 shall confirm that the DATA:NULL delimiter ratio was at 1387 least 1:16. If not met, TXPCU should terminate FES. 1388 1389 <legal 0-9> 1390 */ 1391 1392 #define TX_FES_SETUP_FES_CONTINUATION_RATIO_THRESHOLD_OFFSET 0x0000000000000010 1393 #define TX_FES_SETUP_FES_CONTINUATION_RATIO_THRESHOLD_LSB 27 1394 #define TX_FES_SETUP_FES_CONTINUATION_RATIO_THRESHOLD_MSB 31 1395 #define TX_FES_SETUP_FES_CONTINUATION_RATIO_THRESHOLD_MASK 0x00000000f8000000 1396 1397 1398 /* Description TRANSMIT_CCA_BITMAP 1399 1400 The CCA signals that shall be evaluated by TXPCU to determine 1401 the BW/puncture pattern available for transmission. 1402 1403 0: CCA signal not needed. Ignore the CCA setting 1404 1: CCA signals shall be evaluated 1405 1406 Bit [1:0] => cca20_0 related signals 1407 Bit [3:2] => cca20_1 related signals 1408 ... 1409 Bit [31:30] => cca20_15 related signals 1410 1411 Within the 2 bits, the order is always: 1412 Bit0: ED 1413 Bit1: GI 1414 1415 NOTE: HW Sch takes care of MUXing ED1/ED2 with ED0 and MUXing 1416 GI1 with GI0. Hence this field should be set to 0x55555555 1417 for chips not supporting GI-correlation and 0xFFFFFFFF 1418 for chips that support, usually. 1419 <legal all> 1420 */ 1421 1422 #define TX_FES_SETUP_TRANSMIT_CCA_BITMAP_OFFSET 0x0000000000000010 1423 #define TX_FES_SETUP_TRANSMIT_CCA_BITMAP_LSB 32 1424 #define TX_FES_SETUP_TRANSMIT_CCA_BITMAP_MSB 63 1425 #define TX_FES_SETUP_TRANSMIT_CCA_BITMAP_MASK 0xffffffff00000000 1426 1427 1428 /* Description TB_RANGING 1429 1430 Indicates that this frame is generated for a TB ranging 1431 sequence 1432 <legal all> 1433 */ 1434 1435 #define TX_FES_SETUP_TB_RANGING_OFFSET 0x0000000000000018 1436 #define TX_FES_SETUP_TB_RANGING_LSB 0 1437 #define TX_FES_SETUP_TB_RANGING_MSB 0 1438 #define TX_FES_SETUP_TB_RANGING_MASK 0x0000000000000001 1439 1440 1441 /* Description RANGING_TRIGGER_SUBTYPE 1442 1443 Field only valid if TB_Ranging is set 1444 1445 Indicates the Trigger subtype for the current ranging TF 1446 1447 1448 <enum 0 TF_Poll> 1449 <enum 1 TF_Sound> 1450 <enum 2 TF_Secure_Sound> 1451 <enum 3 TF_Report> 1452 1453 <legal 0-3> 1454 */ 1455 1456 #define TX_FES_SETUP_RANGING_TRIGGER_SUBTYPE_OFFSET 0x0000000000000018 1457 #define TX_FES_SETUP_RANGING_TRIGGER_SUBTYPE_LSB 1 1458 #define TX_FES_SETUP_RANGING_TRIGGER_SUBTYPE_MSB 4 1459 #define TX_FES_SETUP_RANGING_TRIGGER_SUBTYPE_MASK 0x000000000000001e 1460 1461 1462 /* Description MIN_CTS2SELF_COUNT 1463 1464 Field only valid when max_cts2self_count is non-zero 1465 1466 This is the minimum number of CTS2SELF frames that PDG should 1467 transmit before the actual data transmission. 1468 */ 1469 1470 #define TX_FES_SETUP_MIN_CTS2SELF_COUNT_OFFSET 0x0000000000000018 1471 #define TX_FES_SETUP_MIN_CTS2SELF_COUNT_LSB 5 1472 #define TX_FES_SETUP_MIN_CTS2SELF_COUNT_MSB 8 1473 #define TX_FES_SETUP_MIN_CTS2SELF_COUNT_MASK 0x00000000000001e0 1474 1475 1476 /* Description MAX_CTS2SELF_COUNT 1477 1478 Field only valid when non-zero 1479 1480 This is the maximum number of CTS2SELF frames that PDG is 1481 allowed to transmit before the actual data transmission. 1482 PDG will only use these additional frames if MPDU info from 1483 TQM or CV-correlation info from microcode is delayed. 1484 */ 1485 1486 #define TX_FES_SETUP_MAX_CTS2SELF_COUNT_OFFSET 0x0000000000000018 1487 #define TX_FES_SETUP_MAX_CTS2SELF_COUNT_LSB 9 1488 #define TX_FES_SETUP_MAX_CTS2SELF_COUNT_MSB 12 1489 #define TX_FES_SETUP_MAX_CTS2SELF_COUNT_MASK 0x0000000000001e00 1490 1491 1492 /* Description WIFI_RADAR_ENABLE 1493 1494 When set to 1, the packet is intended to be used by PHY 1495 for WiFi radar (by sensing the reflected WiFi signal). 1496 <legal all> 1497 */ 1498 1499 #define TX_FES_SETUP_WIFI_RADAR_ENABLE_OFFSET 0x0000000000000018 1500 #define TX_FES_SETUP_WIFI_RADAR_ENABLE_LSB 13 1501 #define TX_FES_SETUP_WIFI_RADAR_ENABLE_MSB 13 1502 #define TX_FES_SETUP_WIFI_RADAR_ENABLE_MASK 0x0000000000002000 1503 1504 1505 /* Description RESERVED_6A 1506 1507 Bit 14: cqi_feedback: 1508 Consumer: TXPCU 1509 Producer: SCH 1510 1511 MSB of the expected feedback type of received CBF frame 1512 after sending NDP or BR-Poll in case of HE/EHT sounding. 1513 See field cbf_feedback_type above for the LSB. This field 1514 is compared only if cbf_feedback_type_mask is set to 1. 1515 1516 0: compressed beamforming feedback 1517 1: CQI feedback 1518 1519 <legal 0-1> 1520 */ 1521 1522 #define TX_FES_SETUP_RESERVED_6A_OFFSET 0x0000000000000018 1523 #define TX_FES_SETUP_RESERVED_6A_LSB 14 1524 #define TX_FES_SETUP_RESERVED_6A_MSB 31 1525 #define TX_FES_SETUP_RESERVED_6A_MASK 0x00000000ffffc000 1526 1527 1528 /* Description MONITOR_OVERRIDE_STA_31_0 1529 1530 Used by TXMON 1531 1532 LSB 32 bits of a 37-bit user bitmap with 1s denoting the 1533 'tlv_usr' values that correspond to'Monitor override client's 1534 1535 1536 When enabled in TXMON, it will discard the user-TLVs of 1537 the users not selected by the bitmap. FW should program 1538 this setting in line with the 'Monitor_override_sta' setting 1539 in the 'ADDR_SEARCH_ENTRY' corresponding to each of the 1540 clients. 1541 1542 <legal all> 1543 */ 1544 1545 #define TX_FES_SETUP_MONITOR_OVERRIDE_STA_31_0_OFFSET 0x0000000000000018 1546 #define TX_FES_SETUP_MONITOR_OVERRIDE_STA_31_0_LSB 32 1547 #define TX_FES_SETUP_MONITOR_OVERRIDE_STA_31_0_MSB 63 1548 #define TX_FES_SETUP_MONITOR_OVERRIDE_STA_31_0_MASK 0xffffffff00000000 1549 1550 1551 /* Description MONITOR_OVERRIDE_STA_36_32 1552 1553 Used by TXMON 1554 1555 MSB 5 bits of a 37-bit user bitmap with 1s denoting the 'tlv_usr' 1556 values that correspond to 'Monitor override client's 1557 1558 <legal all> 1559 */ 1560 1561 #define TX_FES_SETUP_MONITOR_OVERRIDE_STA_36_32_OFFSET 0x0000000000000020 1562 #define TX_FES_SETUP_MONITOR_OVERRIDE_STA_36_32_LSB 0 1563 #define TX_FES_SETUP_MONITOR_OVERRIDE_STA_36_32_MSB 4 1564 #define TX_FES_SETUP_MONITOR_OVERRIDE_STA_36_32_MASK 0x000000000000001f 1565 1566 1567 /* Description RESERVED_8A 1568 1569 <legal 0> 1570 */ 1571 1572 #define TX_FES_SETUP_RESERVED_8A_OFFSET 0x0000000000000020 1573 #define TX_FES_SETUP_RESERVED_8A_LSB 5 1574 #define TX_FES_SETUP_RESERVED_8A_MSB 31 1575 #define TX_FES_SETUP_RESERVED_8A_MASK 0x00000000ffffffe0 1576 1577 1578 /* Description FW2SW_INFO 1579 1580 This field is provided by FW, to be logged via TXMON to 1581 host SW. It is transparent to HW. 1582 1583 <legal all> 1584 */ 1585 1586 #define TX_FES_SETUP_FW2SW_INFO_OFFSET 0x0000000000000020 1587 #define TX_FES_SETUP_FW2SW_INFO_LSB 32 1588 #define TX_FES_SETUP_FW2SW_INFO_MSB 63 1589 #define TX_FES_SETUP_FW2SW_INFO_MASK 0xffffffff00000000 1590 1591 1592 1593 #endif // TX_FES_SETUP 1594