xref: /wlan-driver/fw-api/hw/qcn6432/tx_peer_entry.h (revision 5113495b16420b49004c444715d2daae2066e7dc)
1*5113495bSYour Name /*
2*5113495bSYour Name  * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
3*5113495bSYour Name  *
4*5113495bSYour Name  * Permission to use, copy, modify, and/or distribute this software for any
5*5113495bSYour Name  * purpose with or without fee is hereby granted, provided that the above
6*5113495bSYour Name  * copyright notice and this permission notice appear in all copies.
7*5113495bSYour Name  *
8*5113495bSYour Name  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9*5113495bSYour Name  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10*5113495bSYour Name  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11*5113495bSYour Name  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12*5113495bSYour Name  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13*5113495bSYour Name  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14*5113495bSYour Name  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15*5113495bSYour Name  */
16*5113495bSYour Name 
17*5113495bSYour Name #ifndef _TX_PEER_ENTRY_H_
18*5113495bSYour Name #define _TX_PEER_ENTRY_H_
19*5113495bSYour Name #if !defined(__ASSEMBLER__)
20*5113495bSYour Name #endif
21*5113495bSYour Name 
22*5113495bSYour Name #define NUM_OF_DWORDS_TX_PEER_ENTRY 18
23*5113495bSYour Name 
24*5113495bSYour Name #define NUM_OF_QWORDS_TX_PEER_ENTRY 9
25*5113495bSYour Name 
26*5113495bSYour Name 
27*5113495bSYour Name struct tx_peer_entry {
28*5113495bSYour Name #ifndef WIFI_BIT_ORDER_BIG_ENDIAN
29*5113495bSYour Name              uint32_t mac_addr_a_31_0                                         : 32; // [31:0]
30*5113495bSYour Name              uint32_t mac_addr_a_47_32                                        : 16, // [15:0]
31*5113495bSYour Name                       mac_addr_b_15_0                                         : 16; // [31:16]
32*5113495bSYour Name              uint32_t mac_addr_b_47_16                                        : 32; // [31:0]
33*5113495bSYour Name              uint32_t use_ad_b                                                :  1, // [0:0]
34*5113495bSYour Name                       strip_insert_vlan_inner                                 :  1, // [1:1]
35*5113495bSYour Name                       strip_insert_vlan_outer                                 :  1, // [2:2]
36*5113495bSYour Name                       vlan_llc_mode                                           :  1, // [3:3]
37*5113495bSYour Name                       key_type                                                :  4, // [7:4]
38*5113495bSYour Name                       a_msdu_wds_ad3_ad4                                      :  3, // [10:8]
39*5113495bSYour Name                       ignore_hard_filters                                     :  1, // [11:11]
40*5113495bSYour Name                       ignore_soft_filters                                     :  1, // [12:12]
41*5113495bSYour Name                       epd_output                                              :  1, // [13:13]
42*5113495bSYour Name                       wds                                                     :  1, // [14:14]
43*5113495bSYour Name                       insert_or_strip                                         :  1, // [15:15]
44*5113495bSYour Name                       sw_filter_id                                            : 16; // [31:16]
45*5113495bSYour Name              uint32_t temporal_key_31_0                                       : 32; // [31:0]
46*5113495bSYour Name              uint32_t temporal_key_63_32                                      : 32; // [31:0]
47*5113495bSYour Name              uint32_t temporal_key_95_64                                      : 32; // [31:0]
48*5113495bSYour Name              uint32_t temporal_key_127_96                                     : 32; // [31:0]
49*5113495bSYour Name              uint32_t temporal_key_159_128                                    : 32; // [31:0]
50*5113495bSYour Name              uint32_t temporal_key_191_160                                    : 32; // [31:0]
51*5113495bSYour Name              uint32_t temporal_key_223_192                                    : 32; // [31:0]
52*5113495bSYour Name              uint32_t temporal_key_255_224                                    : 32; // [31:0]
53*5113495bSYour Name              uint32_t sta_partial_aid                                         : 11, // [10:0]
54*5113495bSYour Name                       transmit_vif                                            :  4, // [14:11]
55*5113495bSYour Name                       block_this_user                                         :  1, // [15:15]
56*5113495bSYour Name                       mesh_amsdu_mode                                         :  2, // [17:16]
57*5113495bSYour Name                       use_qos_alt_mute_mask                                   :  1, // [18:18]
58*5113495bSYour Name                       dl_ul_direction                                         :  1, // [19:19]
59*5113495bSYour Name                       reserved_12                                             : 12; // [31:20]
60*5113495bSYour Name              uint32_t insert_vlan_outer_tci                                   : 16, // [15:0]
61*5113495bSYour Name                       insert_vlan_inner_tci                                   : 16; // [31:16]
62*5113495bSYour Name              uint32_t multi_link_addr_ad1_31_0                                : 32; // [31:0]
63*5113495bSYour Name              uint32_t multi_link_addr_ad1_47_32                               : 16, // [15:0]
64*5113495bSYour Name                       multi_link_addr_ad2_15_0                                : 16; // [31:16]
65*5113495bSYour Name              uint32_t multi_link_addr_ad2_47_16                               : 32; // [31:0]
66*5113495bSYour Name              uint32_t multi_link_addr_crypto_enable                           :  1, // [0:0]
67*5113495bSYour Name                       reserved_17a                                            : 15, // [15:1]
68*5113495bSYour Name                       sw_peer_id                                              : 16; // [31:16]
69*5113495bSYour Name #else
70*5113495bSYour Name              uint32_t mac_addr_a_31_0                                         : 32; // [31:0]
71*5113495bSYour Name              uint32_t mac_addr_b_15_0                                         : 16, // [31:16]
72*5113495bSYour Name                       mac_addr_a_47_32                                        : 16; // [15:0]
73*5113495bSYour Name              uint32_t mac_addr_b_47_16                                        : 32; // [31:0]
74*5113495bSYour Name              uint32_t sw_filter_id                                            : 16, // [31:16]
75*5113495bSYour Name                       insert_or_strip                                         :  1, // [15:15]
76*5113495bSYour Name                       wds                                                     :  1, // [14:14]
77*5113495bSYour Name                       epd_output                                              :  1, // [13:13]
78*5113495bSYour Name                       ignore_soft_filters                                     :  1, // [12:12]
79*5113495bSYour Name                       ignore_hard_filters                                     :  1, // [11:11]
80*5113495bSYour Name                       a_msdu_wds_ad3_ad4                                      :  3, // [10:8]
81*5113495bSYour Name                       key_type                                                :  4, // [7:4]
82*5113495bSYour Name                       vlan_llc_mode                                           :  1, // [3:3]
83*5113495bSYour Name                       strip_insert_vlan_outer                                 :  1, // [2:2]
84*5113495bSYour Name                       strip_insert_vlan_inner                                 :  1, // [1:1]
85*5113495bSYour Name                       use_ad_b                                                :  1; // [0:0]
86*5113495bSYour Name              uint32_t temporal_key_31_0                                       : 32; // [31:0]
87*5113495bSYour Name              uint32_t temporal_key_63_32                                      : 32; // [31:0]
88*5113495bSYour Name              uint32_t temporal_key_95_64                                      : 32; // [31:0]
89*5113495bSYour Name              uint32_t temporal_key_127_96                                     : 32; // [31:0]
90*5113495bSYour Name              uint32_t temporal_key_159_128                                    : 32; // [31:0]
91*5113495bSYour Name              uint32_t temporal_key_191_160                                    : 32; // [31:0]
92*5113495bSYour Name              uint32_t temporal_key_223_192                                    : 32; // [31:0]
93*5113495bSYour Name              uint32_t temporal_key_255_224                                    : 32; // [31:0]
94*5113495bSYour Name              uint32_t reserved_12                                             : 12, // [31:20]
95*5113495bSYour Name                       dl_ul_direction                                         :  1, // [19:19]
96*5113495bSYour Name                       use_qos_alt_mute_mask                                   :  1, // [18:18]
97*5113495bSYour Name                       mesh_amsdu_mode                                         :  2, // [17:16]
98*5113495bSYour Name                       block_this_user                                         :  1, // [15:15]
99*5113495bSYour Name                       transmit_vif                                            :  4, // [14:11]
100*5113495bSYour Name                       sta_partial_aid                                         : 11; // [10:0]
101*5113495bSYour Name              uint32_t insert_vlan_inner_tci                                   : 16, // [31:16]
102*5113495bSYour Name                       insert_vlan_outer_tci                                   : 16; // [15:0]
103*5113495bSYour Name              uint32_t multi_link_addr_ad1_31_0                                : 32; // [31:0]
104*5113495bSYour Name              uint32_t multi_link_addr_ad2_15_0                                : 16, // [31:16]
105*5113495bSYour Name                       multi_link_addr_ad1_47_32                               : 16; // [15:0]
106*5113495bSYour Name              uint32_t multi_link_addr_ad2_47_16                               : 32; // [31:0]
107*5113495bSYour Name              uint32_t sw_peer_id                                              : 16, // [31:16]
108*5113495bSYour Name                       reserved_17a                                            : 15, // [15:1]
109*5113495bSYour Name                       multi_link_addr_crypto_enable                           :  1; // [0:0]
110*5113495bSYour Name #endif
111*5113495bSYour Name };
112*5113495bSYour Name 
113*5113495bSYour Name 
114*5113495bSYour Name /* Description		MAC_ADDR_A_31_0
115*5113495bSYour Name 
116*5113495bSYour Name 			Consumer: TX OLE
117*5113495bSYour Name 			Producer: SW
118*5113495bSYour Name 
119*5113495bSYour Name 			Lower 32 bits of the MAC address A used by HW for encapsulating
120*5113495bSYour Name 			 802.11
121*5113495bSYour Name 			<legal all>
122*5113495bSYour Name */
123*5113495bSYour Name 
124*5113495bSYour Name #define TX_PEER_ENTRY_MAC_ADDR_A_31_0_OFFSET                                        0x0000000000000000
125*5113495bSYour Name #define TX_PEER_ENTRY_MAC_ADDR_A_31_0_LSB                                           0
126*5113495bSYour Name #define TX_PEER_ENTRY_MAC_ADDR_A_31_0_MSB                                           31
127*5113495bSYour Name #define TX_PEER_ENTRY_MAC_ADDR_A_31_0_MASK                                          0x00000000ffffffff
128*5113495bSYour Name 
129*5113495bSYour Name 
130*5113495bSYour Name /* Description		MAC_ADDR_A_47_32
131*5113495bSYour Name 
132*5113495bSYour Name 			Consumer: TX OLE
133*5113495bSYour Name 			Producer: SW
134*5113495bSYour Name 
135*5113495bSYour Name 			Upper 16 bits of the MAC address A used by HW for encapsulating
136*5113495bSYour Name 			 802.11
137*5113495bSYour Name 			<legal all>
138*5113495bSYour Name */
139*5113495bSYour Name 
140*5113495bSYour Name #define TX_PEER_ENTRY_MAC_ADDR_A_47_32_OFFSET                                       0x0000000000000000
141*5113495bSYour Name #define TX_PEER_ENTRY_MAC_ADDR_A_47_32_LSB                                          32
142*5113495bSYour Name #define TX_PEER_ENTRY_MAC_ADDR_A_47_32_MSB                                          47
143*5113495bSYour Name #define TX_PEER_ENTRY_MAC_ADDR_A_47_32_MASK                                         0x0000ffff00000000
144*5113495bSYour Name 
145*5113495bSYour Name 
146*5113495bSYour Name /* Description		MAC_ADDR_B_15_0
147*5113495bSYour Name 
148*5113495bSYour Name 			Consumer: TX OLE
149*5113495bSYour Name 			Producer: SW
150*5113495bSYour Name 
151*5113495bSYour Name 			Lower 16 bits of the MAC address B used by HW for encapsulating
152*5113495bSYour Name 			 802.11
153*5113495bSYour Name 			<legal all>
154*5113495bSYour Name */
155*5113495bSYour Name 
156*5113495bSYour Name #define TX_PEER_ENTRY_MAC_ADDR_B_15_0_OFFSET                                        0x0000000000000000
157*5113495bSYour Name #define TX_PEER_ENTRY_MAC_ADDR_B_15_0_LSB                                           48
158*5113495bSYour Name #define TX_PEER_ENTRY_MAC_ADDR_B_15_0_MSB                                           63
159*5113495bSYour Name #define TX_PEER_ENTRY_MAC_ADDR_B_15_0_MASK                                          0xffff000000000000
160*5113495bSYour Name 
161*5113495bSYour Name 
162*5113495bSYour Name /* Description		MAC_ADDR_B_47_16
163*5113495bSYour Name 
164*5113495bSYour Name 			Consumer: TX OLE
165*5113495bSYour Name 			Producer: SW
166*5113495bSYour Name 
167*5113495bSYour Name 			Upper 32 bits of the MAC address B used by HW for encapsulating
168*5113495bSYour Name 			 802.11
169*5113495bSYour Name 			<legal all>
170*5113495bSYour Name */
171*5113495bSYour Name 
172*5113495bSYour Name #define TX_PEER_ENTRY_MAC_ADDR_B_47_16_OFFSET                                       0x0000000000000008
173*5113495bSYour Name #define TX_PEER_ENTRY_MAC_ADDR_B_47_16_LSB                                          0
174*5113495bSYour Name #define TX_PEER_ENTRY_MAC_ADDR_B_47_16_MSB                                          31
175*5113495bSYour Name #define TX_PEER_ENTRY_MAC_ADDR_B_47_16_MASK                                         0x00000000ffffffff
176*5113495bSYour Name 
177*5113495bSYour Name 
178*5113495bSYour Name /* Description		USE_AD_B
179*5113495bSYour Name 
180*5113495bSYour Name 			Consumer: TX OLE
181*5113495bSYour Name 			Producer: SW
182*5113495bSYour Name 
183*5113495bSYour Name 			The bit is only evaluated when this MSDU is the first MSDU
184*5113495bSYour Name 			 in an MPDU. For other MSDUs this bit setting is ignored.
185*5113495bSYour Name 
186*5113495bSYour Name 			It is part of the sw_msdu_param coming from the QM ADD frame
187*5113495bSYour Name 			 command.
188*5113495bSYour Name 
189*5113495bSYour Name 			Normally in AP mode the DA address is used as the RA.  This
190*5113495bSYour Name 			 is normally fine but the use_ad_b bit should be set when
191*5113495bSYour Name 			 DA is a multicast/broadcast address but we want to send
192*5113495bSYour Name 			 this packet using the destination STA address which will
193*5113495bSYour Name 			 be held in the mac_addr_b field of the peer descriptor.
194*5113495bSYour Name 
195*5113495bSYour Name 			<legal all>
196*5113495bSYour Name */
197*5113495bSYour Name 
198*5113495bSYour Name #define TX_PEER_ENTRY_USE_AD_B_OFFSET                                               0x0000000000000008
199*5113495bSYour Name #define TX_PEER_ENTRY_USE_AD_B_LSB                                                  32
200*5113495bSYour Name #define TX_PEER_ENTRY_USE_AD_B_MSB                                                  32
201*5113495bSYour Name #define TX_PEER_ENTRY_USE_AD_B_MASK                                                 0x0000000100000000
202*5113495bSYour Name 
203*5113495bSYour Name 
204*5113495bSYour Name /* Description		STRIP_INSERT_VLAN_INNER
205*5113495bSYour Name 
206*5113495bSYour Name 			Consumer: TX OLE
207*5113495bSYour Name 			Producer: SW
208*5113495bSYour Name 
209*5113495bSYour Name 			Strip or insert C-VLAN during encapsulation.
210*5113495bSYour Name 			Insert_or_strip determines whether C-VLAN is to be stripped
211*5113495bSYour Name 			 or inserted.
212*5113495bSYour Name 			<legal all>
213*5113495bSYour Name */
214*5113495bSYour Name 
215*5113495bSYour Name #define TX_PEER_ENTRY_STRIP_INSERT_VLAN_INNER_OFFSET                                0x0000000000000008
216*5113495bSYour Name #define TX_PEER_ENTRY_STRIP_INSERT_VLAN_INNER_LSB                                   33
217*5113495bSYour Name #define TX_PEER_ENTRY_STRIP_INSERT_VLAN_INNER_MSB                                   33
218*5113495bSYour Name #define TX_PEER_ENTRY_STRIP_INSERT_VLAN_INNER_MASK                                  0x0000000200000000
219*5113495bSYour Name 
220*5113495bSYour Name 
221*5113495bSYour Name /* Description		STRIP_INSERT_VLAN_OUTER
222*5113495bSYour Name 
223*5113495bSYour Name 			Consumer: TX OLE
224*5113495bSYour Name 			Producer: SW
225*5113495bSYour Name 
226*5113495bSYour Name 			Strip or insert S-VLAN during encapsulation.
227*5113495bSYour Name 			Insert or strip determines whether S-VLAN is to be stripped
228*5113495bSYour Name 			 or inserted.
229*5113495bSYour Name 			<legal all>
230*5113495bSYour Name */
231*5113495bSYour Name 
232*5113495bSYour Name #define TX_PEER_ENTRY_STRIP_INSERT_VLAN_OUTER_OFFSET                                0x0000000000000008
233*5113495bSYour Name #define TX_PEER_ENTRY_STRIP_INSERT_VLAN_OUTER_LSB                                   34
234*5113495bSYour Name #define TX_PEER_ENTRY_STRIP_INSERT_VLAN_OUTER_MSB                                   34
235*5113495bSYour Name #define TX_PEER_ENTRY_STRIP_INSERT_VLAN_OUTER_MASK                                  0x0000000400000000
236*5113495bSYour Name 
237*5113495bSYour Name 
238*5113495bSYour Name /* Description		VLAN_LLC_MODE
239*5113495bSYour Name 
240*5113495bSYour Name 			Consumer: TX OLE
241*5113495bSYour Name 			Producer: SW
242*5113495bSYour Name 
243*5113495bSYour Name 			If set encapsulate/decapsulate using the Scorpion compatible
244*5113495bSYour Name 			 VLAN LLC format
245*5113495bSYour Name */
246*5113495bSYour Name 
247*5113495bSYour Name #define TX_PEER_ENTRY_VLAN_LLC_MODE_OFFSET                                          0x0000000000000008
248*5113495bSYour Name #define TX_PEER_ENTRY_VLAN_LLC_MODE_LSB                                             35
249*5113495bSYour Name #define TX_PEER_ENTRY_VLAN_LLC_MODE_MSB                                             35
250*5113495bSYour Name #define TX_PEER_ENTRY_VLAN_LLC_MODE_MASK                                            0x0000000800000000
251*5113495bSYour Name 
252*5113495bSYour Name 
253*5113495bSYour Name /* Description		KEY_TYPE
254*5113495bSYour Name 
255*5113495bSYour Name 			Consumer: TX OLE, TX CRYPTO
256*5113495bSYour Name 			Producer: SW
257*5113495bSYour Name 
258*5113495bSYour Name 			The key_type indicates the cipher suite corresponding to
259*5113495bSYour Name 			 this peer entry:
260*5113495bSYour Name 			<enum 0 wep_40> WEP 40-bit
261*5113495bSYour Name 			<enum 1 wep_104> WEP 104-bit
262*5113495bSYour Name 			<enum 2 tkip_no_mic> TKIP without MIC
263*5113495bSYour Name 			<enum 3 wep_128> WEP 128-bit
264*5113495bSYour Name 			<enum 4 tkip_with_mic> TKIP with MIC
265*5113495bSYour Name 			<enum 5 wapi> WAPI
266*5113495bSYour Name 			<enum 6 aes_ccmp_128> AES CCMP 128
267*5113495bSYour Name 			<enum 7 no_cipher> No crypto
268*5113495bSYour Name 			<enum 8 aes_ccmp_256> AES CCMP 256
269*5113495bSYour Name 			<enum 9 aes_gcmp_128> AES GCMP 128
270*5113495bSYour Name 			<enum 10 aes_gcmp_256> AES GCMP 256
271*5113495bSYour Name 			<enum 11 wapi_gcm_sm4> WAPI GCM SM4
272*5113495bSYour Name 
273*5113495bSYour Name 			<enum 12 wep_varied_width> DO NOT USE. This Key type ONLY
274*5113495bSYour Name 			 to be used for RX side
275*5113495bSYour Name 
276*5113495bSYour Name 			<legal 0-12>
277*5113495bSYour Name */
278*5113495bSYour Name 
279*5113495bSYour Name #define TX_PEER_ENTRY_KEY_TYPE_OFFSET                                               0x0000000000000008
280*5113495bSYour Name #define TX_PEER_ENTRY_KEY_TYPE_LSB                                                  36
281*5113495bSYour Name #define TX_PEER_ENTRY_KEY_TYPE_MSB                                                  39
282*5113495bSYour Name #define TX_PEER_ENTRY_KEY_TYPE_MASK                                                 0x000000f000000000
283*5113495bSYour Name 
284*5113495bSYour Name 
285*5113495bSYour Name /* Description		A_MSDU_WDS_AD3_AD4
286*5113495bSYour Name 
287*5113495bSYour Name 			Consumer: TX OLE
288*5113495bSYour Name 			Producer: SW
289*5113495bSYour Name 
290*5113495bSYour Name 			Determines the selection of AD3 and AD4 for A-MSDU 4 address
291*5113495bSYour Name 			 frames (WDS):
292*5113495bSYour Name 			<enum 0 ad3_a__ad4_a> AD3 = AD_A, AD4 = AD_A
293*5113495bSYour Name 			<enum 1 ad3_a__ad4_b> AD3 = AD_A, AD4 = AD_B
294*5113495bSYour Name 			<enum 2 ad3_b__ad4_a> AD3 = AD_B, AD4 = AD_A
295*5113495bSYour Name 			<enum 3 ad3_b__ad4_b> AD3 = AD_B, AD4 = AD_B
296*5113495bSYour Name 			<enum 4 ad3_da__ad4_sa> AD3 = DA, AD4 = SA
297*5113495bSYour Name 			<legal 0-4>
298*5113495bSYour Name */
299*5113495bSYour Name 
300*5113495bSYour Name #define TX_PEER_ENTRY_A_MSDU_WDS_AD3_AD4_OFFSET                                     0x0000000000000008
301*5113495bSYour Name #define TX_PEER_ENTRY_A_MSDU_WDS_AD3_AD4_LSB                                        40
302*5113495bSYour Name #define TX_PEER_ENTRY_A_MSDU_WDS_AD3_AD4_MSB                                        42
303*5113495bSYour Name #define TX_PEER_ENTRY_A_MSDU_WDS_AD3_AD4_MASK                                       0x0000070000000000
304*5113495bSYour Name 
305*5113495bSYour Name 
306*5113495bSYour Name /* Description		IGNORE_HARD_FILTERS
307*5113495bSYour Name 
308*5113495bSYour Name 			SW can program this bit to 0x1 to ignore HARD filter conditions
309*5113495bSYour Name 			 and HWSCH will proceed with transmission, even if the HARD
310*5113495bSYour Name 			 filter bit is set in Filter LUT.
311*5113495bSYour Name 			Note that SOFT filter conditions will filter the command,
312*5113495bSYour Name 			even if this bit is set and ignore_soft_filters is not set
313*5113495bSYour Name 
314*5113495bSYour Name 			For filtering all frames marked in the Filter LUT, both
315*5113495bSYour Name 			ignore_soft_filters and ignore_hard_filters should be set
316*5113495bSYour Name 
317*5113495bSYour Name 			<legal all>
318*5113495bSYour Name */
319*5113495bSYour Name 
320*5113495bSYour Name #define TX_PEER_ENTRY_IGNORE_HARD_FILTERS_OFFSET                                    0x0000000000000008
321*5113495bSYour Name #define TX_PEER_ENTRY_IGNORE_HARD_FILTERS_LSB                                       43
322*5113495bSYour Name #define TX_PEER_ENTRY_IGNORE_HARD_FILTERS_MSB                                       43
323*5113495bSYour Name #define TX_PEER_ENTRY_IGNORE_HARD_FILTERS_MASK                                      0x0000080000000000
324*5113495bSYour Name 
325*5113495bSYour Name 
326*5113495bSYour Name /* Description		IGNORE_SOFT_FILTERS
327*5113495bSYour Name 
328*5113495bSYour Name 			SW can program this bit to 0x1 to ignore SOFT filter conditions
329*5113495bSYour Name 			 and HWSCH will proceed with transmission, even if the SOFT
330*5113495bSYour Name 			 filter bit is set in Filter LUT.
331*5113495bSYour Name 			Note that HARD filter conditions will filter the command,
332*5113495bSYour Name 			even if this bit is set and ignore_hard_filters is not set
333*5113495bSYour Name 
334*5113495bSYour Name 			For filtering all frames marked in the Filter LUT, both
335*5113495bSYour Name 			ignore_soft_filters and ignore_hard_filters should be set
336*5113495bSYour Name 
337*5113495bSYour Name 
338*5113495bSYour Name 			<legal all>
339*5113495bSYour Name */
340*5113495bSYour Name 
341*5113495bSYour Name #define TX_PEER_ENTRY_IGNORE_SOFT_FILTERS_OFFSET                                    0x0000000000000008
342*5113495bSYour Name #define TX_PEER_ENTRY_IGNORE_SOFT_FILTERS_LSB                                       44
343*5113495bSYour Name #define TX_PEER_ENTRY_IGNORE_SOFT_FILTERS_MSB                                       44
344*5113495bSYour Name #define TX_PEER_ENTRY_IGNORE_SOFT_FILTERS_MASK                                      0x0000100000000000
345*5113495bSYour Name 
346*5113495bSYour Name 
347*5113495bSYour Name /* Description		EPD_OUTPUT
348*5113495bSYour Name 
349*5113495bSYour Name 			Consumer: TX OLE
350*5113495bSYour Name 			Producer: SW
351*5113495bSYour Name 
352*5113495bSYour Name 			If set use EPD instead of LPD
353*5113495bSYour Name */
354*5113495bSYour Name 
355*5113495bSYour Name #define TX_PEER_ENTRY_EPD_OUTPUT_OFFSET                                             0x0000000000000008
356*5113495bSYour Name #define TX_PEER_ENTRY_EPD_OUTPUT_LSB                                                45
357*5113495bSYour Name #define TX_PEER_ENTRY_EPD_OUTPUT_MSB                                                45
358*5113495bSYour Name #define TX_PEER_ENTRY_EPD_OUTPUT_MASK                                               0x0000200000000000
359*5113495bSYour Name 
360*5113495bSYour Name 
361*5113495bSYour Name /* Description		WDS
362*5113495bSYour Name 
363*5113495bSYour Name 			If set all the frames in this transmission (for this user)
364*5113495bSYour Name 			are 4-address frame.
365*5113495bSYour Name 
366*5113495bSYour Name 			If not all frames need to use 4 address format, SW has per
367*5113495bSYour Name 			 frame 'wds' control, by using the 'wds' flag in the MSDU_EXTENSION
368*5113495bSYour Name 			 descriptor
369*5113495bSYour Name 
370*5113495bSYour Name 			Used by the OLE during encapsulation.
371*5113495bSYour Name 			<legal all>
372*5113495bSYour Name */
373*5113495bSYour Name 
374*5113495bSYour Name #define TX_PEER_ENTRY_WDS_OFFSET                                                    0x0000000000000008
375*5113495bSYour Name #define TX_PEER_ENTRY_WDS_LSB                                                       46
376*5113495bSYour Name #define TX_PEER_ENTRY_WDS_MSB                                                       46
377*5113495bSYour Name #define TX_PEER_ENTRY_WDS_MASK                                                      0x0000400000000000
378*5113495bSYour Name 
379*5113495bSYour Name 
380*5113495bSYour Name /* Description		INSERT_OR_STRIP
381*5113495bSYour Name 
382*5113495bSYour Name 			<enum 0 TXOLE_STRIP_VLAN> TXOLE will strip inner or outer
383*5113495bSYour Name 			 VLAN (if present in the frame) based on Strip_insert_vlan_{inner,
384*5113495bSYour Name 			outer}
385*5113495bSYour Name 			<enum 1 TXOLE_INSERT_VLAN> TXOLE will insert inner or outer
386*5113495bSYour Name 			 VLAN (only if absent in the frame) based on Strip_insert_vlan_{inner,
387*5113495bSYour Name 			outer} with the TCI(s) given by Insert_vlan_{inner, outer}_tci
388*5113495bSYour Name 
389*5113495bSYour Name 			NOTE: Strip VLAN is not supported by TCL.
390*5113495bSYour Name 			<legal all>
391*5113495bSYour Name */
392*5113495bSYour Name 
393*5113495bSYour Name #define TX_PEER_ENTRY_INSERT_OR_STRIP_OFFSET                                        0x0000000000000008
394*5113495bSYour Name #define TX_PEER_ENTRY_INSERT_OR_STRIP_LSB                                           47
395*5113495bSYour Name #define TX_PEER_ENTRY_INSERT_OR_STRIP_MSB                                           47
396*5113495bSYour Name #define TX_PEER_ENTRY_INSERT_OR_STRIP_MASK                                          0x0000800000000000
397*5113495bSYour Name 
398*5113495bSYour Name 
399*5113495bSYour Name /* Description		SW_FILTER_ID
400*5113495bSYour Name 
401*5113495bSYour Name 			Consumer: SCH
402*5113495bSYour Name 			Producer: SW
403*5113495bSYour Name 
404*5113495bSYour Name 			The full STA AID.
405*5113495bSYour Name 			Use by SCH to determine if transmission for this STA should
406*5113495bSYour Name 			 be filtered as it just went into power save state.
407*5113495bSYour Name 			In case of MU transmission, it means only this STA needs
408*5113495bSYour Name 			 to be removed from the transmission...
409*5113495bSYour Name 
410*5113495bSYour Name 			<legal all>
411*5113495bSYour Name */
412*5113495bSYour Name 
413*5113495bSYour Name #define TX_PEER_ENTRY_SW_FILTER_ID_OFFSET                                           0x0000000000000008
414*5113495bSYour Name #define TX_PEER_ENTRY_SW_FILTER_ID_LSB                                              48
415*5113495bSYour Name #define TX_PEER_ENTRY_SW_FILTER_ID_MSB                                              63
416*5113495bSYour Name #define TX_PEER_ENTRY_SW_FILTER_ID_MASK                                             0xffff000000000000
417*5113495bSYour Name 
418*5113495bSYour Name 
419*5113495bSYour Name /* Description		TEMPORAL_KEY_31_0
420*5113495bSYour Name 
421*5113495bSYour Name 			Consumer: TX CRYPTO
422*5113495bSYour Name 			Producer: SW
423*5113495bSYour Name 
424*5113495bSYour Name 			First 32 bits of the temporal key material.  The temporal
425*5113495bSYour Name 			 key for WEP 40-bit uses the first 40 bits, WEP 104-bit
426*5113495bSYour Name 			uses the first 104 bits, WEP 128-bit uses all 128 bits,
427*5113495bSYour Name 			TKIP with/without MIC uses 128 bits, WAPI uses all 128 bits,
428*5113495bSYour Name 			and AES-CCM uses all 128 bits.
429*5113495bSYour Name 
430*5113495bSYour Name 			Note that for TKIP, the 64 MIC bits are located in fields
431*5113495bSYour Name 			 'temporal_key[255:192]
432*5113495bSYour Name 			<legal all>
433*5113495bSYour Name */
434*5113495bSYour Name 
435*5113495bSYour Name #define TX_PEER_ENTRY_TEMPORAL_KEY_31_0_OFFSET                                      0x0000000000000010
436*5113495bSYour Name #define TX_PEER_ENTRY_TEMPORAL_KEY_31_0_LSB                                         0
437*5113495bSYour Name #define TX_PEER_ENTRY_TEMPORAL_KEY_31_0_MSB                                         31
438*5113495bSYour Name #define TX_PEER_ENTRY_TEMPORAL_KEY_31_0_MASK                                        0x00000000ffffffff
439*5113495bSYour Name 
440*5113495bSYour Name 
441*5113495bSYour Name /* Description		TEMPORAL_KEY_63_32
442*5113495bSYour Name 
443*5113495bSYour Name 			Consumer: TX CRYPTO
444*5113495bSYour Name 			Producer: SW
445*5113495bSYour Name 
446*5113495bSYour Name 			Second 32 bits of the temporal key material.  See the description
447*5113495bSYour Name 			 of temporal_key_31_0.
448*5113495bSYour Name 			<legal all>
449*5113495bSYour Name */
450*5113495bSYour Name 
451*5113495bSYour Name #define TX_PEER_ENTRY_TEMPORAL_KEY_63_32_OFFSET                                     0x0000000000000010
452*5113495bSYour Name #define TX_PEER_ENTRY_TEMPORAL_KEY_63_32_LSB                                        32
453*5113495bSYour Name #define TX_PEER_ENTRY_TEMPORAL_KEY_63_32_MSB                                        63
454*5113495bSYour Name #define TX_PEER_ENTRY_TEMPORAL_KEY_63_32_MASK                                       0xffffffff00000000
455*5113495bSYour Name 
456*5113495bSYour Name 
457*5113495bSYour Name /* Description		TEMPORAL_KEY_95_64
458*5113495bSYour Name 
459*5113495bSYour Name 			Consumer: TX CRYPTO
460*5113495bSYour Name 			Producer: SW
461*5113495bSYour Name 
462*5113495bSYour Name 			Third 32 bits of the temporal key material.  See the description
463*5113495bSYour Name 			 of temporal_key_31_0.
464*5113495bSYour Name 			<legal all>
465*5113495bSYour Name */
466*5113495bSYour Name 
467*5113495bSYour Name #define TX_PEER_ENTRY_TEMPORAL_KEY_95_64_OFFSET                                     0x0000000000000018
468*5113495bSYour Name #define TX_PEER_ENTRY_TEMPORAL_KEY_95_64_LSB                                        0
469*5113495bSYour Name #define TX_PEER_ENTRY_TEMPORAL_KEY_95_64_MSB                                        31
470*5113495bSYour Name #define TX_PEER_ENTRY_TEMPORAL_KEY_95_64_MASK                                       0x00000000ffffffff
471*5113495bSYour Name 
472*5113495bSYour Name 
473*5113495bSYour Name /* Description		TEMPORAL_KEY_127_96
474*5113495bSYour Name 
475*5113495bSYour Name 			Consumer: TX CRYPTO
476*5113495bSYour Name 			Producer: SW
477*5113495bSYour Name 
478*5113495bSYour Name 			Fourth 32 bits of the temporal key material.  See the description
479*5113495bSYour Name 			 of temporal_key_31_0.
480*5113495bSYour Name 			<legal all>
481*5113495bSYour Name */
482*5113495bSYour Name 
483*5113495bSYour Name #define TX_PEER_ENTRY_TEMPORAL_KEY_127_96_OFFSET                                    0x0000000000000018
484*5113495bSYour Name #define TX_PEER_ENTRY_TEMPORAL_KEY_127_96_LSB                                       32
485*5113495bSYour Name #define TX_PEER_ENTRY_TEMPORAL_KEY_127_96_MSB                                       63
486*5113495bSYour Name #define TX_PEER_ENTRY_TEMPORAL_KEY_127_96_MASK                                      0xffffffff00000000
487*5113495bSYour Name 
488*5113495bSYour Name 
489*5113495bSYour Name /* Description		TEMPORAL_KEY_159_128
490*5113495bSYour Name 
491*5113495bSYour Name 			Consumer: TX CRYPTO
492*5113495bSYour Name 			Producer: SW
493*5113495bSYour Name 
494*5113495bSYour Name 			Fifth 32 bits of the temporal key material.  See the description
495*5113495bSYour Name 			 of temporal_key_31_0.
496*5113495bSYour Name 
497*5113495bSYour Name 			<legal all>
498*5113495bSYour Name */
499*5113495bSYour Name 
500*5113495bSYour Name #define TX_PEER_ENTRY_TEMPORAL_KEY_159_128_OFFSET                                   0x0000000000000020
501*5113495bSYour Name #define TX_PEER_ENTRY_TEMPORAL_KEY_159_128_LSB                                      0
502*5113495bSYour Name #define TX_PEER_ENTRY_TEMPORAL_KEY_159_128_MSB                                      31
503*5113495bSYour Name #define TX_PEER_ENTRY_TEMPORAL_KEY_159_128_MASK                                     0x00000000ffffffff
504*5113495bSYour Name 
505*5113495bSYour Name 
506*5113495bSYour Name /* Description		TEMPORAL_KEY_191_160
507*5113495bSYour Name 
508*5113495bSYour Name 			Consumer: TX CRYPTO
509*5113495bSYour Name 			Producer: SW
510*5113495bSYour Name 
511*5113495bSYour Name 			Final 32 bits of the temporal key material.  See the description
512*5113495bSYour Name 			 of temporal_key_31_0.
513*5113495bSYour Name 
514*5113495bSYour Name 			<legal all>
515*5113495bSYour Name */
516*5113495bSYour Name 
517*5113495bSYour Name #define TX_PEER_ENTRY_TEMPORAL_KEY_191_160_OFFSET                                   0x0000000000000020
518*5113495bSYour Name #define TX_PEER_ENTRY_TEMPORAL_KEY_191_160_LSB                                      32
519*5113495bSYour Name #define TX_PEER_ENTRY_TEMPORAL_KEY_191_160_MSB                                      63
520*5113495bSYour Name #define TX_PEER_ENTRY_TEMPORAL_KEY_191_160_MASK                                     0xffffffff00000000
521*5113495bSYour Name 
522*5113495bSYour Name 
523*5113495bSYour Name /* Description		TEMPORAL_KEY_223_192
524*5113495bSYour Name 
525*5113495bSYour Name 			Consumer: TX CRYPTO
526*5113495bSYour Name 			Producer: SW
527*5113495bSYour Name 
528*5113495bSYour Name 			Final 32 bits of the temporal key material.  See the description
529*5113495bSYour Name 			 of temporal_key_31_0.
530*5113495bSYour Name 
531*5113495bSYour Name 			For TKIP this is the TX MIC key[31:0].
532*5113495bSYour Name 			<legal all>
533*5113495bSYour Name */
534*5113495bSYour Name 
535*5113495bSYour Name #define TX_PEER_ENTRY_TEMPORAL_KEY_223_192_OFFSET                                   0x0000000000000028
536*5113495bSYour Name #define TX_PEER_ENTRY_TEMPORAL_KEY_223_192_LSB                                      0
537*5113495bSYour Name #define TX_PEER_ENTRY_TEMPORAL_KEY_223_192_MSB                                      31
538*5113495bSYour Name #define TX_PEER_ENTRY_TEMPORAL_KEY_223_192_MASK                                     0x00000000ffffffff
539*5113495bSYour Name 
540*5113495bSYour Name 
541*5113495bSYour Name /* Description		TEMPORAL_KEY_255_224
542*5113495bSYour Name 
543*5113495bSYour Name 			Consumer: TX CRYPTO
544*5113495bSYour Name 			Producer: SW
545*5113495bSYour Name 
546*5113495bSYour Name 			Final 32 bits of the temporal key material.  See the description
547*5113495bSYour Name 			 of temporal_key_31_0.
548*5113495bSYour Name 
549*5113495bSYour Name 			For TKIP this is the TX MIC key[63:32].
550*5113495bSYour Name 			<legal all>
551*5113495bSYour Name */
552*5113495bSYour Name 
553*5113495bSYour Name #define TX_PEER_ENTRY_TEMPORAL_KEY_255_224_OFFSET                                   0x0000000000000028
554*5113495bSYour Name #define TX_PEER_ENTRY_TEMPORAL_KEY_255_224_LSB                                      32
555*5113495bSYour Name #define TX_PEER_ENTRY_TEMPORAL_KEY_255_224_MSB                                      63
556*5113495bSYour Name #define TX_PEER_ENTRY_TEMPORAL_KEY_255_224_MASK                                     0xffffffff00000000
557*5113495bSYour Name 
558*5113495bSYour Name 
559*5113495bSYour Name /* Description		STA_PARTIAL_AID
560*5113495bSYour Name 
561*5113495bSYour Name 			This field in only used by the PDG. All other modules should
562*5113495bSYour Name 			 ignore this field.
563*5113495bSYour Name 
564*5113495bSYour Name 			This field is only valid in case of a transmission at VHT
565*5113495bSYour Name 			 rates or HE rates.
566*5113495bSYour Name 
567*5113495bSYour Name 			For VHT:
568*5113495bSYour Name 			This field is the Partial AID to be filled in to the VHT
569*5113495bSYour Name 			 preamble.
570*5113495bSYour Name 
571*5113495bSYour Name 			For HE:
572*5113495bSYour Name 			This field is the sta_aid to be filled into the SIG B field.
573*5113495bSYour Name 
574*5113495bSYour Name 
575*5113495bSYour Name 			In 11ah mode of operation, this field is provided by SW
576*5113495bSYour Name 			to populate the the ID value of the SIG preamble of the
577*5113495bSYour Name 			PPDU
578*5113495bSYour Name */
579*5113495bSYour Name 
580*5113495bSYour Name #define TX_PEER_ENTRY_STA_PARTIAL_AID_OFFSET                                        0x0000000000000030
581*5113495bSYour Name #define TX_PEER_ENTRY_STA_PARTIAL_AID_LSB                                           0
582*5113495bSYour Name #define TX_PEER_ENTRY_STA_PARTIAL_AID_MSB                                           10
583*5113495bSYour Name #define TX_PEER_ENTRY_STA_PARTIAL_AID_MASK                                          0x00000000000007ff
584*5113495bSYour Name 
585*5113495bSYour Name 
586*5113495bSYour Name /* Description		TRANSMIT_VIF
587*5113495bSYour Name 
588*5113495bSYour Name 			Consumer: TXOLE
589*5113495bSYour Name 			Producer: SW
590*5113495bSYour Name 
591*5113495bSYour Name 			The VIF for this transmission. Used in MCC mode to control/overwrite
592*5113495bSYour Name 			 the PM bit settings.
593*5113495bSYour Name 			<legal all>
594*5113495bSYour Name */
595*5113495bSYour Name 
596*5113495bSYour Name #define TX_PEER_ENTRY_TRANSMIT_VIF_OFFSET                                           0x0000000000000030
597*5113495bSYour Name #define TX_PEER_ENTRY_TRANSMIT_VIF_LSB                                              11
598*5113495bSYour Name #define TX_PEER_ENTRY_TRANSMIT_VIF_MSB                                              14
599*5113495bSYour Name #define TX_PEER_ENTRY_TRANSMIT_VIF_MASK                                             0x0000000000007800
600*5113495bSYour Name 
601*5113495bSYour Name 
602*5113495bSYour Name /* Description		BLOCK_THIS_USER
603*5113495bSYour Name 
604*5113495bSYour Name 			Consumer: PDG
605*5113495bSYour Name 			Producer: SCH
606*5113495bSYour Name 
607*5113495bSYour Name 			Set by SCH when a MU transmission is started and this STA
608*5113495bSYour Name 			 has (just) entered or is in power save mode.
609*5113495bSYour Name 			Due to the MU transmission SCH shall not terminate this
610*5113495bSYour Name 			MU transmission (as is done with SU transmission), but continue
611*5113495bSYour Name 			 with the transmissions for all other STAs.
612*5113495bSYour Name 
613*5113495bSYour Name 			As a result of this bit being set, PDG will at certain moment
614*5113495bSYour Name 			 generate the MPDU limit TLV with field Num_mpdu_user set
615*5113495bSYour Name 			 to 0
616*5113495bSYour Name 
617*5113495bSYour Name 			PDG shall treat this user as a user without any data. All
618*5113495bSYour Name 			 rules related to terminating MU transmissions when too
619*5113495bSYour Name 			many users do not have any data shall include this user
620*5113495bSYour Name 			as a user having zero data.
621*5113495bSYour Name 
622*5113495bSYour Name 			When clear, PDG can ignore this bit
623*5113495bSYour Name 			<legal all>
624*5113495bSYour Name */
625*5113495bSYour Name 
626*5113495bSYour Name #define TX_PEER_ENTRY_BLOCK_THIS_USER_OFFSET                                        0x0000000000000030
627*5113495bSYour Name #define TX_PEER_ENTRY_BLOCK_THIS_USER_LSB                                           15
628*5113495bSYour Name #define TX_PEER_ENTRY_BLOCK_THIS_USER_MSB                                           15
629*5113495bSYour Name #define TX_PEER_ENTRY_BLOCK_THIS_USER_MASK                                          0x0000000000008000
630*5113495bSYour Name 
631*5113495bSYour Name 
632*5113495bSYour Name /* Description		MESH_AMSDU_MODE
633*5113495bSYour Name 
634*5113495bSYour Name 			Consumer: TX OLE
635*5113495bSYour Name 			Producer: SW
636*5113495bSYour Name 
637*5113495bSYour Name 			This field is used only when the first MSDU of any MPDU
638*5113495bSYour Name 			that TX OLE encounters is in Native WiFi format and includes
639*5113495bSYour Name 			 a 'Mesh Control' field between the header and the LLC.
640*5113495bSYour Name 
641*5113495bSYour Name 			The creation of the A-MSDU 'Length' field in the MPDU (if
642*5113495bSYour Name 			 aggregating multiple MSDUs) is decided by the value of
643*5113495bSYour Name 			this field.
644*5113495bSYour Name 
645*5113495bSYour Name 			<enum 0 MESH_MODE_0> DO NOT USE
646*5113495bSYour Name 			<enum 1 MESH_MODE_Q2Q> A-MSDU 'Length' is big endian and
647*5113495bSYour Name 			 includes the length of Mesh Control.
648*5113495bSYour Name 			<enum 2 MESH_MODE_11S_BE> A-MSDU 'Length' is big endian
649*5113495bSYour Name 			and excludes the length of Mesh Control.
650*5113495bSYour Name 			<enum 3 MESH_MODE_11S_LE> A-MSDU 'Length' is little endian
651*5113495bSYour Name 			 and excludes the length of Mesh Control. This is 802.11s-compliant.
652*5113495bSYour Name 
653*5113495bSYour Name 
654*5113495bSYour Name 			NOTE 1: For compatibility TXOLE treats MESH_MODE_0 identically
655*5113495bSYour Name 			 to MESH_MODE_Q2Q.
656*5113495bSYour Name 
657*5113495bSYour Name 			NOTE 2: This e-numeration is different from other fields
658*5113495bSYour Name 			 named Mesh_sta or mesh_enable where the value zero disables
659*5113495bSYour Name 			 mesh processing.
660*5113495bSYour Name 			<legal 0-3>
661*5113495bSYour Name */
662*5113495bSYour Name 
663*5113495bSYour Name #define TX_PEER_ENTRY_MESH_AMSDU_MODE_OFFSET                                        0x0000000000000030
664*5113495bSYour Name #define TX_PEER_ENTRY_MESH_AMSDU_MODE_LSB                                           16
665*5113495bSYour Name #define TX_PEER_ENTRY_MESH_AMSDU_MODE_MSB                                           17
666*5113495bSYour Name #define TX_PEER_ENTRY_MESH_AMSDU_MODE_MASK                                          0x0000000000030000
667*5113495bSYour Name 
668*5113495bSYour Name 
669*5113495bSYour Name 
670*5113495bSYour Name #define TX_PEER_ENTRY_USE_QOS_ALT_MUTE_MASK_OFFSET                                  0x0000000000000030
671*5113495bSYour Name #define TX_PEER_ENTRY_USE_QOS_ALT_MUTE_MASK_LSB                                     18
672*5113495bSYour Name #define TX_PEER_ENTRY_USE_QOS_ALT_MUTE_MASK_MSB                                     18
673*5113495bSYour Name #define TX_PEER_ENTRY_USE_QOS_ALT_MUTE_MASK_MASK                                    0x0000000000040000
674*5113495bSYour Name 
675*5113495bSYour Name 
676*5113495bSYour Name /* Description		DL_UL_DIRECTION
677*5113495bSYour Name 
678*5113495bSYour Name 			'Direction' to be inferred for raw WiFi esp. management
679*5113495bSYour Name 			frames sent to a multi-link peer, for translating RA and/or
680*5113495bSYour Name 			 TA.
681*5113495bSYour Name 
682*5113495bSYour Name 			<enum 0 DL_UL_FLAG_IS_DL_OR_TDLS>
683*5113495bSYour Name 			<enum 1 DL_UL_FLAG_IS_UL>
684*5113495bSYour Name 			<legal all>
685*5113495bSYour Name */
686*5113495bSYour Name 
687*5113495bSYour Name #define TX_PEER_ENTRY_DL_UL_DIRECTION_OFFSET                                        0x0000000000000030
688*5113495bSYour Name #define TX_PEER_ENTRY_DL_UL_DIRECTION_LSB                                           19
689*5113495bSYour Name #define TX_PEER_ENTRY_DL_UL_DIRECTION_MSB                                           19
690*5113495bSYour Name #define TX_PEER_ENTRY_DL_UL_DIRECTION_MASK                                          0x0000000000080000
691*5113495bSYour Name 
692*5113495bSYour Name 
693*5113495bSYour Name /* Description		RESERVED_12
694*5113495bSYour Name 
695*5113495bSYour Name 			<legal 0>
696*5113495bSYour Name */
697*5113495bSYour Name 
698*5113495bSYour Name #define TX_PEER_ENTRY_RESERVED_12_OFFSET                                            0x0000000000000030
699*5113495bSYour Name #define TX_PEER_ENTRY_RESERVED_12_LSB                                               20
700*5113495bSYour Name #define TX_PEER_ENTRY_RESERVED_12_MSB                                               31
701*5113495bSYour Name #define TX_PEER_ENTRY_RESERVED_12_MASK                                              0x00000000fff00000
702*5113495bSYour Name 
703*5113495bSYour Name 
704*5113495bSYour Name /* Description		INSERT_VLAN_OUTER_TCI
705*5113495bSYour Name 
706*5113495bSYour Name 			The tag control info to use when TXOLE inserts outer VLAN
707*5113495bSYour Name 			 if enabled by Strip_insert_vlan_outer and Insert_or_strip
708*5113495bSYour Name 
709*5113495bSYour Name */
710*5113495bSYour Name 
711*5113495bSYour Name #define TX_PEER_ENTRY_INSERT_VLAN_OUTER_TCI_OFFSET                                  0x0000000000000030
712*5113495bSYour Name #define TX_PEER_ENTRY_INSERT_VLAN_OUTER_TCI_LSB                                     32
713*5113495bSYour Name #define TX_PEER_ENTRY_INSERT_VLAN_OUTER_TCI_MSB                                     47
714*5113495bSYour Name #define TX_PEER_ENTRY_INSERT_VLAN_OUTER_TCI_MASK                                    0x0000ffff00000000
715*5113495bSYour Name 
716*5113495bSYour Name 
717*5113495bSYour Name /* Description		INSERT_VLAN_INNER_TCI
718*5113495bSYour Name 
719*5113495bSYour Name 			The tag control info to use when TXOLE inserts inner VLAN
720*5113495bSYour Name 			 if enabled by Strip_insert_vlan_inner and Insert_or_strip
721*5113495bSYour Name 
722*5113495bSYour Name */
723*5113495bSYour Name 
724*5113495bSYour Name #define TX_PEER_ENTRY_INSERT_VLAN_INNER_TCI_OFFSET                                  0x0000000000000030
725*5113495bSYour Name #define TX_PEER_ENTRY_INSERT_VLAN_INNER_TCI_LSB                                     48
726*5113495bSYour Name #define TX_PEER_ENTRY_INSERT_VLAN_INNER_TCI_MSB                                     63
727*5113495bSYour Name #define TX_PEER_ENTRY_INSERT_VLAN_INNER_TCI_MASK                                    0xffff000000000000
728*5113495bSYour Name 
729*5113495bSYour Name 
730*5113495bSYour Name /* Description		MULTI_LINK_ADDR_AD1_31_0
731*5113495bSYour Name 
732*5113495bSYour Name 			Consumer: TX CRYPTO
733*5113495bSYour Name 			Producer: FW
734*5113495bSYour Name 
735*5113495bSYour Name 			Field only valid if Multi_link_addr_crypto_enable is set
736*5113495bSYour Name 
737*5113495bSYour Name 
738*5113495bSYour Name 			Multi-link receiver address (address1) for transmissions
739*5113495bSYour Name 			 matching this peer entry, bits [31:0]
740*5113495bSYour Name */
741*5113495bSYour Name 
742*5113495bSYour Name #define TX_PEER_ENTRY_MULTI_LINK_ADDR_AD1_31_0_OFFSET                               0x0000000000000038
743*5113495bSYour Name #define TX_PEER_ENTRY_MULTI_LINK_ADDR_AD1_31_0_LSB                                  0
744*5113495bSYour Name #define TX_PEER_ENTRY_MULTI_LINK_ADDR_AD1_31_0_MSB                                  31
745*5113495bSYour Name #define TX_PEER_ENTRY_MULTI_LINK_ADDR_AD1_31_0_MASK                                 0x00000000ffffffff
746*5113495bSYour Name 
747*5113495bSYour Name 
748*5113495bSYour Name /* Description		MULTI_LINK_ADDR_AD1_47_32
749*5113495bSYour Name 
750*5113495bSYour Name 			Consumer: TX CRYPTO
751*5113495bSYour Name 			Producer: FW
752*5113495bSYour Name 
753*5113495bSYour Name 			Field only valid if Multi_link_addr_crypto_enable is set
754*5113495bSYour Name 
755*5113495bSYour Name 
756*5113495bSYour Name 			Multi-link receiver address (address1) for transmissions
757*5113495bSYour Name 			 matching this peer entry, bits [47:32]
758*5113495bSYour Name */
759*5113495bSYour Name 
760*5113495bSYour Name #define TX_PEER_ENTRY_MULTI_LINK_ADDR_AD1_47_32_OFFSET                              0x0000000000000038
761*5113495bSYour Name #define TX_PEER_ENTRY_MULTI_LINK_ADDR_AD1_47_32_LSB                                 32
762*5113495bSYour Name #define TX_PEER_ENTRY_MULTI_LINK_ADDR_AD1_47_32_MSB                                 47
763*5113495bSYour Name #define TX_PEER_ENTRY_MULTI_LINK_ADDR_AD1_47_32_MASK                                0x0000ffff00000000
764*5113495bSYour Name 
765*5113495bSYour Name 
766*5113495bSYour Name /* Description		MULTI_LINK_ADDR_AD2_15_0
767*5113495bSYour Name 
768*5113495bSYour Name 			Consumer: TX CRYPTO
769*5113495bSYour Name 			Producer: FW
770*5113495bSYour Name 
771*5113495bSYour Name 			Field only valid if Multi_link_addr_crypto_enable is set
772*5113495bSYour Name 
773*5113495bSYour Name 
774*5113495bSYour Name 			Multi-link transmitter address (address2) for transmissions
775*5113495bSYour Name 			 matching this peer entry, bits [15:0]
776*5113495bSYour Name */
777*5113495bSYour Name 
778*5113495bSYour Name #define TX_PEER_ENTRY_MULTI_LINK_ADDR_AD2_15_0_OFFSET                               0x0000000000000038
779*5113495bSYour Name #define TX_PEER_ENTRY_MULTI_LINK_ADDR_AD2_15_0_LSB                                  48
780*5113495bSYour Name #define TX_PEER_ENTRY_MULTI_LINK_ADDR_AD2_15_0_MSB                                  63
781*5113495bSYour Name #define TX_PEER_ENTRY_MULTI_LINK_ADDR_AD2_15_0_MASK                                 0xffff000000000000
782*5113495bSYour Name 
783*5113495bSYour Name 
784*5113495bSYour Name /* Description		MULTI_LINK_ADDR_AD2_47_16
785*5113495bSYour Name 
786*5113495bSYour Name 			Consumer: TX CRYPTO
787*5113495bSYour Name 			Producer: FW
788*5113495bSYour Name 
789*5113495bSYour Name 			Field only valid if Multi_link_addr_crypto_enable is set
790*5113495bSYour Name 
791*5113495bSYour Name 
792*5113495bSYour Name 			Multi-link transmitter address (address2) for transmissions
793*5113495bSYour Name 			 matching this peer entry, bits [47:16]
794*5113495bSYour Name */
795*5113495bSYour Name 
796*5113495bSYour Name #define TX_PEER_ENTRY_MULTI_LINK_ADDR_AD2_47_16_OFFSET                              0x0000000000000040
797*5113495bSYour Name #define TX_PEER_ENTRY_MULTI_LINK_ADDR_AD2_47_16_LSB                                 0
798*5113495bSYour Name #define TX_PEER_ENTRY_MULTI_LINK_ADDR_AD2_47_16_MSB                                 31
799*5113495bSYour Name #define TX_PEER_ENTRY_MULTI_LINK_ADDR_AD2_47_16_MASK                                0x00000000ffffffff
800*5113495bSYour Name 
801*5113495bSYour Name 
802*5113495bSYour Name /* Description		MULTI_LINK_ADDR_CRYPTO_ENABLE
803*5113495bSYour Name 
804*5113495bSYour Name 			Consumer: TX CRYPTO
805*5113495bSYour Name 			Producer: FW
806*5113495bSYour Name 
807*5113495bSYour Name 			If set, TX CRYPTO shall convert Address1, Address2 and BSSID
808*5113495bSYour Name 			 of received data frames to multi-link addresses for the
809*5113495bSYour Name 			 AAD and Nonce during encryption.
810*5113495bSYour Name 			<legal all>
811*5113495bSYour Name */
812*5113495bSYour Name 
813*5113495bSYour Name #define TX_PEER_ENTRY_MULTI_LINK_ADDR_CRYPTO_ENABLE_OFFSET                          0x0000000000000040
814*5113495bSYour Name #define TX_PEER_ENTRY_MULTI_LINK_ADDR_CRYPTO_ENABLE_LSB                             32
815*5113495bSYour Name #define TX_PEER_ENTRY_MULTI_LINK_ADDR_CRYPTO_ENABLE_MSB                             32
816*5113495bSYour Name #define TX_PEER_ENTRY_MULTI_LINK_ADDR_CRYPTO_ENABLE_MASK                            0x0000000100000000
817*5113495bSYour Name 
818*5113495bSYour Name 
819*5113495bSYour Name /* Description		RESERVED_17A
820*5113495bSYour Name 
821*5113495bSYour Name 			<legal 0>
822*5113495bSYour Name */
823*5113495bSYour Name 
824*5113495bSYour Name #define TX_PEER_ENTRY_RESERVED_17A_OFFSET                                           0x0000000000000040
825*5113495bSYour Name #define TX_PEER_ENTRY_RESERVED_17A_LSB                                              33
826*5113495bSYour Name #define TX_PEER_ENTRY_RESERVED_17A_MSB                                              47
827*5113495bSYour Name #define TX_PEER_ENTRY_RESERVED_17A_MASK                                             0x0000fffe00000000
828*5113495bSYour Name 
829*5113495bSYour Name 
830*5113495bSYour Name /* Description		SW_PEER_ID
831*5113495bSYour Name 
832*5113495bSYour Name 			This field indicates a unique peer identifier provided by
833*5113495bSYour Name 			 FW, to be logged via TXMON to host SW.
834*5113495bSYour Name 
835*5113495bSYour Name 			<legal all>
836*5113495bSYour Name */
837*5113495bSYour Name 
838*5113495bSYour Name #define TX_PEER_ENTRY_SW_PEER_ID_OFFSET                                             0x0000000000000040
839*5113495bSYour Name #define TX_PEER_ENTRY_SW_PEER_ID_LSB                                                48
840*5113495bSYour Name #define TX_PEER_ENTRY_SW_PEER_ID_MSB                                                63
841*5113495bSYour Name #define TX_PEER_ENTRY_SW_PEER_ID_MASK                                               0xffff000000000000
842*5113495bSYour Name 
843*5113495bSYour Name 
844*5113495bSYour Name 
845*5113495bSYour Name #endif   // TX_PEER_ENTRY
846