1 /* 2 * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for any 5 * purpose with or without fee is hereby granted, provided that the above 6 * copyright notice and this permission notice appear in all copies. 7 * 8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15 */ 16 17 #ifndef _TX_RAW_OR_NATIVE_FRAME_SETUP_H_ 18 #define _TX_RAW_OR_NATIVE_FRAME_SETUP_H_ 19 #if !defined(__ASSEMBLER__) 20 #endif 21 22 #define NUM_OF_DWORDS_TX_RAW_OR_NATIVE_FRAME_SETUP 2 23 24 #define NUM_OF_QWORDS_TX_RAW_OR_NATIVE_FRAME_SETUP 1 25 26 27 struct tx_raw_or_native_frame_setup { 28 #ifndef WIFI_BIT_ORDER_BIG_ENDIAN 29 uint32_t fc_to_ds_mask : 1, // [0:0] 30 fc_from_ds_mask : 1, // [1:1] 31 fc_more_frag_mask : 1, // [2:2] 32 fc_retry_mask : 1, // [3:3] 33 fc_pwr_mgt_mask : 1, // [4:4] 34 fc_more_data_mask : 1, // [5:5] 35 fc_prot_frame_mask : 1, // [6:6] 36 fc_order_mask : 1, // [7:7] 37 duration_field_mask : 1, // [8:8] 38 sequence_control_mask : 1, // [9:9] 39 qc_tid_mask : 1, // [10:10] 40 qc_eosp_mask : 1, // [11:11] 41 qc_ack_policy_mask : 1, // [12:12] 42 qc_amsdu_mask : 1, // [13:13] 43 reserved_0a : 1, // [14:14] 44 qc_15to8_mask : 1, // [15:15] 45 iv_mask : 1, // [16:16] 46 fc_to_ds_setting : 1, // [17:17] 47 fc_from_ds_setting : 1, // [18:18] 48 fc_more_frag_setting : 1, // [19:19] 49 fc_retry_setting : 2, // [21:20] 50 fc_pwr_mgt_setting : 1, // [22:22] 51 fc_more_data_setting : 2, // [24:23] 52 fc_prot_frame_setting : 2, // [26:25] 53 fc_order_setting : 1, // [27:27] 54 qc_tid_setting : 4; // [31:28] 55 uint32_t qc_eosp_setting : 2, // [1:0] 56 qc_ack_policy_setting : 2, // [3:2] 57 qc_amsdu_setting : 1, // [4:4] 58 qc_15to8_setting : 8, // [12:5] 59 mlo_addr_override : 1, // [13:13] 60 mlo_ignore_addr3_override : 1, // [14:14] 61 sequence_control_source : 1, // [15:15] 62 fragment_number : 4, // [19:16] 63 sequence_number : 12; // [31:20] 64 #else 65 uint32_t qc_tid_setting : 4, // [31:28] 66 fc_order_setting : 1, // [27:27] 67 fc_prot_frame_setting : 2, // [26:25] 68 fc_more_data_setting : 2, // [24:23] 69 fc_pwr_mgt_setting : 1, // [22:22] 70 fc_retry_setting : 2, // [21:20] 71 fc_more_frag_setting : 1, // [19:19] 72 fc_from_ds_setting : 1, // [18:18] 73 fc_to_ds_setting : 1, // [17:17] 74 iv_mask : 1, // [16:16] 75 qc_15to8_mask : 1, // [15:15] 76 reserved_0a : 1, // [14:14] 77 qc_amsdu_mask : 1, // [13:13] 78 qc_ack_policy_mask : 1, // [12:12] 79 qc_eosp_mask : 1, // [11:11] 80 qc_tid_mask : 1, // [10:10] 81 sequence_control_mask : 1, // [9:9] 82 duration_field_mask : 1, // [8:8] 83 fc_order_mask : 1, // [7:7] 84 fc_prot_frame_mask : 1, // [6:6] 85 fc_more_data_mask : 1, // [5:5] 86 fc_pwr_mgt_mask : 1, // [4:4] 87 fc_retry_mask : 1, // [3:3] 88 fc_more_frag_mask : 1, // [2:2] 89 fc_from_ds_mask : 1, // [1:1] 90 fc_to_ds_mask : 1; // [0:0] 91 uint32_t sequence_number : 12, // [31:20] 92 fragment_number : 4, // [19:16] 93 sequence_control_source : 1, // [15:15] 94 mlo_ignore_addr3_override : 1, // [14:14] 95 mlo_addr_override : 1, // [13:13] 96 qc_15to8_setting : 8, // [12:5] 97 qc_amsdu_setting : 1, // [4:4] 98 qc_ack_policy_setting : 2, // [3:2] 99 qc_eosp_setting : 2; // [1:0] 100 #endif 101 }; 102 103 104 /* Description FC_TO_DS_MASK 105 106 Consumer: TXOLE 107 Producer: SW 108 109 Field only valid for MSDU frames with enc_type == RAW or 110 Native WiFi 111 Note: Enc_type is NOT allowed b 112 113 Note: 114 When enc_type != RAW or Native WiFi, OLE will get the setting 115 from the frame_ctl field in the MPDU_queue extension data 116 structure. 117 118 <enum 0 mask_disable>: HW is allowed to update this field. 119 The value that HW (OLE) will insert is the given in field: 120 fc_to_ds_setting. 121 <enum 1 mask_enable>: HW is not allowed to update the contents 122 of this field. 123 124 <legal all> 125 126 In 11ah mode of Operation, same description as above applies 127 if this field is a part of FC field of the MPDU. This field 128 does not apply to Short MAC header (PV=1) and is ignored 129 by HW 130 */ 131 132 #define TX_RAW_OR_NATIVE_FRAME_SETUP_FC_TO_DS_MASK_OFFSET 0x0000000000000000 133 #define TX_RAW_OR_NATIVE_FRAME_SETUP_FC_TO_DS_MASK_LSB 0 134 #define TX_RAW_OR_NATIVE_FRAME_SETUP_FC_TO_DS_MASK_MSB 0 135 #define TX_RAW_OR_NATIVE_FRAME_SETUP_FC_TO_DS_MASK_MASK 0x0000000000000001 136 137 138 /* Description FC_FROM_DS_MASK 139 140 Consumer: TXOLE 141 Producer: SW 142 143 Field only valid for MSDU frames with enc_type == RAW or 144 Native WiFi 145 146 Note: 147 When enc_type != RAW or Native WiFi, OLE will get the setting 148 from the frame_ctl field in the MPDU_queue extension data 149 structure. 150 151 <enum 0 mask_disable>: HW is allowed to update this field. 152 The value that HW (OLE) will insert is the given in field: 153 fc_from_ds_setting. 154 <enum 1 mask_enable>: HW is not allowed to update the contents 155 of this field. 156 157 <legal all> 158 159 In 11ah mode of Operation, same description as above applies 160 if this field is a part of FC field of the MPDU. 161 */ 162 163 #define TX_RAW_OR_NATIVE_FRAME_SETUP_FC_FROM_DS_MASK_OFFSET 0x0000000000000000 164 #define TX_RAW_OR_NATIVE_FRAME_SETUP_FC_FROM_DS_MASK_LSB 1 165 #define TX_RAW_OR_NATIVE_FRAME_SETUP_FC_FROM_DS_MASK_MSB 1 166 #define TX_RAW_OR_NATIVE_FRAME_SETUP_FC_FROM_DS_MASK_MASK 0x0000000000000002 167 168 169 /* Description FC_MORE_FRAG_MASK 170 171 Consumer: TXOLE 172 Producer: SW 173 174 Field only valid for MSDU frames with enc_type == RAW or 175 Native WiFi 176 177 Note: 178 When enc_type != RAW or Native WiFi, OLE will get the setting 179 from the frame_ctl field in the MPDU_queue extension data 180 structure. 181 182 <enum 0 mask_disable>: HW is allowed to update this field. 183 The value that HW (OLE) will insert is the given in field: 184 fc_more_frag_setting. 185 <enum 1 mask_enable>: HW is not allowed to update the contents 186 of this field. 187 188 <legal all> 189 */ 190 191 #define TX_RAW_OR_NATIVE_FRAME_SETUP_FC_MORE_FRAG_MASK_OFFSET 0x0000000000000000 192 #define TX_RAW_OR_NATIVE_FRAME_SETUP_FC_MORE_FRAG_MASK_LSB 2 193 #define TX_RAW_OR_NATIVE_FRAME_SETUP_FC_MORE_FRAG_MASK_MSB 2 194 #define TX_RAW_OR_NATIVE_FRAME_SETUP_FC_MORE_FRAG_MASK_MASK 0x0000000000000004 195 196 197 /* Description FC_RETRY_MASK 198 199 Consumer: TXOLE 200 Producer: SW 201 202 Field only valid for MSDU frames with enc_type == RAW or 203 Native WiFi 204 205 Note: 206 When enc_type != RAW or Native WiFi, OLE will base the setting 207 for this field on the retry_bitmap_31_0 and retry_bitmap_63_32 208 fields in the MPDU_queue_extension descriptor 209 210 <enum 0 mask_disable>: HW is allowed to update this field. 211 The value that HW (OLE) will insert is the given in field: 212 fc_retry_setting. 213 <enum 1 mask_enable>: HW is not allowed to update the contents 214 of this field. 215 216 <legal all> 217 */ 218 219 #define TX_RAW_OR_NATIVE_FRAME_SETUP_FC_RETRY_MASK_OFFSET 0x0000000000000000 220 #define TX_RAW_OR_NATIVE_FRAME_SETUP_FC_RETRY_MASK_LSB 3 221 #define TX_RAW_OR_NATIVE_FRAME_SETUP_FC_RETRY_MASK_MSB 3 222 #define TX_RAW_OR_NATIVE_FRAME_SETUP_FC_RETRY_MASK_MASK 0x0000000000000008 223 224 225 /* Description FC_PWR_MGT_MASK 226 227 Consumer: TXOLE 228 Producer: SW 229 230 Field only valid for MSDU frames with enc_type == RAW or 231 Native WiFi 232 233 Note: 234 When enc_type != RAW or Native WiFi, OLE will get the setting 235 from the frame_ctl field in the MPDU_queue extension data 236 structure. 237 238 <enum 0 mask_disable>: HW is allowed to update this field. 239 The value that HW (OLE) will insert is the given in field: 240 fc_pwr_mgt_setting. 241 <enum 1 mask_enable>: HW is not allowed to update the contents 242 of this field. 243 244 <legal all> 245 */ 246 247 #define TX_RAW_OR_NATIVE_FRAME_SETUP_FC_PWR_MGT_MASK_OFFSET 0x0000000000000000 248 #define TX_RAW_OR_NATIVE_FRAME_SETUP_FC_PWR_MGT_MASK_LSB 4 249 #define TX_RAW_OR_NATIVE_FRAME_SETUP_FC_PWR_MGT_MASK_MSB 4 250 #define TX_RAW_OR_NATIVE_FRAME_SETUP_FC_PWR_MGT_MASK_MASK 0x0000000000000010 251 252 253 /* Description FC_MORE_DATA_MASK 254 255 Consumer: TXOLE 256 Producer: SW 257 258 Field only valid for MSDU frames with enc_type == RAW or 259 Native WiFi 260 261 Note: 262 When enc_type != RAW or Native WiFi, OLE will get the setting 263 from the frame_ctl field in the MPDU_queue extension data 264 structure. 265 266 TX_PCU has the abilty of overwrite the More data field, 267 based on the Set_fc_more_data field in the PPDU_SS_... TLVs 268 given by PDG. 269 270 <enum 0 mask_disable>: HW is allowed to update this field. 271 The value that HW (OLE) will insert is the given in field: 272 fc_more_data_setting. 273 <enum 1 mask_enable>: HW is not allowed to update the contents 274 of this field. 275 276 <legal all> 277 */ 278 279 #define TX_RAW_OR_NATIVE_FRAME_SETUP_FC_MORE_DATA_MASK_OFFSET 0x0000000000000000 280 #define TX_RAW_OR_NATIVE_FRAME_SETUP_FC_MORE_DATA_MASK_LSB 5 281 #define TX_RAW_OR_NATIVE_FRAME_SETUP_FC_MORE_DATA_MASK_MSB 5 282 #define TX_RAW_OR_NATIVE_FRAME_SETUP_FC_MORE_DATA_MASK_MASK 0x0000000000000020 283 284 285 /* Description FC_PROT_FRAME_MASK 286 287 Consumer: TXOLE 288 Producer: SW 289 290 Field only valid for MSDU frames with enc_type == RAW or 291 Native WiFi 292 293 Note: 294 When enc_type != RAW or Native WiFi, OLE will base the setting 295 for the Protected frame bit on the key_type setting in 296 the peer entry. When NO encryption is needed, the bit will 297 be set to 0, When the any encryption is needed, the bit 298 will be set to 0. 299 300 <enum 0 mask_disable>: HW is allowed to update this field. 301 The value that HW (OLE) will insert is the given in field: 302 fc_prot_frame_setting. When fc_prot_frame_setting is set, 303 OLE will encrypt the frame, based on the encryption type 304 indicate with the key_type setting in the peer entry 305 306 <enum 1 mask_enable>: HW is not allowed to update the contents 307 of this field. 308 <legal all> 309 */ 310 311 #define TX_RAW_OR_NATIVE_FRAME_SETUP_FC_PROT_FRAME_MASK_OFFSET 0x0000000000000000 312 #define TX_RAW_OR_NATIVE_FRAME_SETUP_FC_PROT_FRAME_MASK_LSB 6 313 #define TX_RAW_OR_NATIVE_FRAME_SETUP_FC_PROT_FRAME_MASK_MSB 6 314 #define TX_RAW_OR_NATIVE_FRAME_SETUP_FC_PROT_FRAME_MASK_MASK 0x0000000000000040 315 316 317 /* Description FC_ORDER_MASK 318 319 Consumer: TXOLE 320 Producer: SW 321 322 Field only valid for MSDU frames with enc_type == RAW or 323 Native WiFi 324 325 Note: 326 When enc_type != RAW or Native WiFi, OLE will get the setting 327 from the frame_ctl field in the MPDU_queue extension data 328 structure. 329 330 <enum 0 mask_disable>: HW is allowed to update this field. 331 The value that HW (OLE) will insert is the given in field: 332 fc_order_setting. 333 <enum 1 mask_enable>: HW is not allowed to update the contents 334 of this field. 335 336 <legal all> 337 338 In 11ah mode of Operation, same description as above applies 339 if this field is a part of FC field of the MPDU. 340 */ 341 342 #define TX_RAW_OR_NATIVE_FRAME_SETUP_FC_ORDER_MASK_OFFSET 0x0000000000000000 343 #define TX_RAW_OR_NATIVE_FRAME_SETUP_FC_ORDER_MASK_LSB 7 344 #define TX_RAW_OR_NATIVE_FRAME_SETUP_FC_ORDER_MASK_MSB 7 345 #define TX_RAW_OR_NATIVE_FRAME_SETUP_FC_ORDER_MASK_MASK 0x0000000000000080 346 347 348 /* Description DURATION_FIELD_MASK 349 350 Consumer: TXOLE 351 Producer: SW 352 353 Field only valid for MPDU frames with MSDU enc_type == RAW 354 or Native WiFi 355 356 Note: 357 When enc_type != RAW or Native WiFi, TX PCU will get the 358 value for this field from the Duration fields in the PPDU_SS_... 359 TLVs from PDG. 360 361 <enum 0 mask_disable>: HW is allowed to update this field. 362 The value that HW (TX_PCU) will insert is coming from the 363 Duration fields in the PPDU_SS_... TLVs from PDG (similar 364 as with NON RAW/Native WiFi frames). 365 <enum 1 mask_enable>: HW is not allowed to update the contents 366 of this field. 367 368 <legal all> 369 370 In 11ah mode of Operation, same description as above applies 371 if this field is a part of FC field of the MPDU. 372 */ 373 374 #define TX_RAW_OR_NATIVE_FRAME_SETUP_DURATION_FIELD_MASK_OFFSET 0x0000000000000000 375 #define TX_RAW_OR_NATIVE_FRAME_SETUP_DURATION_FIELD_MASK_LSB 8 376 #define TX_RAW_OR_NATIVE_FRAME_SETUP_DURATION_FIELD_MASK_MSB 8 377 #define TX_RAW_OR_NATIVE_FRAME_SETUP_DURATION_FIELD_MASK_MASK 0x0000000000000100 378 379 380 /* Description SEQUENCE_CONTROL_MASK 381 382 Consumer: TXOLE 383 Producer: SW 384 385 Field only valid for MPDU frames with MSDU enc_type == RAW 386 or Native WiFi 387 388 Note: 389 When enc_type != RAW or Native WiFi, OLE will base the value 390 for this field on sequence number field in the TX_MPDU_START 391 descriptor 392 393 <enum 0 mask_disable>: HW is allowed to update this field. 394 The value that HW (OLE) will insert is dependent on the 395 setting in the 'sequence_control_source' field 396 397 <enum 1 mask_enable>: HW is not allowed to update the contents 398 of this field. 399 400 <legal all> 401 */ 402 403 #define TX_RAW_OR_NATIVE_FRAME_SETUP_SEQUENCE_CONTROL_MASK_OFFSET 0x0000000000000000 404 #define TX_RAW_OR_NATIVE_FRAME_SETUP_SEQUENCE_CONTROL_MASK_LSB 9 405 #define TX_RAW_OR_NATIVE_FRAME_SETUP_SEQUENCE_CONTROL_MASK_MSB 9 406 #define TX_RAW_OR_NATIVE_FRAME_SETUP_SEQUENCE_CONTROL_MASK_MASK 0x0000000000000200 407 408 409 /* Description QC_TID_MASK 410 411 Consumer: TXOLE 412 Producer: SW 413 414 Field only valid for MPDU frames with MSDU enc_type == RAW 415 or Native WiFi 416 417 Note: 418 When enc_type != RAW or Native WiFi, OLE will base the value 419 for this field on the qos_ctl field from the MPDU_queue_ext 420 data structure. 421 422 <enum 0 mask_disable>: HW is allowed to update this field. 423 The value that HW (OLE) will insert is the given in field: 424 qc_tid_setting. 425 426 <enum 1 mask_enable>: HW is not allowed to update the contents 427 of this field. 428 429 <legal all> 430 */ 431 432 #define TX_RAW_OR_NATIVE_FRAME_SETUP_QC_TID_MASK_OFFSET 0x0000000000000000 433 #define TX_RAW_OR_NATIVE_FRAME_SETUP_QC_TID_MASK_LSB 10 434 #define TX_RAW_OR_NATIVE_FRAME_SETUP_QC_TID_MASK_MSB 10 435 #define TX_RAW_OR_NATIVE_FRAME_SETUP_QC_TID_MASK_MASK 0x0000000000000400 436 437 438 /* Description QC_EOSP_MASK 439 440 Consumer: TXOLE 441 Producer: SW 442 443 Field only valid for MPDU frames with MSDU enc_type == RAW 444 or Native WiFi 445 446 Note: 447 When enc_type != RAW or Native WiFi, OLE will base the value 448 for this field on the qos_ctl field from the MPDU_queue_ext 449 data structure. 450 451 TX_PCU has the abilty of overwrite the QoS eosp field, based 452 on the Set_fc_more_data field in the PPDU_SS_... TLVs given 453 by PDG. 454 455 <enum 0 mask_disable>: HW is allowed to update the QoS eosp 456 field. The value that HW (OLE) will insert is the given 457 in field: qc_eosp_setting. 458 459 <enum 1 mask_enable>: HW is not allowed to update the contents 460 of this field. 461 462 <legal all> 463 464 In 11ah mode of Operation, same description as above applies 465 if this field is a part of FC field of the MPDU. 466 */ 467 468 #define TX_RAW_OR_NATIVE_FRAME_SETUP_QC_EOSP_MASK_OFFSET 0x0000000000000000 469 #define TX_RAW_OR_NATIVE_FRAME_SETUP_QC_EOSP_MASK_LSB 11 470 #define TX_RAW_OR_NATIVE_FRAME_SETUP_QC_EOSP_MASK_MSB 11 471 #define TX_RAW_OR_NATIVE_FRAME_SETUP_QC_EOSP_MASK_MASK 0x0000000000000800 472 473 474 /* Description QC_ACK_POLICY_MASK 475 476 Consumer: TXOLE 477 Producer: SW 478 479 Field only valid for MPDU frames with MSDU enc_type == RAW 480 or Native WiFi 481 482 Note: 483 When enc_type != RAW or Native WiFi, OLE will base the value 484 for this field on the qos_ctl field from the MPDU_queue_ext 485 data structure. 486 487 <enum 0 mask_disable>: HW is allowed to update the QoS ack 488 policy field. The value that HW (OLE) will insert is determined 489 by field: qc_ack_policy_setting. 490 491 <enum 1 mask_enable>: HW is not allowed to update the contents 492 of this field. 493 494 <legal all> 495 */ 496 497 #define TX_RAW_OR_NATIVE_FRAME_SETUP_QC_ACK_POLICY_MASK_OFFSET 0x0000000000000000 498 #define TX_RAW_OR_NATIVE_FRAME_SETUP_QC_ACK_POLICY_MASK_LSB 12 499 #define TX_RAW_OR_NATIVE_FRAME_SETUP_QC_ACK_POLICY_MASK_MSB 12 500 #define TX_RAW_OR_NATIVE_FRAME_SETUP_QC_ACK_POLICY_MASK_MASK 0x0000000000001000 501 502 503 /* Description QC_AMSDU_MASK 504 505 Consumer: TXOLE 506 Producer: SW 507 508 Field only valid for MPDU frames with MSDU enc_type == RAW 509 or Native WiFi 510 511 Note: 512 When enc_type != RAW or Native WiFi, OLE will base the value 513 for this field on the qos_ctl field from the MPDU_queue_ext 514 data structure. 515 516 <enum 0 mask_disable>: HW is allowed to update the QoS amsdu 517 field. The value that HW (OLE) will insert is determined 518 by field: qc_amsdu_setting. 519 520 <enum 1 mask_enable>: HW is not allowed to update the contents 521 of this field. 522 523 <legal all> 524 */ 525 526 #define TX_RAW_OR_NATIVE_FRAME_SETUP_QC_AMSDU_MASK_OFFSET 0x0000000000000000 527 #define TX_RAW_OR_NATIVE_FRAME_SETUP_QC_AMSDU_MASK_LSB 13 528 #define TX_RAW_OR_NATIVE_FRAME_SETUP_QC_AMSDU_MASK_MSB 13 529 #define TX_RAW_OR_NATIVE_FRAME_SETUP_QC_AMSDU_MASK_MASK 0x0000000000002000 530 531 532 /* Description RESERVED_0A 533 534 <legal 0> 535 */ 536 537 #define TX_RAW_OR_NATIVE_FRAME_SETUP_RESERVED_0A_OFFSET 0x0000000000000000 538 #define TX_RAW_OR_NATIVE_FRAME_SETUP_RESERVED_0A_LSB 14 539 #define TX_RAW_OR_NATIVE_FRAME_SETUP_RESERVED_0A_MSB 14 540 #define TX_RAW_OR_NATIVE_FRAME_SETUP_RESERVED_0A_MASK 0x0000000000004000 541 542 543 /* Description QC_15TO8_MASK 544 545 Consumer: TXOLE 546 Producer: SW 547 548 Field only valid for MPDU frames with MSDU enc_type == RAW 549 or Native WiFi 550 551 Note: 552 When enc_type != RAW or Native WiFi, OLE will base the value 553 for this field on the qos_ctl field from the MPDU_queue_ext 554 data structure. 555 556 <enum 0 mask_disable>: HW is allowed to update the QoS control 557 field, bits 15-8. The value that HW (OLE) will insert is 558 determined by field: qc_15to8_setting. 559 560 <enum 1 mask_enable>: HW is not allowed to update the contents 561 of this field. 562 563 <legal all> 564 */ 565 566 #define TX_RAW_OR_NATIVE_FRAME_SETUP_QC_15TO8_MASK_OFFSET 0x0000000000000000 567 #define TX_RAW_OR_NATIVE_FRAME_SETUP_QC_15TO8_MASK_LSB 15 568 #define TX_RAW_OR_NATIVE_FRAME_SETUP_QC_15TO8_MASK_MSB 15 569 #define TX_RAW_OR_NATIVE_FRAME_SETUP_QC_15TO8_MASK_MASK 0x0000000000008000 570 571 572 /* Description IV_MASK 573 574 Consumer: TXOLE 575 Producer: SW 576 577 Field only valid for MPDU frames with MSDU enc_type == RAW 578 or Native WiFi 579 580 Note: 581 When enc_type != RAW or Native WiFi, OLE will base the IV 582 field insertion/value on the on the encryption type indicate 583 with the key_type setting in the peer entry 584 585 <enum 0 mask_disable>: OLE is allowed to overwrite the IV 586 field, in case key_type setting in the peer entry indicates 587 some encryption. 588 589 <enum 1 mask_enable>: OLE is not allowed to overwrite any 590 of the IV field contents. 591 <legal all> 592 */ 593 594 #define TX_RAW_OR_NATIVE_FRAME_SETUP_IV_MASK_OFFSET 0x0000000000000000 595 #define TX_RAW_OR_NATIVE_FRAME_SETUP_IV_MASK_LSB 16 596 #define TX_RAW_OR_NATIVE_FRAME_SETUP_IV_MASK_MSB 16 597 #define TX_RAW_OR_NATIVE_FRAME_SETUP_IV_MASK_MASK 0x0000000000010000 598 599 600 /* Description FC_TO_DS_SETTING 601 602 Consumer: TXOLE 603 Producer: SW 604 605 Field only valid for MSDU frames with enc_type == RAW or 606 Native WiFi. 607 Field only valid when field Fc_to_ds_mask is not set. 608 609 <enum 0 clear>: OLE will set the frame control field, to 610 ds bit to 0 611 <enum 1 set>: OLE will set the frame control field, to ds 612 bit to 1 613 <legal all> 614 */ 615 616 #define TX_RAW_OR_NATIVE_FRAME_SETUP_FC_TO_DS_SETTING_OFFSET 0x0000000000000000 617 #define TX_RAW_OR_NATIVE_FRAME_SETUP_FC_TO_DS_SETTING_LSB 17 618 #define TX_RAW_OR_NATIVE_FRAME_SETUP_FC_TO_DS_SETTING_MSB 17 619 #define TX_RAW_OR_NATIVE_FRAME_SETUP_FC_TO_DS_SETTING_MASK 0x0000000000020000 620 621 622 /* Description FC_FROM_DS_SETTING 623 624 Consumer: TXOLE 625 Producer: SW 626 627 Field only valid for MSDU frames with enc_type == RAW or 628 Native WiFi. 629 Field only valid when field Fc_from_ds_mask is not set. 630 631 <enum 0 clear>: OLE will set the frame control field, from 632 ds bit to 0 633 <enum 1 set>: OLE will set the frame control field, from 634 ds bit to 1 635 <legal all> 636 */ 637 638 #define TX_RAW_OR_NATIVE_FRAME_SETUP_FC_FROM_DS_SETTING_OFFSET 0x0000000000000000 639 #define TX_RAW_OR_NATIVE_FRAME_SETUP_FC_FROM_DS_SETTING_LSB 18 640 #define TX_RAW_OR_NATIVE_FRAME_SETUP_FC_FROM_DS_SETTING_MSB 18 641 #define TX_RAW_OR_NATIVE_FRAME_SETUP_FC_FROM_DS_SETTING_MASK 0x0000000000040000 642 643 644 /* Description FC_MORE_FRAG_SETTING 645 646 Consumer: TXOLE 647 Producer: SW 648 649 Field only valid for MSDU frames with enc_type == RAW or 650 Native WiFi. 651 Field only valid when field Fc_more_frag_mask is not set. 652 653 654 <enum 0 clear>: OLE will set the frame control field, more 655 frag bit to 0 656 <enum 1 set>: OLE will set the frame control field, more 657 frag bit to 1 658 <legal all> 659 */ 660 661 #define TX_RAW_OR_NATIVE_FRAME_SETUP_FC_MORE_FRAG_SETTING_OFFSET 0x0000000000000000 662 #define TX_RAW_OR_NATIVE_FRAME_SETUP_FC_MORE_FRAG_SETTING_LSB 19 663 #define TX_RAW_OR_NATIVE_FRAME_SETUP_FC_MORE_FRAG_SETTING_MSB 19 664 #define TX_RAW_OR_NATIVE_FRAME_SETUP_FC_MORE_FRAG_SETTING_MASK 0x0000000000080000 665 666 667 /* Description FC_RETRY_SETTING 668 669 Consumer: TXOLE 670 Producer: SW 671 672 Field only valid for MSDU frames with enc_type == RAW or 673 Native WiFi. 674 Field only valid when field Fc_retry_mask is not set. 675 676 <enum 0 fc_retry_clear>: OLE will set the frame control 677 field, retry bit to 0 678 <enum 1 fc_retry_set>: OLE will set the frame control field, 679 retry bit to 1 680 <enum 2 fc_retry_bimap_based>: OLE will base the setting 681 for this field on the retry_bitmap_31_0 and retry_bitmap_63_32 682 fields in the MPDU_queue_extension descriptor 683 684 <legal 0-2> 685 */ 686 687 #define TX_RAW_OR_NATIVE_FRAME_SETUP_FC_RETRY_SETTING_OFFSET 0x0000000000000000 688 #define TX_RAW_OR_NATIVE_FRAME_SETUP_FC_RETRY_SETTING_LSB 20 689 #define TX_RAW_OR_NATIVE_FRAME_SETUP_FC_RETRY_SETTING_MSB 21 690 #define TX_RAW_OR_NATIVE_FRAME_SETUP_FC_RETRY_SETTING_MASK 0x0000000000300000 691 692 693 /* Description FC_PWR_MGT_SETTING 694 695 Field only valid for MSDU frames with enc_type == RAW or 696 Native WiFi. 697 Field only valid when field Fc_pwr_mgt_mask is not set. 698 699 <enum 0 clear>: OLE will set the frame control field, pwr_mgt 700 bit to 0 701 <enum 1 set>: OLE will set the frame control field, pwr_mgt 702 bit to 1 703 <legal all> 704 */ 705 706 #define TX_RAW_OR_NATIVE_FRAME_SETUP_FC_PWR_MGT_SETTING_OFFSET 0x0000000000000000 707 #define TX_RAW_OR_NATIVE_FRAME_SETUP_FC_PWR_MGT_SETTING_LSB 22 708 #define TX_RAW_OR_NATIVE_FRAME_SETUP_FC_PWR_MGT_SETTING_MSB 22 709 #define TX_RAW_OR_NATIVE_FRAME_SETUP_FC_PWR_MGT_SETTING_MASK 0x0000000000400000 710 711 712 /* Description FC_MORE_DATA_SETTING 713 714 Consumer: TXOLE 715 Producer: SW 716 717 Field only valid for MSDU frames with enc_type == RAW or 718 Native WiFi. 719 Field only valid when field Fc_more_Data_mask is not set. 720 721 722 <enum 0 fc_more_data_clear>: OLE will set the frame control 723 field, More data bit to 0 724 <enum 1 fc_more_data_set>: OLE will set the frame control 725 field, More data bit to 1 726 727 <enum 2 fc_more_data_pdg_based>: OLE will set the Frame 728 control, More data bit to 0, but TX_PCU has the abilty to 729 overwrite this based on the Set_fc_more_data field in the 730 PPDU_SS_... TLVs given by PDG. 731 732 <legal 0-2> 733 */ 734 735 #define TX_RAW_OR_NATIVE_FRAME_SETUP_FC_MORE_DATA_SETTING_OFFSET 0x0000000000000000 736 #define TX_RAW_OR_NATIVE_FRAME_SETUP_FC_MORE_DATA_SETTING_LSB 23 737 #define TX_RAW_OR_NATIVE_FRAME_SETUP_FC_MORE_DATA_SETTING_MSB 24 738 #define TX_RAW_OR_NATIVE_FRAME_SETUP_FC_MORE_DATA_SETTING_MASK 0x0000000001800000 739 740 741 /* Description FC_PROT_FRAME_SETTING 742 743 Consumer: TXOLE 744 Producer: SW 745 746 Field only valid for MSDU frames with enc_type == RAW or 747 Native WiFi. 748 Field only valid when field Fc_prot_frame_mask is not set. 749 750 751 <enum 0 fc_prot_frame_clear>: OLE will set the frame control 752 field , "Protected Frame" bit to 0 753 <enum 1 fc_prot_frame_set>: OLE will set the frame control 754 field , "Protected Frame" bit to 1 755 <enum 2 fc_prot_frame_encap_type_based>: OLE configures 756 the Frame Control field, Prot frame bit according to the 757 following rule: 758 When the encryption type indicated with the key_type setting 759 in the peer entry is set to no crypto, the Frame control 760 "Protected Frame" bit is set to 0. 761 When the encryption type indicated with the key_type setting 762 in the peer entry is set to some encryption type, the OLE 763 will set the frame control "Protected Frame" bit to 1. 764 OLE changes only the value of the prot_frame bit. It won't 765 push IV in the frame according to this bit. 766 767 <legal 0-2> 768 */ 769 770 #define TX_RAW_OR_NATIVE_FRAME_SETUP_FC_PROT_FRAME_SETTING_OFFSET 0x0000000000000000 771 #define TX_RAW_OR_NATIVE_FRAME_SETUP_FC_PROT_FRAME_SETTING_LSB 25 772 #define TX_RAW_OR_NATIVE_FRAME_SETUP_FC_PROT_FRAME_SETTING_MSB 26 773 #define TX_RAW_OR_NATIVE_FRAME_SETUP_FC_PROT_FRAME_SETTING_MASK 0x0000000006000000 774 775 776 /* Description FC_ORDER_SETTING 777 778 Consumer: TXOLE 779 Producer: SW 780 781 Field only valid for MSDU frames with enc_type == RAW or 782 Native WiFi. 783 Field only valid when field Fc_order_mask is not set. 784 785 <enum 0 clear>: OLE will set the frame control field , order 786 bit to 0 787 <enum 1 set>: OLE will set the frame control field , order 788 bit to 1 789 <legal all> 790 */ 791 792 #define TX_RAW_OR_NATIVE_FRAME_SETUP_FC_ORDER_SETTING_OFFSET 0x0000000000000000 793 #define TX_RAW_OR_NATIVE_FRAME_SETUP_FC_ORDER_SETTING_LSB 27 794 #define TX_RAW_OR_NATIVE_FRAME_SETUP_FC_ORDER_SETTING_MSB 27 795 #define TX_RAW_OR_NATIVE_FRAME_SETUP_FC_ORDER_SETTING_MASK 0x0000000008000000 796 797 798 /* Description QC_TID_SETTING 799 800 Consumer: TXOLE 801 Producer: SW 802 803 Field only valid for MSDU frames with enc_type == RAW or 804 Native WiFi. 805 Field only valid when field Qc_tid_mask is not set. 806 807 OLE sets the TID field in the QoS control field to this 808 value. 809 810 <legal all> 811 */ 812 813 #define TX_RAW_OR_NATIVE_FRAME_SETUP_QC_TID_SETTING_OFFSET 0x0000000000000000 814 #define TX_RAW_OR_NATIVE_FRAME_SETUP_QC_TID_SETTING_LSB 28 815 #define TX_RAW_OR_NATIVE_FRAME_SETUP_QC_TID_SETTING_MSB 31 816 #define TX_RAW_OR_NATIVE_FRAME_SETUP_QC_TID_SETTING_MASK 0x00000000f0000000 817 818 819 /* Description QC_EOSP_SETTING 820 821 Consumer: TXOLE 822 Producer: SW 823 824 Field only valid for MSDU frames with enc_type == RAW or 825 Native WiFi. 826 Field only valid when field Qc_eosp_mask is not set. 827 828 <enum 0 qc_eosp_clear>: OLE will set the QoS control bit 829 to 0 830 <enum 1 qc_eosp_set>: OLE will set the QoS control bit to 831 1 832 <enum 2 qc_eosp_pdg_based>: OLE will set the QoS control 833 bit to 0, but TX_PCU has the abilty of overwrite the QoS 834 eosp field, based on the Set_fc_more_data field in the 835 PPDU_SS_... TLVs given by PDG. 836 837 <legal 0-2> 838 */ 839 840 #define TX_RAW_OR_NATIVE_FRAME_SETUP_QC_EOSP_SETTING_OFFSET 0x0000000000000000 841 #define TX_RAW_OR_NATIVE_FRAME_SETUP_QC_EOSP_SETTING_LSB 32 842 #define TX_RAW_OR_NATIVE_FRAME_SETUP_QC_EOSP_SETTING_MSB 33 843 #define TX_RAW_OR_NATIVE_FRAME_SETUP_QC_EOSP_SETTING_MASK 0x0000000300000000 844 845 846 /* Description QC_ACK_POLICY_SETTING 847 848 Consumer: TXOLE 849 Producer: SW 850 851 Field only valid for MSDU frames with enc_type == RAW or 852 Native WiFi. 853 Field only valid when field Qc_ack_policy_mask is not set. 854 855 856 This is is QoS ACK policy value that RXOLE shall put in 857 the ACK policy field in the QoS control field 858 859 <legal all> 860 */ 861 862 #define TX_RAW_OR_NATIVE_FRAME_SETUP_QC_ACK_POLICY_SETTING_OFFSET 0x0000000000000000 863 #define TX_RAW_OR_NATIVE_FRAME_SETUP_QC_ACK_POLICY_SETTING_LSB 34 864 #define TX_RAW_OR_NATIVE_FRAME_SETUP_QC_ACK_POLICY_SETTING_MSB 35 865 #define TX_RAW_OR_NATIVE_FRAME_SETUP_QC_ACK_POLICY_SETTING_MASK 0x0000000c00000000 866 867 868 /* Description QC_AMSDU_SETTING 869 870 Consumer: TXOLE 871 Producer: SW 872 873 Field only valid for MSDU frames with enc_type == RAW or 874 Native WiFi. 875 Field only valid when field Qc_amsdu_mask is not set. 876 877 <enum 0 clear>: OLE will set the QoS control field amsdu 878 bit to 0 879 <enum 1 set>: OLE will set the QoS control field amsdu bit 880 to 1 881 882 <legal all> 883 */ 884 885 #define TX_RAW_OR_NATIVE_FRAME_SETUP_QC_AMSDU_SETTING_OFFSET 0x0000000000000000 886 #define TX_RAW_OR_NATIVE_FRAME_SETUP_QC_AMSDU_SETTING_LSB 36 887 #define TX_RAW_OR_NATIVE_FRAME_SETUP_QC_AMSDU_SETTING_MSB 36 888 #define TX_RAW_OR_NATIVE_FRAME_SETUP_QC_AMSDU_SETTING_MASK 0x0000001000000000 889 890 891 /* Description QC_15TO8_SETTING 892 893 Consumer: TXOLE 894 Producer: SW 895 896 Field only valid for MSDU frames with enc_type == RAW or 897 Native WiFi. 898 Field only valid when field Qc_15to8_mask is not set. 899 900 OLE sets bit 8 to 16 in the QoS control field to this value. 901 902 903 <legal all> 904 */ 905 906 #define TX_RAW_OR_NATIVE_FRAME_SETUP_QC_15TO8_SETTING_OFFSET 0x0000000000000000 907 #define TX_RAW_OR_NATIVE_FRAME_SETUP_QC_15TO8_SETTING_LSB 37 908 #define TX_RAW_OR_NATIVE_FRAME_SETUP_QC_15TO8_SETTING_MSB 44 909 #define TX_RAW_OR_NATIVE_FRAME_SETUP_QC_15TO8_SETTING_MASK 0x00001fe000000000 910 911 912 /* Description MLO_ADDR_OVERRIDE 913 914 Consumer: TXOLE 915 Producer: SW 916 917 Field only valid for MSDU frames with enc_type == RAW or 918 Native WiFi. 919 920 Enables address translation for raw Wi-Fi frames to multi-link 921 peers, esp. management frames 922 <legal all> 923 */ 924 925 #define TX_RAW_OR_NATIVE_FRAME_SETUP_MLO_ADDR_OVERRIDE_OFFSET 0x0000000000000000 926 #define TX_RAW_OR_NATIVE_FRAME_SETUP_MLO_ADDR_OVERRIDE_LSB 45 927 #define TX_RAW_OR_NATIVE_FRAME_SETUP_MLO_ADDR_OVERRIDE_MSB 45 928 #define TX_RAW_OR_NATIVE_FRAME_SETUP_MLO_ADDR_OVERRIDE_MASK 0x0000200000000000 929 930 931 /* Description MLO_IGNORE_ADDR3_OVERRIDE 932 933 Consumer: TXOLE 934 Producer: SW 935 936 Field only valid for MSDU frames with enc_type == RAW or 937 Native WiFi when Mlo_addr_override is set. 938 939 Preserves Address3 (BSSID) for raw Wi-Fi management frames 940 to multi-link peers. 941 942 <legal all> 943 */ 944 945 #define TX_RAW_OR_NATIVE_FRAME_SETUP_MLO_IGNORE_ADDR3_OVERRIDE_OFFSET 0x0000000000000000 946 #define TX_RAW_OR_NATIVE_FRAME_SETUP_MLO_IGNORE_ADDR3_OVERRIDE_LSB 46 947 #define TX_RAW_OR_NATIVE_FRAME_SETUP_MLO_IGNORE_ADDR3_OVERRIDE_MSB 46 948 #define TX_RAW_OR_NATIVE_FRAME_SETUP_MLO_IGNORE_ADDR3_OVERRIDE_MASK 0x0000400000000000 949 950 951 /* Description SEQUENCE_CONTROL_SOURCE 952 953 Field only valid when field Sequence_control_mask is set 954 to 'mask_disable'. 955 956 <enum 0 seq_ctrl_source_mpdu_start>: OLE will set the sequence 957 control field based on what is indicated in the TX_MPDU_START 958 TLV. 959 960 <enum 1 seq_ctrl_source_this_tlv>: OLE will set the sequence 961 control field based on what is indicated in this TLV, fields 962 Fragment_number and Sequence_number 963 Note that this setting assumes that there is only a single 964 RAW or Native Wifi MPDU for this user in the transmit path. 965 This works well for level 1 fragmentation. Reason that there 966 should only be a single RAW or Native WiFi frames is that 967 with this feature they would all get the same sequence + 968 fragment number 969 970 <legal 0-1> 971 */ 972 973 #define TX_RAW_OR_NATIVE_FRAME_SETUP_SEQUENCE_CONTROL_SOURCE_OFFSET 0x0000000000000000 974 #define TX_RAW_OR_NATIVE_FRAME_SETUP_SEQUENCE_CONTROL_SOURCE_LSB 47 975 #define TX_RAW_OR_NATIVE_FRAME_SETUP_SEQUENCE_CONTROL_SOURCE_MSB 47 976 #define TX_RAW_OR_NATIVE_FRAME_SETUP_SEQUENCE_CONTROL_SOURCE_MASK 0x0000800000000000 977 978 979 /* Description FRAGMENT_NUMBER 980 981 Consumer: TXOLE 982 Producer: SW 983 984 Field only valid for MSDU frames with enc_type == RAW or 985 Native WiFi. 986 987 Field only valid when field Sequence_control_mask = mask_disable 988 AND sequence_control_source is set to seq_ctrl_source_this_tlv 989 990 991 The Fragment number to be filled in 992 <legal all> 993 */ 994 995 #define TX_RAW_OR_NATIVE_FRAME_SETUP_FRAGMENT_NUMBER_OFFSET 0x0000000000000000 996 #define TX_RAW_OR_NATIVE_FRAME_SETUP_FRAGMENT_NUMBER_LSB 48 997 #define TX_RAW_OR_NATIVE_FRAME_SETUP_FRAGMENT_NUMBER_MSB 51 998 #define TX_RAW_OR_NATIVE_FRAME_SETUP_FRAGMENT_NUMBER_MASK 0x000f000000000000 999 1000 1001 /* Description SEQUENCE_NUMBER 1002 1003 Consumer: TXOLE 1004 Producer: SW 1005 1006 Field only valid for MSDU frames with enc_type == RAW or 1007 Native WiFi. 1008 1009 Field only valid when field Sequence_control_mask = mask_disable 1010 AND sequence_control_source is set to seq_ctrl_source_this_tlv 1011 1012 1013 The Sequence number to be filled in 1014 <legal all> 1015 */ 1016 1017 #define TX_RAW_OR_NATIVE_FRAME_SETUP_SEQUENCE_NUMBER_OFFSET 0x0000000000000000 1018 #define TX_RAW_OR_NATIVE_FRAME_SETUP_SEQUENCE_NUMBER_LSB 52 1019 #define TX_RAW_OR_NATIVE_FRAME_SETUP_SEQUENCE_NUMBER_MSB 63 1020 #define TX_RAW_OR_NATIVE_FRAME_SETUP_SEQUENCE_NUMBER_MASK 0xfff0000000000000 1021 1022 1023 1024 #endif // TX_RAW_OR_NATIVE_FRAME_SETUP 1025