xref: /wlan-driver/fw-api/hw/qcn6432/txpcu_buffer_status.h (revision 5113495b16420b49004c444715d2daae2066e7dc)
1 /*
2  * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
3  *
4  * Permission to use, copy, modify, and/or distribute this software for any
5  * purpose with or without fee is hereby granted, provided that the above
6  * copyright notice and this permission notice appear in all copies.
7  *
8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15  */
16 
17 #ifndef _TXPCU_BUFFER_STATUS_H_
18 #define _TXPCU_BUFFER_STATUS_H_
19 #if !defined(__ASSEMBLER__)
20 #endif
21 
22 #include "txpcu_buffer_basics.h"
23 #define NUM_OF_DWORDS_TXPCU_BUFFER_STATUS 2
24 
25 #define NUM_OF_QWORDS_TXPCU_BUFFER_STATUS 1
26 
27 
28 struct txpcu_buffer_status {
29 #ifndef WIFI_BIT_ORDER_BIG_ENDIAN
30              struct   txpcu_buffer_basics                                       txpcu_basix_buffer_info;
31              uint32_t reserved                                                : 15, // [14:0]
32                       msdu_end                                                :  1, // [15:15]
33                       tx_data_sync_value                                      : 16; // [31:16]
34 #else
35              struct   txpcu_buffer_basics                                       txpcu_basix_buffer_info;
36              uint32_t tx_data_sync_value                                      : 16, // [31:16]
37                       msdu_end                                                :  1, // [15:15]
38                       reserved                                                : 15; // [14:0]
39 #endif
40 };
41 
42 
43 /* Description		TXPCU_BASIX_BUFFER_INFO
44 
45 			Global overview of the TXPCU buffer
46 			<legal all>
47 */
48 
49 
50 /* Description		AVAILABLE_MEMORY
51 
52 			The amount of TX_FIFO memory in 128 byte units that is available.
53 
54 			TXPCU gets this from the Avail_fifo_mem signal from SFM.
55 
56 
57 			When SFM is indicating a larger available amount, that value
58 			 shall be saturated to 0xFF in this field.
59 
60 			<legal all>
61 */
62 
63 #define TXPCU_BUFFER_STATUS_TXPCU_BASIX_BUFFER_INFO_AVAILABLE_MEMORY_OFFSET         0x0000000000000000
64 #define TXPCU_BUFFER_STATUS_TXPCU_BASIX_BUFFER_INFO_AVAILABLE_MEMORY_LSB            0
65 #define TXPCU_BUFFER_STATUS_TXPCU_BASIX_BUFFER_INFO_AVAILABLE_MEMORY_MSB            7
66 #define TXPCU_BUFFER_STATUS_TXPCU_BASIX_BUFFER_INFO_AVAILABLE_MEMORY_MASK           0x00000000000000ff
67 
68 
69 /* Description		PARTIAL_TX_DATA_TLV_COUNT
70 
71 			The number of  16 bytes units received of the TX_DATA TLV
72 			 that is currently under reception by TXPCU.
73 			Value saturates at 255 in case TX_DATA TLV length is larger
74 			 then 4080 bytes. This is unlikely as TX_DATA will generally
75 			 not be larger then then the Max MSDU size.
76 			<legal all>
77 */
78 
79 #define TXPCU_BUFFER_STATUS_TXPCU_BASIX_BUFFER_INFO_PARTIAL_TX_DATA_TLV_COUNT_OFFSET 0x0000000000000000
80 #define TXPCU_BUFFER_STATUS_TXPCU_BASIX_BUFFER_INFO_PARTIAL_TX_DATA_TLV_COUNT_LSB   8
81 #define TXPCU_BUFFER_STATUS_TXPCU_BASIX_BUFFER_INFO_PARTIAL_TX_DATA_TLV_COUNT_MSB   15
82 #define TXPCU_BUFFER_STATUS_TXPCU_BASIX_BUFFER_INFO_PARTIAL_TX_DATA_TLV_COUNT_MASK  0x000000000000ff00
83 
84 
85 /* Description		TX_DATA_TLV_COUNT
86 
87 			The number of completely received TX_DATA TLVs (of all the
88 			 users together) received by TXPCU
89 			<legal all>
90 */
91 
92 #define TXPCU_BUFFER_STATUS_TXPCU_BASIX_BUFFER_INFO_TX_DATA_TLV_COUNT_OFFSET        0x0000000000000000
93 #define TXPCU_BUFFER_STATUS_TXPCU_BASIX_BUFFER_INFO_TX_DATA_TLV_COUNT_LSB           16
94 #define TXPCU_BUFFER_STATUS_TXPCU_BASIX_BUFFER_INFO_TX_DATA_TLV_COUNT_MSB           31
95 #define TXPCU_BUFFER_STATUS_TXPCU_BASIX_BUFFER_INFO_TX_DATA_TLV_COUNT_MASK          0x00000000ffff0000
96 
97 
98 /* Description		RESERVED
99 
100 			<legal 0>
101 */
102 
103 #define TXPCU_BUFFER_STATUS_RESERVED_OFFSET                                         0x0000000000000000
104 #define TXPCU_BUFFER_STATUS_RESERVED_LSB                                            32
105 #define TXPCU_BUFFER_STATUS_RESERVED_MSB                                            46
106 #define TXPCU_BUFFER_STATUS_RESERVED_MASK                                           0x00007fff00000000
107 
108 
109 /* Description		MSDU_END
110 
111 			Bit to indicate that TXPCU has received an entire MSDU and
112 			 'TX_MSDU_END'
113 			<legal all>
114 */
115 
116 #define TXPCU_BUFFER_STATUS_MSDU_END_OFFSET                                         0x0000000000000000
117 #define TXPCU_BUFFER_STATUS_MSDU_END_LSB                                            47
118 #define TXPCU_BUFFER_STATUS_MSDU_END_MSB                                            47
119 #define TXPCU_BUFFER_STATUS_MSDU_END_MASK                                           0x0000800000000000
120 
121 
122 /* Description		TX_DATA_SYNC_VALUE
123 
124 			The last received sync_value number from the TX_DATA_SYNC
125 			 TLV
126 			At reception of TX_FES_SETUP, TXPCU initializes this value
127 			 to 0
128 			<legal all>
129 */
130 
131 #define TXPCU_BUFFER_STATUS_TX_DATA_SYNC_VALUE_OFFSET                               0x0000000000000000
132 #define TXPCU_BUFFER_STATUS_TX_DATA_SYNC_VALUE_LSB                                  48
133 #define TXPCU_BUFFER_STATUS_TX_DATA_SYNC_VALUE_MSB                                  63
134 #define TXPCU_BUFFER_STATUS_TX_DATA_SYNC_VALUE_MASK                                 0xffff000000000000
135 
136 
137 
138 #endif   // TXPCU_BUFFER_STATUS
139