1 /* 2 * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for any 5 * purpose with or without fee is hereby granted, provided that the above 6 * copyright notice and this permission notice appear in all copies. 7 * 8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15 */ 16 17 #ifndef _WBM_RELEASE_RING_TX_H_ 18 #define _WBM_RELEASE_RING_TX_H_ 19 #if !defined(__ASSEMBLER__) 20 #endif 21 22 #include "tx_rate_stats_info.h" 23 #include "buffer_addr_info.h" 24 #define NUM_OF_DWORDS_WBM_RELEASE_RING_TX 8 25 26 27 struct wbm_release_ring_tx { 28 #ifndef WIFI_BIT_ORDER_BIG_ENDIAN 29 struct buffer_addr_info released_buff_or_desc_addr_info; 30 uint32_t release_source_module : 3, // [2:0] 31 bm_action : 3, // [5:3] 32 buffer_or_desc_type : 3, // [8:6] 33 first_msdu_index : 4, // [12:9] 34 tqm_release_reason : 4, // [16:13] 35 rbm_override_valid : 1, // [17:17] 36 rbm_override : 4, // [21:18] 37 reserved_2a : 7, // [28:22] 38 cache_id : 1, // [29:29] 39 cookie_conversion_status : 1, // [30:30] 40 wbm_internal_error : 1; // [31:31] 41 uint32_t tqm_status_number : 24, // [23:0] 42 transmit_count : 7, // [30:24] 43 sw_release_details_valid : 1; // [31:31] 44 uint32_t ack_frame_rssi : 8, // [7:0] 45 first_msdu : 1, // [8:8] 46 last_msdu : 1, // [9:9] 47 fw_tx_notify_frame : 3, // [12:10] 48 buffer_timestamp : 19; // [31:13] 49 struct tx_rate_stats_info tx_rate_stats; 50 uint32_t sw_peer_id : 16, // [15:0] 51 tid : 4, // [19:16] 52 tqm_status_number_31_24 : 8, // [27:20] 53 looping_count : 4; // [31:28] 54 #else 55 struct buffer_addr_info released_buff_or_desc_addr_info; 56 uint32_t wbm_internal_error : 1, // [31:31] 57 cookie_conversion_status : 1, // [30:30] 58 cache_id : 1, // [29:29] 59 reserved_2a : 7, // [28:22] 60 rbm_override : 4, // [21:18] 61 rbm_override_valid : 1, // [17:17] 62 tqm_release_reason : 4, // [16:13] 63 first_msdu_index : 4, // [12:9] 64 buffer_or_desc_type : 3, // [8:6] 65 bm_action : 3, // [5:3] 66 release_source_module : 3; // [2:0] 67 uint32_t sw_release_details_valid : 1, // [31:31] 68 transmit_count : 7, // [30:24] 69 tqm_status_number : 24; // [23:0] 70 uint32_t buffer_timestamp : 19, // [31:13] 71 fw_tx_notify_frame : 3, // [12:10] 72 last_msdu : 1, // [9:9] 73 first_msdu : 1, // [8:8] 74 ack_frame_rssi : 8; // [7:0] 75 struct tx_rate_stats_info tx_rate_stats; 76 uint32_t looping_count : 4, // [31:28] 77 tqm_status_number_31_24 : 8, // [27:20] 78 tid : 4, // [19:16] 79 sw_peer_id : 16; // [15:0] 80 #endif 81 }; 82 83 84 /* Description RELEASED_BUFF_OR_DESC_ADDR_INFO 85 86 Consumer: WBM/SW/FW 87 Producer: SW/TQM/RXDMA/REO/SWITCH 88 89 Details of the physical address of the buffer or link descriptor 90 that is being released. Note that within this descriptor, 91 WBM will look at the 'owner' of the released buffer/descriptor 92 and forward it to SW/FW is WBM is not the owner. 93 */ 94 95 96 /* Description BUFFER_ADDR_31_0 97 98 Address (lower 32 bits) of the MSDU buffer OR MSDU_EXTENSION 99 descriptor OR Link Descriptor 100 101 In case of 'NULL' pointer, this field is set to 0 102 <legal all> 103 */ 104 105 #define WBM_RELEASE_RING_TX_RELEASED_BUFF_OR_DESC_ADDR_INFO_BUFFER_ADDR_31_0_OFFSET 0x00000000 106 #define WBM_RELEASE_RING_TX_RELEASED_BUFF_OR_DESC_ADDR_INFO_BUFFER_ADDR_31_0_LSB 0 107 #define WBM_RELEASE_RING_TX_RELEASED_BUFF_OR_DESC_ADDR_INFO_BUFFER_ADDR_31_0_MSB 31 108 #define WBM_RELEASE_RING_TX_RELEASED_BUFF_OR_DESC_ADDR_INFO_BUFFER_ADDR_31_0_MASK 0xffffffff 109 110 111 /* Description BUFFER_ADDR_39_32 112 113 Address (upper 8 bits) of the MSDU buffer OR MSDU_EXTENSION 114 descriptor OR Link Descriptor 115 116 In case of 'NULL' pointer, this field is set to 0 117 <legal all> 118 */ 119 120 #define WBM_RELEASE_RING_TX_RELEASED_BUFF_OR_DESC_ADDR_INFO_BUFFER_ADDR_39_32_OFFSET 0x00000004 121 #define WBM_RELEASE_RING_TX_RELEASED_BUFF_OR_DESC_ADDR_INFO_BUFFER_ADDR_39_32_LSB 0 122 #define WBM_RELEASE_RING_TX_RELEASED_BUFF_OR_DESC_ADDR_INFO_BUFFER_ADDR_39_32_MSB 7 123 #define WBM_RELEASE_RING_TX_RELEASED_BUFF_OR_DESC_ADDR_INFO_BUFFER_ADDR_39_32_MASK 0x000000ff 124 125 126 /* Description RETURN_BUFFER_MANAGER 127 128 Consumer: WBM 129 Producer: SW/FW 130 131 In case of 'NULL' pointer, this field is set to 0 132 133 Indicates to which buffer manager the buffer OR MSDU_EXTENSION 134 descriptor OR link descriptor that is being pointed to 135 shall be returned after the frame has been processed. It 136 is used by WBM for routing purposes. 137 138 <enum 0 WBM_IDLE_BUF_LIST> This buffer shall be returned 139 to the WMB buffer idle list 140 <enum 1 WBM_CHIP0_IDLE_DESC_LIST> This buffer shall be returned 141 to the WBM idle link descriptor idle list, where the chip 142 0 WBM is chosen in case of a multi-chip config 143 <enum 2 WBM_CHIP1_IDLE_DESC_LIST> This buffer shall be returned 144 to the chip 1 WBM idle link descriptor idle list 145 <enum 3 WBM_CHIP2_IDLE_DESC_LIST> This buffer shall be returned 146 to the chip 2 WBM idle link descriptor idle list 147 <enum 12 WBM_CHIP3_IDLE_DESC_LIST> This buffer shall be 148 returned to chip 3 WBM idle link descriptor idle list 149 <enum 4 FW_BM> This buffer shall be returned to the FW 150 <enum 5 SW0_BM> This buffer shall be returned to the SW, 151 ring 0 152 <enum 6 SW1_BM> This buffer shall be returned to the SW, 153 ring 1 154 <enum 7 SW2_BM> This buffer shall be returned to the SW, 155 ring 2 156 <enum 8 SW3_BM> This buffer shall be returned to the SW, 157 ring 3 158 <enum 9 SW4_BM> This buffer shall be returned to the SW, 159 ring 4 160 <enum 10 SW5_BM> This buffer shall be returned to the SW, 161 ring 5 162 <enum 11 SW6_BM> This buffer shall be returned to the SW, 163 ring 6 164 165 <legal 0-12> 166 */ 167 168 #define WBM_RELEASE_RING_TX_RELEASED_BUFF_OR_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_OFFSET 0x00000004 169 #define WBM_RELEASE_RING_TX_RELEASED_BUFF_OR_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_LSB 8 170 #define WBM_RELEASE_RING_TX_RELEASED_BUFF_OR_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_MSB 11 171 #define WBM_RELEASE_RING_TX_RELEASED_BUFF_OR_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_MASK 0x00000f00 172 173 174 /* Description SW_BUFFER_COOKIE 175 176 Cookie field exclusively used by SW. 177 178 In case of 'NULL' pointer, this field is set to 0 179 180 HW ignores the contents, accept that it passes the programmed 181 value on to other descriptors together with the physical 182 address 183 184 Field can be used by SW to for example associate the buffers 185 physical address with the virtual address 186 The bit definitions as used by SW are within SW HLD specification 187 188 189 NOTE1: 190 The three most significant bits can have a special meaning 191 in case this struct is embedded in a TX_MPDU_DETAILS STRUCT, 192 and field transmit_bw_restriction is set 193 194 In case of NON punctured transmission: 195 Sw_buffer_cookie[19:17] = 3'b000: 20 MHz TX only 196 Sw_buffer_cookie[19:17] = 3'b001: 40 MHz TX only 197 Sw_buffer_cookie[19:17] = 3'b010: 80 MHz TX only 198 Sw_buffer_cookie[19:17] = 3'b011: 160 MHz TX only 199 Sw_buffer_cookie[19:17] = 3'b101: 240 MHz TX only 200 Sw_buffer_cookie[19:17] = 3'b100: 320 MHz TX only 201 Sw_buffer_cookie[19:18] = 2'b11: reserved 202 203 In case of punctured transmission: 204 Sw_buffer_cookie[19:16] = 4'b0000: pattern 0 only 205 Sw_buffer_cookie[19:16] = 4'b0001: pattern 1 only 206 Sw_buffer_cookie[19:16] = 4'b0010: pattern 2 only 207 Sw_buffer_cookie[19:16] = 4'b0011: pattern 3 only 208 Sw_buffer_cookie[19:16] = 4'b0100: pattern 4 only 209 Sw_buffer_cookie[19:16] = 4'b0101: pattern 5 only 210 Sw_buffer_cookie[19:16] = 4'b0110: pattern 6 only 211 Sw_buffer_cookie[19:16] = 4'b0111: pattern 7 only 212 Sw_buffer_cookie[19:16] = 4'b1000: pattern 8 only 213 Sw_buffer_cookie[19:16] = 4'b1001: pattern 9 only 214 Sw_buffer_cookie[19:16] = 4'b1010: pattern 10 only 215 Sw_buffer_cookie[19:16] = 4'b1011: pattern 11 only 216 Sw_buffer_cookie[19:18] = 2'b11: reserved 217 218 Note: a punctured transmission is indicated by the presence 219 of TLV TX_PUNCTURE_SETUP embedded in the scheduler TLV 220 221 <legal all> 222 */ 223 224 #define WBM_RELEASE_RING_TX_RELEASED_BUFF_OR_DESC_ADDR_INFO_SW_BUFFER_COOKIE_OFFSET 0x00000004 225 #define WBM_RELEASE_RING_TX_RELEASED_BUFF_OR_DESC_ADDR_INFO_SW_BUFFER_COOKIE_LSB 12 226 #define WBM_RELEASE_RING_TX_RELEASED_BUFF_OR_DESC_ADDR_INFO_SW_BUFFER_COOKIE_MSB 31 227 #define WBM_RELEASE_RING_TX_RELEASED_BUFF_OR_DESC_ADDR_INFO_SW_BUFFER_COOKIE_MASK 0xfffff000 228 229 230 /* Description RELEASE_SOURCE_MODULE 231 232 Indicates which module initiated the release of this buffer 233 or descriptor 234 235 <enum 1 release_source_RXDMA> DO NOT USE 236 <enum 2 release_source_REO> DO NOT USE 237 <enum 5 release_source_FW_RX> DO NOT USE 238 <enum 4 release_source_SW_RX> DO NOT USE 239 <enum 0 release_source_TQM> TQM released this buffer or 240 descriptor 241 <enum 3 release_source_FW_TX> FW released this buffer or 242 descriptor 243 <enum 6 release_source_SW_TX> SW released this buffer or 244 descriptor 245 <legal 0-6> 246 */ 247 248 #define WBM_RELEASE_RING_TX_RELEASE_SOURCE_MODULE_OFFSET 0x00000008 249 #define WBM_RELEASE_RING_TX_RELEASE_SOURCE_MODULE_LSB 0 250 #define WBM_RELEASE_RING_TX_RELEASE_SOURCE_MODULE_MSB 2 251 #define WBM_RELEASE_RING_TX_RELEASE_SOURCE_MODULE_MASK 0x00000007 252 253 254 /* Description BM_ACTION 255 256 Consumer: WBM/SW/FW 257 Producer: SW/TQM/RXDMA/REO/SWITCH 258 259 Field only valid when the field return_buffer_manager in 260 the Released_buff_or_desc_addr_info indicates: 261 WBM_IDLE_BUF_LIST or 262 WBM_IDLE_DESC_LIST 263 264 An MSDU extension descriptor shall never be marked as WBM 265 being the 'owner', and thus WBM will forward it to FW/SW 266 267 268 <enum 0 Put_in_idle_list> Put the buffer or descriptor back 269 in the idle list. In case of MSDU or MDPU link descriptor, 270 BM does not need to check to release any individual MSDU 271 buffers 272 273 <enum 1 release_msdu_list > This BM action can only be used 274 in combination with buffer_or_desc_type being msdu_link_descriptor. 275 Field first_msdu_index points out which MSDU pointer in 276 the MSDU link descriptor is the first of an MPDU that is 277 released. 278 BM shall release all the MSDU buffers linked to this first 279 MSDU buffer pointer. All related MSDU buffer pointer entries 280 shall be set to value 0, which represents the 'NULL" pointer. 281 When all MSDU buffer pointers in the MSDU link descriptor 282 are 'NULL', the MSDU link descriptor itself shall also 283 be released. 284 285 <enum 2 Put_in_idle_list_expanded> CURRENTLY NOT IMPLEMENTED.... 286 287 Put the buffer or descriptor back in the idle list. Only 288 valid in combination with buffer_or_desc_type indicating 289 MDPU_link_descriptor. 290 BM shall release the MPDU link descriptor as well as all 291 MSDUs that are linked to the MPDUs in this descriptor. 292 293 294 <legal 0-2> 295 */ 296 297 #define WBM_RELEASE_RING_TX_BM_ACTION_OFFSET 0x00000008 298 #define WBM_RELEASE_RING_TX_BM_ACTION_LSB 3 299 #define WBM_RELEASE_RING_TX_BM_ACTION_MSB 5 300 #define WBM_RELEASE_RING_TX_BM_ACTION_MASK 0x00000038 301 302 303 /* Description BUFFER_OR_DESC_TYPE 304 305 Consumer: WBM/SW/FW 306 Producer: SW/TQM/RXDMA/REO/SWITCH 307 308 Field only valid when WBM is marked as the return_buffer_manager 309 in the Released_Buffer_address_info 310 311 Indicates that type of buffer or descriptor is being released 312 313 314 <enum 0 MSDU_rel_buffer> The address points to an MSDU buffer 315 316 <enum 1 msdu_link_descriptor> The address points to an TX 317 MSDU link descriptor 318 <enum 2 mpdu_link_descriptor> The address points to an MPDU 319 link descriptor 320 <enum 3 msdu_ext_descriptor > The address points to an MSDU 321 extension descriptor. 322 In case BM finds this one in a release ring, it passes it 323 on to FW... 324 <enum 4 queue_ext_descriptor> The address points to an TQM 325 queue extension descriptor. WBM should treat this is the 326 same way as a link descriptor. That is, put the 128 byte 327 buffer back in the link buffer idle list. 328 329 <legal 0-4> 330 */ 331 332 #define WBM_RELEASE_RING_TX_BUFFER_OR_DESC_TYPE_OFFSET 0x00000008 333 #define WBM_RELEASE_RING_TX_BUFFER_OR_DESC_TYPE_LSB 6 334 #define WBM_RELEASE_RING_TX_BUFFER_OR_DESC_TYPE_MSB 8 335 #define WBM_RELEASE_RING_TX_BUFFER_OR_DESC_TYPE_MASK 0x000001c0 336 337 338 /* Description FIRST_MSDU_INDEX 339 340 Consumer: WBM/SW/FW 341 Producer: SW/TQM/RXDMA/REO/SWITCH 342 343 Field only valid for the bm_action release_msdu_list. 344 345 The index of the first MSDU in an MSDU link descriptor all 346 belonging to the same MPDU. 347 348 <legal 0-6> 349 */ 350 351 #define WBM_RELEASE_RING_TX_FIRST_MSDU_INDEX_OFFSET 0x00000008 352 #define WBM_RELEASE_RING_TX_FIRST_MSDU_INDEX_LSB 9 353 #define WBM_RELEASE_RING_TX_FIRST_MSDU_INDEX_MSB 12 354 #define WBM_RELEASE_RING_TX_FIRST_MSDU_INDEX_MASK 0x00001e00 355 356 357 /* Description TQM_RELEASE_REASON 358 359 Consumer: WBM/SW/FW 360 Producer: TQM 361 362 Field only valid when Release_source_module is set to release_source_TQM 363 364 365 (rr = Release Reason) 366 <enum 0 tqm_rr_frame_acked> frame is removed because an 367 ACK of BA for it was received 368 <enum 1 tqm_rr_rem_cmd_rem> frame is removed because a remove 369 command of type "Remove_mpdus" initiated by SW 370 <enum 2 tqm_rr_rem_cmd_tx> frame is removed because a remove 371 command of type "Remove_transmitted_mpdus" initiated by 372 SW 373 <enum 3 tqm_rr_rem_cmd_notx> frame is removed because a 374 remove command of type "Remove_untransmitted_mpdus" initiated 375 by SW 376 <enum 4 tqm_rr_rem_cmd_aged> frame is removed because a 377 remove command of type "Remove_aged_mpdus" or "Remove_aged_msdus" 378 initiated by SW 379 <enum 5 tqm_fw_reason1> frame is removed because a remove 380 command where fw indicated that remove reason is fw_reason1 381 382 <enum 6 tqm_fw_reason2> frame is removed because a remove 383 command where fw indicated that remove reason is fw_reason1 384 385 <enum 7 tqm_fw_reason3> frame is removed because a remove 386 command where fw indicated that remove reason is fw_reason1 387 388 <enum 8 tqm_rr_rem_cmd_disable_queue> frame is removed because 389 a remove command of type "remove_mpdus_and_disable_queue" 390 or "remove_msdus_and_disable_flow" initiated by SW 391 <enum 9 tqm_rr_rem_cmd_till_nonmatching> frame is removed 392 because remove command of type "remove_till_nonmatching_mpdu" 393 initiated by SW 394 <enum 10 tqm_rr_drop_threshold> frame is dropped at TQM 395 entrance due to one of slow/medium/hard drop threshold criteria 396 397 <enum 11 tqm_rr_link_desc_unavailable> frame is dropped 398 at TQM entrance due to the WBM2TQM_LINK_RING having fewer 399 descriptors than a threshold programmed in TQM 400 <enum 12 tqm_rr_drop_or_invalid_msdu> frame is dropped at 401 TQM entrance due to 'TQM_Drop_frame' being set or "null" 402 MSDU flow pointer or MSDU flow pointer 'Flow_valid' being 403 zero or MSDU length being zero 404 <enum 13 tqm_rr_multicast_drop> frame is dropped at TQM 405 entrance due to 'TQM_Drop_frame' being set with 'TCL_drop_reason' 406 set to TCL_multicast_drop_for_vdev. 407 <enum 14 tqm_rr_vdev_mismatch_drop> frame is dropped at 408 TQM entrance due to 'TQM_Drop_frame' being set with 'TCL_drop_reason' 409 set to TCL_vdev_id_mismatch_drop. 410 411 <legal 0-14> 412 */ 413 414 #define WBM_RELEASE_RING_TX_TQM_RELEASE_REASON_OFFSET 0x00000008 415 #define WBM_RELEASE_RING_TX_TQM_RELEASE_REASON_LSB 13 416 #define WBM_RELEASE_RING_TX_TQM_RELEASE_REASON_MSB 16 417 #define WBM_RELEASE_RING_TX_TQM_RELEASE_REASON_MASK 0x0001e000 418 419 420 /* Description RBM_OVERRIDE_VALID 421 422 This is set to 0 for Tx cases not involving reinjection, 423 and set to 1 for TQM release cases requiring FW reinjection 424 425 When set to 1, WBM releases the MSDU buffers to FW and overrides 426 the tx_rate_stats field with words 2 and 3 of the 'TX_MSDU_DETAILS' 427 structure, for FW reinjection of these MSDUs 428 429 <legal 0-1> 430 */ 431 432 #define WBM_RELEASE_RING_TX_RBM_OVERRIDE_VALID_OFFSET 0x00000008 433 #define WBM_RELEASE_RING_TX_RBM_OVERRIDE_VALID_LSB 17 434 #define WBM_RELEASE_RING_TX_RBM_OVERRIDE_VALID_MSB 17 435 #define WBM_RELEASE_RING_TX_RBM_OVERRIDE_VALID_MASK 0x00020000 436 437 438 /* Description RBM_OVERRIDE 439 440 Field only valid when rbm_override_valid = 1 441 442 WBM releases the MSDU buffers to FW and overrides the tx_rate_stats 443 field with words 2 and 3 of the 'TX_MSDU_DETAILS' structure, 444 for FW reinjection of these MSDUs. 445 446 */ 447 448 #define WBM_RELEASE_RING_TX_RBM_OVERRIDE_OFFSET 0x00000008 449 #define WBM_RELEASE_RING_TX_RBM_OVERRIDE_LSB 18 450 #define WBM_RELEASE_RING_TX_RBM_OVERRIDE_MSB 21 451 #define WBM_RELEASE_RING_TX_RBM_OVERRIDE_MASK 0x003c0000 452 453 454 /* Description RESERVED_2A 455 456 <legal 0> 457 */ 458 459 #define WBM_RELEASE_RING_TX_RESERVED_2A_OFFSET 0x00000008 460 #define WBM_RELEASE_RING_TX_RESERVED_2A_LSB 22 461 #define WBM_RELEASE_RING_TX_RESERVED_2A_MSB 28 462 #define WBM_RELEASE_RING_TX_RESERVED_2A_MASK 0x1fc00000 463 464 465 /* Description CACHE_ID 466 467 To improve WBM performance, out-of-order completions may 468 be allowed to process multiple MPDUs in parallel. 469 470 The MSDUs released from each cache would be in order so 'First_msdu' 471 and this field together can be used by SW to reorder the 472 completions back to the original order by keeping all MSDUs 473 of an MPDU from one cache together before switching to 474 the next MPDU (from either cache). 475 <legal all> 476 */ 477 478 #define WBM_RELEASE_RING_TX_CACHE_ID_OFFSET 0x00000008 479 #define WBM_RELEASE_RING_TX_CACHE_ID_LSB 29 480 #define WBM_RELEASE_RING_TX_CACHE_ID_MSB 29 481 #define WBM_RELEASE_RING_TX_CACHE_ID_MASK 0x20000000 482 483 484 /* Description COOKIE_CONVERSION_STATUS 485 486 0: 'Sw_buffer_cookie' not converted to 'Buffer_virt_addr' 487 488 1: 'Sw_buffer_cookie' coverted to 'Buffer_virt_addr' 489 <legal 0> 490 */ 491 492 #define WBM_RELEASE_RING_TX_COOKIE_CONVERSION_STATUS_OFFSET 0x00000008 493 #define WBM_RELEASE_RING_TX_COOKIE_CONVERSION_STATUS_LSB 30 494 #define WBM_RELEASE_RING_TX_COOKIE_CONVERSION_STATUS_MSB 30 495 #define WBM_RELEASE_RING_TX_COOKIE_CONVERSION_STATUS_MASK 0x40000000 496 497 498 /* Description WBM_INTERNAL_ERROR 499 500 Can only be set by WBM. 501 502 Is set when WBM got a buffer pointer but the action was 503 to push it to the idle link descriptor ring or do link related 504 activity 505 OR 506 Is set when WBM got a link buffer pointer but the action 507 was to push it to the buffer descriptor ring 508 509 <legal all> 510 */ 511 512 #define WBM_RELEASE_RING_TX_WBM_INTERNAL_ERROR_OFFSET 0x00000008 513 #define WBM_RELEASE_RING_TX_WBM_INTERNAL_ERROR_LSB 31 514 #define WBM_RELEASE_RING_TX_WBM_INTERNAL_ERROR_MSB 31 515 #define WBM_RELEASE_RING_TX_WBM_INTERNAL_ERROR_MASK 0x80000000 516 517 518 /* Description TQM_STATUS_NUMBER 519 520 Field only valid when Release_source_module is set to release_source_TQM 521 522 523 The value in this field is equal to value of the 'TQM_CMD_Number' 524 field from the TQM command or the 'TQM_add_cmd_Number' field 525 from the TQM entrance ring descriptor LSB 24-bits. 526 527 This field helps to correlate the statuses with the TQM 528 commands. 529 530 NOTE that SW could program this number to be equal to the 531 PPDU_ID number in case direct correlation with the PPDU 532 ID is desired 533 534 <legal all> 535 */ 536 537 #define WBM_RELEASE_RING_TX_TQM_STATUS_NUMBER_OFFSET 0x0000000c 538 #define WBM_RELEASE_RING_TX_TQM_STATUS_NUMBER_LSB 0 539 #define WBM_RELEASE_RING_TX_TQM_STATUS_NUMBER_MSB 23 540 #define WBM_RELEASE_RING_TX_TQM_STATUS_NUMBER_MASK 0x00ffffff 541 542 543 /* Description TRANSMIT_COUNT 544 545 Field only valid when Release_source_module is set to release_source_TQM 546 547 548 The number of times this frame has been transmitted 549 */ 550 551 #define WBM_RELEASE_RING_TX_TRANSMIT_COUNT_OFFSET 0x0000000c 552 #define WBM_RELEASE_RING_TX_TRANSMIT_COUNT_LSB 24 553 #define WBM_RELEASE_RING_TX_TRANSMIT_COUNT_MSB 30 554 #define WBM_RELEASE_RING_TX_TRANSMIT_COUNT_MASK 0x7f000000 555 556 557 /* Description SW_RELEASE_DETAILS_VALID 558 559 Consumer: SW 560 Producer: WBM 561 562 When set, some WBM specific release info for SW is valid. 563 564 This is set when WMB got a 'release_msdu_list' command from 565 TQM and the return buffer manager is not WMB. WBM will 566 then de-aggregate all the MSDUs and pass them one at a time 567 on to the 'buffer owner' 568 569 <legal all> 570 */ 571 572 #define WBM_RELEASE_RING_TX_SW_RELEASE_DETAILS_VALID_OFFSET 0x0000000c 573 #define WBM_RELEASE_RING_TX_SW_RELEASE_DETAILS_VALID_LSB 31 574 #define WBM_RELEASE_RING_TX_SW_RELEASE_DETAILS_VALID_MSB 31 575 #define WBM_RELEASE_RING_TX_SW_RELEASE_DETAILS_VALID_MASK 0x80000000 576 577 578 /* Description ACK_FRAME_RSSI 579 580 This field is only valid when the source is TQM. 581 582 If this frame is removed as the result of the reception 583 of an ACK or BA, this field indicates the RSSI of the received 584 ACK or BA frame. 585 586 When the frame is removed as result of a direct remove command 587 from the SW, this field is set to 0x0 (which is never 588 a valid value when real RSSI is available) 589 590 <legal all> 591 */ 592 593 #define WBM_RELEASE_RING_TX_ACK_FRAME_RSSI_OFFSET 0x00000010 594 #define WBM_RELEASE_RING_TX_ACK_FRAME_RSSI_LSB 0 595 #define WBM_RELEASE_RING_TX_ACK_FRAME_RSSI_MSB 7 596 #define WBM_RELEASE_RING_TX_ACK_FRAME_RSSI_MASK 0x000000ff 597 598 599 /* Description FIRST_MSDU 600 601 Field only valid when SW_release_details_valid is set. 602 603 Consumer: SW 604 Producer: WBM 605 606 When set, this MSDU is the first MSDU pointed to in the 'release_msdu_list' 607 command. 608 609 First_msdu ≠ last_msdu indicates the MSDU was part of 610 an A-MSDU. 611 <legal all> 612 */ 613 614 #define WBM_RELEASE_RING_TX_FIRST_MSDU_OFFSET 0x00000010 615 #define WBM_RELEASE_RING_TX_FIRST_MSDU_LSB 8 616 #define WBM_RELEASE_RING_TX_FIRST_MSDU_MSB 8 617 #define WBM_RELEASE_RING_TX_FIRST_MSDU_MASK 0x00000100 618 619 620 /* Description LAST_MSDU 621 622 Field only valid when SW_release_details_valid is set. 623 624 Consumer: SW 625 Producer: WBM 626 627 When set, this MSDU is the last MSDU pointed to in the 'release_msdu_list' 628 command. 629 630 First_msdu ≠ last_msdu indicates the MSDU was part of 631 an A-MSDU. 632 <legal all> 633 */ 634 635 #define WBM_RELEASE_RING_TX_LAST_MSDU_OFFSET 0x00000010 636 #define WBM_RELEASE_RING_TX_LAST_MSDU_LSB 9 637 #define WBM_RELEASE_RING_TX_LAST_MSDU_MSB 9 638 #define WBM_RELEASE_RING_TX_LAST_MSDU_MASK 0x00000200 639 640 641 /* Description FW_TX_NOTIFY_FRAME 642 643 Field only valid when SW_release_details_valid is set. 644 645 Consumer: SW 646 Producer: WBM 647 648 This is the FW_tx_notify_frame field from the TX_MSDU_DETAILS 649 for this frame from the MSDU link descriptor 650 <legal all> 651 */ 652 653 #define WBM_RELEASE_RING_TX_FW_TX_NOTIFY_FRAME_OFFSET 0x00000010 654 #define WBM_RELEASE_RING_TX_FW_TX_NOTIFY_FRAME_LSB 10 655 #define WBM_RELEASE_RING_TX_FW_TX_NOTIFY_FRAME_MSB 12 656 #define WBM_RELEASE_RING_TX_FW_TX_NOTIFY_FRAME_MASK 0x00001c00 657 658 659 /* Description BUFFER_TIMESTAMP 660 661 Field only valid when SW_release_details_valid is set. 662 663 Consumer: SW 664 Producer: WBM 665 666 This is the Buffer_timestamp field from the TX_MSDU_DETAILS 667 for this frame from the MSDU link descriptor. 668 669 Timestamp in units determined by the UMCMN 'TX_TIMESTAMP_RESOLUTION_SELECT' 670 register 671 672 <legal all> 673 */ 674 675 #define WBM_RELEASE_RING_TX_BUFFER_TIMESTAMP_OFFSET 0x00000010 676 #define WBM_RELEASE_RING_TX_BUFFER_TIMESTAMP_LSB 13 677 #define WBM_RELEASE_RING_TX_BUFFER_TIMESTAMP_MSB 31 678 #define WBM_RELEASE_RING_TX_BUFFER_TIMESTAMP_MASK 0xffffe000 679 680 681 /* Description TX_RATE_STATS 682 683 Consumer: TQM/SW 684 Producer: SW/SCH(from TXPCU, PDG) /WBM (from RXDMA) 685 686 Details for command execution tracking purposes. 687 */ 688 689 690 /* Description TX_RATE_STATS_INFO_VALID 691 692 When set all other fields in this STRUCT contain valid info. 693 694 695 When clear, none of the other fields contain valid info. 696 697 <legal all> 698 */ 699 700 #define WBM_RELEASE_RING_TX_TX_RATE_STATS_TX_RATE_STATS_INFO_VALID_OFFSET 0x00000014 701 #define WBM_RELEASE_RING_TX_TX_RATE_STATS_TX_RATE_STATS_INFO_VALID_LSB 0 702 #define WBM_RELEASE_RING_TX_TX_RATE_STATS_TX_RATE_STATS_INFO_VALID_MSB 0 703 #define WBM_RELEASE_RING_TX_TX_RATE_STATS_TX_RATE_STATS_INFO_VALID_MASK 0x00000001 704 705 706 /* Description TRANSMIT_BW 707 708 Field only valid when Tx_rate_stats_info_valid is set 709 710 Indicates the BW of the upcoming transmission that shall 711 likely start in about 3 -4 us on the medium 712 713 <enum 0 20_mhz>20 Mhz BW 714 <enum 1 40_mhz>40 Mhz BW 715 <enum 2 80_mhz>80 Mhz BW 716 <enum 3 160_mhz>160 Mhz BW 717 <enum 4 320_mhz>320 Mhz BW 718 <enum 5 240_mhz>240 Mhz BW 719 */ 720 721 #define WBM_RELEASE_RING_TX_TX_RATE_STATS_TRANSMIT_BW_OFFSET 0x00000014 722 #define WBM_RELEASE_RING_TX_TX_RATE_STATS_TRANSMIT_BW_LSB 1 723 #define WBM_RELEASE_RING_TX_TX_RATE_STATS_TRANSMIT_BW_MSB 3 724 #define WBM_RELEASE_RING_TX_TX_RATE_STATS_TRANSMIT_BW_MASK 0x0000000e 725 726 727 /* Description TRANSMIT_PKT_TYPE 728 729 Field only valid when Tx_rate_stats_info_valid is set 730 731 Field filled in by PDG. 732 Not valid when in SW transmit mode 733 734 The packet type 735 <enum 0 dot11a>802.11a PPDU type 736 <enum 1 dot11b>802.11b PPDU type 737 <enum 2 dot11n_mm>802.11n Mixed Mode PPDU type 738 <enum 3 dot11ac>802.11ac PPDU type 739 <enum 4 dot11ax>802.11ax PPDU type 740 <enum 5 dot11ba>802.11ba (WUR) PPDU type 741 <enum 6 dot11be>802.11be PPDU type 742 <enum 7 dot11az>802.11az (ranging) PPDU type 743 <enum 8 dot11n_gf>802.11n Green Field PPDU type (unsupported 744 & aborted) 745 */ 746 747 #define WBM_RELEASE_RING_TX_TX_RATE_STATS_TRANSMIT_PKT_TYPE_OFFSET 0x00000014 748 #define WBM_RELEASE_RING_TX_TX_RATE_STATS_TRANSMIT_PKT_TYPE_LSB 4 749 #define WBM_RELEASE_RING_TX_TX_RATE_STATS_TRANSMIT_PKT_TYPE_MSB 7 750 #define WBM_RELEASE_RING_TX_TX_RATE_STATS_TRANSMIT_PKT_TYPE_MASK 0x000000f0 751 752 753 /* Description TRANSMIT_STBC 754 755 Field only valid when Tx_rate_stats_info_valid is set 756 757 Field filled in by PDG. 758 Not valid when in SW transmit mode 759 760 When set, STBC transmission rate was used. 761 */ 762 763 #define WBM_RELEASE_RING_TX_TX_RATE_STATS_TRANSMIT_STBC_OFFSET 0x00000014 764 #define WBM_RELEASE_RING_TX_TX_RATE_STATS_TRANSMIT_STBC_LSB 8 765 #define WBM_RELEASE_RING_TX_TX_RATE_STATS_TRANSMIT_STBC_MSB 8 766 #define WBM_RELEASE_RING_TX_TX_RATE_STATS_TRANSMIT_STBC_MASK 0x00000100 767 768 769 /* Description TRANSMIT_LDPC 770 771 Field only valid when Tx_rate_stats_info_valid is set 772 773 Field filled in by PDG. 774 Not valid when in SW transmit mode 775 776 When set, use LDPC transmission rates 777 */ 778 779 #define WBM_RELEASE_RING_TX_TX_RATE_STATS_TRANSMIT_LDPC_OFFSET 0x00000014 780 #define WBM_RELEASE_RING_TX_TX_RATE_STATS_TRANSMIT_LDPC_LSB 9 781 #define WBM_RELEASE_RING_TX_TX_RATE_STATS_TRANSMIT_LDPC_MSB 9 782 #define WBM_RELEASE_RING_TX_TX_RATE_STATS_TRANSMIT_LDPC_MASK 0x00000200 783 784 785 /* Description TRANSMIT_SGI 786 787 Field only valid when Tx_rate_stats_info_valid is set 788 789 Field filled in by PDG. 790 Not valid when in SW transmit mode 791 792 Specify the right GI for HE-Ranging NDPs (11az)/Short NDP. 793 794 795 <enum 0 0_8_us_sgi > Legacy normal GI. Can also be used 796 for HE 797 <enum 1 0_4_us_sgi > Legacy short GI. Can also be used 798 for HE 799 <enum 2 1_6_us_sgi > HE related GI 800 <enum 3 3_2_us_sgi > HE related GI 801 <legal 0 - 3> 802 */ 803 804 #define WBM_RELEASE_RING_TX_TX_RATE_STATS_TRANSMIT_SGI_OFFSET 0x00000014 805 #define WBM_RELEASE_RING_TX_TX_RATE_STATS_TRANSMIT_SGI_LSB 10 806 #define WBM_RELEASE_RING_TX_TX_RATE_STATS_TRANSMIT_SGI_MSB 11 807 #define WBM_RELEASE_RING_TX_TX_RATE_STATS_TRANSMIT_SGI_MASK 0x00000c00 808 809 810 /* Description TRANSMIT_MCS 811 812 Field only valid when Tx_rate_stats_info_valid is set 813 814 Field filled in by PDG. 815 Not valid when in SW transmit mode 816 817 For details, refer to MCS_TYPE description 818 <legal all> 819 */ 820 821 #define WBM_RELEASE_RING_TX_TX_RATE_STATS_TRANSMIT_MCS_OFFSET 0x00000014 822 #define WBM_RELEASE_RING_TX_TX_RATE_STATS_TRANSMIT_MCS_LSB 12 823 #define WBM_RELEASE_RING_TX_TX_RATE_STATS_TRANSMIT_MCS_MSB 15 824 #define WBM_RELEASE_RING_TX_TX_RATE_STATS_TRANSMIT_MCS_MASK 0x0000f000 825 826 827 /* Description OFDMA_TRANSMISSION 828 829 Field only valid when Tx_rate_stats_info_valid is set 830 831 Field filled in by PDG. 832 833 Set when the transmission was an OFDMA transmission (DL 834 or UL). 835 <legal all> 836 */ 837 838 #define WBM_RELEASE_RING_TX_TX_RATE_STATS_OFDMA_TRANSMISSION_OFFSET 0x00000014 839 #define WBM_RELEASE_RING_TX_TX_RATE_STATS_OFDMA_TRANSMISSION_LSB 16 840 #define WBM_RELEASE_RING_TX_TX_RATE_STATS_OFDMA_TRANSMISSION_MSB 16 841 #define WBM_RELEASE_RING_TX_TX_RATE_STATS_OFDMA_TRANSMISSION_MASK 0x00010000 842 843 844 /* Description TONES_IN_RU 845 846 Field only valid when Tx_rate_stats_info_valid is set 847 848 Field filled in by PDG. 849 Not valid when in SW transmit mode 850 851 The number of tones in the RU used. 852 <legal all> 853 */ 854 855 #define WBM_RELEASE_RING_TX_TX_RATE_STATS_TONES_IN_RU_OFFSET 0x00000014 856 #define WBM_RELEASE_RING_TX_TX_RATE_STATS_TONES_IN_RU_LSB 17 857 #define WBM_RELEASE_RING_TX_TX_RATE_STATS_TONES_IN_RU_MSB 28 858 #define WBM_RELEASE_RING_TX_TX_RATE_STATS_TONES_IN_RU_MASK 0x1ffe0000 859 860 861 /* Description TRANSMIT_NSS 862 863 Field only valid when Tx_rate_stats_info_valid is set 864 865 Field filled in by PDG 866 Not valid when in SW transmit mode 867 868 The number of spatial streams used in the transmission 869 870 <enum 0 1_spatial_stream>Single spatial stream 871 <enum 1 2_spatial_streams>2 spatial streams 872 <enum 2 3_spatial_streams>3 spatial streams 873 <enum 3 4_spatial_streams>4 spatial streams 874 <enum 4 5_spatial_streams>5 spatial streams 875 <enum 5 6_spatial_streams>6 spatial streams 876 <enum 6 7_spatial_streams>7 spatial streams 877 <enum 7 8_spatial_streams>8 spatial streams 878 */ 879 880 #define WBM_RELEASE_RING_TX_TX_RATE_STATS_TRANSMIT_NSS_OFFSET 0x00000014 881 #define WBM_RELEASE_RING_TX_TX_RATE_STATS_TRANSMIT_NSS_LSB 29 882 #define WBM_RELEASE_RING_TX_TX_RATE_STATS_TRANSMIT_NSS_MSB 31 883 #define WBM_RELEASE_RING_TX_TX_RATE_STATS_TRANSMIT_NSS_MASK 0xe0000000 884 885 886 /* Description PPDU_TRANSMISSION_TSF 887 888 Field only valid when Tx_rate_stats_info_valid is set 889 890 Based on a HWSCH configuration register setting, this field 891 either contains: 892 893 Lower 32 bits of the TSF, snapshot of this value when transmission 894 of the PPDU containing the frame finished. 895 OR 896 Lower 32 bits of the TSF, snapshot of this value when transmission 897 of the PPDU containing the frame started 898 899 <legal all> 900 */ 901 902 #define WBM_RELEASE_RING_TX_TX_RATE_STATS_PPDU_TRANSMISSION_TSF_OFFSET 0x00000018 903 #define WBM_RELEASE_RING_TX_TX_RATE_STATS_PPDU_TRANSMISSION_TSF_LSB 0 904 #define WBM_RELEASE_RING_TX_TX_RATE_STATS_PPDU_TRANSMISSION_TSF_MSB 31 905 #define WBM_RELEASE_RING_TX_TX_RATE_STATS_PPDU_TRANSMISSION_TSF_MASK 0xffffffff 906 907 908 /* Description SW_PEER_ID 909 910 Field only valid when Release_source_module is set to release_source_TQM 911 912 913 1) Release of msdu buffer due to drop_frame = 1. Flow is 914 not fetched and hence sw_peer_id and tid = 0 915 buffer_or_desc_type = e_num 0 MSDU_rel_buffertqm_release_reason 916 = e_num 1 tqm_rr_rem_cmd_rem 917 918 919 2) Release of msdu buffer due to Flow is not fetched and 920 hence sw_peer_id and tid = 0 921 buffer_or_desc_type = e_num 0 MSDU_rel_buffertqm_release_reason 922 = e_num 1 tqm_rr_rem_cmd_rem 923 924 925 3) Release of msdu link due to remove_mpdu or acked_mpdu 926 command. 927 buffer_or_desc_type = e_num1 msdu_link_descriptortqm_release_reason 928 can be:e_num 1 tqm_rr_rem_cmd_reme_num 2 tqm_rr_rem_cmd_tx 929 930 e_num 3 tqm_rr_rem_cmd_notxe_num 4 tqm_rr_rem_cmd_aged (this 931 e_num is used for REMOVE_MPDU as well as REMOVE_MSDU). 932 933 Sw_peer_id from the TX_MSDU_FLOW descriptor or TX_MPDU_QUEUE 934 descriptor 935 <legal all> 936 */ 937 938 #define WBM_RELEASE_RING_TX_SW_PEER_ID_OFFSET 0x0000001c 939 #define WBM_RELEASE_RING_TX_SW_PEER_ID_LSB 0 940 #define WBM_RELEASE_RING_TX_SW_PEER_ID_MSB 15 941 #define WBM_RELEASE_RING_TX_SW_PEER_ID_MASK 0x0000ffff 942 943 944 /* Description TID 945 946 Field only valid when Release_source_module is set to release_source_TQM 947 948 949 1) Release of msdu buffer due to drop_frame = 1. Flow is 950 not fetched and hence sw_peer_id and tid = 0 951 buffer_or_desc_type = e_num 0 MSDU_rel_buffertqm_release_reason 952 = e_num 1 tqm_rr_rem_cmd_rem 953 954 955 2) Release of msdu buffer due to Flow is not fetched and 956 hence sw_peer_id and tid = 0 957 buffer_or_desc_type = e_num 0 MSDU_rel_buffertqm_release_reason 958 = e_num 1 tqm_rr_rem_cmd_rem 959 960 961 3) Release of msdu link due to remove_mpdu or acked_mpdu 962 command. 963 buffer_or_desc_type = e_num1 msdu_link_descriptortqm_release_reason 964 can be:e_num 1 tqm_rr_rem_cmd_reme_num 2 tqm_rr_rem_cmd_tx 965 966 e_num 3 tqm_rr_rem_cmd_notxe_num 4 tqm_rr_rem_cmd_aged (this 967 e_num is used for REMOVE_MPDU as well as REMOVE_MSDU). 968 969 970 This field represents the TID from the TX_MSDU_FLOW descriptor 971 or TX_MPDU_QUEUE descriptor 972 973 <legal all> 974 */ 975 976 #define WBM_RELEASE_RING_TX_TID_OFFSET 0x0000001c 977 #define WBM_RELEASE_RING_TX_TID_LSB 16 978 #define WBM_RELEASE_RING_TX_TID_MSB 19 979 #define WBM_RELEASE_RING_TX_TID_MASK 0x000f0000 980 981 982 /* Description TQM_STATUS_NUMBER_31_24 983 984 Field only valid when Release_source_module is set to release_source_TQM 985 986 987 The value in this field is equal to value of the 'TQM_CMD_Number' 988 field from the TQM command or the 'TQM_add_cmd_Number' field 989 from the TQM entrance ring descriptor MSB 8-bits. 990 991 This field helps to correlate the statuses with the TQM 992 commands. 993 994 <legal all> 995 */ 996 997 #define WBM_RELEASE_RING_TX_TQM_STATUS_NUMBER_31_24_OFFSET 0x0000001c 998 #define WBM_RELEASE_RING_TX_TQM_STATUS_NUMBER_31_24_LSB 20 999 #define WBM_RELEASE_RING_TX_TQM_STATUS_NUMBER_31_24_MSB 27 1000 #define WBM_RELEASE_RING_TX_TQM_STATUS_NUMBER_31_24_MASK 0x0ff00000 1001 1002 1003 /* Description LOOPING_COUNT 1004 1005 Consumer: WBM/SW/FW 1006 Producer: SW/TQM/RXDMA/REO/SWITCH 1007 1008 If WBM_internal_error is set, this descriptor is sent to 1009 the dedicated 'WBM_ERROR_RELEASE' ring and Looping_count 1010 is used to indicate an error code. 1011 1012 The values reported are documented further in the WBM MLD 1013 doc. 1014 1015 If WBM_internal_error is not set, the following holds. 1016 1017 A count value that indicates the number of times the producer 1018 of entries into the Buffer Manager Ring has looped around 1019 the ring. 1020 At initialization time, this value is set to 0. On the first 1021 loop, this value is set to 1. After the max value is reached 1022 allowed by the number of bits for this field, the count 1023 value continues with 0 again. 1024 1025 In case SW is the consumer of the ring entries, it can use 1026 this field to figure out up to where the producer of entries 1027 has created new entries. This eliminates the need to check 1028 where the "head pointer' of the ring is located once the 1029 SW starts processing an interrupt indicating that new entries 1030 have been put into this ring... 1031 1032 Also note that SW if it wants only needs to look at the 1033 LSB bit of this count value. 1034 <legal all> 1035 */ 1036 1037 #define WBM_RELEASE_RING_TX_LOOPING_COUNT_OFFSET 0x0000001c 1038 #define WBM_RELEASE_RING_TX_LOOPING_COUNT_LSB 28 1039 #define WBM_RELEASE_RING_TX_LOOPING_COUNT_MSB 31 1040 #define WBM_RELEASE_RING_TX_LOOPING_COUNT_MASK 0xf0000000 1041 1042 1043 1044 #endif // WBM_RELEASE_RING_TX 1045