xref: /wlan-driver/fw-api/hw/qcn9000/he_sig_a_mu_ul_info.h (revision 5113495b16420b49004c444715d2daae2066e7dc)
1 /*
2  * Copyright (c) 2019, The Linux Foundation. All rights reserved.
3  *
4  * Permission to use, copy, modify, and/or distribute this software for any
5  * purpose with or without fee is hereby granted, provided that the above
6  * copyright notice and this permission notice appear in all copies.
7  *
8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15  */
16 
17 #ifndef _HE_SIG_A_MU_UL_INFO_H_
18 #define _HE_SIG_A_MU_UL_INFO_H_
19 #if !defined(__ASSEMBLER__)
20 #endif
21 
22 
23 // ################ START SUMMARY #################
24 //
25 //	Dword	Fields
26 //	0	format_indication[0], bss_color_id[6:1], spatial_reuse[22:7], reserved_0a[23], transmit_bw[25:24], reserved_0b[31:26]
27 //	1	txop_duration[6:0], reserved_1a[15:7], crc[19:16], tail[25:20], reserved_1b[31:26]
28 //
29 // ################ END SUMMARY #################
30 
31 #define NUM_OF_DWORDS_HE_SIG_A_MU_UL_INFO 2
32 
33 struct he_sig_a_mu_ul_info {
34              uint32_t format_indication               :  1, //[0]
35                       bss_color_id                    :  6, //[6:1]
36                       spatial_reuse                   : 16, //[22:7]
37                       reserved_0a                     :  1, //[23]
38                       transmit_bw                     :  2, //[25:24]
39                       reserved_0b                     :  6; //[31:26]
40              uint32_t txop_duration                   :  7, //[6:0]
41                       reserved_1a                     :  9, //[15:7]
42                       crc                             :  4, //[19:16]
43                       tail                            :  6, //[25:20]
44                       reserved_1b                     :  6; //[31:26]
45 };
46 
47 /*
48 
49 format_indication
50 
51 			Indicates whether the transmission is SU PPDU or a
52 			trigger based UL MU PDDU
53 
54 			<enum 0 HE_SIGA_FORMAT_HE_TRIG>
55 
56 			<enum 1 HE_SIGA_FORMAT_SU_OR_EXT_SU>
57 
58 			<legal all>
59 
60 bss_color_id
61 
62 			BSS color ID
63 
64 			<legal all>
65 
66 spatial_reuse
67 
68 			Spatial reuse
69 
70 
71 
72 			<legal all>
73 
74 reserved_0a
75 
76 			Note: spec indicates this shall be set to 1
77 
78 			<legal 1>
79 
80 transmit_bw
81 
82 			Bandwidth of the PPDU.
83 
84 
85 
86 			<enum 0 HE_SIG_A_MU_UL_BW20> 20 Mhz
87 
88 			<enum 1 HE_SIG_A_MU_UL_BW40> 40 Mhz
89 
90 			<enum 2 HE_SIG_A_MU_UL_BW80> 80 Mhz
91 
92 			<enum 3 HE_SIG_A_MU_UL_BW160> 160 MHz or 80+80 MHz
93 
94 
95 
96 			On RX side, Field Used by MAC HW
97 
98 			<legal 0-3>
99 
100 reserved_0b
101 
102 			<legal 0>
103 
104 txop_duration
105 
106 			Indicates the remaining time in the current TXOP <legal
107 			all>
108 
109 reserved_1a
110 
111 			Set to value indicated in the trigger frame
112 
113 			<legal 255>
114 
115 crc
116 
117 			CRC for HE-SIG-A contents.
118 
119 			This CRC may also cover some fields of L-SIG (TBD)
120 
121 			<legal all>
122 
123 tail
124 
125 			BCC encoding (similar to VHT-SIG-A) with 6 tail bits is
126 			used
127 
128 			<legal 0>
129 
130 reserved_1b
131 
132 			<legal 0>
133 */
134 
135 
136 /* Description		HE_SIG_A_MU_UL_INFO_0_FORMAT_INDICATION
137 
138 			Indicates whether the transmission is SU PPDU or a
139 			trigger based UL MU PDDU
140 
141 			<enum 0 HE_SIGA_FORMAT_HE_TRIG>
142 
143 			<enum 1 HE_SIGA_FORMAT_SU_OR_EXT_SU>
144 
145 			<legal all>
146 */
147 #define HE_SIG_A_MU_UL_INFO_0_FORMAT_INDICATION_OFFSET               0x00000000
148 #define HE_SIG_A_MU_UL_INFO_0_FORMAT_INDICATION_LSB                  0
149 #define HE_SIG_A_MU_UL_INFO_0_FORMAT_INDICATION_MASK                 0x00000001
150 
151 /* Description		HE_SIG_A_MU_UL_INFO_0_BSS_COLOR_ID
152 
153 			BSS color ID
154 
155 			<legal all>
156 */
157 #define HE_SIG_A_MU_UL_INFO_0_BSS_COLOR_ID_OFFSET                    0x00000000
158 #define HE_SIG_A_MU_UL_INFO_0_BSS_COLOR_ID_LSB                       1
159 #define HE_SIG_A_MU_UL_INFO_0_BSS_COLOR_ID_MASK                      0x0000007e
160 
161 /* Description		HE_SIG_A_MU_UL_INFO_0_SPATIAL_REUSE
162 
163 			Spatial reuse
164 
165 
166 
167 			<legal all>
168 */
169 #define HE_SIG_A_MU_UL_INFO_0_SPATIAL_REUSE_OFFSET                   0x00000000
170 #define HE_SIG_A_MU_UL_INFO_0_SPATIAL_REUSE_LSB                      7
171 #define HE_SIG_A_MU_UL_INFO_0_SPATIAL_REUSE_MASK                     0x007fff80
172 
173 /* Description		HE_SIG_A_MU_UL_INFO_0_RESERVED_0A
174 
175 			Note: spec indicates this shall be set to 1
176 
177 			<legal 1>
178 */
179 #define HE_SIG_A_MU_UL_INFO_0_RESERVED_0A_OFFSET                     0x00000000
180 #define HE_SIG_A_MU_UL_INFO_0_RESERVED_0A_LSB                        23
181 #define HE_SIG_A_MU_UL_INFO_0_RESERVED_0A_MASK                       0x00800000
182 
183 /* Description		HE_SIG_A_MU_UL_INFO_0_TRANSMIT_BW
184 
185 			Bandwidth of the PPDU.
186 
187 
188 
189 			<enum 0 HE_SIG_A_MU_UL_BW20> 20 Mhz
190 
191 			<enum 1 HE_SIG_A_MU_UL_BW40> 40 Mhz
192 
193 			<enum 2 HE_SIG_A_MU_UL_BW80> 80 Mhz
194 
195 			<enum 3 HE_SIG_A_MU_UL_BW160> 160 MHz or 80+80 MHz
196 
197 
198 
199 			On RX side, Field Used by MAC HW
200 
201 			<legal 0-3>
202 */
203 #define HE_SIG_A_MU_UL_INFO_0_TRANSMIT_BW_OFFSET                     0x00000000
204 #define HE_SIG_A_MU_UL_INFO_0_TRANSMIT_BW_LSB                        24
205 #define HE_SIG_A_MU_UL_INFO_0_TRANSMIT_BW_MASK                       0x03000000
206 
207 /* Description		HE_SIG_A_MU_UL_INFO_0_RESERVED_0B
208 
209 			<legal 0>
210 */
211 #define HE_SIG_A_MU_UL_INFO_0_RESERVED_0B_OFFSET                     0x00000000
212 #define HE_SIG_A_MU_UL_INFO_0_RESERVED_0B_LSB                        26
213 #define HE_SIG_A_MU_UL_INFO_0_RESERVED_0B_MASK                       0xfc000000
214 
215 /* Description		HE_SIG_A_MU_UL_INFO_1_TXOP_DURATION
216 
217 			Indicates the remaining time in the current TXOP <legal
218 			all>
219 */
220 #define HE_SIG_A_MU_UL_INFO_1_TXOP_DURATION_OFFSET                   0x00000004
221 #define HE_SIG_A_MU_UL_INFO_1_TXOP_DURATION_LSB                      0
222 #define HE_SIG_A_MU_UL_INFO_1_TXOP_DURATION_MASK                     0x0000007f
223 
224 /* Description		HE_SIG_A_MU_UL_INFO_1_RESERVED_1A
225 
226 			Set to value indicated in the trigger frame
227 
228 			<legal 255>
229 */
230 #define HE_SIG_A_MU_UL_INFO_1_RESERVED_1A_OFFSET                     0x00000004
231 #define HE_SIG_A_MU_UL_INFO_1_RESERVED_1A_LSB                        7
232 #define HE_SIG_A_MU_UL_INFO_1_RESERVED_1A_MASK                       0x0000ff80
233 
234 /* Description		HE_SIG_A_MU_UL_INFO_1_CRC
235 
236 			CRC for HE-SIG-A contents.
237 
238 			This CRC may also cover some fields of L-SIG (TBD)
239 
240 			<legal all>
241 */
242 #define HE_SIG_A_MU_UL_INFO_1_CRC_OFFSET                             0x00000004
243 #define HE_SIG_A_MU_UL_INFO_1_CRC_LSB                                16
244 #define HE_SIG_A_MU_UL_INFO_1_CRC_MASK                               0x000f0000
245 
246 /* Description		HE_SIG_A_MU_UL_INFO_1_TAIL
247 
248 			BCC encoding (similar to VHT-SIG-A) with 6 tail bits is
249 			used
250 
251 			<legal 0>
252 */
253 #define HE_SIG_A_MU_UL_INFO_1_TAIL_OFFSET                            0x00000004
254 #define HE_SIG_A_MU_UL_INFO_1_TAIL_LSB                               20
255 #define HE_SIG_A_MU_UL_INFO_1_TAIL_MASK                              0x03f00000
256 
257 /* Description		HE_SIG_A_MU_UL_INFO_1_RESERVED_1B
258 
259 			<legal 0>
260 */
261 #define HE_SIG_A_MU_UL_INFO_1_RESERVED_1B_OFFSET                     0x00000004
262 #define HE_SIG_A_MU_UL_INFO_1_RESERVED_1B_LSB                        26
263 #define HE_SIG_A_MU_UL_INFO_1_RESERVED_1B_MASK                       0xfc000000
264 
265 
266 #endif // _HE_SIG_A_MU_UL_INFO_H_
267