1*5113495bSYour Name /* 2*5113495bSYour Name * Copyright (c) 2019, The Linux Foundation. All rights reserved. 3*5113495bSYour Name * 4*5113495bSYour Name * Permission to use, copy, modify, and/or distribute this software for any 5*5113495bSYour Name * purpose with or without fee is hereby granted, provided that the above 6*5113495bSYour Name * copyright notice and this permission notice appear in all copies. 7*5113495bSYour Name * 8*5113495bSYour Name * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9*5113495bSYour Name * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10*5113495bSYour Name * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11*5113495bSYour Name * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12*5113495bSYour Name * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13*5113495bSYour Name * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14*5113495bSYour Name * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15*5113495bSYour Name */ 16*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 17*5113495bSYour Name // 18*5113495bSYour Name // mac_tcl_reg_seq_hwioreg.h : automatically generated by Autoseq 3.8 7/1/2019 19*5113495bSYour Name // User Name:pbechana 20*5113495bSYour Name // 21*5113495bSYour Name // !! WARNING !! DO NOT MANUALLY EDIT THIS FILE. 22*5113495bSYour Name // 23*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 24*5113495bSYour Name 25*5113495bSYour Name #ifndef __MAC_TCL_REG_SEQ_REG_H__ 26*5113495bSYour Name #define __MAC_TCL_REG_SEQ_REG_H__ 27*5113495bSYour Name 28*5113495bSYour Name #include "seq_hwio.h" 29*5113495bSYour Name #include "mac_tcl_reg_seq_hwiobase.h" 30*5113495bSYour Name #ifdef SCALE_INCLUDES 31*5113495bSYour Name #include "HALhwio.h" 32*5113495bSYour Name #else 33*5113495bSYour Name #include "msmhwio.h" 34*5113495bSYour Name #endif 35*5113495bSYour Name 36*5113495bSYour Name 37*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 38*5113495bSYour Name // Register Data for Block MAC_TCL_REG 39*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 40*5113495bSYour Name 41*5113495bSYour Name //// Register TCL_R0_SW2TCL1_RING_CTRL //// 42*5113495bSYour Name 43*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CTRL_ADDR(x) (x+0x00000000) 44*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CTRL_PHYS(x) (x+0x00000000) 45*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CTRL_RMSK 0x0003ffe0 46*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CTRL_SHFT 5 47*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CTRL_IN(x) \ 48*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_CTRL_ADDR(x), HWIO_TCL_R0_SW2TCL1_RING_CTRL_RMSK) 49*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CTRL_INM(x, mask) \ 50*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_CTRL_ADDR(x), mask) 51*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CTRL_OUT(x, val) \ 52*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL1_RING_CTRL_ADDR(x), val) 53*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CTRL_OUTM(x, mask, val) \ 54*5113495bSYour Name do {\ 55*5113495bSYour Name HWIO_INTLOCK(); \ 56*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL1_RING_CTRL_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL1_RING_CTRL_IN(x)); \ 57*5113495bSYour Name HWIO_INTFREE();\ 58*5113495bSYour Name } while (0) 59*5113495bSYour Name 60*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CTRL_TIMEOUT_VAL_BMSK 0x0003ffc0 61*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CTRL_TIMEOUT_VAL_SHFT 0x6 62*5113495bSYour Name 63*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CTRL_RNG_PRTY_BMSK 0x00000020 64*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CTRL_RNG_PRTY_SHFT 0x5 65*5113495bSYour Name 66*5113495bSYour Name //// Register TCL_R0_SW2TCL2_RING_CTRL //// 67*5113495bSYour Name 68*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CTRL_ADDR(x) (x+0x00000004) 69*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CTRL_PHYS(x) (x+0x00000004) 70*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CTRL_RMSK 0x0003ffe0 71*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CTRL_SHFT 5 72*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CTRL_IN(x) \ 73*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_CTRL_ADDR(x), HWIO_TCL_R0_SW2TCL2_RING_CTRL_RMSK) 74*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CTRL_INM(x, mask) \ 75*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_CTRL_ADDR(x), mask) 76*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CTRL_OUT(x, val) \ 77*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL2_RING_CTRL_ADDR(x), val) 78*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CTRL_OUTM(x, mask, val) \ 79*5113495bSYour Name do {\ 80*5113495bSYour Name HWIO_INTLOCK(); \ 81*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL2_RING_CTRL_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL2_RING_CTRL_IN(x)); \ 82*5113495bSYour Name HWIO_INTFREE();\ 83*5113495bSYour Name } while (0) 84*5113495bSYour Name 85*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CTRL_TIMEOUT_VAL_BMSK 0x0003ffc0 86*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CTRL_TIMEOUT_VAL_SHFT 0x6 87*5113495bSYour Name 88*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CTRL_RNG_PRTY_BMSK 0x00000020 89*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CTRL_RNG_PRTY_SHFT 0x5 90*5113495bSYour Name 91*5113495bSYour Name //// Register TCL_R0_SW2TCL3_RING_CTRL //// 92*5113495bSYour Name 93*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CTRL_ADDR(x) (x+0x00000008) 94*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CTRL_PHYS(x) (x+0x00000008) 95*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CTRL_RMSK 0x0003ffe0 96*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CTRL_SHFT 5 97*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CTRL_IN(x) \ 98*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_CTRL_ADDR(x), HWIO_TCL_R0_SW2TCL3_RING_CTRL_RMSK) 99*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CTRL_INM(x, mask) \ 100*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_CTRL_ADDR(x), mask) 101*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CTRL_OUT(x, val) \ 102*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL3_RING_CTRL_ADDR(x), val) 103*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CTRL_OUTM(x, mask, val) \ 104*5113495bSYour Name do {\ 105*5113495bSYour Name HWIO_INTLOCK(); \ 106*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL3_RING_CTRL_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL3_RING_CTRL_IN(x)); \ 107*5113495bSYour Name HWIO_INTFREE();\ 108*5113495bSYour Name } while (0) 109*5113495bSYour Name 110*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CTRL_TIMEOUT_VAL_BMSK 0x0003ffc0 111*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CTRL_TIMEOUT_VAL_SHFT 0x6 112*5113495bSYour Name 113*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CTRL_RNG_PRTY_BMSK 0x00000020 114*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CTRL_RNG_PRTY_SHFT 0x5 115*5113495bSYour Name 116*5113495bSYour Name //// Register TCL_R0_FW2TCL1_RING_CTRL //// 117*5113495bSYour Name 118*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CTRL_ADDR(x) (x+0x0000000c) 119*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CTRL_PHYS(x) (x+0x0000000c) 120*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CTRL_RMSK 0x0003ffe0 121*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CTRL_SHFT 5 122*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CTRL_IN(x) \ 123*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_CTRL_ADDR(x), HWIO_TCL_R0_FW2TCL1_RING_CTRL_RMSK) 124*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CTRL_INM(x, mask) \ 125*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_CTRL_ADDR(x), mask) 126*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CTRL_OUT(x, val) \ 127*5113495bSYour Name out_dword( HWIO_TCL_R0_FW2TCL1_RING_CTRL_ADDR(x), val) 128*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CTRL_OUTM(x, mask, val) \ 129*5113495bSYour Name do {\ 130*5113495bSYour Name HWIO_INTLOCK(); \ 131*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_FW2TCL1_RING_CTRL_ADDR(x), mask, val, HWIO_TCL_R0_FW2TCL1_RING_CTRL_IN(x)); \ 132*5113495bSYour Name HWIO_INTFREE();\ 133*5113495bSYour Name } while (0) 134*5113495bSYour Name 135*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CTRL_TIMEOUT_VAL_BMSK 0x0003ffc0 136*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CTRL_TIMEOUT_VAL_SHFT 0x6 137*5113495bSYour Name 138*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CTRL_RNG_PRTY_BMSK 0x00000020 139*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CTRL_RNG_PRTY_SHFT 0x5 140*5113495bSYour Name 141*5113495bSYour Name //// Register TCL_R0_SW2TCL_CREDIT_RING_CTRL //// 142*5113495bSYour Name 143*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CTRL_ADDR(x) (x+0x00000010) 144*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CTRL_PHYS(x) (x+0x00000010) 145*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CTRL_RMSK 0x0003ffe0 146*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CTRL_SHFT 5 147*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CTRL_IN(x) \ 148*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CREDIT_RING_CTRL_ADDR(x), HWIO_TCL_R0_SW2TCL_CREDIT_RING_CTRL_RMSK) 149*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CTRL_INM(x, mask) \ 150*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CREDIT_RING_CTRL_ADDR(x), mask) 151*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CTRL_OUT(x, val) \ 152*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL_CREDIT_RING_CTRL_ADDR(x), val) 153*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CTRL_OUTM(x, mask, val) \ 154*5113495bSYour Name do {\ 155*5113495bSYour Name HWIO_INTLOCK(); \ 156*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL_CREDIT_RING_CTRL_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL_CREDIT_RING_CTRL_IN(x)); \ 157*5113495bSYour Name HWIO_INTFREE();\ 158*5113495bSYour Name } while (0) 159*5113495bSYour Name 160*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CTRL_TIMEOUT_VAL_BMSK 0x0003ffc0 161*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CTRL_TIMEOUT_VAL_SHFT 0x6 162*5113495bSYour Name 163*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CTRL_RNG_PRTY_BMSK 0x00000020 164*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CTRL_RNG_PRTY_SHFT 0x5 165*5113495bSYour Name 166*5113495bSYour Name //// Register TCL_R0_CONS_RING_CMN_CTRL_REG //// 167*5113495bSYour Name 168*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_ADDR(x) (x+0x00000014) 169*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_PHYS(x) (x+0x00000014) 170*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_RMSK 0x001fffff 171*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_SHFT 0 172*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_IN(x) \ 173*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_ADDR(x), HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_RMSK) 174*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_INM(x, mask) \ 175*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_ADDR(x), mask) 176*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_OUT(x, val) \ 177*5113495bSYour Name out_dword( HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_ADDR(x), val) 178*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_OUTM(x, mask, val) \ 179*5113495bSYour Name do {\ 180*5113495bSYour Name HWIO_INTLOCK(); \ 181*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_ADDR(x), mask, val, HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_IN(x)); \ 182*5113495bSYour Name HWIO_INTFREE();\ 183*5113495bSYour Name } while (0) 184*5113495bSYour Name 185*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_INSERT_VLAN_EN_BMSK 0x00100000 186*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_INSERT_VLAN_EN_SHFT 0x14 187*5113495bSYour Name 188*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_STOP_META_RD_AT_8B_BDRY_BMSK 0x00080000 189*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_STOP_META_RD_AT_8B_BDRY_SHFT 0x13 190*5113495bSYour Name 191*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_ENABLE_C9D1_BMSK 0x00040000 192*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_ENABLE_C9D1_SHFT 0x12 193*5113495bSYour Name 194*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_DSCP_TID_MAP_PROGRAM_EN_BMSK 0x00020000 195*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_DSCP_TID_MAP_PROGRAM_EN_SHFT 0x11 196*5113495bSYour Name 197*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_MSDU_EXTN_NUM_BUF_RD_BMSK 0x0001c000 198*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_MSDU_EXTN_NUM_BUF_RD_SHFT 0xe 199*5113495bSYour Name 200*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_TCL_IDLE_BMSK 0x00002000 201*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_TCL_IDLE_SHFT 0xd 202*5113495bSYour Name 203*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_SW2TCL_CREDIT_RING_HALT_STAT_BMSK 0x00001000 204*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_SW2TCL_CREDIT_RING_HALT_STAT_SHFT 0xc 205*5113495bSYour Name 206*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_FW2TCL1_RNG_HALT_STAT_BMSK 0x00000800 207*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_FW2TCL1_RNG_HALT_STAT_SHFT 0xb 208*5113495bSYour Name 209*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_SW2TCL3_RNG_HALT_STAT_BMSK 0x00000400 210*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_SW2TCL3_RNG_HALT_STAT_SHFT 0xa 211*5113495bSYour Name 212*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_SW2TCL2_RNG_HALT_STAT_BMSK 0x00000200 213*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_SW2TCL2_RNG_HALT_STAT_SHFT 0x9 214*5113495bSYour Name 215*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_SW2TCL1_RNG_HALT_STAT_BMSK 0x00000100 216*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_SW2TCL1_RNG_HALT_STAT_SHFT 0x8 217*5113495bSYour Name 218*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_SW2TCL_CREDIT_RING_HALT_BMSK 0x00000080 219*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_SW2TCL_CREDIT_RING_HALT_SHFT 0x7 220*5113495bSYour Name 221*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_FW2TCL1_RNG_HALT_BMSK 0x00000040 222*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_FW2TCL1_RNG_HALT_SHFT 0x6 223*5113495bSYour Name 224*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_SW2TCL3_RNG_HALT_BMSK 0x00000020 225*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_SW2TCL3_RNG_HALT_SHFT 0x5 226*5113495bSYour Name 227*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_SW2TCL2_RNG_HALT_BMSK 0x00000010 228*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_SW2TCL2_RNG_HALT_SHFT 0x4 229*5113495bSYour Name 230*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_SW2TCL1_RNG_HALT_BMSK 0x00000008 231*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_SW2TCL1_RNG_HALT_SHFT 0x3 232*5113495bSYour Name 233*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_HDR_FWD_EN_BMSK 0x00000004 234*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_HDR_FWD_EN_SHFT 0x2 235*5113495bSYour Name 236*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_MSDU_HDR_LEN_SEL_BMSK 0x00000002 237*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_MSDU_HDR_LEN_SEL_SHFT 0x1 238*5113495bSYour Name 239*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_CLFY_DIS_BMSK 0x00000001 240*5113495bSYour Name #define HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_CLFY_DIS_SHFT 0x0 241*5113495bSYour Name 242*5113495bSYour Name //// Register TCL_R0_TCL2TQM_RING_CTRL //// 243*5113495bSYour Name 244*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_CTRL_ADDR(x) (x+0x00000018) 245*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_CTRL_PHYS(x) (x+0x00000018) 246*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_CTRL_RMSK 0x0000ffff 247*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_CTRL_SHFT 0 248*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_CTRL_IN(x) \ 249*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2TQM_RING_CTRL_ADDR(x), HWIO_TCL_R0_TCL2TQM_RING_CTRL_RMSK) 250*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_CTRL_INM(x, mask) \ 251*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2TQM_RING_CTRL_ADDR(x), mask) 252*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_CTRL_OUT(x, val) \ 253*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL2TQM_RING_CTRL_ADDR(x), val) 254*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_CTRL_OUTM(x, mask, val) \ 255*5113495bSYour Name do {\ 256*5113495bSYour Name HWIO_INTLOCK(); \ 257*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL2TQM_RING_CTRL_ADDR(x), mask, val, HWIO_TCL_R0_TCL2TQM_RING_CTRL_IN(x)); \ 258*5113495bSYour Name HWIO_INTFREE();\ 259*5113495bSYour Name } while (0) 260*5113495bSYour Name 261*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_CTRL_DROP_NO_DROP_PRIORITY_BMSK 0x0000c000 262*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_CTRL_DROP_NO_DROP_PRIORITY_SHFT 0xe 263*5113495bSYour Name 264*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_CTRL_TQM_STATUS_RING_BMSK 0x00002000 265*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_CTRL_TQM_STATUS_RING_SHFT 0xd 266*5113495bSYour Name 267*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_CTRL_TQM_STATUS_REQUIRED_BMSK 0x00001000 268*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_CTRL_TQM_STATUS_REQUIRED_SHFT 0xc 269*5113495bSYour Name 270*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_CTRL_TIMEOUT_VAL_BMSK 0x00000fff 271*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_CTRL_TIMEOUT_VAL_SHFT 0x0 272*5113495bSYour Name 273*5113495bSYour Name //// Register TCL_R0_TCL2FW_RING_CTRL //// 274*5113495bSYour Name 275*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_CTRL_ADDR(x) (x+0x0000001c) 276*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_CTRL_PHYS(x) (x+0x0000001c) 277*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_CTRL_RMSK 0x00000fff 278*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_CTRL_SHFT 0 279*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_CTRL_IN(x) \ 280*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2FW_RING_CTRL_ADDR(x), HWIO_TCL_R0_TCL2FW_RING_CTRL_RMSK) 281*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_CTRL_INM(x, mask) \ 282*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2FW_RING_CTRL_ADDR(x), mask) 283*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_CTRL_OUT(x, val) \ 284*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL2FW_RING_CTRL_ADDR(x), val) 285*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_CTRL_OUTM(x, mask, val) \ 286*5113495bSYour Name do {\ 287*5113495bSYour Name HWIO_INTLOCK(); \ 288*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL2FW_RING_CTRL_ADDR(x), mask, val, HWIO_TCL_R0_TCL2FW_RING_CTRL_IN(x)); \ 289*5113495bSYour Name HWIO_INTFREE();\ 290*5113495bSYour Name } while (0) 291*5113495bSYour Name 292*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_CTRL_TIMEOUT_VAL_BMSK 0x00000fff 293*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_CTRL_TIMEOUT_VAL_SHFT 0x0 294*5113495bSYour Name 295*5113495bSYour Name //// Register TCL_R0_TCL_STATUS1_RING_CTRL //// 296*5113495bSYour Name 297*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_CTRL_ADDR(x) (x+0x00000020) 298*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_CTRL_PHYS(x) (x+0x00000020) 299*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_CTRL_RMSK 0x00000fff 300*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_CTRL_SHFT 0 301*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_CTRL_IN(x) \ 302*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_CTRL_ADDR(x), HWIO_TCL_R0_TCL_STATUS1_RING_CTRL_RMSK) 303*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_CTRL_INM(x, mask) \ 304*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_CTRL_ADDR(x), mask) 305*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_CTRL_OUT(x, val) \ 306*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS1_RING_CTRL_ADDR(x), val) 307*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_CTRL_OUTM(x, mask, val) \ 308*5113495bSYour Name do {\ 309*5113495bSYour Name HWIO_INTLOCK(); \ 310*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS1_RING_CTRL_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS1_RING_CTRL_IN(x)); \ 311*5113495bSYour Name HWIO_INTFREE();\ 312*5113495bSYour Name } while (0) 313*5113495bSYour Name 314*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_CTRL_TIMEOUT_VAL_BMSK 0x00000fff 315*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_CTRL_TIMEOUT_VAL_SHFT 0x0 316*5113495bSYour Name 317*5113495bSYour Name //// Register TCL_R0_TCL_STATUS2_RING_CTRL //// 318*5113495bSYour Name 319*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_CTRL_ADDR(x) (x+0x00000024) 320*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_CTRL_PHYS(x) (x+0x00000024) 321*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_CTRL_RMSK 0x00000fff 322*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_CTRL_SHFT 0 323*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_CTRL_IN(x) \ 324*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_CTRL_ADDR(x), HWIO_TCL_R0_TCL_STATUS2_RING_CTRL_RMSK) 325*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_CTRL_INM(x, mask) \ 326*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_CTRL_ADDR(x), mask) 327*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_CTRL_OUT(x, val) \ 328*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS2_RING_CTRL_ADDR(x), val) 329*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_CTRL_OUTM(x, mask, val) \ 330*5113495bSYour Name do {\ 331*5113495bSYour Name HWIO_INTLOCK(); \ 332*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS2_RING_CTRL_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS2_RING_CTRL_IN(x)); \ 333*5113495bSYour Name HWIO_INTFREE();\ 334*5113495bSYour Name } while (0) 335*5113495bSYour Name 336*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_CTRL_TIMEOUT_VAL_BMSK 0x00000fff 337*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_CTRL_TIMEOUT_VAL_SHFT 0x0 338*5113495bSYour Name 339*5113495bSYour Name //// Register TCL_R0_GEN_CTRL //// 340*5113495bSYour Name 341*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_ADDR(x) (x+0x00000028) 342*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_PHYS(x) (x+0x00000028) 343*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_RMSK 0xfffff1fb 344*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_SHFT 0 345*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_IN(x) \ 346*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GEN_CTRL_ADDR(x), HWIO_TCL_R0_GEN_CTRL_RMSK) 347*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_INM(x, mask) \ 348*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GEN_CTRL_ADDR(x), mask) 349*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_OUT(x, val) \ 350*5113495bSYour Name out_dword( HWIO_TCL_R0_GEN_CTRL_ADDR(x), val) 351*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_OUTM(x, mask, val) \ 352*5113495bSYour Name do {\ 353*5113495bSYour Name HWIO_INTLOCK(); \ 354*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_GEN_CTRL_ADDR(x), mask, val, HWIO_TCL_R0_GEN_CTRL_IN(x)); \ 355*5113495bSYour Name HWIO_INTFREE();\ 356*5113495bSYour Name } while (0) 357*5113495bSYour Name 358*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_WHO_CLASSIFY_INFO_OFFSET_BMSK 0xffff0000 359*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_WHO_CLASSIFY_INFO_OFFSET_SHFT 0x10 360*5113495bSYour Name 361*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_PROTOCOL_FROM_AH_OR_L4_BMSK 0x00008000 362*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_PROTOCOL_FROM_AH_OR_L4_SHFT 0xf 363*5113495bSYour Name 364*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_PROTOCOL_FROM_AH_OR_ESP_BMSK 0x00004000 365*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_PROTOCOL_FROM_AH_OR_ESP_SHFT 0xe 366*5113495bSYour Name 367*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_FLOW_TOEPLITZ_5_SEL_BMSK 0x00002000 368*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_FLOW_TOEPLITZ_5_SEL_SHFT 0xd 369*5113495bSYour Name 370*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_CCE_STAT_UP_DIS_BMSK 0x00001000 371*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_CCE_STAT_UP_DIS_SHFT 0xc 372*5113495bSYour Name 373*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_CCE_UPDATE_DIS_BMSK 0x00000100 374*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_CCE_UPDATE_DIS_SHFT 0x8 375*5113495bSYour Name 376*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_FSE_UPDATE_DIS_BMSK 0x00000080 377*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_FSE_UPDATE_DIS_SHFT 0x7 378*5113495bSYour Name 379*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_ADDRY_UPDATE_DIS_BMSK 0x00000040 380*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_ADDRY_UPDATE_DIS_SHFT 0x6 381*5113495bSYour Name 382*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_ADDRX_UPDATE_DIS_BMSK 0x00000020 383*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_ADDRX_UPDATE_DIS_SHFT 0x5 384*5113495bSYour Name 385*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_FSE_EN_BMSK 0x00000010 386*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_FSE_EN_SHFT 0x4 387*5113495bSYour Name 388*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_CCE_EN_BMSK 0x00000008 389*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_CCE_EN_SHFT 0x3 390*5113495bSYour Name 391*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_TO_FW_BMSK 0x00000002 392*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_TO_FW_SHFT 0x1 393*5113495bSYour Name 394*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_EN_11AH_BMSK 0x00000001 395*5113495bSYour Name #define HWIO_TCL_R0_GEN_CTRL_EN_11AH_SHFT 0x0 396*5113495bSYour Name 397*5113495bSYour Name //// Register TCL_R0_DSCP_TID_MAP_n //// 398*5113495bSYour Name 399*5113495bSYour Name #define HWIO_TCL_R0_DSCP_TID_MAP_n_ADDR(base, n) (base+0x2C+0x4*n) 400*5113495bSYour Name #define HWIO_TCL_R0_DSCP_TID_MAP_n_PHYS(base, n) (base+0x2C+0x4*n) 401*5113495bSYour Name #define HWIO_TCL_R0_DSCP_TID_MAP_n_RMSK 0xffffffff 402*5113495bSYour Name #define HWIO_TCL_R0_DSCP_TID_MAP_n_SHFT 0 403*5113495bSYour Name #define HWIO_TCL_R0_DSCP_TID_MAP_n_MAXn 287 404*5113495bSYour Name #define HWIO_TCL_R0_DSCP_TID_MAP_n_INI(base, n) \ 405*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_DSCP_TID_MAP_n_ADDR(base, n), HWIO_TCL_R0_DSCP_TID_MAP_n_RMSK) 406*5113495bSYour Name #define HWIO_TCL_R0_DSCP_TID_MAP_n_INMI(base, n, mask) \ 407*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_DSCP_TID_MAP_n_ADDR(base, n), mask) 408*5113495bSYour Name #define HWIO_TCL_R0_DSCP_TID_MAP_n_OUTI(base, n, val) \ 409*5113495bSYour Name out_dword( HWIO_TCL_R0_DSCP_TID_MAP_n_ADDR(base, n), val) 410*5113495bSYour Name #define HWIO_TCL_R0_DSCP_TID_MAP_n_OUTMI(base, n, mask, val) \ 411*5113495bSYour Name do {\ 412*5113495bSYour Name HWIO_INTLOCK(); \ 413*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_DSCP_TID_MAP_n_ADDR(base, n), mask, val, HWIO_TCL_R0_DSCP_TID_MAP_n_INI(base, n)); \ 414*5113495bSYour Name HWIO_INTFREE();\ 415*5113495bSYour Name } while (0) 416*5113495bSYour Name 417*5113495bSYour Name #define HWIO_TCL_R0_DSCP_TID_MAP_n_VAL_BMSK 0xffffffff 418*5113495bSYour Name #define HWIO_TCL_R0_DSCP_TID_MAP_n_VAL_SHFT 0x0 419*5113495bSYour Name 420*5113495bSYour Name //// Register TCL_R0_PCP_TID_MAP //// 421*5113495bSYour Name 422*5113495bSYour Name #define HWIO_TCL_R0_PCP_TID_MAP_ADDR(x) (x+0x000004ac) 423*5113495bSYour Name #define HWIO_TCL_R0_PCP_TID_MAP_PHYS(x) (x+0x000004ac) 424*5113495bSYour Name #define HWIO_TCL_R0_PCP_TID_MAP_RMSK 0x00ffffff 425*5113495bSYour Name #define HWIO_TCL_R0_PCP_TID_MAP_SHFT 0 426*5113495bSYour Name #define HWIO_TCL_R0_PCP_TID_MAP_IN(x) \ 427*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_PCP_TID_MAP_ADDR(x), HWIO_TCL_R0_PCP_TID_MAP_RMSK) 428*5113495bSYour Name #define HWIO_TCL_R0_PCP_TID_MAP_INM(x, mask) \ 429*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_PCP_TID_MAP_ADDR(x), mask) 430*5113495bSYour Name #define HWIO_TCL_R0_PCP_TID_MAP_OUT(x, val) \ 431*5113495bSYour Name out_dword( HWIO_TCL_R0_PCP_TID_MAP_ADDR(x), val) 432*5113495bSYour Name #define HWIO_TCL_R0_PCP_TID_MAP_OUTM(x, mask, val) \ 433*5113495bSYour Name do {\ 434*5113495bSYour Name HWIO_INTLOCK(); \ 435*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_PCP_TID_MAP_ADDR(x), mask, val, HWIO_TCL_R0_PCP_TID_MAP_IN(x)); \ 436*5113495bSYour Name HWIO_INTFREE();\ 437*5113495bSYour Name } while (0) 438*5113495bSYour Name 439*5113495bSYour Name #define HWIO_TCL_R0_PCP_TID_MAP_PCP_7_BMSK 0x00e00000 440*5113495bSYour Name #define HWIO_TCL_R0_PCP_TID_MAP_PCP_7_SHFT 0x15 441*5113495bSYour Name 442*5113495bSYour Name #define HWIO_TCL_R0_PCP_TID_MAP_PCP_6_BMSK 0x001c0000 443*5113495bSYour Name #define HWIO_TCL_R0_PCP_TID_MAP_PCP_6_SHFT 0x12 444*5113495bSYour Name 445*5113495bSYour Name #define HWIO_TCL_R0_PCP_TID_MAP_PCP_5_BMSK 0x00038000 446*5113495bSYour Name #define HWIO_TCL_R0_PCP_TID_MAP_PCP_5_SHFT 0xf 447*5113495bSYour Name 448*5113495bSYour Name #define HWIO_TCL_R0_PCP_TID_MAP_PCP_4_BMSK 0x00007000 449*5113495bSYour Name #define HWIO_TCL_R0_PCP_TID_MAP_PCP_4_SHFT 0xc 450*5113495bSYour Name 451*5113495bSYour Name #define HWIO_TCL_R0_PCP_TID_MAP_PCP_3_BMSK 0x00000e00 452*5113495bSYour Name #define HWIO_TCL_R0_PCP_TID_MAP_PCP_3_SHFT 0x9 453*5113495bSYour Name 454*5113495bSYour Name #define HWIO_TCL_R0_PCP_TID_MAP_PCP_2_BMSK 0x000001c0 455*5113495bSYour Name #define HWIO_TCL_R0_PCP_TID_MAP_PCP_2_SHFT 0x6 456*5113495bSYour Name 457*5113495bSYour Name #define HWIO_TCL_R0_PCP_TID_MAP_PCP_1_BMSK 0x00000038 458*5113495bSYour Name #define HWIO_TCL_R0_PCP_TID_MAP_PCP_1_SHFT 0x3 459*5113495bSYour Name 460*5113495bSYour Name #define HWIO_TCL_R0_PCP_TID_MAP_PCP_0_BMSK 0x00000007 461*5113495bSYour Name #define HWIO_TCL_R0_PCP_TID_MAP_PCP_0_SHFT 0x0 462*5113495bSYour Name 463*5113495bSYour Name //// Register TCL_R0_ASE_HASH_KEY_31_0 //// 464*5113495bSYour Name 465*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_31_0_ADDR(x) (x+0x000004b0) 466*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_31_0_PHYS(x) (x+0x000004b0) 467*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_31_0_RMSK 0xffffffff 468*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_31_0_SHFT 0 469*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_31_0_IN(x) \ 470*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_ASE_HASH_KEY_31_0_ADDR(x), HWIO_TCL_R0_ASE_HASH_KEY_31_0_RMSK) 471*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_31_0_INM(x, mask) \ 472*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_ASE_HASH_KEY_31_0_ADDR(x), mask) 473*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_31_0_OUT(x, val) \ 474*5113495bSYour Name out_dword( HWIO_TCL_R0_ASE_HASH_KEY_31_0_ADDR(x), val) 475*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_31_0_OUTM(x, mask, val) \ 476*5113495bSYour Name do {\ 477*5113495bSYour Name HWIO_INTLOCK(); \ 478*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_ASE_HASH_KEY_31_0_ADDR(x), mask, val, HWIO_TCL_R0_ASE_HASH_KEY_31_0_IN(x)); \ 479*5113495bSYour Name HWIO_INTFREE();\ 480*5113495bSYour Name } while (0) 481*5113495bSYour Name 482*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_31_0_VAL_BMSK 0xffffffff 483*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_31_0_VAL_SHFT 0x0 484*5113495bSYour Name 485*5113495bSYour Name //// Register TCL_R0_ASE_HASH_KEY_63_32 //// 486*5113495bSYour Name 487*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_63_32_ADDR(x) (x+0x000004b4) 488*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_63_32_PHYS(x) (x+0x000004b4) 489*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_63_32_RMSK 0xffffffff 490*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_63_32_SHFT 0 491*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_63_32_IN(x) \ 492*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_ASE_HASH_KEY_63_32_ADDR(x), HWIO_TCL_R0_ASE_HASH_KEY_63_32_RMSK) 493*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_63_32_INM(x, mask) \ 494*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_ASE_HASH_KEY_63_32_ADDR(x), mask) 495*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_63_32_OUT(x, val) \ 496*5113495bSYour Name out_dword( HWIO_TCL_R0_ASE_HASH_KEY_63_32_ADDR(x), val) 497*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_63_32_OUTM(x, mask, val) \ 498*5113495bSYour Name do {\ 499*5113495bSYour Name HWIO_INTLOCK(); \ 500*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_ASE_HASH_KEY_63_32_ADDR(x), mask, val, HWIO_TCL_R0_ASE_HASH_KEY_63_32_IN(x)); \ 501*5113495bSYour Name HWIO_INTFREE();\ 502*5113495bSYour Name } while (0) 503*5113495bSYour Name 504*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_63_32_VAL_BMSK 0xffffffff 505*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_63_32_VAL_SHFT 0x0 506*5113495bSYour Name 507*5113495bSYour Name //// Register TCL_R0_ASE_HASH_KEY_64 //// 508*5113495bSYour Name 509*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_64_ADDR(x) (x+0x000004b8) 510*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_64_PHYS(x) (x+0x000004b8) 511*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_64_RMSK 0x00000001 512*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_64_SHFT 0 513*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_64_IN(x) \ 514*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_ASE_HASH_KEY_64_ADDR(x), HWIO_TCL_R0_ASE_HASH_KEY_64_RMSK) 515*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_64_INM(x, mask) \ 516*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_ASE_HASH_KEY_64_ADDR(x), mask) 517*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_64_OUT(x, val) \ 518*5113495bSYour Name out_dword( HWIO_TCL_R0_ASE_HASH_KEY_64_ADDR(x), val) 519*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_64_OUTM(x, mask, val) \ 520*5113495bSYour Name do {\ 521*5113495bSYour Name HWIO_INTLOCK(); \ 522*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_ASE_HASH_KEY_64_ADDR(x), mask, val, HWIO_TCL_R0_ASE_HASH_KEY_64_IN(x)); \ 523*5113495bSYour Name HWIO_INTFREE();\ 524*5113495bSYour Name } while (0) 525*5113495bSYour Name 526*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_64_VAL_BMSK 0x00000001 527*5113495bSYour Name #define HWIO_TCL_R0_ASE_HASH_KEY_64_VAL_SHFT 0x0 528*5113495bSYour Name 529*5113495bSYour Name //// Register TCL_R0_CONFIG_SEARCH_QUEUE //// 530*5113495bSYour Name 531*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_ADDR(x) (x+0x000004bc) 532*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_PHYS(x) (x+0x000004bc) 533*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_RMSK 0x00fffdfc 534*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_SHFT 2 535*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_IN(x) \ 536*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_ADDR(x), HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_RMSK) 537*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_INM(x, mask) \ 538*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_ADDR(x), mask) 539*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_OUT(x, val) \ 540*5113495bSYour Name out_dword( HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_ADDR(x), val) 541*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_OUTM(x, mask, val) \ 542*5113495bSYour Name do {\ 543*5113495bSYour Name HWIO_INTLOCK(); \ 544*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_ADDR(x), mask, val, HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_IN(x)); \ 545*5113495bSYour Name HWIO_INTFREE();\ 546*5113495bSYour Name } while (0) 547*5113495bSYour Name 548*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_MSDU_LEN_ERR_TO_FW_EN_BMSK 0x00800000 549*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_MSDU_LEN_ERR_TO_FW_EN_SHFT 0x17 550*5113495bSYour Name 551*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_FSE_M0_FW_SEL_BMSK 0x00700000 552*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_FSE_M0_FW_SEL_SHFT 0x14 553*5113495bSYour Name 554*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_ASE_M0_FW_SEL_BMSK 0x000e0000 555*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_ASE_M0_FW_SEL_SHFT 0x11 556*5113495bSYour Name 557*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_CCE_M0_FW_SEL_BMSK 0x0001c000 558*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_CCE_M0_FW_SEL_SHFT 0xe 559*5113495bSYour Name 560*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_CCE_FAIL_DROP_BMSK 0x00002000 561*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_CCE_FAIL_DROP_SHFT 0xd 562*5113495bSYour Name 563*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_FSE_FAIL_DROP_BMSK 0x00001000 564*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_FSE_FAIL_DROP_SHFT 0xc 565*5113495bSYour Name 566*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_CCE_FAIL_LOOP_BMSK 0x00000800 567*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_CCE_FAIL_LOOP_SHFT 0xb 568*5113495bSYour Name 569*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_FSE_FAIL_LOOP_BMSK 0x00000400 570*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_FSE_FAIL_LOOP_SHFT 0xa 571*5113495bSYour Name 572*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_PRIORITY_BMSK 0x000001c0 573*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_PRIORITY_SHFT 0x6 574*5113495bSYour Name 575*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_CCE_FAIL_HANDLER_BMSK 0x00000030 576*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_CCE_FAIL_HANDLER_SHFT 0x4 577*5113495bSYour Name 578*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_FSE_FAIL_HANDLER_BMSK 0x0000000c 579*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_QUEUE_FSE_FAIL_HANDLER_SHFT 0x2 580*5113495bSYour Name 581*5113495bSYour Name //// Register TCL_R0_FSE_FAIL_QUEUE_NUM_LOW //// 582*5113495bSYour Name 583*5113495bSYour Name #define HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_LOW_ADDR(x) (x+0x000004c0) 584*5113495bSYour Name #define HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_LOW_PHYS(x) (x+0x000004c0) 585*5113495bSYour Name #define HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_LOW_RMSK 0xffffffff 586*5113495bSYour Name #define HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_LOW_SHFT 0 587*5113495bSYour Name #define HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_LOW_IN(x) \ 588*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_LOW_ADDR(x), HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_LOW_RMSK) 589*5113495bSYour Name #define HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_LOW_INM(x, mask) \ 590*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_LOW_ADDR(x), mask) 591*5113495bSYour Name #define HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_LOW_OUT(x, val) \ 592*5113495bSYour Name out_dword( HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_LOW_ADDR(x), val) 593*5113495bSYour Name #define HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_LOW_OUTM(x, mask, val) \ 594*5113495bSYour Name do {\ 595*5113495bSYour Name HWIO_INTLOCK(); \ 596*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_LOW_ADDR(x), mask, val, HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_LOW_IN(x)); \ 597*5113495bSYour Name HWIO_INTFREE();\ 598*5113495bSYour Name } while (0) 599*5113495bSYour Name 600*5113495bSYour Name #define HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_LOW_VAL_BMSK 0xffffffff 601*5113495bSYour Name #define HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_LOW_VAL_SHFT 0x0 602*5113495bSYour Name 603*5113495bSYour Name //// Register TCL_R0_FSE_FAIL_QUEUE_NUM_HIGH //// 604*5113495bSYour Name 605*5113495bSYour Name #define HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_HIGH_ADDR(x) (x+0x000004c4) 606*5113495bSYour Name #define HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_HIGH_PHYS(x) (x+0x000004c4) 607*5113495bSYour Name #define HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_HIGH_RMSK 0x000000ff 608*5113495bSYour Name #define HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_HIGH_SHFT 0 609*5113495bSYour Name #define HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_HIGH_IN(x) \ 610*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_HIGH_ADDR(x), HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_HIGH_RMSK) 611*5113495bSYour Name #define HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_HIGH_INM(x, mask) \ 612*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_HIGH_ADDR(x), mask) 613*5113495bSYour Name #define HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_HIGH_OUT(x, val) \ 614*5113495bSYour Name out_dword( HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_HIGH_ADDR(x), val) 615*5113495bSYour Name #define HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_HIGH_OUTM(x, mask, val) \ 616*5113495bSYour Name do {\ 617*5113495bSYour Name HWIO_INTLOCK(); \ 618*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_HIGH_ADDR(x), mask, val, HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_HIGH_IN(x)); \ 619*5113495bSYour Name HWIO_INTFREE();\ 620*5113495bSYour Name } while (0) 621*5113495bSYour Name 622*5113495bSYour Name #define HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_HIGH_VAL_BMSK 0x000000ff 623*5113495bSYour Name #define HWIO_TCL_R0_FSE_FAIL_QUEUE_NUM_HIGH_VAL_SHFT 0x0 624*5113495bSYour Name 625*5113495bSYour Name //// Register TCL_R0_CCE_FAIL_QUEUE_NUM_LOW //// 626*5113495bSYour Name 627*5113495bSYour Name #define HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_LOW_ADDR(x) (x+0x000004c8) 628*5113495bSYour Name #define HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_LOW_PHYS(x) (x+0x000004c8) 629*5113495bSYour Name #define HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_LOW_RMSK 0xffffffff 630*5113495bSYour Name #define HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_LOW_SHFT 0 631*5113495bSYour Name #define HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_LOW_IN(x) \ 632*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_LOW_ADDR(x), HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_LOW_RMSK) 633*5113495bSYour Name #define HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_LOW_INM(x, mask) \ 634*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_LOW_ADDR(x), mask) 635*5113495bSYour Name #define HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_LOW_OUT(x, val) \ 636*5113495bSYour Name out_dword( HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_LOW_ADDR(x), val) 637*5113495bSYour Name #define HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_LOW_OUTM(x, mask, val) \ 638*5113495bSYour Name do {\ 639*5113495bSYour Name HWIO_INTLOCK(); \ 640*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_LOW_ADDR(x), mask, val, HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_LOW_IN(x)); \ 641*5113495bSYour Name HWIO_INTFREE();\ 642*5113495bSYour Name } while (0) 643*5113495bSYour Name 644*5113495bSYour Name #define HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_LOW_VAL_BMSK 0xffffffff 645*5113495bSYour Name #define HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_LOW_VAL_SHFT 0x0 646*5113495bSYour Name 647*5113495bSYour Name //// Register TCL_R0_CCE_FAIL_QUEUE_NUM_HIGH //// 648*5113495bSYour Name 649*5113495bSYour Name #define HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_HIGH_ADDR(x) (x+0x000004cc) 650*5113495bSYour Name #define HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_HIGH_PHYS(x) (x+0x000004cc) 651*5113495bSYour Name #define HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_HIGH_RMSK 0x000000ff 652*5113495bSYour Name #define HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_HIGH_SHFT 0 653*5113495bSYour Name #define HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_HIGH_IN(x) \ 654*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_HIGH_ADDR(x), HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_HIGH_RMSK) 655*5113495bSYour Name #define HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_HIGH_INM(x, mask) \ 656*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_HIGH_ADDR(x), mask) 657*5113495bSYour Name #define HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_HIGH_OUT(x, val) \ 658*5113495bSYour Name out_dword( HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_HIGH_ADDR(x), val) 659*5113495bSYour Name #define HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_HIGH_OUTM(x, mask, val) \ 660*5113495bSYour Name do {\ 661*5113495bSYour Name HWIO_INTLOCK(); \ 662*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_HIGH_ADDR(x), mask, val, HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_HIGH_IN(x)); \ 663*5113495bSYour Name HWIO_INTFREE();\ 664*5113495bSYour Name } while (0) 665*5113495bSYour Name 666*5113495bSYour Name #define HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_HIGH_VAL_BMSK 0x000000ff 667*5113495bSYour Name #define HWIO_TCL_R0_CCE_FAIL_QUEUE_NUM_HIGH_VAL_SHFT 0x0 668*5113495bSYour Name 669*5113495bSYour Name //// Register TCL_R0_CONFIG_SEARCH_METADATA //// 670*5113495bSYour Name 671*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_METADATA_ADDR(x) (x+0x000004d0) 672*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_METADATA_PHYS(x) (x+0x000004d0) 673*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_METADATA_RMSK 0xffffffff 674*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_METADATA_SHFT 0 675*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_METADATA_IN(x) \ 676*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_CONFIG_SEARCH_METADATA_ADDR(x), HWIO_TCL_R0_CONFIG_SEARCH_METADATA_RMSK) 677*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_METADATA_INM(x, mask) \ 678*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_CONFIG_SEARCH_METADATA_ADDR(x), mask) 679*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_METADATA_OUT(x, val) \ 680*5113495bSYour Name out_dword( HWIO_TCL_R0_CONFIG_SEARCH_METADATA_ADDR(x), val) 681*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_METADATA_OUTM(x, mask, val) \ 682*5113495bSYour Name do {\ 683*5113495bSYour Name HWIO_INTLOCK(); \ 684*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_CONFIG_SEARCH_METADATA_ADDR(x), mask, val, HWIO_TCL_R0_CONFIG_SEARCH_METADATA_IN(x)); \ 685*5113495bSYour Name HWIO_INTFREE();\ 686*5113495bSYour Name } while (0) 687*5113495bSYour Name 688*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_METADATA_FSE_FAIL_NUM_BMSK 0xffff0000 689*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_METADATA_FSE_FAIL_NUM_SHFT 0x10 690*5113495bSYour Name 691*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_METADATA_CCE_FAIL_NUM_BMSK 0x0000ffff 692*5113495bSYour Name #define HWIO_TCL_R0_CONFIG_SEARCH_METADATA_CCE_FAIL_NUM_SHFT 0x0 693*5113495bSYour Name 694*5113495bSYour Name //// Register TCL_R0_TID_MAP_PRTY //// 695*5113495bSYour Name 696*5113495bSYour Name #define HWIO_TCL_R0_TID_MAP_PRTY_ADDR(x) (x+0x000004d4) 697*5113495bSYour Name #define HWIO_TCL_R0_TID_MAP_PRTY_PHYS(x) (x+0x000004d4) 698*5113495bSYour Name #define HWIO_TCL_R0_TID_MAP_PRTY_RMSK 0x000000ef 699*5113495bSYour Name #define HWIO_TCL_R0_TID_MAP_PRTY_SHFT 0 700*5113495bSYour Name #define HWIO_TCL_R0_TID_MAP_PRTY_IN(x) \ 701*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TID_MAP_PRTY_ADDR(x), HWIO_TCL_R0_TID_MAP_PRTY_RMSK) 702*5113495bSYour Name #define HWIO_TCL_R0_TID_MAP_PRTY_INM(x, mask) \ 703*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TID_MAP_PRTY_ADDR(x), mask) 704*5113495bSYour Name #define HWIO_TCL_R0_TID_MAP_PRTY_OUT(x, val) \ 705*5113495bSYour Name out_dword( HWIO_TCL_R0_TID_MAP_PRTY_ADDR(x), val) 706*5113495bSYour Name #define HWIO_TCL_R0_TID_MAP_PRTY_OUTM(x, mask, val) \ 707*5113495bSYour Name do {\ 708*5113495bSYour Name HWIO_INTLOCK(); \ 709*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TID_MAP_PRTY_ADDR(x), mask, val, HWIO_TCL_R0_TID_MAP_PRTY_IN(x)); \ 710*5113495bSYour Name HWIO_INTFREE();\ 711*5113495bSYour Name } while (0) 712*5113495bSYour Name 713*5113495bSYour Name #define HWIO_TCL_R0_TID_MAP_PRTY_TID_DEF_BMSK 0x000000e0 714*5113495bSYour Name #define HWIO_TCL_R0_TID_MAP_PRTY_TID_DEF_SHFT 0x5 715*5113495bSYour Name 716*5113495bSYour Name #define HWIO_TCL_R0_TID_MAP_PRTY_VAL_BMSK 0x0000000f 717*5113495bSYour Name #define HWIO_TCL_R0_TID_MAP_PRTY_VAL_SHFT 0x0 718*5113495bSYour Name 719*5113495bSYour Name //// Register TCL_R0_INVALID_APB_ACC_ADDR //// 720*5113495bSYour Name 721*5113495bSYour Name #define HWIO_TCL_R0_INVALID_APB_ACC_ADDR_ADDR(x) (x+0x000004d8) 722*5113495bSYour Name #define HWIO_TCL_R0_INVALID_APB_ACC_ADDR_PHYS(x) (x+0x000004d8) 723*5113495bSYour Name #define HWIO_TCL_R0_INVALID_APB_ACC_ADDR_RMSK 0xffffffff 724*5113495bSYour Name #define HWIO_TCL_R0_INVALID_APB_ACC_ADDR_SHFT 0 725*5113495bSYour Name #define HWIO_TCL_R0_INVALID_APB_ACC_ADDR_IN(x) \ 726*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_INVALID_APB_ACC_ADDR_ADDR(x), HWIO_TCL_R0_INVALID_APB_ACC_ADDR_RMSK) 727*5113495bSYour Name #define HWIO_TCL_R0_INVALID_APB_ACC_ADDR_INM(x, mask) \ 728*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_INVALID_APB_ACC_ADDR_ADDR(x), mask) 729*5113495bSYour Name #define HWIO_TCL_R0_INVALID_APB_ACC_ADDR_OUT(x, val) \ 730*5113495bSYour Name out_dword( HWIO_TCL_R0_INVALID_APB_ACC_ADDR_ADDR(x), val) 731*5113495bSYour Name #define HWIO_TCL_R0_INVALID_APB_ACC_ADDR_OUTM(x, mask, val) \ 732*5113495bSYour Name do {\ 733*5113495bSYour Name HWIO_INTLOCK(); \ 734*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_INVALID_APB_ACC_ADDR_ADDR(x), mask, val, HWIO_TCL_R0_INVALID_APB_ACC_ADDR_IN(x)); \ 735*5113495bSYour Name HWIO_INTFREE();\ 736*5113495bSYour Name } while (0) 737*5113495bSYour Name 738*5113495bSYour Name #define HWIO_TCL_R0_INVALID_APB_ACC_ADDR_VAL_BMSK 0xffffffff 739*5113495bSYour Name #define HWIO_TCL_R0_INVALID_APB_ACC_ADDR_VAL_SHFT 0x0 740*5113495bSYour Name 741*5113495bSYour Name //// Register TCL_R0_WATCHDOG //// 742*5113495bSYour Name 743*5113495bSYour Name #define HWIO_TCL_R0_WATCHDOG_ADDR(x) (x+0x000004dc) 744*5113495bSYour Name #define HWIO_TCL_R0_WATCHDOG_PHYS(x) (x+0x000004dc) 745*5113495bSYour Name #define HWIO_TCL_R0_WATCHDOG_RMSK 0xffffffff 746*5113495bSYour Name #define HWIO_TCL_R0_WATCHDOG_SHFT 0 747*5113495bSYour Name #define HWIO_TCL_R0_WATCHDOG_IN(x) \ 748*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_WATCHDOG_ADDR(x), HWIO_TCL_R0_WATCHDOG_RMSK) 749*5113495bSYour Name #define HWIO_TCL_R0_WATCHDOG_INM(x, mask) \ 750*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_WATCHDOG_ADDR(x), mask) 751*5113495bSYour Name #define HWIO_TCL_R0_WATCHDOG_OUT(x, val) \ 752*5113495bSYour Name out_dword( HWIO_TCL_R0_WATCHDOG_ADDR(x), val) 753*5113495bSYour Name #define HWIO_TCL_R0_WATCHDOG_OUTM(x, mask, val) \ 754*5113495bSYour Name do {\ 755*5113495bSYour Name HWIO_INTLOCK(); \ 756*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_WATCHDOG_ADDR(x), mask, val, HWIO_TCL_R0_WATCHDOG_IN(x)); \ 757*5113495bSYour Name HWIO_INTFREE();\ 758*5113495bSYour Name } while (0) 759*5113495bSYour Name 760*5113495bSYour Name #define HWIO_TCL_R0_WATCHDOG_STATUS_BMSK 0xffff0000 761*5113495bSYour Name #define HWIO_TCL_R0_WATCHDOG_STATUS_SHFT 0x10 762*5113495bSYour Name 763*5113495bSYour Name #define HWIO_TCL_R0_WATCHDOG_LIMIT_BMSK 0x0000ffff 764*5113495bSYour Name #define HWIO_TCL_R0_WATCHDOG_LIMIT_SHFT 0x0 765*5113495bSYour Name 766*5113495bSYour Name //// Register TCL_R0_CLKGATE_DISABLE //// 767*5113495bSYour Name 768*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_ADDR(x) (x+0x000004e0) 769*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_PHYS(x) (x+0x000004e0) 770*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_RMSK 0xffffffff 771*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_SHFT 0 772*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_IN(x) \ 773*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_CLKGATE_DISABLE_ADDR(x), HWIO_TCL_R0_CLKGATE_DISABLE_RMSK) 774*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_INM(x, mask) \ 775*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_CLKGATE_DISABLE_ADDR(x), mask) 776*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_OUT(x, val) \ 777*5113495bSYour Name out_dword( HWIO_TCL_R0_CLKGATE_DISABLE_ADDR(x), val) 778*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_OUTM(x, mask, val) \ 779*5113495bSYour Name do {\ 780*5113495bSYour Name HWIO_INTLOCK(); \ 781*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_CLKGATE_DISABLE_ADDR(x), mask, val, HWIO_TCL_R0_CLKGATE_DISABLE_IN(x)); \ 782*5113495bSYour Name HWIO_INTFREE();\ 783*5113495bSYour Name } while (0) 784*5113495bSYour Name 785*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_CLK_ENS_EXTEND_BMSK 0x80000000 786*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_CLK_ENS_EXTEND_SHFT 0x1f 787*5113495bSYour Name 788*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_CPU_IF_EXTEND_BMSK 0x40000000 789*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_CPU_IF_EXTEND_SHFT 0x1e 790*5113495bSYour Name 791*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_APB_CLK_BMSK 0x20000000 792*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_APB_CLK_SHFT 0x1d 793*5113495bSYour Name 794*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_FSE_BMSK 0x10000000 795*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_FSE_SHFT 0x1c 796*5113495bSYour Name 797*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_CLFY_RES_MEM_BMSK 0x08000000 798*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_CLFY_RES_MEM_SHFT 0x1b 799*5113495bSYour Name 800*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_GSE_CTRL_BMSK 0x04000000 801*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_GSE_CTRL_SHFT 0x1a 802*5113495bSYour Name 803*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_GSE_CCE_RES_BMSK 0x02000000 804*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_GSE_CCE_RES_SHFT 0x19 805*5113495bSYour Name 806*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_TCL2_STATUS2_PROD_RING_BMSK 0x01000000 807*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_TCL2_STATUS2_PROD_RING_SHFT 0x18 808*5113495bSYour Name 809*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_TCL2_STATUS1_PROD_RING_BMSK 0x00800000 810*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_TCL2_STATUS1_PROD_RING_SHFT 0x17 811*5113495bSYour Name 812*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_TCL2FW_PROD_RING_BMSK 0x00400000 813*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_TCL2FW_PROD_RING_SHFT 0x16 814*5113495bSYour Name 815*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_TCL2TQM_PROD_RING_BMSK 0x00200000 816*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_TCL2TQM_PROD_RING_SHFT 0x15 817*5113495bSYour Name 818*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_PROD_RING_CTRL_BMSK 0x00100000 819*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_PROD_RING_CTRL_SHFT 0x14 820*5113495bSYour Name 821*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_TLV_DECODE_BMSK 0x00080000 822*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_TLV_DECODE_SHFT 0x13 823*5113495bSYour Name 824*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_TLV_GEN_BMSK 0x00040000 825*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_TLV_GEN_SHFT 0x12 826*5113495bSYour Name 827*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_DATA_FETCH_BMSK 0x00020000 828*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_DATA_FETCH_SHFT 0x11 829*5113495bSYour Name 830*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_DATA_BUF_BMSK 0x00010000 831*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_DATA_BUF_SHFT 0x10 832*5113495bSYour Name 833*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_DESC_BUF_BMSK 0x00008000 834*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_DESC_BUF_SHFT 0xf 835*5113495bSYour Name 836*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_DESC_RD_BMSK 0x00004000 837*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_DESC_RD_SHFT 0xe 838*5113495bSYour Name 839*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_ASE_BMSK 0x00002000 840*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_ASE_SHFT 0xd 841*5113495bSYour Name 842*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_GXI_BMSK 0x00001000 843*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_GXI_SHFT 0xc 844*5113495bSYour Name 845*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_SRNG_P_3_BMSK 0x00000800 846*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_SRNG_P_3_SHFT 0xb 847*5113495bSYour Name 848*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_SRNG_P_2_BMSK 0x00000400 849*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_SRNG_P_2_SHFT 0xa 850*5113495bSYour Name 851*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_SRNG_P_1_BMSK 0x00000200 852*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_SRNG_P_1_SHFT 0x9 853*5113495bSYour Name 854*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_SRNG_P_0_BMSK 0x00000100 855*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_SRNG_P_0_SHFT 0x8 856*5113495bSYour Name 857*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_SRNG_C_4_BMSK 0x00000080 858*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_SRNG_C_4_SHFT 0x7 859*5113495bSYour Name 860*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_SRNG_C_3_BMSK 0x00000040 861*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_SRNG_C_3_SHFT 0x6 862*5113495bSYour Name 863*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_SRNG_C_2_BMSK 0x00000020 864*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_SRNG_C_2_SHFT 0x5 865*5113495bSYour Name 866*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_SRNG_C_1_BMSK 0x00000010 867*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_SRNG_C_1_SHFT 0x4 868*5113495bSYour Name 869*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_SRNG_C_0_BMSK 0x00000008 870*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_SRNG_C_0_SHFT 0x3 871*5113495bSYour Name 872*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_TCL_IDLE_REQ_SM_BMSK 0x00000004 873*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_TCL_IDLE_REQ_SM_SHFT 0x2 874*5113495bSYour Name 875*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_CCE_BMSK 0x00000002 876*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_CCE_SHFT 0x1 877*5113495bSYour Name 878*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_PARSER_BMSK 0x00000001 879*5113495bSYour Name #define HWIO_TCL_R0_CLKGATE_DISABLE_PARSER_SHFT 0x0 880*5113495bSYour Name 881*5113495bSYour Name //// Register TCL_R0_CREDIT_COUNT //// 882*5113495bSYour Name 883*5113495bSYour Name #define HWIO_TCL_R0_CREDIT_COUNT_ADDR(x) (x+0x000004e4) 884*5113495bSYour Name #define HWIO_TCL_R0_CREDIT_COUNT_PHYS(x) (x+0x000004e4) 885*5113495bSYour Name #define HWIO_TCL_R0_CREDIT_COUNT_RMSK 0x0001ffff 886*5113495bSYour Name #define HWIO_TCL_R0_CREDIT_COUNT_SHFT 0 887*5113495bSYour Name #define HWIO_TCL_R0_CREDIT_COUNT_IN(x) \ 888*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_CREDIT_COUNT_ADDR(x), HWIO_TCL_R0_CREDIT_COUNT_RMSK) 889*5113495bSYour Name #define HWIO_TCL_R0_CREDIT_COUNT_INM(x, mask) \ 890*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_CREDIT_COUNT_ADDR(x), mask) 891*5113495bSYour Name #define HWIO_TCL_R0_CREDIT_COUNT_OUT(x, val) \ 892*5113495bSYour Name out_dword( HWIO_TCL_R0_CREDIT_COUNT_ADDR(x), val) 893*5113495bSYour Name #define HWIO_TCL_R0_CREDIT_COUNT_OUTM(x, mask, val) \ 894*5113495bSYour Name do {\ 895*5113495bSYour Name HWIO_INTLOCK(); \ 896*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_CREDIT_COUNT_ADDR(x), mask, val, HWIO_TCL_R0_CREDIT_COUNT_IN(x)); \ 897*5113495bSYour Name HWIO_INTFREE();\ 898*5113495bSYour Name } while (0) 899*5113495bSYour Name 900*5113495bSYour Name #define HWIO_TCL_R0_CREDIT_COUNT_ENABLE_BMSK 0x00010000 901*5113495bSYour Name #define HWIO_TCL_R0_CREDIT_COUNT_ENABLE_SHFT 0x10 902*5113495bSYour Name 903*5113495bSYour Name #define HWIO_TCL_R0_CREDIT_COUNT_VAL_BMSK 0x0000ffff 904*5113495bSYour Name #define HWIO_TCL_R0_CREDIT_COUNT_VAL_SHFT 0x0 905*5113495bSYour Name 906*5113495bSYour Name //// Register TCL_R0_CURRENT_CREDIT_COUNT //// 907*5113495bSYour Name 908*5113495bSYour Name #define HWIO_TCL_R0_CURRENT_CREDIT_COUNT_ADDR(x) (x+0x000004e8) 909*5113495bSYour Name #define HWIO_TCL_R0_CURRENT_CREDIT_COUNT_PHYS(x) (x+0x000004e8) 910*5113495bSYour Name #define HWIO_TCL_R0_CURRENT_CREDIT_COUNT_RMSK 0x0000ffff 911*5113495bSYour Name #define HWIO_TCL_R0_CURRENT_CREDIT_COUNT_SHFT 0 912*5113495bSYour Name #define HWIO_TCL_R0_CURRENT_CREDIT_COUNT_IN(x) \ 913*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_CURRENT_CREDIT_COUNT_ADDR(x), HWIO_TCL_R0_CURRENT_CREDIT_COUNT_RMSK) 914*5113495bSYour Name #define HWIO_TCL_R0_CURRENT_CREDIT_COUNT_INM(x, mask) \ 915*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_CURRENT_CREDIT_COUNT_ADDR(x), mask) 916*5113495bSYour Name #define HWIO_TCL_R0_CURRENT_CREDIT_COUNT_OUT(x, val) \ 917*5113495bSYour Name out_dword( HWIO_TCL_R0_CURRENT_CREDIT_COUNT_ADDR(x), val) 918*5113495bSYour Name #define HWIO_TCL_R0_CURRENT_CREDIT_COUNT_OUTM(x, mask, val) \ 919*5113495bSYour Name do {\ 920*5113495bSYour Name HWIO_INTLOCK(); \ 921*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_CURRENT_CREDIT_COUNT_ADDR(x), mask, val, HWIO_TCL_R0_CURRENT_CREDIT_COUNT_IN(x)); \ 922*5113495bSYour Name HWIO_INTFREE();\ 923*5113495bSYour Name } while (0) 924*5113495bSYour Name 925*5113495bSYour Name #define HWIO_TCL_R0_CURRENT_CREDIT_COUNT_VAL_BMSK 0x0000ffff 926*5113495bSYour Name #define HWIO_TCL_R0_CURRENT_CREDIT_COUNT_VAL_SHFT 0x0 927*5113495bSYour Name 928*5113495bSYour Name //// Register TCL_R0_S_PARE_REGISTER //// 929*5113495bSYour Name 930*5113495bSYour Name #define HWIO_TCL_R0_S_PARE_REGISTER_ADDR(x) (x+0x000004ec) 931*5113495bSYour Name #define HWIO_TCL_R0_S_PARE_REGISTER_PHYS(x) (x+0x000004ec) 932*5113495bSYour Name #define HWIO_TCL_R0_S_PARE_REGISTER_RMSK 0xffffffff 933*5113495bSYour Name #define HWIO_TCL_R0_S_PARE_REGISTER_SHFT 0 934*5113495bSYour Name #define HWIO_TCL_R0_S_PARE_REGISTER_IN(x) \ 935*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_S_PARE_REGISTER_ADDR(x), HWIO_TCL_R0_S_PARE_REGISTER_RMSK) 936*5113495bSYour Name #define HWIO_TCL_R0_S_PARE_REGISTER_INM(x, mask) \ 937*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_S_PARE_REGISTER_ADDR(x), mask) 938*5113495bSYour Name #define HWIO_TCL_R0_S_PARE_REGISTER_OUT(x, val) \ 939*5113495bSYour Name out_dword( HWIO_TCL_R0_S_PARE_REGISTER_ADDR(x), val) 940*5113495bSYour Name #define HWIO_TCL_R0_S_PARE_REGISTER_OUTM(x, mask, val) \ 941*5113495bSYour Name do {\ 942*5113495bSYour Name HWIO_INTLOCK(); \ 943*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_S_PARE_REGISTER_ADDR(x), mask, val, HWIO_TCL_R0_S_PARE_REGISTER_IN(x)); \ 944*5113495bSYour Name HWIO_INTFREE();\ 945*5113495bSYour Name } while (0) 946*5113495bSYour Name 947*5113495bSYour Name #define HWIO_TCL_R0_S_PARE_REGISTER_VAL_BMSK 0xffffffff 948*5113495bSYour Name #define HWIO_TCL_R0_S_PARE_REGISTER_VAL_SHFT 0x0 949*5113495bSYour Name 950*5113495bSYour Name //// Register TCL_R0_SW2TCL1_RING_BASE_LSB //// 951*5113495bSYour Name 952*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_BASE_LSB_ADDR(x) (x+0x000004f0) 953*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_BASE_LSB_PHYS(x) (x+0x000004f0) 954*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_BASE_LSB_RMSK 0xffffffff 955*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_BASE_LSB_SHFT 0 956*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_BASE_LSB_IN(x) \ 957*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_BASE_LSB_ADDR(x), HWIO_TCL_R0_SW2TCL1_RING_BASE_LSB_RMSK) 958*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_BASE_LSB_INM(x, mask) \ 959*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_BASE_LSB_ADDR(x), mask) 960*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_BASE_LSB_OUT(x, val) \ 961*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL1_RING_BASE_LSB_ADDR(x), val) 962*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_BASE_LSB_OUTM(x, mask, val) \ 963*5113495bSYour Name do {\ 964*5113495bSYour Name HWIO_INTLOCK(); \ 965*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL1_RING_BASE_LSB_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL1_RING_BASE_LSB_IN(x)); \ 966*5113495bSYour Name HWIO_INTFREE();\ 967*5113495bSYour Name } while (0) 968*5113495bSYour Name 969*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_BASE_LSB_RING_BASE_ADDR_LSB_BMSK 0xffffffff 970*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_BASE_LSB_RING_BASE_ADDR_LSB_SHFT 0x0 971*5113495bSYour Name 972*5113495bSYour Name //// Register TCL_R0_SW2TCL1_RING_BASE_MSB //// 973*5113495bSYour Name 974*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_BASE_MSB_ADDR(x) (x+0x000004f4) 975*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_BASE_MSB_PHYS(x) (x+0x000004f4) 976*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_BASE_MSB_RMSK 0x0fffffff 977*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_BASE_MSB_SHFT 0 978*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_BASE_MSB_IN(x) \ 979*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_BASE_MSB_ADDR(x), HWIO_TCL_R0_SW2TCL1_RING_BASE_MSB_RMSK) 980*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_BASE_MSB_INM(x, mask) \ 981*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_BASE_MSB_ADDR(x), mask) 982*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_BASE_MSB_OUT(x, val) \ 983*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL1_RING_BASE_MSB_ADDR(x), val) 984*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_BASE_MSB_OUTM(x, mask, val) \ 985*5113495bSYour Name do {\ 986*5113495bSYour Name HWIO_INTLOCK(); \ 987*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL1_RING_BASE_MSB_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL1_RING_BASE_MSB_IN(x)); \ 988*5113495bSYour Name HWIO_INTFREE();\ 989*5113495bSYour Name } while (0) 990*5113495bSYour Name 991*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_BASE_MSB_RING_SIZE_BMSK 0x0fffff00 992*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_BASE_MSB_RING_SIZE_SHFT 0x8 993*5113495bSYour Name 994*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_BASE_MSB_RING_BASE_ADDR_MSB_BMSK 0x000000ff 995*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_BASE_MSB_RING_BASE_ADDR_MSB_SHFT 0x0 996*5113495bSYour Name 997*5113495bSYour Name //// Register TCL_R0_SW2TCL1_RING_ID //// 998*5113495bSYour Name 999*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_ID_ADDR(x) (x+0x000004f8) 1000*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_ID_PHYS(x) (x+0x000004f8) 1001*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_ID_RMSK 0x000000ff 1002*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_ID_SHFT 0 1003*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_ID_IN(x) \ 1004*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_ID_ADDR(x), HWIO_TCL_R0_SW2TCL1_RING_ID_RMSK) 1005*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_ID_INM(x, mask) \ 1006*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_ID_ADDR(x), mask) 1007*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_ID_OUT(x, val) \ 1008*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL1_RING_ID_ADDR(x), val) 1009*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_ID_OUTM(x, mask, val) \ 1010*5113495bSYour Name do {\ 1011*5113495bSYour Name HWIO_INTLOCK(); \ 1012*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL1_RING_ID_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL1_RING_ID_IN(x)); \ 1013*5113495bSYour Name HWIO_INTFREE();\ 1014*5113495bSYour Name } while (0) 1015*5113495bSYour Name 1016*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_ID_ENTRY_SIZE_BMSK 0x000000ff 1017*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_ID_ENTRY_SIZE_SHFT 0x0 1018*5113495bSYour Name 1019*5113495bSYour Name //// Register TCL_R0_SW2TCL1_RING_STATUS //// 1020*5113495bSYour Name 1021*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_STATUS_ADDR(x) (x+0x000004fc) 1022*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_STATUS_PHYS(x) (x+0x000004fc) 1023*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_STATUS_RMSK 0xffffffff 1024*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_STATUS_SHFT 0 1025*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_STATUS_IN(x) \ 1026*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_STATUS_ADDR(x), HWIO_TCL_R0_SW2TCL1_RING_STATUS_RMSK) 1027*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_STATUS_INM(x, mask) \ 1028*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_STATUS_ADDR(x), mask) 1029*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_STATUS_OUT(x, val) \ 1030*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL1_RING_STATUS_ADDR(x), val) 1031*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_STATUS_OUTM(x, mask, val) \ 1032*5113495bSYour Name do {\ 1033*5113495bSYour Name HWIO_INTLOCK(); \ 1034*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL1_RING_STATUS_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL1_RING_STATUS_IN(x)); \ 1035*5113495bSYour Name HWIO_INTFREE();\ 1036*5113495bSYour Name } while (0) 1037*5113495bSYour Name 1038*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_STATUS_NUM_AVAIL_WORDS_BMSK 0xffff0000 1039*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_STATUS_NUM_AVAIL_WORDS_SHFT 0x10 1040*5113495bSYour Name 1041*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_STATUS_NUM_VALID_WORDS_BMSK 0x0000ffff 1042*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_STATUS_NUM_VALID_WORDS_SHFT 0x0 1043*5113495bSYour Name 1044*5113495bSYour Name //// Register TCL_R0_SW2TCL1_RING_MISC //// 1045*5113495bSYour Name 1046*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_ADDR(x) (x+0x00000500) 1047*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_PHYS(x) (x+0x00000500) 1048*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_RMSK 0x003fffff 1049*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_SHFT 0 1050*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_IN(x) \ 1051*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_MISC_ADDR(x), HWIO_TCL_R0_SW2TCL1_RING_MISC_RMSK) 1052*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_INM(x, mask) \ 1053*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_MISC_ADDR(x), mask) 1054*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_OUT(x, val) \ 1055*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL1_RING_MISC_ADDR(x), val) 1056*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_OUTM(x, mask, val) \ 1057*5113495bSYour Name do {\ 1058*5113495bSYour Name HWIO_INTLOCK(); \ 1059*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL1_RING_MISC_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL1_RING_MISC_IN(x)); \ 1060*5113495bSYour Name HWIO_INTFREE();\ 1061*5113495bSYour Name } while (0) 1062*5113495bSYour Name 1063*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_SPARE_CONTROL_BMSK 0x003fc000 1064*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_SPARE_CONTROL_SHFT 0xe 1065*5113495bSYour Name 1066*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_SRNG_SM_STATE2_BMSK 0x00003000 1067*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_SRNG_SM_STATE2_SHFT 0xc 1068*5113495bSYour Name 1069*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_SRNG_SM_STATE1_BMSK 0x00000f00 1070*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_SRNG_SM_STATE1_SHFT 0x8 1071*5113495bSYour Name 1072*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_SRNG_IS_IDLE_BMSK 0x00000080 1073*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_SRNG_IS_IDLE_SHFT 0x7 1074*5113495bSYour Name 1075*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_SRNG_ENABLE_BMSK 0x00000040 1076*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_SRNG_ENABLE_SHFT 0x6 1077*5113495bSYour Name 1078*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_DATA_TLV_SWAP_BIT_BMSK 0x00000020 1079*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_DATA_TLV_SWAP_BIT_SHFT 0x5 1080*5113495bSYour Name 1081*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_HOST_FW_SWAP_BIT_BMSK 0x00000010 1082*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_HOST_FW_SWAP_BIT_SHFT 0x4 1083*5113495bSYour Name 1084*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_MSI_SWAP_BIT_BMSK 0x00000008 1085*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_MSI_SWAP_BIT_SHFT 0x3 1086*5113495bSYour Name 1087*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_SECURITY_BIT_BMSK 0x00000004 1088*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_SECURITY_BIT_SHFT 0x2 1089*5113495bSYour Name 1090*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_LOOPCNT_DISABLE_BMSK 0x00000002 1091*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_LOOPCNT_DISABLE_SHFT 0x1 1092*5113495bSYour Name 1093*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_RING_ID_DISABLE_BMSK 0x00000001 1094*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MISC_RING_ID_DISABLE_SHFT 0x0 1095*5113495bSYour Name 1096*5113495bSYour Name //// Register TCL_R0_SW2TCL1_RING_TP_ADDR_LSB //// 1097*5113495bSYour Name 1098*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_LSB_ADDR(x) (x+0x0000050c) 1099*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_LSB_PHYS(x) (x+0x0000050c) 1100*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_LSB_RMSK 0xffffffff 1101*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_LSB_SHFT 0 1102*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_LSB_IN(x) \ 1103*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_LSB_ADDR(x), HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_LSB_RMSK) 1104*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_LSB_INM(x, mask) \ 1105*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_LSB_ADDR(x), mask) 1106*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_LSB_OUT(x, val) \ 1107*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_LSB_ADDR(x), val) 1108*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_LSB_OUTM(x, mask, val) \ 1109*5113495bSYour Name do {\ 1110*5113495bSYour Name HWIO_INTLOCK(); \ 1111*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_LSB_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_LSB_IN(x)); \ 1112*5113495bSYour Name HWIO_INTFREE();\ 1113*5113495bSYour Name } while (0) 1114*5113495bSYour Name 1115*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_LSB_TAIL_PTR_MEMADDR_LSB_BMSK 0xffffffff 1116*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_LSB_TAIL_PTR_MEMADDR_LSB_SHFT 0x0 1117*5113495bSYour Name 1118*5113495bSYour Name //// Register TCL_R0_SW2TCL1_RING_TP_ADDR_MSB //// 1119*5113495bSYour Name 1120*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_MSB_ADDR(x) (x+0x00000510) 1121*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_MSB_PHYS(x) (x+0x00000510) 1122*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_MSB_RMSK 0x000000ff 1123*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_MSB_SHFT 0 1124*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_MSB_IN(x) \ 1125*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_MSB_ADDR(x), HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_MSB_RMSK) 1126*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_MSB_INM(x, mask) \ 1127*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_MSB_ADDR(x), mask) 1128*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_MSB_OUT(x, val) \ 1129*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_MSB_ADDR(x), val) 1130*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_MSB_OUTM(x, mask, val) \ 1131*5113495bSYour Name do {\ 1132*5113495bSYour Name HWIO_INTLOCK(); \ 1133*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_MSB_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_MSB_IN(x)); \ 1134*5113495bSYour Name HWIO_INTFREE();\ 1135*5113495bSYour Name } while (0) 1136*5113495bSYour Name 1137*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_MSB_TAIL_PTR_MEMADDR_MSB_BMSK 0x000000ff 1138*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_TP_ADDR_MSB_TAIL_PTR_MEMADDR_MSB_SHFT 0x0 1139*5113495bSYour Name 1140*5113495bSYour Name //// Register TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX0 //// 1141*5113495bSYour Name 1142*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX0_ADDR(x) (x+0x00000520) 1143*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX0_PHYS(x) (x+0x00000520) 1144*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX0_RMSK 0xffffffff 1145*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX0_SHFT 0 1146*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX0_IN(x) \ 1147*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX0_RMSK) 1148*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX0_INM(x, mask) \ 1149*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), mask) 1150*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX0_OUT(x, val) \ 1151*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), val) 1152*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX0_OUTM(x, mask, val) \ 1153*5113495bSYour Name do {\ 1154*5113495bSYour Name HWIO_INTLOCK(); \ 1155*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX0_IN(x)); \ 1156*5113495bSYour Name HWIO_INTFREE();\ 1157*5113495bSYour Name } while (0) 1158*5113495bSYour Name 1159*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX0_INTERRUPT_TIMER_THRESHOLD_BMSK 0xffff0000 1160*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX0_INTERRUPT_TIMER_THRESHOLD_SHFT 0x10 1161*5113495bSYour Name 1162*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX0_SW_INTERRUPT_MODE_BMSK 0x00008000 1163*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX0_SW_INTERRUPT_MODE_SHFT 0xf 1164*5113495bSYour Name 1165*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX0_BATCH_COUNTER_THRESHOLD_BMSK 0x00007fff 1166*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX0_BATCH_COUNTER_THRESHOLD_SHFT 0x0 1167*5113495bSYour Name 1168*5113495bSYour Name //// Register TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX1 //// 1169*5113495bSYour Name 1170*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX1_ADDR(x) (x+0x00000524) 1171*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX1_PHYS(x) (x+0x00000524) 1172*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX1_RMSK 0x0000ffff 1173*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX1_SHFT 0 1174*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX1_IN(x) \ 1175*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX1_RMSK) 1176*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX1_INM(x, mask) \ 1177*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), mask) 1178*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX1_OUT(x, val) \ 1179*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), val) 1180*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX1_OUTM(x, mask, val) \ 1181*5113495bSYour Name do {\ 1182*5113495bSYour Name HWIO_INTLOCK(); \ 1183*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX1_IN(x)); \ 1184*5113495bSYour Name HWIO_INTFREE();\ 1185*5113495bSYour Name } while (0) 1186*5113495bSYour Name 1187*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX1_LOW_THRESHOLD_BMSK 0x0000ffff 1188*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_SETUP_IX1_LOW_THRESHOLD_SHFT 0x0 1189*5113495bSYour Name 1190*5113495bSYour Name //// Register TCL_R0_SW2TCL1_RING_CONSUMER_INT_STATUS //// 1191*5113495bSYour Name 1192*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_STATUS_ADDR(x) (x+0x00000528) 1193*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_STATUS_PHYS(x) (x+0x00000528) 1194*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_STATUS_RMSK 0xffffffff 1195*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_STATUS_SHFT 0 1196*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_STATUS_IN(x) \ 1197*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_STATUS_ADDR(x), HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_STATUS_RMSK) 1198*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_STATUS_INM(x, mask) \ 1199*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_STATUS_ADDR(x), mask) 1200*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_STATUS_OUT(x, val) \ 1201*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_STATUS_ADDR(x), val) 1202*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_STATUS_OUTM(x, mask, val) \ 1203*5113495bSYour Name do {\ 1204*5113495bSYour Name HWIO_INTLOCK(); \ 1205*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_STATUS_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_STATUS_IN(x)); \ 1206*5113495bSYour Name HWIO_INTFREE();\ 1207*5113495bSYour Name } while (0) 1208*5113495bSYour Name 1209*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_STATUS_CURRENT_INTERRUPT_TIMER_VALUE_BMSK 0xffff0000 1210*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_STATUS_CURRENT_INTERRUPT_TIMER_VALUE_SHFT 0x10 1211*5113495bSYour Name 1212*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_STATUS_CURRENT_INT_WIRE_VALUE_BMSK 0x00008000 1213*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_STATUS_CURRENT_INT_WIRE_VALUE_SHFT 0xf 1214*5113495bSYour Name 1215*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_STATUS_INTERNAL_BATCH_COUNTER_VALUE_BMSK 0x00007fff 1216*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_INT_STATUS_INTERNAL_BATCH_COUNTER_VALUE_SHFT 0x0 1217*5113495bSYour Name 1218*5113495bSYour Name //// Register TCL_R0_SW2TCL1_RING_CONSUMER_EMPTY_COUNTER //// 1219*5113495bSYour Name 1220*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_EMPTY_COUNTER_ADDR(x) (x+0x0000052c) 1221*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_EMPTY_COUNTER_PHYS(x) (x+0x0000052c) 1222*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_EMPTY_COUNTER_RMSK 0x000003ff 1223*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_EMPTY_COUNTER_SHFT 0 1224*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_EMPTY_COUNTER_IN(x) \ 1225*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_EMPTY_COUNTER_RMSK) 1226*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_EMPTY_COUNTER_INM(x, mask) \ 1227*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), mask) 1228*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_EMPTY_COUNTER_OUT(x, val) \ 1229*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), val) 1230*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_EMPTY_COUNTER_OUTM(x, mask, val) \ 1231*5113495bSYour Name do {\ 1232*5113495bSYour Name HWIO_INTLOCK(); \ 1233*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_EMPTY_COUNTER_IN(x)); \ 1234*5113495bSYour Name HWIO_INTFREE();\ 1235*5113495bSYour Name } while (0) 1236*5113495bSYour Name 1237*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_EMPTY_COUNTER_RING_EMPTY_COUNTER_BMSK 0x000003ff 1238*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_EMPTY_COUNTER_RING_EMPTY_COUNTER_SHFT 0x0 1239*5113495bSYour Name 1240*5113495bSYour Name //// Register TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_TIMER //// 1241*5113495bSYour Name 1242*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_TIMER_ADDR(x) (x+0x00000530) 1243*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_TIMER_PHYS(x) (x+0x00000530) 1244*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_TIMER_RMSK 0x00000007 1245*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_TIMER_SHFT 0 1246*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_TIMER_IN(x) \ 1247*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_TIMER_RMSK) 1248*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_TIMER_INM(x, mask) \ 1249*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), mask) 1250*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_TIMER_OUT(x, val) \ 1251*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), val) 1252*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_TIMER_OUTM(x, mask, val) \ 1253*5113495bSYour Name do {\ 1254*5113495bSYour Name HWIO_INTLOCK(); \ 1255*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_TIMER_IN(x)); \ 1256*5113495bSYour Name HWIO_INTFREE();\ 1257*5113495bSYour Name } while (0) 1258*5113495bSYour Name 1259*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_TIMER_MODE_BMSK 0x00000007 1260*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_TIMER_MODE_SHFT 0x0 1261*5113495bSYour Name 1262*5113495bSYour Name //// Register TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_STATUS //// 1263*5113495bSYour Name 1264*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_STATUS_ADDR(x) (x+0x00000534) 1265*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_STATUS_PHYS(x) (x+0x00000534) 1266*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_STATUS_RMSK 0x0fffffff 1267*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_STATUS_SHFT 0 1268*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_STATUS_IN(x) \ 1269*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_STATUS_RMSK) 1270*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_STATUS_INM(x, mask) \ 1271*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), mask) 1272*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_STATUS_OUT(x, val) \ 1273*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), val) 1274*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_STATUS_OUTM(x, mask, val) \ 1275*5113495bSYour Name do {\ 1276*5113495bSYour Name HWIO_INTLOCK(); \ 1277*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_STATUS_IN(x)); \ 1278*5113495bSYour Name HWIO_INTFREE();\ 1279*5113495bSYour Name } while (0) 1280*5113495bSYour Name 1281*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_STATUS_PREFETCH_COUNT_BMSK 0x0ff00000 1282*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_STATUS_PREFETCH_COUNT_SHFT 0x14 1283*5113495bSYour Name 1284*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_STATUS_INTERNAL_TAIL_PTR_BMSK 0x000fffff 1285*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_CONSUMER_PREFETCH_STATUS_INTERNAL_TAIL_PTR_SHFT 0x0 1286*5113495bSYour Name 1287*5113495bSYour Name //// Register TCL_R0_SW2TCL1_RING_MSI1_BASE_LSB //// 1288*5113495bSYour Name 1289*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_LSB_ADDR(x) (x+0x00000538) 1290*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_LSB_PHYS(x) (x+0x00000538) 1291*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_LSB_RMSK 0xffffffff 1292*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_LSB_SHFT 0 1293*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_LSB_IN(x) \ 1294*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_LSB_ADDR(x), HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_LSB_RMSK) 1295*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_LSB_INM(x, mask) \ 1296*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_LSB_ADDR(x), mask) 1297*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_LSB_OUT(x, val) \ 1298*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_LSB_ADDR(x), val) 1299*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \ 1300*5113495bSYour Name do {\ 1301*5113495bSYour Name HWIO_INTLOCK(); \ 1302*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_LSB_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_LSB_IN(x)); \ 1303*5113495bSYour Name HWIO_INTFREE();\ 1304*5113495bSYour Name } while (0) 1305*5113495bSYour Name 1306*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_LSB_ADDR_BMSK 0xffffffff 1307*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_LSB_ADDR_SHFT 0x0 1308*5113495bSYour Name 1309*5113495bSYour Name //// Register TCL_R0_SW2TCL1_RING_MSI1_BASE_MSB //// 1310*5113495bSYour Name 1311*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_MSB_ADDR(x) (x+0x0000053c) 1312*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_MSB_PHYS(x) (x+0x0000053c) 1313*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_MSB_RMSK 0x000001ff 1314*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_MSB_SHFT 0 1315*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_MSB_IN(x) \ 1316*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_MSB_ADDR(x), HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_MSB_RMSK) 1317*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_MSB_INM(x, mask) \ 1318*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_MSB_ADDR(x), mask) 1319*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_MSB_OUT(x, val) \ 1320*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_MSB_ADDR(x), val) 1321*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \ 1322*5113495bSYour Name do {\ 1323*5113495bSYour Name HWIO_INTLOCK(); \ 1324*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_MSB_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_MSB_IN(x)); \ 1325*5113495bSYour Name HWIO_INTFREE();\ 1326*5113495bSYour Name } while (0) 1327*5113495bSYour Name 1328*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_MSB_MSI1_ENABLE_BMSK 0x00000100 1329*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_MSB_MSI1_ENABLE_SHFT 0x8 1330*5113495bSYour Name 1331*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_MSB_ADDR_BMSK 0x000000ff 1332*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_BASE_MSB_ADDR_SHFT 0x0 1333*5113495bSYour Name 1334*5113495bSYour Name //// Register TCL_R0_SW2TCL1_RING_MSI1_DATA //// 1335*5113495bSYour Name 1336*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_DATA_ADDR(x) (x+0x00000540) 1337*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_DATA_PHYS(x) (x+0x00000540) 1338*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_DATA_RMSK 0xffffffff 1339*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_DATA_SHFT 0 1340*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_DATA_IN(x) \ 1341*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_MSI1_DATA_ADDR(x), HWIO_TCL_R0_SW2TCL1_RING_MSI1_DATA_RMSK) 1342*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_DATA_INM(x, mask) \ 1343*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_MSI1_DATA_ADDR(x), mask) 1344*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_DATA_OUT(x, val) \ 1345*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL1_RING_MSI1_DATA_ADDR(x), val) 1346*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_DATA_OUTM(x, mask, val) \ 1347*5113495bSYour Name do {\ 1348*5113495bSYour Name HWIO_INTLOCK(); \ 1349*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL1_RING_MSI1_DATA_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL1_RING_MSI1_DATA_IN(x)); \ 1350*5113495bSYour Name HWIO_INTFREE();\ 1351*5113495bSYour Name } while (0) 1352*5113495bSYour Name 1353*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_DATA_VALUE_BMSK 0xffffffff 1354*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_MSI1_DATA_VALUE_SHFT 0x0 1355*5113495bSYour Name 1356*5113495bSYour Name //// Register TCL_R0_SW2TCL1_RING_HP_TP_SW_OFFSET //// 1357*5113495bSYour Name 1358*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_HP_TP_SW_OFFSET_ADDR(x) (x+0x00000544) 1359*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_HP_TP_SW_OFFSET_PHYS(x) (x+0x00000544) 1360*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_HP_TP_SW_OFFSET_RMSK 0x0000ffff 1361*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_HP_TP_SW_OFFSET_SHFT 0 1362*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_HP_TP_SW_OFFSET_IN(x) \ 1363*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_HP_TP_SW_OFFSET_ADDR(x), HWIO_TCL_R0_SW2TCL1_RING_HP_TP_SW_OFFSET_RMSK) 1364*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_HP_TP_SW_OFFSET_INM(x, mask) \ 1365*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_HP_TP_SW_OFFSET_ADDR(x), mask) 1366*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_HP_TP_SW_OFFSET_OUT(x, val) \ 1367*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL1_RING_HP_TP_SW_OFFSET_ADDR(x), val) 1368*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ 1369*5113495bSYour Name do {\ 1370*5113495bSYour Name HWIO_INTLOCK(); \ 1371*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL1_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL1_RING_HP_TP_SW_OFFSET_IN(x)); \ 1372*5113495bSYour Name HWIO_INTFREE();\ 1373*5113495bSYour Name } while (0) 1374*5113495bSYour Name 1375*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_HP_TP_SW_OFFSET_HP_TP_OFFSET_VALUE_BMSK 0x0000ffff 1376*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL1_RING_HP_TP_SW_OFFSET_HP_TP_OFFSET_VALUE_SHFT 0x0 1377*5113495bSYour Name 1378*5113495bSYour Name //// Register TCL_R0_SW2TCL2_RING_BASE_LSB //// 1379*5113495bSYour Name 1380*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_BASE_LSB_ADDR(x) (x+0x00000548) 1381*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_BASE_LSB_PHYS(x) (x+0x00000548) 1382*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_BASE_LSB_RMSK 0xffffffff 1383*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_BASE_LSB_SHFT 0 1384*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_BASE_LSB_IN(x) \ 1385*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_BASE_LSB_ADDR(x), HWIO_TCL_R0_SW2TCL2_RING_BASE_LSB_RMSK) 1386*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_BASE_LSB_INM(x, mask) \ 1387*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_BASE_LSB_ADDR(x), mask) 1388*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_BASE_LSB_OUT(x, val) \ 1389*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL2_RING_BASE_LSB_ADDR(x), val) 1390*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_BASE_LSB_OUTM(x, mask, val) \ 1391*5113495bSYour Name do {\ 1392*5113495bSYour Name HWIO_INTLOCK(); \ 1393*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL2_RING_BASE_LSB_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL2_RING_BASE_LSB_IN(x)); \ 1394*5113495bSYour Name HWIO_INTFREE();\ 1395*5113495bSYour Name } while (0) 1396*5113495bSYour Name 1397*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_BASE_LSB_RING_BASE_ADDR_LSB_BMSK 0xffffffff 1398*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_BASE_LSB_RING_BASE_ADDR_LSB_SHFT 0x0 1399*5113495bSYour Name 1400*5113495bSYour Name //// Register TCL_R0_SW2TCL2_RING_BASE_MSB //// 1401*5113495bSYour Name 1402*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_BASE_MSB_ADDR(x) (x+0x0000054c) 1403*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_BASE_MSB_PHYS(x) (x+0x0000054c) 1404*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_BASE_MSB_RMSK 0x0fffffff 1405*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_BASE_MSB_SHFT 0 1406*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_BASE_MSB_IN(x) \ 1407*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_BASE_MSB_ADDR(x), HWIO_TCL_R0_SW2TCL2_RING_BASE_MSB_RMSK) 1408*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_BASE_MSB_INM(x, mask) \ 1409*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_BASE_MSB_ADDR(x), mask) 1410*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_BASE_MSB_OUT(x, val) \ 1411*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL2_RING_BASE_MSB_ADDR(x), val) 1412*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_BASE_MSB_OUTM(x, mask, val) \ 1413*5113495bSYour Name do {\ 1414*5113495bSYour Name HWIO_INTLOCK(); \ 1415*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL2_RING_BASE_MSB_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL2_RING_BASE_MSB_IN(x)); \ 1416*5113495bSYour Name HWIO_INTFREE();\ 1417*5113495bSYour Name } while (0) 1418*5113495bSYour Name 1419*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_BASE_MSB_RING_SIZE_BMSK 0x0fffff00 1420*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_BASE_MSB_RING_SIZE_SHFT 0x8 1421*5113495bSYour Name 1422*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_BASE_MSB_RING_BASE_ADDR_MSB_BMSK 0x000000ff 1423*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_BASE_MSB_RING_BASE_ADDR_MSB_SHFT 0x0 1424*5113495bSYour Name 1425*5113495bSYour Name //// Register TCL_R0_SW2TCL2_RING_ID //// 1426*5113495bSYour Name 1427*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_ID_ADDR(x) (x+0x00000550) 1428*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_ID_PHYS(x) (x+0x00000550) 1429*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_ID_RMSK 0x000000ff 1430*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_ID_SHFT 0 1431*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_ID_IN(x) \ 1432*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_ID_ADDR(x), HWIO_TCL_R0_SW2TCL2_RING_ID_RMSK) 1433*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_ID_INM(x, mask) \ 1434*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_ID_ADDR(x), mask) 1435*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_ID_OUT(x, val) \ 1436*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL2_RING_ID_ADDR(x), val) 1437*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_ID_OUTM(x, mask, val) \ 1438*5113495bSYour Name do {\ 1439*5113495bSYour Name HWIO_INTLOCK(); \ 1440*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL2_RING_ID_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL2_RING_ID_IN(x)); \ 1441*5113495bSYour Name HWIO_INTFREE();\ 1442*5113495bSYour Name } while (0) 1443*5113495bSYour Name 1444*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_ID_ENTRY_SIZE_BMSK 0x000000ff 1445*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_ID_ENTRY_SIZE_SHFT 0x0 1446*5113495bSYour Name 1447*5113495bSYour Name //// Register TCL_R0_SW2TCL2_RING_STATUS //// 1448*5113495bSYour Name 1449*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_STATUS_ADDR(x) (x+0x00000554) 1450*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_STATUS_PHYS(x) (x+0x00000554) 1451*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_STATUS_RMSK 0xffffffff 1452*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_STATUS_SHFT 0 1453*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_STATUS_IN(x) \ 1454*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_STATUS_ADDR(x), HWIO_TCL_R0_SW2TCL2_RING_STATUS_RMSK) 1455*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_STATUS_INM(x, mask) \ 1456*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_STATUS_ADDR(x), mask) 1457*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_STATUS_OUT(x, val) \ 1458*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL2_RING_STATUS_ADDR(x), val) 1459*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_STATUS_OUTM(x, mask, val) \ 1460*5113495bSYour Name do {\ 1461*5113495bSYour Name HWIO_INTLOCK(); \ 1462*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL2_RING_STATUS_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL2_RING_STATUS_IN(x)); \ 1463*5113495bSYour Name HWIO_INTFREE();\ 1464*5113495bSYour Name } while (0) 1465*5113495bSYour Name 1466*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_STATUS_NUM_AVAIL_WORDS_BMSK 0xffff0000 1467*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_STATUS_NUM_AVAIL_WORDS_SHFT 0x10 1468*5113495bSYour Name 1469*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_STATUS_NUM_VALID_WORDS_BMSK 0x0000ffff 1470*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_STATUS_NUM_VALID_WORDS_SHFT 0x0 1471*5113495bSYour Name 1472*5113495bSYour Name //// Register TCL_R0_SW2TCL2_RING_MISC //// 1473*5113495bSYour Name 1474*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_ADDR(x) (x+0x00000558) 1475*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_PHYS(x) (x+0x00000558) 1476*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_RMSK 0x003fffff 1477*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_SHFT 0 1478*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_IN(x) \ 1479*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_MISC_ADDR(x), HWIO_TCL_R0_SW2TCL2_RING_MISC_RMSK) 1480*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_INM(x, mask) \ 1481*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_MISC_ADDR(x), mask) 1482*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_OUT(x, val) \ 1483*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL2_RING_MISC_ADDR(x), val) 1484*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_OUTM(x, mask, val) \ 1485*5113495bSYour Name do {\ 1486*5113495bSYour Name HWIO_INTLOCK(); \ 1487*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL2_RING_MISC_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL2_RING_MISC_IN(x)); \ 1488*5113495bSYour Name HWIO_INTFREE();\ 1489*5113495bSYour Name } while (0) 1490*5113495bSYour Name 1491*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_SPARE_CONTROL_BMSK 0x003fc000 1492*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_SPARE_CONTROL_SHFT 0xe 1493*5113495bSYour Name 1494*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_SRNG_SM_STATE2_BMSK 0x00003000 1495*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_SRNG_SM_STATE2_SHFT 0xc 1496*5113495bSYour Name 1497*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_SRNG_SM_STATE1_BMSK 0x00000f00 1498*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_SRNG_SM_STATE1_SHFT 0x8 1499*5113495bSYour Name 1500*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_SRNG_IS_IDLE_BMSK 0x00000080 1501*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_SRNG_IS_IDLE_SHFT 0x7 1502*5113495bSYour Name 1503*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_SRNG_ENABLE_BMSK 0x00000040 1504*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_SRNG_ENABLE_SHFT 0x6 1505*5113495bSYour Name 1506*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_DATA_TLV_SWAP_BIT_BMSK 0x00000020 1507*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_DATA_TLV_SWAP_BIT_SHFT 0x5 1508*5113495bSYour Name 1509*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_HOST_FW_SWAP_BIT_BMSK 0x00000010 1510*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_HOST_FW_SWAP_BIT_SHFT 0x4 1511*5113495bSYour Name 1512*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_MSI_SWAP_BIT_BMSK 0x00000008 1513*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_MSI_SWAP_BIT_SHFT 0x3 1514*5113495bSYour Name 1515*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_SECURITY_BIT_BMSK 0x00000004 1516*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_SECURITY_BIT_SHFT 0x2 1517*5113495bSYour Name 1518*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_LOOPCNT_DISABLE_BMSK 0x00000002 1519*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_LOOPCNT_DISABLE_SHFT 0x1 1520*5113495bSYour Name 1521*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_RING_ID_DISABLE_BMSK 0x00000001 1522*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MISC_RING_ID_DISABLE_SHFT 0x0 1523*5113495bSYour Name 1524*5113495bSYour Name //// Register TCL_R0_SW2TCL2_RING_TP_ADDR_LSB //// 1525*5113495bSYour Name 1526*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_LSB_ADDR(x) (x+0x00000564) 1527*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_LSB_PHYS(x) (x+0x00000564) 1528*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_LSB_RMSK 0xffffffff 1529*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_LSB_SHFT 0 1530*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_LSB_IN(x) \ 1531*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_LSB_ADDR(x), HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_LSB_RMSK) 1532*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_LSB_INM(x, mask) \ 1533*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_LSB_ADDR(x), mask) 1534*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_LSB_OUT(x, val) \ 1535*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_LSB_ADDR(x), val) 1536*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_LSB_OUTM(x, mask, val) \ 1537*5113495bSYour Name do {\ 1538*5113495bSYour Name HWIO_INTLOCK(); \ 1539*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_LSB_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_LSB_IN(x)); \ 1540*5113495bSYour Name HWIO_INTFREE();\ 1541*5113495bSYour Name } while (0) 1542*5113495bSYour Name 1543*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_LSB_TAIL_PTR_MEMADDR_LSB_BMSK 0xffffffff 1544*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_LSB_TAIL_PTR_MEMADDR_LSB_SHFT 0x0 1545*5113495bSYour Name 1546*5113495bSYour Name //// Register TCL_R0_SW2TCL2_RING_TP_ADDR_MSB //// 1547*5113495bSYour Name 1548*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_MSB_ADDR(x) (x+0x00000568) 1549*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_MSB_PHYS(x) (x+0x00000568) 1550*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_MSB_RMSK 0x000000ff 1551*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_MSB_SHFT 0 1552*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_MSB_IN(x) \ 1553*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_MSB_ADDR(x), HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_MSB_RMSK) 1554*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_MSB_INM(x, mask) \ 1555*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_MSB_ADDR(x), mask) 1556*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_MSB_OUT(x, val) \ 1557*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_MSB_ADDR(x), val) 1558*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_MSB_OUTM(x, mask, val) \ 1559*5113495bSYour Name do {\ 1560*5113495bSYour Name HWIO_INTLOCK(); \ 1561*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_MSB_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_MSB_IN(x)); \ 1562*5113495bSYour Name HWIO_INTFREE();\ 1563*5113495bSYour Name } while (0) 1564*5113495bSYour Name 1565*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_MSB_TAIL_PTR_MEMADDR_MSB_BMSK 0x000000ff 1566*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_TP_ADDR_MSB_TAIL_PTR_MEMADDR_MSB_SHFT 0x0 1567*5113495bSYour Name 1568*5113495bSYour Name //// Register TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX0 //// 1569*5113495bSYour Name 1570*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX0_ADDR(x) (x+0x00000578) 1571*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX0_PHYS(x) (x+0x00000578) 1572*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX0_RMSK 0xffffffff 1573*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX0_SHFT 0 1574*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX0_IN(x) \ 1575*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX0_RMSK) 1576*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX0_INM(x, mask) \ 1577*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), mask) 1578*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX0_OUT(x, val) \ 1579*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), val) 1580*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX0_OUTM(x, mask, val) \ 1581*5113495bSYour Name do {\ 1582*5113495bSYour Name HWIO_INTLOCK(); \ 1583*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX0_IN(x)); \ 1584*5113495bSYour Name HWIO_INTFREE();\ 1585*5113495bSYour Name } while (0) 1586*5113495bSYour Name 1587*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX0_INTERRUPT_TIMER_THRESHOLD_BMSK 0xffff0000 1588*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX0_INTERRUPT_TIMER_THRESHOLD_SHFT 0x10 1589*5113495bSYour Name 1590*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX0_SW_INTERRUPT_MODE_BMSK 0x00008000 1591*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX0_SW_INTERRUPT_MODE_SHFT 0xf 1592*5113495bSYour Name 1593*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX0_BATCH_COUNTER_THRESHOLD_BMSK 0x00007fff 1594*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX0_BATCH_COUNTER_THRESHOLD_SHFT 0x0 1595*5113495bSYour Name 1596*5113495bSYour Name //// Register TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX1 //// 1597*5113495bSYour Name 1598*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX1_ADDR(x) (x+0x0000057c) 1599*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX1_PHYS(x) (x+0x0000057c) 1600*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX1_RMSK 0x0000ffff 1601*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX1_SHFT 0 1602*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX1_IN(x) \ 1603*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX1_RMSK) 1604*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX1_INM(x, mask) \ 1605*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), mask) 1606*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX1_OUT(x, val) \ 1607*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), val) 1608*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX1_OUTM(x, mask, val) \ 1609*5113495bSYour Name do {\ 1610*5113495bSYour Name HWIO_INTLOCK(); \ 1611*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX1_IN(x)); \ 1612*5113495bSYour Name HWIO_INTFREE();\ 1613*5113495bSYour Name } while (0) 1614*5113495bSYour Name 1615*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX1_LOW_THRESHOLD_BMSK 0x0000ffff 1616*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_SETUP_IX1_LOW_THRESHOLD_SHFT 0x0 1617*5113495bSYour Name 1618*5113495bSYour Name //// Register TCL_R0_SW2TCL2_RING_CONSUMER_INT_STATUS //// 1619*5113495bSYour Name 1620*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_STATUS_ADDR(x) (x+0x00000580) 1621*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_STATUS_PHYS(x) (x+0x00000580) 1622*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_STATUS_RMSK 0xffffffff 1623*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_STATUS_SHFT 0 1624*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_STATUS_IN(x) \ 1625*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_STATUS_ADDR(x), HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_STATUS_RMSK) 1626*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_STATUS_INM(x, mask) \ 1627*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_STATUS_ADDR(x), mask) 1628*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_STATUS_OUT(x, val) \ 1629*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_STATUS_ADDR(x), val) 1630*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_STATUS_OUTM(x, mask, val) \ 1631*5113495bSYour Name do {\ 1632*5113495bSYour Name HWIO_INTLOCK(); \ 1633*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_STATUS_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_STATUS_IN(x)); \ 1634*5113495bSYour Name HWIO_INTFREE();\ 1635*5113495bSYour Name } while (0) 1636*5113495bSYour Name 1637*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_STATUS_CURRENT_INTERRUPT_TIMER_VALUE_BMSK 0xffff0000 1638*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_STATUS_CURRENT_INTERRUPT_TIMER_VALUE_SHFT 0x10 1639*5113495bSYour Name 1640*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_STATUS_CURRENT_INT_WIRE_VALUE_BMSK 0x00008000 1641*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_STATUS_CURRENT_INT_WIRE_VALUE_SHFT 0xf 1642*5113495bSYour Name 1643*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_STATUS_INTERNAL_BATCH_COUNTER_VALUE_BMSK 0x00007fff 1644*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_INT_STATUS_INTERNAL_BATCH_COUNTER_VALUE_SHFT 0x0 1645*5113495bSYour Name 1646*5113495bSYour Name //// Register TCL_R0_SW2TCL2_RING_CONSUMER_EMPTY_COUNTER //// 1647*5113495bSYour Name 1648*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_EMPTY_COUNTER_ADDR(x) (x+0x00000584) 1649*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_EMPTY_COUNTER_PHYS(x) (x+0x00000584) 1650*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_EMPTY_COUNTER_RMSK 0x000003ff 1651*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_EMPTY_COUNTER_SHFT 0 1652*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_EMPTY_COUNTER_IN(x) \ 1653*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_EMPTY_COUNTER_RMSK) 1654*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_EMPTY_COUNTER_INM(x, mask) \ 1655*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), mask) 1656*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_EMPTY_COUNTER_OUT(x, val) \ 1657*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), val) 1658*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_EMPTY_COUNTER_OUTM(x, mask, val) \ 1659*5113495bSYour Name do {\ 1660*5113495bSYour Name HWIO_INTLOCK(); \ 1661*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_EMPTY_COUNTER_IN(x)); \ 1662*5113495bSYour Name HWIO_INTFREE();\ 1663*5113495bSYour Name } while (0) 1664*5113495bSYour Name 1665*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_EMPTY_COUNTER_RING_EMPTY_COUNTER_BMSK 0x000003ff 1666*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_EMPTY_COUNTER_RING_EMPTY_COUNTER_SHFT 0x0 1667*5113495bSYour Name 1668*5113495bSYour Name //// Register TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_TIMER //// 1669*5113495bSYour Name 1670*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_TIMER_ADDR(x) (x+0x00000588) 1671*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_TIMER_PHYS(x) (x+0x00000588) 1672*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_TIMER_RMSK 0x00000007 1673*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_TIMER_SHFT 0 1674*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_TIMER_IN(x) \ 1675*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_TIMER_RMSK) 1676*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_TIMER_INM(x, mask) \ 1677*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), mask) 1678*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_TIMER_OUT(x, val) \ 1679*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), val) 1680*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_TIMER_OUTM(x, mask, val) \ 1681*5113495bSYour Name do {\ 1682*5113495bSYour Name HWIO_INTLOCK(); \ 1683*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_TIMER_IN(x)); \ 1684*5113495bSYour Name HWIO_INTFREE();\ 1685*5113495bSYour Name } while (0) 1686*5113495bSYour Name 1687*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_TIMER_MODE_BMSK 0x00000007 1688*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_TIMER_MODE_SHFT 0x0 1689*5113495bSYour Name 1690*5113495bSYour Name //// Register TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_STATUS //// 1691*5113495bSYour Name 1692*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_STATUS_ADDR(x) (x+0x0000058c) 1693*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_STATUS_PHYS(x) (x+0x0000058c) 1694*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_STATUS_RMSK 0x0fffffff 1695*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_STATUS_SHFT 0 1696*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_STATUS_IN(x) \ 1697*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_STATUS_RMSK) 1698*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_STATUS_INM(x, mask) \ 1699*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), mask) 1700*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_STATUS_OUT(x, val) \ 1701*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), val) 1702*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_STATUS_OUTM(x, mask, val) \ 1703*5113495bSYour Name do {\ 1704*5113495bSYour Name HWIO_INTLOCK(); \ 1705*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_STATUS_IN(x)); \ 1706*5113495bSYour Name HWIO_INTFREE();\ 1707*5113495bSYour Name } while (0) 1708*5113495bSYour Name 1709*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_STATUS_PREFETCH_COUNT_BMSK 0x0ff00000 1710*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_STATUS_PREFETCH_COUNT_SHFT 0x14 1711*5113495bSYour Name 1712*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_STATUS_INTERNAL_TAIL_PTR_BMSK 0x000fffff 1713*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_CONSUMER_PREFETCH_STATUS_INTERNAL_TAIL_PTR_SHFT 0x0 1714*5113495bSYour Name 1715*5113495bSYour Name //// Register TCL_R0_SW2TCL2_RING_MSI1_BASE_LSB //// 1716*5113495bSYour Name 1717*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_LSB_ADDR(x) (x+0x00000590) 1718*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_LSB_PHYS(x) (x+0x00000590) 1719*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_LSB_RMSK 0xffffffff 1720*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_LSB_SHFT 0 1721*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_LSB_IN(x) \ 1722*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_LSB_ADDR(x), HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_LSB_RMSK) 1723*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_LSB_INM(x, mask) \ 1724*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_LSB_ADDR(x), mask) 1725*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_LSB_OUT(x, val) \ 1726*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_LSB_ADDR(x), val) 1727*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \ 1728*5113495bSYour Name do {\ 1729*5113495bSYour Name HWIO_INTLOCK(); \ 1730*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_LSB_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_LSB_IN(x)); \ 1731*5113495bSYour Name HWIO_INTFREE();\ 1732*5113495bSYour Name } while (0) 1733*5113495bSYour Name 1734*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_LSB_ADDR_BMSK 0xffffffff 1735*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_LSB_ADDR_SHFT 0x0 1736*5113495bSYour Name 1737*5113495bSYour Name //// Register TCL_R0_SW2TCL2_RING_MSI1_BASE_MSB //// 1738*5113495bSYour Name 1739*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_MSB_ADDR(x) (x+0x00000594) 1740*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_MSB_PHYS(x) (x+0x00000594) 1741*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_MSB_RMSK 0x000001ff 1742*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_MSB_SHFT 0 1743*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_MSB_IN(x) \ 1744*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_MSB_ADDR(x), HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_MSB_RMSK) 1745*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_MSB_INM(x, mask) \ 1746*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_MSB_ADDR(x), mask) 1747*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_MSB_OUT(x, val) \ 1748*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_MSB_ADDR(x), val) 1749*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \ 1750*5113495bSYour Name do {\ 1751*5113495bSYour Name HWIO_INTLOCK(); \ 1752*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_MSB_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_MSB_IN(x)); \ 1753*5113495bSYour Name HWIO_INTFREE();\ 1754*5113495bSYour Name } while (0) 1755*5113495bSYour Name 1756*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_MSB_MSI1_ENABLE_BMSK 0x00000100 1757*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_MSB_MSI1_ENABLE_SHFT 0x8 1758*5113495bSYour Name 1759*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_MSB_ADDR_BMSK 0x000000ff 1760*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_BASE_MSB_ADDR_SHFT 0x0 1761*5113495bSYour Name 1762*5113495bSYour Name //// Register TCL_R0_SW2TCL2_RING_MSI1_DATA //// 1763*5113495bSYour Name 1764*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_DATA_ADDR(x) (x+0x00000598) 1765*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_DATA_PHYS(x) (x+0x00000598) 1766*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_DATA_RMSK 0xffffffff 1767*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_DATA_SHFT 0 1768*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_DATA_IN(x) \ 1769*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_MSI1_DATA_ADDR(x), HWIO_TCL_R0_SW2TCL2_RING_MSI1_DATA_RMSK) 1770*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_DATA_INM(x, mask) \ 1771*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_MSI1_DATA_ADDR(x), mask) 1772*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_DATA_OUT(x, val) \ 1773*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL2_RING_MSI1_DATA_ADDR(x), val) 1774*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_DATA_OUTM(x, mask, val) \ 1775*5113495bSYour Name do {\ 1776*5113495bSYour Name HWIO_INTLOCK(); \ 1777*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL2_RING_MSI1_DATA_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL2_RING_MSI1_DATA_IN(x)); \ 1778*5113495bSYour Name HWIO_INTFREE();\ 1779*5113495bSYour Name } while (0) 1780*5113495bSYour Name 1781*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_DATA_VALUE_BMSK 0xffffffff 1782*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_MSI1_DATA_VALUE_SHFT 0x0 1783*5113495bSYour Name 1784*5113495bSYour Name //// Register TCL_R0_SW2TCL2_RING_HP_TP_SW_OFFSET //// 1785*5113495bSYour Name 1786*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_HP_TP_SW_OFFSET_ADDR(x) (x+0x0000059c) 1787*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_HP_TP_SW_OFFSET_PHYS(x) (x+0x0000059c) 1788*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_HP_TP_SW_OFFSET_RMSK 0x0000ffff 1789*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_HP_TP_SW_OFFSET_SHFT 0 1790*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_HP_TP_SW_OFFSET_IN(x) \ 1791*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_HP_TP_SW_OFFSET_ADDR(x), HWIO_TCL_R0_SW2TCL2_RING_HP_TP_SW_OFFSET_RMSK) 1792*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_HP_TP_SW_OFFSET_INM(x, mask) \ 1793*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_HP_TP_SW_OFFSET_ADDR(x), mask) 1794*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_HP_TP_SW_OFFSET_OUT(x, val) \ 1795*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL2_RING_HP_TP_SW_OFFSET_ADDR(x), val) 1796*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ 1797*5113495bSYour Name do {\ 1798*5113495bSYour Name HWIO_INTLOCK(); \ 1799*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL2_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL2_RING_HP_TP_SW_OFFSET_IN(x)); \ 1800*5113495bSYour Name HWIO_INTFREE();\ 1801*5113495bSYour Name } while (0) 1802*5113495bSYour Name 1803*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_HP_TP_SW_OFFSET_HP_TP_OFFSET_VALUE_BMSK 0x0000ffff 1804*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL2_RING_HP_TP_SW_OFFSET_HP_TP_OFFSET_VALUE_SHFT 0x0 1805*5113495bSYour Name 1806*5113495bSYour Name //// Register TCL_R0_SW2TCL3_RING_BASE_LSB //// 1807*5113495bSYour Name 1808*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_BASE_LSB_ADDR(x) (x+0x000005a0) 1809*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_BASE_LSB_PHYS(x) (x+0x000005a0) 1810*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_BASE_LSB_RMSK 0xffffffff 1811*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_BASE_LSB_SHFT 0 1812*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_BASE_LSB_IN(x) \ 1813*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_BASE_LSB_ADDR(x), HWIO_TCL_R0_SW2TCL3_RING_BASE_LSB_RMSK) 1814*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_BASE_LSB_INM(x, mask) \ 1815*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_BASE_LSB_ADDR(x), mask) 1816*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_BASE_LSB_OUT(x, val) \ 1817*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL3_RING_BASE_LSB_ADDR(x), val) 1818*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_BASE_LSB_OUTM(x, mask, val) \ 1819*5113495bSYour Name do {\ 1820*5113495bSYour Name HWIO_INTLOCK(); \ 1821*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL3_RING_BASE_LSB_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL3_RING_BASE_LSB_IN(x)); \ 1822*5113495bSYour Name HWIO_INTFREE();\ 1823*5113495bSYour Name } while (0) 1824*5113495bSYour Name 1825*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_BASE_LSB_RING_BASE_ADDR_LSB_BMSK 0xffffffff 1826*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_BASE_LSB_RING_BASE_ADDR_LSB_SHFT 0x0 1827*5113495bSYour Name 1828*5113495bSYour Name //// Register TCL_R0_SW2TCL3_RING_BASE_MSB //// 1829*5113495bSYour Name 1830*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_BASE_MSB_ADDR(x) (x+0x000005a4) 1831*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_BASE_MSB_PHYS(x) (x+0x000005a4) 1832*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_BASE_MSB_RMSK 0x0fffffff 1833*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_BASE_MSB_SHFT 0 1834*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_BASE_MSB_IN(x) \ 1835*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_BASE_MSB_ADDR(x), HWIO_TCL_R0_SW2TCL3_RING_BASE_MSB_RMSK) 1836*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_BASE_MSB_INM(x, mask) \ 1837*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_BASE_MSB_ADDR(x), mask) 1838*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_BASE_MSB_OUT(x, val) \ 1839*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL3_RING_BASE_MSB_ADDR(x), val) 1840*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_BASE_MSB_OUTM(x, mask, val) \ 1841*5113495bSYour Name do {\ 1842*5113495bSYour Name HWIO_INTLOCK(); \ 1843*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL3_RING_BASE_MSB_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL3_RING_BASE_MSB_IN(x)); \ 1844*5113495bSYour Name HWIO_INTFREE();\ 1845*5113495bSYour Name } while (0) 1846*5113495bSYour Name 1847*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_BASE_MSB_RING_SIZE_BMSK 0x0fffff00 1848*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_BASE_MSB_RING_SIZE_SHFT 0x8 1849*5113495bSYour Name 1850*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_BASE_MSB_RING_BASE_ADDR_MSB_BMSK 0x000000ff 1851*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_BASE_MSB_RING_BASE_ADDR_MSB_SHFT 0x0 1852*5113495bSYour Name 1853*5113495bSYour Name //// Register TCL_R0_SW2TCL3_RING_ID //// 1854*5113495bSYour Name 1855*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_ID_ADDR(x) (x+0x000005a8) 1856*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_ID_PHYS(x) (x+0x000005a8) 1857*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_ID_RMSK 0x000000ff 1858*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_ID_SHFT 0 1859*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_ID_IN(x) \ 1860*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_ID_ADDR(x), HWIO_TCL_R0_SW2TCL3_RING_ID_RMSK) 1861*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_ID_INM(x, mask) \ 1862*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_ID_ADDR(x), mask) 1863*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_ID_OUT(x, val) \ 1864*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL3_RING_ID_ADDR(x), val) 1865*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_ID_OUTM(x, mask, val) \ 1866*5113495bSYour Name do {\ 1867*5113495bSYour Name HWIO_INTLOCK(); \ 1868*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL3_RING_ID_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL3_RING_ID_IN(x)); \ 1869*5113495bSYour Name HWIO_INTFREE();\ 1870*5113495bSYour Name } while (0) 1871*5113495bSYour Name 1872*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_ID_ENTRY_SIZE_BMSK 0x000000ff 1873*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_ID_ENTRY_SIZE_SHFT 0x0 1874*5113495bSYour Name 1875*5113495bSYour Name //// Register TCL_R0_SW2TCL3_RING_STATUS //// 1876*5113495bSYour Name 1877*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_STATUS_ADDR(x) (x+0x000005ac) 1878*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_STATUS_PHYS(x) (x+0x000005ac) 1879*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_STATUS_RMSK 0xffffffff 1880*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_STATUS_SHFT 0 1881*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_STATUS_IN(x) \ 1882*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_STATUS_ADDR(x), HWIO_TCL_R0_SW2TCL3_RING_STATUS_RMSK) 1883*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_STATUS_INM(x, mask) \ 1884*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_STATUS_ADDR(x), mask) 1885*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_STATUS_OUT(x, val) \ 1886*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL3_RING_STATUS_ADDR(x), val) 1887*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_STATUS_OUTM(x, mask, val) \ 1888*5113495bSYour Name do {\ 1889*5113495bSYour Name HWIO_INTLOCK(); \ 1890*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL3_RING_STATUS_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL3_RING_STATUS_IN(x)); \ 1891*5113495bSYour Name HWIO_INTFREE();\ 1892*5113495bSYour Name } while (0) 1893*5113495bSYour Name 1894*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_STATUS_NUM_AVAIL_WORDS_BMSK 0xffff0000 1895*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_STATUS_NUM_AVAIL_WORDS_SHFT 0x10 1896*5113495bSYour Name 1897*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_STATUS_NUM_VALID_WORDS_BMSK 0x0000ffff 1898*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_STATUS_NUM_VALID_WORDS_SHFT 0x0 1899*5113495bSYour Name 1900*5113495bSYour Name //// Register TCL_R0_SW2TCL3_RING_MISC //// 1901*5113495bSYour Name 1902*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_ADDR(x) (x+0x000005b0) 1903*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_PHYS(x) (x+0x000005b0) 1904*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_RMSK 0x003fffff 1905*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_SHFT 0 1906*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_IN(x) \ 1907*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_MISC_ADDR(x), HWIO_TCL_R0_SW2TCL3_RING_MISC_RMSK) 1908*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_INM(x, mask) \ 1909*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_MISC_ADDR(x), mask) 1910*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_OUT(x, val) \ 1911*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL3_RING_MISC_ADDR(x), val) 1912*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_OUTM(x, mask, val) \ 1913*5113495bSYour Name do {\ 1914*5113495bSYour Name HWIO_INTLOCK(); \ 1915*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL3_RING_MISC_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL3_RING_MISC_IN(x)); \ 1916*5113495bSYour Name HWIO_INTFREE();\ 1917*5113495bSYour Name } while (0) 1918*5113495bSYour Name 1919*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_SPARE_CONTROL_BMSK 0x003fc000 1920*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_SPARE_CONTROL_SHFT 0xe 1921*5113495bSYour Name 1922*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_SRNG_SM_STATE2_BMSK 0x00003000 1923*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_SRNG_SM_STATE2_SHFT 0xc 1924*5113495bSYour Name 1925*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_SRNG_SM_STATE1_BMSK 0x00000f00 1926*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_SRNG_SM_STATE1_SHFT 0x8 1927*5113495bSYour Name 1928*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_SRNG_IS_IDLE_BMSK 0x00000080 1929*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_SRNG_IS_IDLE_SHFT 0x7 1930*5113495bSYour Name 1931*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_SRNG_ENABLE_BMSK 0x00000040 1932*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_SRNG_ENABLE_SHFT 0x6 1933*5113495bSYour Name 1934*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_DATA_TLV_SWAP_BIT_BMSK 0x00000020 1935*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_DATA_TLV_SWAP_BIT_SHFT 0x5 1936*5113495bSYour Name 1937*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_HOST_FW_SWAP_BIT_BMSK 0x00000010 1938*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_HOST_FW_SWAP_BIT_SHFT 0x4 1939*5113495bSYour Name 1940*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_MSI_SWAP_BIT_BMSK 0x00000008 1941*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_MSI_SWAP_BIT_SHFT 0x3 1942*5113495bSYour Name 1943*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_SECURITY_BIT_BMSK 0x00000004 1944*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_SECURITY_BIT_SHFT 0x2 1945*5113495bSYour Name 1946*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_LOOPCNT_DISABLE_BMSK 0x00000002 1947*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_LOOPCNT_DISABLE_SHFT 0x1 1948*5113495bSYour Name 1949*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_RING_ID_DISABLE_BMSK 0x00000001 1950*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MISC_RING_ID_DISABLE_SHFT 0x0 1951*5113495bSYour Name 1952*5113495bSYour Name //// Register TCL_R0_SW2TCL3_RING_TP_ADDR_LSB //// 1953*5113495bSYour Name 1954*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_LSB_ADDR(x) (x+0x000005bc) 1955*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_LSB_PHYS(x) (x+0x000005bc) 1956*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_LSB_RMSK 0xffffffff 1957*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_LSB_SHFT 0 1958*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_LSB_IN(x) \ 1959*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_LSB_ADDR(x), HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_LSB_RMSK) 1960*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_LSB_INM(x, mask) \ 1961*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_LSB_ADDR(x), mask) 1962*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_LSB_OUT(x, val) \ 1963*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_LSB_ADDR(x), val) 1964*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_LSB_OUTM(x, mask, val) \ 1965*5113495bSYour Name do {\ 1966*5113495bSYour Name HWIO_INTLOCK(); \ 1967*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_LSB_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_LSB_IN(x)); \ 1968*5113495bSYour Name HWIO_INTFREE();\ 1969*5113495bSYour Name } while (0) 1970*5113495bSYour Name 1971*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_LSB_TAIL_PTR_MEMADDR_LSB_BMSK 0xffffffff 1972*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_LSB_TAIL_PTR_MEMADDR_LSB_SHFT 0x0 1973*5113495bSYour Name 1974*5113495bSYour Name //// Register TCL_R0_SW2TCL3_RING_TP_ADDR_MSB //// 1975*5113495bSYour Name 1976*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_MSB_ADDR(x) (x+0x000005c0) 1977*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_MSB_PHYS(x) (x+0x000005c0) 1978*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_MSB_RMSK 0x000000ff 1979*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_MSB_SHFT 0 1980*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_MSB_IN(x) \ 1981*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_MSB_ADDR(x), HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_MSB_RMSK) 1982*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_MSB_INM(x, mask) \ 1983*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_MSB_ADDR(x), mask) 1984*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_MSB_OUT(x, val) \ 1985*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_MSB_ADDR(x), val) 1986*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_MSB_OUTM(x, mask, val) \ 1987*5113495bSYour Name do {\ 1988*5113495bSYour Name HWIO_INTLOCK(); \ 1989*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_MSB_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_MSB_IN(x)); \ 1990*5113495bSYour Name HWIO_INTFREE();\ 1991*5113495bSYour Name } while (0) 1992*5113495bSYour Name 1993*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_MSB_TAIL_PTR_MEMADDR_MSB_BMSK 0x000000ff 1994*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_TP_ADDR_MSB_TAIL_PTR_MEMADDR_MSB_SHFT 0x0 1995*5113495bSYour Name 1996*5113495bSYour Name //// Register TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX0 //// 1997*5113495bSYour Name 1998*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX0_ADDR(x) (x+0x000005d0) 1999*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX0_PHYS(x) (x+0x000005d0) 2000*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX0_RMSK 0xffffffff 2001*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX0_SHFT 0 2002*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX0_IN(x) \ 2003*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX0_RMSK) 2004*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX0_INM(x, mask) \ 2005*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), mask) 2006*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX0_OUT(x, val) \ 2007*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), val) 2008*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX0_OUTM(x, mask, val) \ 2009*5113495bSYour Name do {\ 2010*5113495bSYour Name HWIO_INTLOCK(); \ 2011*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX0_IN(x)); \ 2012*5113495bSYour Name HWIO_INTFREE();\ 2013*5113495bSYour Name } while (0) 2014*5113495bSYour Name 2015*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX0_INTERRUPT_TIMER_THRESHOLD_BMSK 0xffff0000 2016*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX0_INTERRUPT_TIMER_THRESHOLD_SHFT 0x10 2017*5113495bSYour Name 2018*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX0_SW_INTERRUPT_MODE_BMSK 0x00008000 2019*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX0_SW_INTERRUPT_MODE_SHFT 0xf 2020*5113495bSYour Name 2021*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX0_BATCH_COUNTER_THRESHOLD_BMSK 0x00007fff 2022*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX0_BATCH_COUNTER_THRESHOLD_SHFT 0x0 2023*5113495bSYour Name 2024*5113495bSYour Name //// Register TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX1 //// 2025*5113495bSYour Name 2026*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX1_ADDR(x) (x+0x000005d4) 2027*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX1_PHYS(x) (x+0x000005d4) 2028*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX1_RMSK 0x0000ffff 2029*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX1_SHFT 0 2030*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX1_IN(x) \ 2031*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX1_RMSK) 2032*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX1_INM(x, mask) \ 2033*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), mask) 2034*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX1_OUT(x, val) \ 2035*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), val) 2036*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX1_OUTM(x, mask, val) \ 2037*5113495bSYour Name do {\ 2038*5113495bSYour Name HWIO_INTLOCK(); \ 2039*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX1_IN(x)); \ 2040*5113495bSYour Name HWIO_INTFREE();\ 2041*5113495bSYour Name } while (0) 2042*5113495bSYour Name 2043*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX1_LOW_THRESHOLD_BMSK 0x0000ffff 2044*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_SETUP_IX1_LOW_THRESHOLD_SHFT 0x0 2045*5113495bSYour Name 2046*5113495bSYour Name //// Register TCL_R0_SW2TCL3_RING_CONSUMER_INT_STATUS //// 2047*5113495bSYour Name 2048*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_STATUS_ADDR(x) (x+0x000005d8) 2049*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_STATUS_PHYS(x) (x+0x000005d8) 2050*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_STATUS_RMSK 0xffffffff 2051*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_STATUS_SHFT 0 2052*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_STATUS_IN(x) \ 2053*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_STATUS_ADDR(x), HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_STATUS_RMSK) 2054*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_STATUS_INM(x, mask) \ 2055*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_STATUS_ADDR(x), mask) 2056*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_STATUS_OUT(x, val) \ 2057*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_STATUS_ADDR(x), val) 2058*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_STATUS_OUTM(x, mask, val) \ 2059*5113495bSYour Name do {\ 2060*5113495bSYour Name HWIO_INTLOCK(); \ 2061*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_STATUS_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_STATUS_IN(x)); \ 2062*5113495bSYour Name HWIO_INTFREE();\ 2063*5113495bSYour Name } while (0) 2064*5113495bSYour Name 2065*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_STATUS_CURRENT_INTERRUPT_TIMER_VALUE_BMSK 0xffff0000 2066*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_STATUS_CURRENT_INTERRUPT_TIMER_VALUE_SHFT 0x10 2067*5113495bSYour Name 2068*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_STATUS_CURRENT_INT_WIRE_VALUE_BMSK 0x00008000 2069*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_STATUS_CURRENT_INT_WIRE_VALUE_SHFT 0xf 2070*5113495bSYour Name 2071*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_STATUS_INTERNAL_BATCH_COUNTER_VALUE_BMSK 0x00007fff 2072*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_INT_STATUS_INTERNAL_BATCH_COUNTER_VALUE_SHFT 0x0 2073*5113495bSYour Name 2074*5113495bSYour Name //// Register TCL_R0_SW2TCL3_RING_CONSUMER_EMPTY_COUNTER //// 2075*5113495bSYour Name 2076*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_EMPTY_COUNTER_ADDR(x) (x+0x000005dc) 2077*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_EMPTY_COUNTER_PHYS(x) (x+0x000005dc) 2078*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_EMPTY_COUNTER_RMSK 0x000003ff 2079*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_EMPTY_COUNTER_SHFT 0 2080*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_EMPTY_COUNTER_IN(x) \ 2081*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_EMPTY_COUNTER_RMSK) 2082*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_EMPTY_COUNTER_INM(x, mask) \ 2083*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), mask) 2084*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_EMPTY_COUNTER_OUT(x, val) \ 2085*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), val) 2086*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_EMPTY_COUNTER_OUTM(x, mask, val) \ 2087*5113495bSYour Name do {\ 2088*5113495bSYour Name HWIO_INTLOCK(); \ 2089*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_EMPTY_COUNTER_IN(x)); \ 2090*5113495bSYour Name HWIO_INTFREE();\ 2091*5113495bSYour Name } while (0) 2092*5113495bSYour Name 2093*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_EMPTY_COUNTER_RING_EMPTY_COUNTER_BMSK 0x000003ff 2094*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_EMPTY_COUNTER_RING_EMPTY_COUNTER_SHFT 0x0 2095*5113495bSYour Name 2096*5113495bSYour Name //// Register TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_TIMER //// 2097*5113495bSYour Name 2098*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_TIMER_ADDR(x) (x+0x000005e0) 2099*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_TIMER_PHYS(x) (x+0x000005e0) 2100*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_TIMER_RMSK 0x00000007 2101*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_TIMER_SHFT 0 2102*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_TIMER_IN(x) \ 2103*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_TIMER_RMSK) 2104*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_TIMER_INM(x, mask) \ 2105*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), mask) 2106*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_TIMER_OUT(x, val) \ 2107*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), val) 2108*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_TIMER_OUTM(x, mask, val) \ 2109*5113495bSYour Name do {\ 2110*5113495bSYour Name HWIO_INTLOCK(); \ 2111*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_TIMER_IN(x)); \ 2112*5113495bSYour Name HWIO_INTFREE();\ 2113*5113495bSYour Name } while (0) 2114*5113495bSYour Name 2115*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_TIMER_MODE_BMSK 0x00000007 2116*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_TIMER_MODE_SHFT 0x0 2117*5113495bSYour Name 2118*5113495bSYour Name //// Register TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_STATUS //// 2119*5113495bSYour Name 2120*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_STATUS_ADDR(x) (x+0x000005e4) 2121*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_STATUS_PHYS(x) (x+0x000005e4) 2122*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_STATUS_RMSK 0x0fffffff 2123*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_STATUS_SHFT 0 2124*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_STATUS_IN(x) \ 2125*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_STATUS_RMSK) 2126*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_STATUS_INM(x, mask) \ 2127*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), mask) 2128*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_STATUS_OUT(x, val) \ 2129*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), val) 2130*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_STATUS_OUTM(x, mask, val) \ 2131*5113495bSYour Name do {\ 2132*5113495bSYour Name HWIO_INTLOCK(); \ 2133*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_STATUS_IN(x)); \ 2134*5113495bSYour Name HWIO_INTFREE();\ 2135*5113495bSYour Name } while (0) 2136*5113495bSYour Name 2137*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_STATUS_PREFETCH_COUNT_BMSK 0x0ff00000 2138*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_STATUS_PREFETCH_COUNT_SHFT 0x14 2139*5113495bSYour Name 2140*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_STATUS_INTERNAL_TAIL_PTR_BMSK 0x000fffff 2141*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_CONSUMER_PREFETCH_STATUS_INTERNAL_TAIL_PTR_SHFT 0x0 2142*5113495bSYour Name 2143*5113495bSYour Name //// Register TCL_R0_SW2TCL3_RING_MSI1_BASE_LSB //// 2144*5113495bSYour Name 2145*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_LSB_ADDR(x) (x+0x000005e8) 2146*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_LSB_PHYS(x) (x+0x000005e8) 2147*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_LSB_RMSK 0xffffffff 2148*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_LSB_SHFT 0 2149*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_LSB_IN(x) \ 2150*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_LSB_ADDR(x), HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_LSB_RMSK) 2151*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_LSB_INM(x, mask) \ 2152*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_LSB_ADDR(x), mask) 2153*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_LSB_OUT(x, val) \ 2154*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_LSB_ADDR(x), val) 2155*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \ 2156*5113495bSYour Name do {\ 2157*5113495bSYour Name HWIO_INTLOCK(); \ 2158*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_LSB_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_LSB_IN(x)); \ 2159*5113495bSYour Name HWIO_INTFREE();\ 2160*5113495bSYour Name } while (0) 2161*5113495bSYour Name 2162*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_LSB_ADDR_BMSK 0xffffffff 2163*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_LSB_ADDR_SHFT 0x0 2164*5113495bSYour Name 2165*5113495bSYour Name //// Register TCL_R0_SW2TCL3_RING_MSI1_BASE_MSB //// 2166*5113495bSYour Name 2167*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_MSB_ADDR(x) (x+0x000005ec) 2168*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_MSB_PHYS(x) (x+0x000005ec) 2169*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_MSB_RMSK 0x000001ff 2170*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_MSB_SHFT 0 2171*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_MSB_IN(x) \ 2172*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_MSB_ADDR(x), HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_MSB_RMSK) 2173*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_MSB_INM(x, mask) \ 2174*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_MSB_ADDR(x), mask) 2175*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_MSB_OUT(x, val) \ 2176*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_MSB_ADDR(x), val) 2177*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \ 2178*5113495bSYour Name do {\ 2179*5113495bSYour Name HWIO_INTLOCK(); \ 2180*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_MSB_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_MSB_IN(x)); \ 2181*5113495bSYour Name HWIO_INTFREE();\ 2182*5113495bSYour Name } while (0) 2183*5113495bSYour Name 2184*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_MSB_MSI1_ENABLE_BMSK 0x00000100 2185*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_MSB_MSI1_ENABLE_SHFT 0x8 2186*5113495bSYour Name 2187*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_MSB_ADDR_BMSK 0x000000ff 2188*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_BASE_MSB_ADDR_SHFT 0x0 2189*5113495bSYour Name 2190*5113495bSYour Name //// Register TCL_R0_SW2TCL3_RING_MSI1_DATA //// 2191*5113495bSYour Name 2192*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_DATA_ADDR(x) (x+0x000005f0) 2193*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_DATA_PHYS(x) (x+0x000005f0) 2194*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_DATA_RMSK 0xffffffff 2195*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_DATA_SHFT 0 2196*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_DATA_IN(x) \ 2197*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_MSI1_DATA_ADDR(x), HWIO_TCL_R0_SW2TCL3_RING_MSI1_DATA_RMSK) 2198*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_DATA_INM(x, mask) \ 2199*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_MSI1_DATA_ADDR(x), mask) 2200*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_DATA_OUT(x, val) \ 2201*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL3_RING_MSI1_DATA_ADDR(x), val) 2202*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_DATA_OUTM(x, mask, val) \ 2203*5113495bSYour Name do {\ 2204*5113495bSYour Name HWIO_INTLOCK(); \ 2205*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL3_RING_MSI1_DATA_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL3_RING_MSI1_DATA_IN(x)); \ 2206*5113495bSYour Name HWIO_INTFREE();\ 2207*5113495bSYour Name } while (0) 2208*5113495bSYour Name 2209*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_DATA_VALUE_BMSK 0xffffffff 2210*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_MSI1_DATA_VALUE_SHFT 0x0 2211*5113495bSYour Name 2212*5113495bSYour Name //// Register TCL_R0_SW2TCL3_RING_HP_TP_SW_OFFSET //// 2213*5113495bSYour Name 2214*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_HP_TP_SW_OFFSET_ADDR(x) (x+0x000005f4) 2215*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_HP_TP_SW_OFFSET_PHYS(x) (x+0x000005f4) 2216*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_HP_TP_SW_OFFSET_RMSK 0x0000ffff 2217*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_HP_TP_SW_OFFSET_SHFT 0 2218*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_HP_TP_SW_OFFSET_IN(x) \ 2219*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_HP_TP_SW_OFFSET_ADDR(x), HWIO_TCL_R0_SW2TCL3_RING_HP_TP_SW_OFFSET_RMSK) 2220*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_HP_TP_SW_OFFSET_INM(x, mask) \ 2221*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_HP_TP_SW_OFFSET_ADDR(x), mask) 2222*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_HP_TP_SW_OFFSET_OUT(x, val) \ 2223*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL3_RING_HP_TP_SW_OFFSET_ADDR(x), val) 2224*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ 2225*5113495bSYour Name do {\ 2226*5113495bSYour Name HWIO_INTLOCK(); \ 2227*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL3_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL3_RING_HP_TP_SW_OFFSET_IN(x)); \ 2228*5113495bSYour Name HWIO_INTFREE();\ 2229*5113495bSYour Name } while (0) 2230*5113495bSYour Name 2231*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_HP_TP_SW_OFFSET_HP_TP_OFFSET_VALUE_BMSK 0x0000ffff 2232*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL3_RING_HP_TP_SW_OFFSET_HP_TP_OFFSET_VALUE_SHFT 0x0 2233*5113495bSYour Name 2234*5113495bSYour Name //// Register TCL_R0_SW2TCL_CREDIT_RING_BASE_LSB //// 2235*5113495bSYour Name 2236*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_BASE_LSB_ADDR(x) (x+0x000005f8) 2237*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_BASE_LSB_PHYS(x) (x+0x000005f8) 2238*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_BASE_LSB_RMSK 0xffffffff 2239*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_BASE_LSB_SHFT 0 2240*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_BASE_LSB_IN(x) \ 2241*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CREDIT_RING_BASE_LSB_ADDR(x), HWIO_TCL_R0_SW2TCL_CREDIT_RING_BASE_LSB_RMSK) 2242*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_BASE_LSB_INM(x, mask) \ 2243*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CREDIT_RING_BASE_LSB_ADDR(x), mask) 2244*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_BASE_LSB_OUT(x, val) \ 2245*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL_CREDIT_RING_BASE_LSB_ADDR(x), val) 2246*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_BASE_LSB_OUTM(x, mask, val) \ 2247*5113495bSYour Name do {\ 2248*5113495bSYour Name HWIO_INTLOCK(); \ 2249*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL_CREDIT_RING_BASE_LSB_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL_CREDIT_RING_BASE_LSB_IN(x)); \ 2250*5113495bSYour Name HWIO_INTFREE();\ 2251*5113495bSYour Name } while (0) 2252*5113495bSYour Name 2253*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_BASE_LSB_RING_BASE_ADDR_LSB_BMSK 0xffffffff 2254*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_BASE_LSB_RING_BASE_ADDR_LSB_SHFT 0x0 2255*5113495bSYour Name 2256*5113495bSYour Name //// Register TCL_R0_SW2TCL_CREDIT_RING_BASE_MSB //// 2257*5113495bSYour Name 2258*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_BASE_MSB_ADDR(x) (x+0x000005fc) 2259*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_BASE_MSB_PHYS(x) (x+0x000005fc) 2260*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_BASE_MSB_RMSK 0x0fffffff 2261*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_BASE_MSB_SHFT 0 2262*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_BASE_MSB_IN(x) \ 2263*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CREDIT_RING_BASE_MSB_ADDR(x), HWIO_TCL_R0_SW2TCL_CREDIT_RING_BASE_MSB_RMSK) 2264*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_BASE_MSB_INM(x, mask) \ 2265*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CREDIT_RING_BASE_MSB_ADDR(x), mask) 2266*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_BASE_MSB_OUT(x, val) \ 2267*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL_CREDIT_RING_BASE_MSB_ADDR(x), val) 2268*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_BASE_MSB_OUTM(x, mask, val) \ 2269*5113495bSYour Name do {\ 2270*5113495bSYour Name HWIO_INTLOCK(); \ 2271*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL_CREDIT_RING_BASE_MSB_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL_CREDIT_RING_BASE_MSB_IN(x)); \ 2272*5113495bSYour Name HWIO_INTFREE();\ 2273*5113495bSYour Name } while (0) 2274*5113495bSYour Name 2275*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_BASE_MSB_RING_SIZE_BMSK 0x0fffff00 2276*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_BASE_MSB_RING_SIZE_SHFT 0x8 2277*5113495bSYour Name 2278*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_BASE_MSB_RING_BASE_ADDR_MSB_BMSK 0x000000ff 2279*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_BASE_MSB_RING_BASE_ADDR_MSB_SHFT 0x0 2280*5113495bSYour Name 2281*5113495bSYour Name //// Register TCL_R0_SW2TCL_CREDIT_RING_ID //// 2282*5113495bSYour Name 2283*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_ID_ADDR(x) (x+0x00000600) 2284*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_ID_PHYS(x) (x+0x00000600) 2285*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_ID_RMSK 0x000000ff 2286*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_ID_SHFT 0 2287*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_ID_IN(x) \ 2288*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CREDIT_RING_ID_ADDR(x), HWIO_TCL_R0_SW2TCL_CREDIT_RING_ID_RMSK) 2289*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_ID_INM(x, mask) \ 2290*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CREDIT_RING_ID_ADDR(x), mask) 2291*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_ID_OUT(x, val) \ 2292*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL_CREDIT_RING_ID_ADDR(x), val) 2293*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_ID_OUTM(x, mask, val) \ 2294*5113495bSYour Name do {\ 2295*5113495bSYour Name HWIO_INTLOCK(); \ 2296*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL_CREDIT_RING_ID_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL_CREDIT_RING_ID_IN(x)); \ 2297*5113495bSYour Name HWIO_INTFREE();\ 2298*5113495bSYour Name } while (0) 2299*5113495bSYour Name 2300*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_ID_ENTRY_SIZE_BMSK 0x000000ff 2301*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_ID_ENTRY_SIZE_SHFT 0x0 2302*5113495bSYour Name 2303*5113495bSYour Name //// Register TCL_R0_SW2TCL_CREDIT_RING_STATUS //// 2304*5113495bSYour Name 2305*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_STATUS_ADDR(x) (x+0x00000604) 2306*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_STATUS_PHYS(x) (x+0x00000604) 2307*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_STATUS_RMSK 0xffffffff 2308*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_STATUS_SHFT 0 2309*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_STATUS_IN(x) \ 2310*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CREDIT_RING_STATUS_ADDR(x), HWIO_TCL_R0_SW2TCL_CREDIT_RING_STATUS_RMSK) 2311*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_STATUS_INM(x, mask) \ 2312*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CREDIT_RING_STATUS_ADDR(x), mask) 2313*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_STATUS_OUT(x, val) \ 2314*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL_CREDIT_RING_STATUS_ADDR(x), val) 2315*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_STATUS_OUTM(x, mask, val) \ 2316*5113495bSYour Name do {\ 2317*5113495bSYour Name HWIO_INTLOCK(); \ 2318*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL_CREDIT_RING_STATUS_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL_CREDIT_RING_STATUS_IN(x)); \ 2319*5113495bSYour Name HWIO_INTFREE();\ 2320*5113495bSYour Name } while (0) 2321*5113495bSYour Name 2322*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_STATUS_NUM_AVAIL_WORDS_BMSK 0xffff0000 2323*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_STATUS_NUM_AVAIL_WORDS_SHFT 0x10 2324*5113495bSYour Name 2325*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_STATUS_NUM_VALID_WORDS_BMSK 0x0000ffff 2326*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_STATUS_NUM_VALID_WORDS_SHFT 0x0 2327*5113495bSYour Name 2328*5113495bSYour Name //// Register TCL_R0_SW2TCL_CREDIT_RING_MISC //// 2329*5113495bSYour Name 2330*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MISC_ADDR(x) (x+0x00000608) 2331*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MISC_PHYS(x) (x+0x00000608) 2332*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MISC_RMSK 0x003fffff 2333*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MISC_SHFT 0 2334*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MISC_IN(x) \ 2335*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CREDIT_RING_MISC_ADDR(x), HWIO_TCL_R0_SW2TCL_CREDIT_RING_MISC_RMSK) 2336*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MISC_INM(x, mask) \ 2337*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CREDIT_RING_MISC_ADDR(x), mask) 2338*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MISC_OUT(x, val) \ 2339*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL_CREDIT_RING_MISC_ADDR(x), val) 2340*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MISC_OUTM(x, mask, val) \ 2341*5113495bSYour Name do {\ 2342*5113495bSYour Name HWIO_INTLOCK(); \ 2343*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL_CREDIT_RING_MISC_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL_CREDIT_RING_MISC_IN(x)); \ 2344*5113495bSYour Name HWIO_INTFREE();\ 2345*5113495bSYour Name } while (0) 2346*5113495bSYour Name 2347*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MISC_SPARE_CONTROL_BMSK 0x003fc000 2348*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MISC_SPARE_CONTROL_SHFT 0xe 2349*5113495bSYour Name 2350*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MISC_SRNG_SM_STATE2_BMSK 0x00003000 2351*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MISC_SRNG_SM_STATE2_SHFT 0xc 2352*5113495bSYour Name 2353*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MISC_SRNG_SM_STATE1_BMSK 0x00000f00 2354*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MISC_SRNG_SM_STATE1_SHFT 0x8 2355*5113495bSYour Name 2356*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MISC_SRNG_IS_IDLE_BMSK 0x00000080 2357*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MISC_SRNG_IS_IDLE_SHFT 0x7 2358*5113495bSYour Name 2359*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MISC_SRNG_ENABLE_BMSK 0x00000040 2360*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MISC_SRNG_ENABLE_SHFT 0x6 2361*5113495bSYour Name 2362*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MISC_DATA_TLV_SWAP_BIT_BMSK 0x00000020 2363*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MISC_DATA_TLV_SWAP_BIT_SHFT 0x5 2364*5113495bSYour Name 2365*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MISC_HOST_FW_SWAP_BIT_BMSK 0x00000010 2366*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MISC_HOST_FW_SWAP_BIT_SHFT 0x4 2367*5113495bSYour Name 2368*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MISC_MSI_SWAP_BIT_BMSK 0x00000008 2369*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MISC_MSI_SWAP_BIT_SHFT 0x3 2370*5113495bSYour Name 2371*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MISC_SECURITY_BIT_BMSK 0x00000004 2372*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MISC_SECURITY_BIT_SHFT 0x2 2373*5113495bSYour Name 2374*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MISC_LOOPCNT_DISABLE_BMSK 0x00000002 2375*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MISC_LOOPCNT_DISABLE_SHFT 0x1 2376*5113495bSYour Name 2377*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MISC_RING_ID_DISABLE_BMSK 0x00000001 2378*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MISC_RING_ID_DISABLE_SHFT 0x0 2379*5113495bSYour Name 2380*5113495bSYour Name //// Register TCL_R0_SW2TCL_CREDIT_RING_TP_ADDR_LSB //// 2381*5113495bSYour Name 2382*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_TP_ADDR_LSB_ADDR(x) (x+0x00000614) 2383*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_TP_ADDR_LSB_PHYS(x) (x+0x00000614) 2384*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_TP_ADDR_LSB_RMSK 0xffffffff 2385*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_TP_ADDR_LSB_SHFT 0 2386*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_TP_ADDR_LSB_IN(x) \ 2387*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CREDIT_RING_TP_ADDR_LSB_ADDR(x), HWIO_TCL_R0_SW2TCL_CREDIT_RING_TP_ADDR_LSB_RMSK) 2388*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_TP_ADDR_LSB_INM(x, mask) \ 2389*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CREDIT_RING_TP_ADDR_LSB_ADDR(x), mask) 2390*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_TP_ADDR_LSB_OUT(x, val) \ 2391*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL_CREDIT_RING_TP_ADDR_LSB_ADDR(x), val) 2392*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_TP_ADDR_LSB_OUTM(x, mask, val) \ 2393*5113495bSYour Name do {\ 2394*5113495bSYour Name HWIO_INTLOCK(); \ 2395*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL_CREDIT_RING_TP_ADDR_LSB_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL_CREDIT_RING_TP_ADDR_LSB_IN(x)); \ 2396*5113495bSYour Name HWIO_INTFREE();\ 2397*5113495bSYour Name } while (0) 2398*5113495bSYour Name 2399*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_TP_ADDR_LSB_TAIL_PTR_MEMADDR_LSB_BMSK 0xffffffff 2400*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_TP_ADDR_LSB_TAIL_PTR_MEMADDR_LSB_SHFT 0x0 2401*5113495bSYour Name 2402*5113495bSYour Name //// Register TCL_R0_SW2TCL_CREDIT_RING_TP_ADDR_MSB //// 2403*5113495bSYour Name 2404*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_TP_ADDR_MSB_ADDR(x) (x+0x00000618) 2405*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_TP_ADDR_MSB_PHYS(x) (x+0x00000618) 2406*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_TP_ADDR_MSB_RMSK 0x000000ff 2407*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_TP_ADDR_MSB_SHFT 0 2408*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_TP_ADDR_MSB_IN(x) \ 2409*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CREDIT_RING_TP_ADDR_MSB_ADDR(x), HWIO_TCL_R0_SW2TCL_CREDIT_RING_TP_ADDR_MSB_RMSK) 2410*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_TP_ADDR_MSB_INM(x, mask) \ 2411*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CREDIT_RING_TP_ADDR_MSB_ADDR(x), mask) 2412*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_TP_ADDR_MSB_OUT(x, val) \ 2413*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL_CREDIT_RING_TP_ADDR_MSB_ADDR(x), val) 2414*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_TP_ADDR_MSB_OUTM(x, mask, val) \ 2415*5113495bSYour Name do {\ 2416*5113495bSYour Name HWIO_INTLOCK(); \ 2417*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL_CREDIT_RING_TP_ADDR_MSB_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL_CREDIT_RING_TP_ADDR_MSB_IN(x)); \ 2418*5113495bSYour Name HWIO_INTFREE();\ 2419*5113495bSYour Name } while (0) 2420*5113495bSYour Name 2421*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_TP_ADDR_MSB_TAIL_PTR_MEMADDR_MSB_BMSK 0x000000ff 2422*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_TP_ADDR_MSB_TAIL_PTR_MEMADDR_MSB_SHFT 0x0 2423*5113495bSYour Name 2424*5113495bSYour Name //// Register TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX0 //// 2425*5113495bSYour Name 2426*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX0_ADDR(x) (x+0x00000628) 2427*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX0_PHYS(x) (x+0x00000628) 2428*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX0_RMSK 0xffffffff 2429*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX0_SHFT 0 2430*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX0_IN(x) \ 2431*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX0_RMSK) 2432*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX0_INM(x, mask) \ 2433*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), mask) 2434*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX0_OUT(x, val) \ 2435*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), val) 2436*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX0_OUTM(x, mask, val) \ 2437*5113495bSYour Name do {\ 2438*5113495bSYour Name HWIO_INTLOCK(); \ 2439*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX0_IN(x)); \ 2440*5113495bSYour Name HWIO_INTFREE();\ 2441*5113495bSYour Name } while (0) 2442*5113495bSYour Name 2443*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX0_INTERRUPT_TIMER_THRESHOLD_BMSK 0xffff0000 2444*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX0_INTERRUPT_TIMER_THRESHOLD_SHFT 0x10 2445*5113495bSYour Name 2446*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX0_SW_INTERRUPT_MODE_BMSK 0x00008000 2447*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX0_SW_INTERRUPT_MODE_SHFT 0xf 2448*5113495bSYour Name 2449*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX0_BATCH_COUNTER_THRESHOLD_BMSK 0x00007fff 2450*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX0_BATCH_COUNTER_THRESHOLD_SHFT 0x0 2451*5113495bSYour Name 2452*5113495bSYour Name //// Register TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX1 //// 2453*5113495bSYour Name 2454*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX1_ADDR(x) (x+0x0000062c) 2455*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX1_PHYS(x) (x+0x0000062c) 2456*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX1_RMSK 0x0000ffff 2457*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX1_SHFT 0 2458*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX1_IN(x) \ 2459*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX1_RMSK) 2460*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX1_INM(x, mask) \ 2461*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), mask) 2462*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX1_OUT(x, val) \ 2463*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), val) 2464*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX1_OUTM(x, mask, val) \ 2465*5113495bSYour Name do {\ 2466*5113495bSYour Name HWIO_INTLOCK(); \ 2467*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX1_IN(x)); \ 2468*5113495bSYour Name HWIO_INTFREE();\ 2469*5113495bSYour Name } while (0) 2470*5113495bSYour Name 2471*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX1_LOW_THRESHOLD_BMSK 0x0000ffff 2472*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_SETUP_IX1_LOW_THRESHOLD_SHFT 0x0 2473*5113495bSYour Name 2474*5113495bSYour Name //// Register TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_STATUS //// 2475*5113495bSYour Name 2476*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_STATUS_ADDR(x) (x+0x00000630) 2477*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_STATUS_PHYS(x) (x+0x00000630) 2478*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_STATUS_RMSK 0xffffffff 2479*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_STATUS_SHFT 0 2480*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_STATUS_IN(x) \ 2481*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_STATUS_ADDR(x), HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_STATUS_RMSK) 2482*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_STATUS_INM(x, mask) \ 2483*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_STATUS_ADDR(x), mask) 2484*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_STATUS_OUT(x, val) \ 2485*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_STATUS_ADDR(x), val) 2486*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_STATUS_OUTM(x, mask, val) \ 2487*5113495bSYour Name do {\ 2488*5113495bSYour Name HWIO_INTLOCK(); \ 2489*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_STATUS_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_STATUS_IN(x)); \ 2490*5113495bSYour Name HWIO_INTFREE();\ 2491*5113495bSYour Name } while (0) 2492*5113495bSYour Name 2493*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_STATUS_CURRENT_INTERRUPT_TIMER_VALUE_BMSK 0xffff0000 2494*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_STATUS_CURRENT_INTERRUPT_TIMER_VALUE_SHFT 0x10 2495*5113495bSYour Name 2496*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_STATUS_CURRENT_INT_WIRE_VALUE_BMSK 0x00008000 2497*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_STATUS_CURRENT_INT_WIRE_VALUE_SHFT 0xf 2498*5113495bSYour Name 2499*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_STATUS_INTERNAL_BATCH_COUNTER_VALUE_BMSK 0x00007fff 2500*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_INT_STATUS_INTERNAL_BATCH_COUNTER_VALUE_SHFT 0x0 2501*5113495bSYour Name 2502*5113495bSYour Name //// Register TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_EMPTY_COUNTER //// 2503*5113495bSYour Name 2504*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_EMPTY_COUNTER_ADDR(x) (x+0x00000634) 2505*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_EMPTY_COUNTER_PHYS(x) (x+0x00000634) 2506*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_EMPTY_COUNTER_RMSK 0x000003ff 2507*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_EMPTY_COUNTER_SHFT 0 2508*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_EMPTY_COUNTER_IN(x) \ 2509*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_EMPTY_COUNTER_RMSK) 2510*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_EMPTY_COUNTER_INM(x, mask) \ 2511*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), mask) 2512*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_EMPTY_COUNTER_OUT(x, val) \ 2513*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), val) 2514*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_EMPTY_COUNTER_OUTM(x, mask, val) \ 2515*5113495bSYour Name do {\ 2516*5113495bSYour Name HWIO_INTLOCK(); \ 2517*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_EMPTY_COUNTER_IN(x)); \ 2518*5113495bSYour Name HWIO_INTFREE();\ 2519*5113495bSYour Name } while (0) 2520*5113495bSYour Name 2521*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_EMPTY_COUNTER_RING_EMPTY_COUNTER_BMSK 0x000003ff 2522*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_EMPTY_COUNTER_RING_EMPTY_COUNTER_SHFT 0x0 2523*5113495bSYour Name 2524*5113495bSYour Name //// Register TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_PREFETCH_TIMER //// 2525*5113495bSYour Name 2526*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_PREFETCH_TIMER_ADDR(x) (x+0x00000638) 2527*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_PREFETCH_TIMER_PHYS(x) (x+0x00000638) 2528*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_PREFETCH_TIMER_RMSK 0x00000007 2529*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_PREFETCH_TIMER_SHFT 0 2530*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_PREFETCH_TIMER_IN(x) \ 2531*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_PREFETCH_TIMER_RMSK) 2532*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_PREFETCH_TIMER_INM(x, mask) \ 2533*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), mask) 2534*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_PREFETCH_TIMER_OUT(x, val) \ 2535*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), val) 2536*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_PREFETCH_TIMER_OUTM(x, mask, val) \ 2537*5113495bSYour Name do {\ 2538*5113495bSYour Name HWIO_INTLOCK(); \ 2539*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_PREFETCH_TIMER_IN(x)); \ 2540*5113495bSYour Name HWIO_INTFREE();\ 2541*5113495bSYour Name } while (0) 2542*5113495bSYour Name 2543*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_PREFETCH_TIMER_MODE_BMSK 0x00000007 2544*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_PREFETCH_TIMER_MODE_SHFT 0x0 2545*5113495bSYour Name 2546*5113495bSYour Name //// Register TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_PREFETCH_STATUS //// 2547*5113495bSYour Name 2548*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_PREFETCH_STATUS_ADDR(x) (x+0x0000063c) 2549*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_PREFETCH_STATUS_PHYS(x) (x+0x0000063c) 2550*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_PREFETCH_STATUS_RMSK 0x0fffffff 2551*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_PREFETCH_STATUS_SHFT 0 2552*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_PREFETCH_STATUS_IN(x) \ 2553*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_PREFETCH_STATUS_RMSK) 2554*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_PREFETCH_STATUS_INM(x, mask) \ 2555*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), mask) 2556*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_PREFETCH_STATUS_OUT(x, val) \ 2557*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), val) 2558*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_PREFETCH_STATUS_OUTM(x, mask, val) \ 2559*5113495bSYour Name do {\ 2560*5113495bSYour Name HWIO_INTLOCK(); \ 2561*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_PREFETCH_STATUS_IN(x)); \ 2562*5113495bSYour Name HWIO_INTFREE();\ 2563*5113495bSYour Name } while (0) 2564*5113495bSYour Name 2565*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_PREFETCH_STATUS_PREFETCH_COUNT_BMSK 0x0ff00000 2566*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_PREFETCH_STATUS_PREFETCH_COUNT_SHFT 0x14 2567*5113495bSYour Name 2568*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_PREFETCH_STATUS_INTERNAL_TAIL_PTR_BMSK 0x000fffff 2569*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_CONSUMER_PREFETCH_STATUS_INTERNAL_TAIL_PTR_SHFT 0x0 2570*5113495bSYour Name 2571*5113495bSYour Name //// Register TCL_R0_SW2TCL_CREDIT_RING_MSI1_BASE_LSB //// 2572*5113495bSYour Name 2573*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_BASE_LSB_ADDR(x) (x+0x00000640) 2574*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_BASE_LSB_PHYS(x) (x+0x00000640) 2575*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_BASE_LSB_RMSK 0xffffffff 2576*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_BASE_LSB_SHFT 0 2577*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_BASE_LSB_IN(x) \ 2578*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_BASE_LSB_ADDR(x), HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_BASE_LSB_RMSK) 2579*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_BASE_LSB_INM(x, mask) \ 2580*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_BASE_LSB_ADDR(x), mask) 2581*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_BASE_LSB_OUT(x, val) \ 2582*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_BASE_LSB_ADDR(x), val) 2583*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \ 2584*5113495bSYour Name do {\ 2585*5113495bSYour Name HWIO_INTLOCK(); \ 2586*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_BASE_LSB_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_BASE_LSB_IN(x)); \ 2587*5113495bSYour Name HWIO_INTFREE();\ 2588*5113495bSYour Name } while (0) 2589*5113495bSYour Name 2590*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_BASE_LSB_ADDR_BMSK 0xffffffff 2591*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_BASE_LSB_ADDR_SHFT 0x0 2592*5113495bSYour Name 2593*5113495bSYour Name //// Register TCL_R0_SW2TCL_CREDIT_RING_MSI1_BASE_MSB //// 2594*5113495bSYour Name 2595*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_BASE_MSB_ADDR(x) (x+0x00000644) 2596*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_BASE_MSB_PHYS(x) (x+0x00000644) 2597*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_BASE_MSB_RMSK 0x000001ff 2598*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_BASE_MSB_SHFT 0 2599*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_BASE_MSB_IN(x) \ 2600*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_BASE_MSB_ADDR(x), HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_BASE_MSB_RMSK) 2601*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_BASE_MSB_INM(x, mask) \ 2602*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_BASE_MSB_ADDR(x), mask) 2603*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_BASE_MSB_OUT(x, val) \ 2604*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_BASE_MSB_ADDR(x), val) 2605*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \ 2606*5113495bSYour Name do {\ 2607*5113495bSYour Name HWIO_INTLOCK(); \ 2608*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_BASE_MSB_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_BASE_MSB_IN(x)); \ 2609*5113495bSYour Name HWIO_INTFREE();\ 2610*5113495bSYour Name } while (0) 2611*5113495bSYour Name 2612*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_BASE_MSB_MSI1_ENABLE_BMSK 0x00000100 2613*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_BASE_MSB_MSI1_ENABLE_SHFT 0x8 2614*5113495bSYour Name 2615*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_BASE_MSB_ADDR_BMSK 0x000000ff 2616*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_BASE_MSB_ADDR_SHFT 0x0 2617*5113495bSYour Name 2618*5113495bSYour Name //// Register TCL_R0_SW2TCL_CREDIT_RING_MSI1_DATA //// 2619*5113495bSYour Name 2620*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_DATA_ADDR(x) (x+0x00000648) 2621*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_DATA_PHYS(x) (x+0x00000648) 2622*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_DATA_RMSK 0xffffffff 2623*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_DATA_SHFT 0 2624*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_DATA_IN(x) \ 2625*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_DATA_ADDR(x), HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_DATA_RMSK) 2626*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_DATA_INM(x, mask) \ 2627*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_DATA_ADDR(x), mask) 2628*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_DATA_OUT(x, val) \ 2629*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_DATA_ADDR(x), val) 2630*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_DATA_OUTM(x, mask, val) \ 2631*5113495bSYour Name do {\ 2632*5113495bSYour Name HWIO_INTLOCK(); \ 2633*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_DATA_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_DATA_IN(x)); \ 2634*5113495bSYour Name HWIO_INTFREE();\ 2635*5113495bSYour Name } while (0) 2636*5113495bSYour Name 2637*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_DATA_VALUE_BMSK 0xffffffff 2638*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_MSI1_DATA_VALUE_SHFT 0x0 2639*5113495bSYour Name 2640*5113495bSYour Name //// Register TCL_R0_SW2TCL_CREDIT_RING_HP_TP_SW_OFFSET //// 2641*5113495bSYour Name 2642*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_HP_TP_SW_OFFSET_ADDR(x) (x+0x0000064c) 2643*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_HP_TP_SW_OFFSET_PHYS(x) (x+0x0000064c) 2644*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_HP_TP_SW_OFFSET_RMSK 0x0000ffff 2645*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_HP_TP_SW_OFFSET_SHFT 0 2646*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_HP_TP_SW_OFFSET_IN(x) \ 2647*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CREDIT_RING_HP_TP_SW_OFFSET_ADDR(x), HWIO_TCL_R0_SW2TCL_CREDIT_RING_HP_TP_SW_OFFSET_RMSK) 2648*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_HP_TP_SW_OFFSET_INM(x, mask) \ 2649*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_SW2TCL_CREDIT_RING_HP_TP_SW_OFFSET_ADDR(x), mask) 2650*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_HP_TP_SW_OFFSET_OUT(x, val) \ 2651*5113495bSYour Name out_dword( HWIO_TCL_R0_SW2TCL_CREDIT_RING_HP_TP_SW_OFFSET_ADDR(x), val) 2652*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ 2653*5113495bSYour Name do {\ 2654*5113495bSYour Name HWIO_INTLOCK(); \ 2655*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_SW2TCL_CREDIT_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL_CREDIT_RING_HP_TP_SW_OFFSET_IN(x)); \ 2656*5113495bSYour Name HWIO_INTFREE();\ 2657*5113495bSYour Name } while (0) 2658*5113495bSYour Name 2659*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_HP_TP_SW_OFFSET_HP_TP_OFFSET_VALUE_BMSK 0x0000ffff 2660*5113495bSYour Name #define HWIO_TCL_R0_SW2TCL_CREDIT_RING_HP_TP_SW_OFFSET_HP_TP_OFFSET_VALUE_SHFT 0x0 2661*5113495bSYour Name 2662*5113495bSYour Name //// Register TCL_R0_FW2TCL1_RING_BASE_LSB //// 2663*5113495bSYour Name 2664*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_BASE_LSB_ADDR(x) (x+0x00000650) 2665*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_BASE_LSB_PHYS(x) (x+0x00000650) 2666*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_BASE_LSB_RMSK 0xffffffff 2667*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_BASE_LSB_SHFT 0 2668*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_BASE_LSB_IN(x) \ 2669*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_BASE_LSB_ADDR(x), HWIO_TCL_R0_FW2TCL1_RING_BASE_LSB_RMSK) 2670*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_BASE_LSB_INM(x, mask) \ 2671*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_BASE_LSB_ADDR(x), mask) 2672*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_BASE_LSB_OUT(x, val) \ 2673*5113495bSYour Name out_dword( HWIO_TCL_R0_FW2TCL1_RING_BASE_LSB_ADDR(x), val) 2674*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_BASE_LSB_OUTM(x, mask, val) \ 2675*5113495bSYour Name do {\ 2676*5113495bSYour Name HWIO_INTLOCK(); \ 2677*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_FW2TCL1_RING_BASE_LSB_ADDR(x), mask, val, HWIO_TCL_R0_FW2TCL1_RING_BASE_LSB_IN(x)); \ 2678*5113495bSYour Name HWIO_INTFREE();\ 2679*5113495bSYour Name } while (0) 2680*5113495bSYour Name 2681*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_BASE_LSB_RING_BASE_ADDR_LSB_BMSK 0xffffffff 2682*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_BASE_LSB_RING_BASE_ADDR_LSB_SHFT 0x0 2683*5113495bSYour Name 2684*5113495bSYour Name //// Register TCL_R0_FW2TCL1_RING_BASE_MSB //// 2685*5113495bSYour Name 2686*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_BASE_MSB_ADDR(x) (x+0x00000654) 2687*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_BASE_MSB_PHYS(x) (x+0x00000654) 2688*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_BASE_MSB_RMSK 0x00ffffff 2689*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_BASE_MSB_SHFT 0 2690*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_BASE_MSB_IN(x) \ 2691*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_BASE_MSB_ADDR(x), HWIO_TCL_R0_FW2TCL1_RING_BASE_MSB_RMSK) 2692*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_BASE_MSB_INM(x, mask) \ 2693*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_BASE_MSB_ADDR(x), mask) 2694*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_BASE_MSB_OUT(x, val) \ 2695*5113495bSYour Name out_dword( HWIO_TCL_R0_FW2TCL1_RING_BASE_MSB_ADDR(x), val) 2696*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_BASE_MSB_OUTM(x, mask, val) \ 2697*5113495bSYour Name do {\ 2698*5113495bSYour Name HWIO_INTLOCK(); \ 2699*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_FW2TCL1_RING_BASE_MSB_ADDR(x), mask, val, HWIO_TCL_R0_FW2TCL1_RING_BASE_MSB_IN(x)); \ 2700*5113495bSYour Name HWIO_INTFREE();\ 2701*5113495bSYour Name } while (0) 2702*5113495bSYour Name 2703*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_BASE_MSB_RING_SIZE_BMSK 0x00ffff00 2704*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_BASE_MSB_RING_SIZE_SHFT 0x8 2705*5113495bSYour Name 2706*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_BASE_MSB_RING_BASE_ADDR_MSB_BMSK 0x000000ff 2707*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_BASE_MSB_RING_BASE_ADDR_MSB_SHFT 0x0 2708*5113495bSYour Name 2709*5113495bSYour Name //// Register TCL_R0_FW2TCL1_RING_ID //// 2710*5113495bSYour Name 2711*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_ID_ADDR(x) (x+0x00000658) 2712*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_ID_PHYS(x) (x+0x00000658) 2713*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_ID_RMSK 0x000000ff 2714*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_ID_SHFT 0 2715*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_ID_IN(x) \ 2716*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_ID_ADDR(x), HWIO_TCL_R0_FW2TCL1_RING_ID_RMSK) 2717*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_ID_INM(x, mask) \ 2718*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_ID_ADDR(x), mask) 2719*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_ID_OUT(x, val) \ 2720*5113495bSYour Name out_dword( HWIO_TCL_R0_FW2TCL1_RING_ID_ADDR(x), val) 2721*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_ID_OUTM(x, mask, val) \ 2722*5113495bSYour Name do {\ 2723*5113495bSYour Name HWIO_INTLOCK(); \ 2724*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_FW2TCL1_RING_ID_ADDR(x), mask, val, HWIO_TCL_R0_FW2TCL1_RING_ID_IN(x)); \ 2725*5113495bSYour Name HWIO_INTFREE();\ 2726*5113495bSYour Name } while (0) 2727*5113495bSYour Name 2728*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_ID_ENTRY_SIZE_BMSK 0x000000ff 2729*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_ID_ENTRY_SIZE_SHFT 0x0 2730*5113495bSYour Name 2731*5113495bSYour Name //// Register TCL_R0_FW2TCL1_RING_STATUS //// 2732*5113495bSYour Name 2733*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_STATUS_ADDR(x) (x+0x0000065c) 2734*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_STATUS_PHYS(x) (x+0x0000065c) 2735*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_STATUS_RMSK 0xffffffff 2736*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_STATUS_SHFT 0 2737*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_STATUS_IN(x) \ 2738*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_STATUS_ADDR(x), HWIO_TCL_R0_FW2TCL1_RING_STATUS_RMSK) 2739*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_STATUS_INM(x, mask) \ 2740*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_STATUS_ADDR(x), mask) 2741*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_STATUS_OUT(x, val) \ 2742*5113495bSYour Name out_dword( HWIO_TCL_R0_FW2TCL1_RING_STATUS_ADDR(x), val) 2743*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_STATUS_OUTM(x, mask, val) \ 2744*5113495bSYour Name do {\ 2745*5113495bSYour Name HWIO_INTLOCK(); \ 2746*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_FW2TCL1_RING_STATUS_ADDR(x), mask, val, HWIO_TCL_R0_FW2TCL1_RING_STATUS_IN(x)); \ 2747*5113495bSYour Name HWIO_INTFREE();\ 2748*5113495bSYour Name } while (0) 2749*5113495bSYour Name 2750*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_STATUS_NUM_AVAIL_WORDS_BMSK 0xffff0000 2751*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_STATUS_NUM_AVAIL_WORDS_SHFT 0x10 2752*5113495bSYour Name 2753*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_STATUS_NUM_VALID_WORDS_BMSK 0x0000ffff 2754*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_STATUS_NUM_VALID_WORDS_SHFT 0x0 2755*5113495bSYour Name 2756*5113495bSYour Name //// Register TCL_R0_FW2TCL1_RING_MISC //// 2757*5113495bSYour Name 2758*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_ADDR(x) (x+0x00000660) 2759*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_PHYS(x) (x+0x00000660) 2760*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_RMSK 0x003fffff 2761*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_SHFT 0 2762*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_IN(x) \ 2763*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_MISC_ADDR(x), HWIO_TCL_R0_FW2TCL1_RING_MISC_RMSK) 2764*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_INM(x, mask) \ 2765*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_MISC_ADDR(x), mask) 2766*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_OUT(x, val) \ 2767*5113495bSYour Name out_dword( HWIO_TCL_R0_FW2TCL1_RING_MISC_ADDR(x), val) 2768*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_OUTM(x, mask, val) \ 2769*5113495bSYour Name do {\ 2770*5113495bSYour Name HWIO_INTLOCK(); \ 2771*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_FW2TCL1_RING_MISC_ADDR(x), mask, val, HWIO_TCL_R0_FW2TCL1_RING_MISC_IN(x)); \ 2772*5113495bSYour Name HWIO_INTFREE();\ 2773*5113495bSYour Name } while (0) 2774*5113495bSYour Name 2775*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_SPARE_CONTROL_BMSK 0x003fc000 2776*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_SPARE_CONTROL_SHFT 0xe 2777*5113495bSYour Name 2778*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_SRNG_SM_STATE2_BMSK 0x00003000 2779*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_SRNG_SM_STATE2_SHFT 0xc 2780*5113495bSYour Name 2781*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_SRNG_SM_STATE1_BMSK 0x00000f00 2782*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_SRNG_SM_STATE1_SHFT 0x8 2783*5113495bSYour Name 2784*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_SRNG_IS_IDLE_BMSK 0x00000080 2785*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_SRNG_IS_IDLE_SHFT 0x7 2786*5113495bSYour Name 2787*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_SRNG_ENABLE_BMSK 0x00000040 2788*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_SRNG_ENABLE_SHFT 0x6 2789*5113495bSYour Name 2790*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_DATA_TLV_SWAP_BIT_BMSK 0x00000020 2791*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_DATA_TLV_SWAP_BIT_SHFT 0x5 2792*5113495bSYour Name 2793*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_HOST_FW_SWAP_BIT_BMSK 0x00000010 2794*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_HOST_FW_SWAP_BIT_SHFT 0x4 2795*5113495bSYour Name 2796*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_MSI_SWAP_BIT_BMSK 0x00000008 2797*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_MSI_SWAP_BIT_SHFT 0x3 2798*5113495bSYour Name 2799*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_SECURITY_BIT_BMSK 0x00000004 2800*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_SECURITY_BIT_SHFT 0x2 2801*5113495bSYour Name 2802*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_LOOPCNT_DISABLE_BMSK 0x00000002 2803*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_LOOPCNT_DISABLE_SHFT 0x1 2804*5113495bSYour Name 2805*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_RING_ID_DISABLE_BMSK 0x00000001 2806*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MISC_RING_ID_DISABLE_SHFT 0x0 2807*5113495bSYour Name 2808*5113495bSYour Name //// Register TCL_R0_FW2TCL1_RING_TP_ADDR_LSB //// 2809*5113495bSYour Name 2810*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_LSB_ADDR(x) (x+0x0000066c) 2811*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_LSB_PHYS(x) (x+0x0000066c) 2812*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_LSB_RMSK 0xffffffff 2813*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_LSB_SHFT 0 2814*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_LSB_IN(x) \ 2815*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_LSB_ADDR(x), HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_LSB_RMSK) 2816*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_LSB_INM(x, mask) \ 2817*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_LSB_ADDR(x), mask) 2818*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_LSB_OUT(x, val) \ 2819*5113495bSYour Name out_dword( HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_LSB_ADDR(x), val) 2820*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_LSB_OUTM(x, mask, val) \ 2821*5113495bSYour Name do {\ 2822*5113495bSYour Name HWIO_INTLOCK(); \ 2823*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_LSB_ADDR(x), mask, val, HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_LSB_IN(x)); \ 2824*5113495bSYour Name HWIO_INTFREE();\ 2825*5113495bSYour Name } while (0) 2826*5113495bSYour Name 2827*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_LSB_TAIL_PTR_MEMADDR_LSB_BMSK 0xffffffff 2828*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_LSB_TAIL_PTR_MEMADDR_LSB_SHFT 0x0 2829*5113495bSYour Name 2830*5113495bSYour Name //// Register TCL_R0_FW2TCL1_RING_TP_ADDR_MSB //// 2831*5113495bSYour Name 2832*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_MSB_ADDR(x) (x+0x00000670) 2833*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_MSB_PHYS(x) (x+0x00000670) 2834*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_MSB_RMSK 0x000000ff 2835*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_MSB_SHFT 0 2836*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_MSB_IN(x) \ 2837*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_MSB_ADDR(x), HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_MSB_RMSK) 2838*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_MSB_INM(x, mask) \ 2839*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_MSB_ADDR(x), mask) 2840*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_MSB_OUT(x, val) \ 2841*5113495bSYour Name out_dword( HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_MSB_ADDR(x), val) 2842*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_MSB_OUTM(x, mask, val) \ 2843*5113495bSYour Name do {\ 2844*5113495bSYour Name HWIO_INTLOCK(); \ 2845*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_MSB_ADDR(x), mask, val, HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_MSB_IN(x)); \ 2846*5113495bSYour Name HWIO_INTFREE();\ 2847*5113495bSYour Name } while (0) 2848*5113495bSYour Name 2849*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_MSB_TAIL_PTR_MEMADDR_MSB_BMSK 0x000000ff 2850*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_TP_ADDR_MSB_TAIL_PTR_MEMADDR_MSB_SHFT 0x0 2851*5113495bSYour Name 2852*5113495bSYour Name //// Register TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX0 //// 2853*5113495bSYour Name 2854*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX0_ADDR(x) (x+0x00000680) 2855*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX0_PHYS(x) (x+0x00000680) 2856*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX0_RMSK 0xffffffff 2857*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX0_SHFT 0 2858*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX0_IN(x) \ 2859*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX0_RMSK) 2860*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX0_INM(x, mask) \ 2861*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), mask) 2862*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX0_OUT(x, val) \ 2863*5113495bSYour Name out_dword( HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), val) 2864*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX0_OUTM(x, mask, val) \ 2865*5113495bSYour Name do {\ 2866*5113495bSYour Name HWIO_INTLOCK(); \ 2867*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), mask, val, HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX0_IN(x)); \ 2868*5113495bSYour Name HWIO_INTFREE();\ 2869*5113495bSYour Name } while (0) 2870*5113495bSYour Name 2871*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX0_INTERRUPT_TIMER_THRESHOLD_BMSK 0xffff0000 2872*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX0_INTERRUPT_TIMER_THRESHOLD_SHFT 0x10 2873*5113495bSYour Name 2874*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX0_SW_INTERRUPT_MODE_BMSK 0x00008000 2875*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX0_SW_INTERRUPT_MODE_SHFT 0xf 2876*5113495bSYour Name 2877*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX0_BATCH_COUNTER_THRESHOLD_BMSK 0x00007fff 2878*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX0_BATCH_COUNTER_THRESHOLD_SHFT 0x0 2879*5113495bSYour Name 2880*5113495bSYour Name //// Register TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX1 //// 2881*5113495bSYour Name 2882*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX1_ADDR(x) (x+0x00000684) 2883*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX1_PHYS(x) (x+0x00000684) 2884*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX1_RMSK 0x0000ffff 2885*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX1_SHFT 0 2886*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX1_IN(x) \ 2887*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX1_RMSK) 2888*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX1_INM(x, mask) \ 2889*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), mask) 2890*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX1_OUT(x, val) \ 2891*5113495bSYour Name out_dword( HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), val) 2892*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX1_OUTM(x, mask, val) \ 2893*5113495bSYour Name do {\ 2894*5113495bSYour Name HWIO_INTLOCK(); \ 2895*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), mask, val, HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX1_IN(x)); \ 2896*5113495bSYour Name HWIO_INTFREE();\ 2897*5113495bSYour Name } while (0) 2898*5113495bSYour Name 2899*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX1_LOW_THRESHOLD_BMSK 0x0000ffff 2900*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_SETUP_IX1_LOW_THRESHOLD_SHFT 0x0 2901*5113495bSYour Name 2902*5113495bSYour Name //// Register TCL_R0_FW2TCL1_RING_CONSUMER_INT_STATUS //// 2903*5113495bSYour Name 2904*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_STATUS_ADDR(x) (x+0x00000688) 2905*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_STATUS_PHYS(x) (x+0x00000688) 2906*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_STATUS_RMSK 0xffffffff 2907*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_STATUS_SHFT 0 2908*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_STATUS_IN(x) \ 2909*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_STATUS_ADDR(x), HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_STATUS_RMSK) 2910*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_STATUS_INM(x, mask) \ 2911*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_STATUS_ADDR(x), mask) 2912*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_STATUS_OUT(x, val) \ 2913*5113495bSYour Name out_dword( HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_STATUS_ADDR(x), val) 2914*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_STATUS_OUTM(x, mask, val) \ 2915*5113495bSYour Name do {\ 2916*5113495bSYour Name HWIO_INTLOCK(); \ 2917*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_STATUS_ADDR(x), mask, val, HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_STATUS_IN(x)); \ 2918*5113495bSYour Name HWIO_INTFREE();\ 2919*5113495bSYour Name } while (0) 2920*5113495bSYour Name 2921*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_STATUS_CURRENT_INTERRUPT_TIMER_VALUE_BMSK 0xffff0000 2922*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_STATUS_CURRENT_INTERRUPT_TIMER_VALUE_SHFT 0x10 2923*5113495bSYour Name 2924*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_STATUS_CURRENT_INT_WIRE_VALUE_BMSK 0x00008000 2925*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_STATUS_CURRENT_INT_WIRE_VALUE_SHFT 0xf 2926*5113495bSYour Name 2927*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_STATUS_INTERNAL_BATCH_COUNTER_VALUE_BMSK 0x00007fff 2928*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_INT_STATUS_INTERNAL_BATCH_COUNTER_VALUE_SHFT 0x0 2929*5113495bSYour Name 2930*5113495bSYour Name //// Register TCL_R0_FW2TCL1_RING_CONSUMER_EMPTY_COUNTER //// 2931*5113495bSYour Name 2932*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_EMPTY_COUNTER_ADDR(x) (x+0x0000068c) 2933*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_EMPTY_COUNTER_PHYS(x) (x+0x0000068c) 2934*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_EMPTY_COUNTER_RMSK 0x000003ff 2935*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_EMPTY_COUNTER_SHFT 0 2936*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_EMPTY_COUNTER_IN(x) \ 2937*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_EMPTY_COUNTER_RMSK) 2938*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_EMPTY_COUNTER_INM(x, mask) \ 2939*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), mask) 2940*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_EMPTY_COUNTER_OUT(x, val) \ 2941*5113495bSYour Name out_dword( HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), val) 2942*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_EMPTY_COUNTER_OUTM(x, mask, val) \ 2943*5113495bSYour Name do {\ 2944*5113495bSYour Name HWIO_INTLOCK(); \ 2945*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), mask, val, HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_EMPTY_COUNTER_IN(x)); \ 2946*5113495bSYour Name HWIO_INTFREE();\ 2947*5113495bSYour Name } while (0) 2948*5113495bSYour Name 2949*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_EMPTY_COUNTER_RING_EMPTY_COUNTER_BMSK 0x000003ff 2950*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_EMPTY_COUNTER_RING_EMPTY_COUNTER_SHFT 0x0 2951*5113495bSYour Name 2952*5113495bSYour Name //// Register TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_TIMER //// 2953*5113495bSYour Name 2954*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_TIMER_ADDR(x) (x+0x00000690) 2955*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_TIMER_PHYS(x) (x+0x00000690) 2956*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_TIMER_RMSK 0x00000007 2957*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_TIMER_SHFT 0 2958*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_TIMER_IN(x) \ 2959*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_TIMER_RMSK) 2960*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_TIMER_INM(x, mask) \ 2961*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), mask) 2962*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_TIMER_OUT(x, val) \ 2963*5113495bSYour Name out_dword( HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), val) 2964*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_TIMER_OUTM(x, mask, val) \ 2965*5113495bSYour Name do {\ 2966*5113495bSYour Name HWIO_INTLOCK(); \ 2967*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), mask, val, HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_TIMER_IN(x)); \ 2968*5113495bSYour Name HWIO_INTFREE();\ 2969*5113495bSYour Name } while (0) 2970*5113495bSYour Name 2971*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_TIMER_MODE_BMSK 0x00000007 2972*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_TIMER_MODE_SHFT 0x0 2973*5113495bSYour Name 2974*5113495bSYour Name //// Register TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_STATUS //// 2975*5113495bSYour Name 2976*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_STATUS_ADDR(x) (x+0x00000694) 2977*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_STATUS_PHYS(x) (x+0x00000694) 2978*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_STATUS_RMSK 0x00ffffff 2979*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_STATUS_SHFT 0 2980*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_STATUS_IN(x) \ 2981*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_STATUS_RMSK) 2982*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_STATUS_INM(x, mask) \ 2983*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), mask) 2984*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_STATUS_OUT(x, val) \ 2985*5113495bSYour Name out_dword( HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), val) 2986*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_STATUS_OUTM(x, mask, val) \ 2987*5113495bSYour Name do {\ 2988*5113495bSYour Name HWIO_INTLOCK(); \ 2989*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), mask, val, HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_STATUS_IN(x)); \ 2990*5113495bSYour Name HWIO_INTFREE();\ 2991*5113495bSYour Name } while (0) 2992*5113495bSYour Name 2993*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_STATUS_PREFETCH_COUNT_BMSK 0x00ff0000 2994*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_STATUS_PREFETCH_COUNT_SHFT 0x10 2995*5113495bSYour Name 2996*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_STATUS_INTERNAL_TAIL_PTR_BMSK 0x0000ffff 2997*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_CONSUMER_PREFETCH_STATUS_INTERNAL_TAIL_PTR_SHFT 0x0 2998*5113495bSYour Name 2999*5113495bSYour Name //// Register TCL_R0_FW2TCL1_RING_MSI1_BASE_LSB //// 3000*5113495bSYour Name 3001*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_LSB_ADDR(x) (x+0x00000698) 3002*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_LSB_PHYS(x) (x+0x00000698) 3003*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_LSB_RMSK 0xffffffff 3004*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_LSB_SHFT 0 3005*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_LSB_IN(x) \ 3006*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_LSB_ADDR(x), HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_LSB_RMSK) 3007*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_LSB_INM(x, mask) \ 3008*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_LSB_ADDR(x), mask) 3009*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_LSB_OUT(x, val) \ 3010*5113495bSYour Name out_dword( HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_LSB_ADDR(x), val) 3011*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \ 3012*5113495bSYour Name do {\ 3013*5113495bSYour Name HWIO_INTLOCK(); \ 3014*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_LSB_ADDR(x), mask, val, HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_LSB_IN(x)); \ 3015*5113495bSYour Name HWIO_INTFREE();\ 3016*5113495bSYour Name } while (0) 3017*5113495bSYour Name 3018*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_LSB_ADDR_BMSK 0xffffffff 3019*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_LSB_ADDR_SHFT 0x0 3020*5113495bSYour Name 3021*5113495bSYour Name //// Register TCL_R0_FW2TCL1_RING_MSI1_BASE_MSB //// 3022*5113495bSYour Name 3023*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_MSB_ADDR(x) (x+0x0000069c) 3024*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_MSB_PHYS(x) (x+0x0000069c) 3025*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_MSB_RMSK 0x000001ff 3026*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_MSB_SHFT 0 3027*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_MSB_IN(x) \ 3028*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_MSB_ADDR(x), HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_MSB_RMSK) 3029*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_MSB_INM(x, mask) \ 3030*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_MSB_ADDR(x), mask) 3031*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_MSB_OUT(x, val) \ 3032*5113495bSYour Name out_dword( HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_MSB_ADDR(x), val) 3033*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \ 3034*5113495bSYour Name do {\ 3035*5113495bSYour Name HWIO_INTLOCK(); \ 3036*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_MSB_ADDR(x), mask, val, HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_MSB_IN(x)); \ 3037*5113495bSYour Name HWIO_INTFREE();\ 3038*5113495bSYour Name } while (0) 3039*5113495bSYour Name 3040*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_MSB_MSI1_ENABLE_BMSK 0x00000100 3041*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_MSB_MSI1_ENABLE_SHFT 0x8 3042*5113495bSYour Name 3043*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_MSB_ADDR_BMSK 0x000000ff 3044*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_BASE_MSB_ADDR_SHFT 0x0 3045*5113495bSYour Name 3046*5113495bSYour Name //// Register TCL_R0_FW2TCL1_RING_MSI1_DATA //// 3047*5113495bSYour Name 3048*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_DATA_ADDR(x) (x+0x000006a0) 3049*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_DATA_PHYS(x) (x+0x000006a0) 3050*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_DATA_RMSK 0xffffffff 3051*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_DATA_SHFT 0 3052*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_DATA_IN(x) \ 3053*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_MSI1_DATA_ADDR(x), HWIO_TCL_R0_FW2TCL1_RING_MSI1_DATA_RMSK) 3054*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_DATA_INM(x, mask) \ 3055*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_MSI1_DATA_ADDR(x), mask) 3056*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_DATA_OUT(x, val) \ 3057*5113495bSYour Name out_dword( HWIO_TCL_R0_FW2TCL1_RING_MSI1_DATA_ADDR(x), val) 3058*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_DATA_OUTM(x, mask, val) \ 3059*5113495bSYour Name do {\ 3060*5113495bSYour Name HWIO_INTLOCK(); \ 3061*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_FW2TCL1_RING_MSI1_DATA_ADDR(x), mask, val, HWIO_TCL_R0_FW2TCL1_RING_MSI1_DATA_IN(x)); \ 3062*5113495bSYour Name HWIO_INTFREE();\ 3063*5113495bSYour Name } while (0) 3064*5113495bSYour Name 3065*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_DATA_VALUE_BMSK 0xffffffff 3066*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_MSI1_DATA_VALUE_SHFT 0x0 3067*5113495bSYour Name 3068*5113495bSYour Name //// Register TCL_R0_FW2TCL1_RING_HP_TP_SW_OFFSET //// 3069*5113495bSYour Name 3070*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_HP_TP_SW_OFFSET_ADDR(x) (x+0x000006a4) 3071*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_HP_TP_SW_OFFSET_PHYS(x) (x+0x000006a4) 3072*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_HP_TP_SW_OFFSET_RMSK 0x0000ffff 3073*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_HP_TP_SW_OFFSET_SHFT 0 3074*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_HP_TP_SW_OFFSET_IN(x) \ 3075*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_HP_TP_SW_OFFSET_ADDR(x), HWIO_TCL_R0_FW2TCL1_RING_HP_TP_SW_OFFSET_RMSK) 3076*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_HP_TP_SW_OFFSET_INM(x, mask) \ 3077*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_FW2TCL1_RING_HP_TP_SW_OFFSET_ADDR(x), mask) 3078*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_HP_TP_SW_OFFSET_OUT(x, val) \ 3079*5113495bSYour Name out_dword( HWIO_TCL_R0_FW2TCL1_RING_HP_TP_SW_OFFSET_ADDR(x), val) 3080*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ 3081*5113495bSYour Name do {\ 3082*5113495bSYour Name HWIO_INTLOCK(); \ 3083*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_FW2TCL1_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_TCL_R0_FW2TCL1_RING_HP_TP_SW_OFFSET_IN(x)); \ 3084*5113495bSYour Name HWIO_INTFREE();\ 3085*5113495bSYour Name } while (0) 3086*5113495bSYour Name 3087*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_HP_TP_SW_OFFSET_HP_TP_OFFSET_VALUE_BMSK 0x0000ffff 3088*5113495bSYour Name #define HWIO_TCL_R0_FW2TCL1_RING_HP_TP_SW_OFFSET_HP_TP_OFFSET_VALUE_SHFT 0x0 3089*5113495bSYour Name 3090*5113495bSYour Name //// Register TCL_R0_TCL2TQM_RING_BASE_LSB //// 3091*5113495bSYour Name 3092*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_BASE_LSB_ADDR(x) (x+0x000006a8) 3093*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_BASE_LSB_PHYS(x) (x+0x000006a8) 3094*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_BASE_LSB_RMSK 0xffffffff 3095*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_BASE_LSB_SHFT 0 3096*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_BASE_LSB_IN(x) \ 3097*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2TQM_RING_BASE_LSB_ADDR(x), HWIO_TCL_R0_TCL2TQM_RING_BASE_LSB_RMSK) 3098*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_BASE_LSB_INM(x, mask) \ 3099*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2TQM_RING_BASE_LSB_ADDR(x), mask) 3100*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_BASE_LSB_OUT(x, val) \ 3101*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL2TQM_RING_BASE_LSB_ADDR(x), val) 3102*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_BASE_LSB_OUTM(x, mask, val) \ 3103*5113495bSYour Name do {\ 3104*5113495bSYour Name HWIO_INTLOCK(); \ 3105*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL2TQM_RING_BASE_LSB_ADDR(x), mask, val, HWIO_TCL_R0_TCL2TQM_RING_BASE_LSB_IN(x)); \ 3106*5113495bSYour Name HWIO_INTFREE();\ 3107*5113495bSYour Name } while (0) 3108*5113495bSYour Name 3109*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_BASE_LSB_RING_BASE_ADDR_LSB_BMSK 0xffffffff 3110*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_BASE_LSB_RING_BASE_ADDR_LSB_SHFT 0x0 3111*5113495bSYour Name 3112*5113495bSYour Name //// Register TCL_R0_TCL2TQM_RING_BASE_MSB //// 3113*5113495bSYour Name 3114*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_BASE_MSB_ADDR(x) (x+0x000006ac) 3115*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_BASE_MSB_PHYS(x) (x+0x000006ac) 3116*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_BASE_MSB_RMSK 0x00ffffff 3117*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_BASE_MSB_SHFT 0 3118*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_BASE_MSB_IN(x) \ 3119*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2TQM_RING_BASE_MSB_ADDR(x), HWIO_TCL_R0_TCL2TQM_RING_BASE_MSB_RMSK) 3120*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_BASE_MSB_INM(x, mask) \ 3121*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2TQM_RING_BASE_MSB_ADDR(x), mask) 3122*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_BASE_MSB_OUT(x, val) \ 3123*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL2TQM_RING_BASE_MSB_ADDR(x), val) 3124*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_BASE_MSB_OUTM(x, mask, val) \ 3125*5113495bSYour Name do {\ 3126*5113495bSYour Name HWIO_INTLOCK(); \ 3127*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL2TQM_RING_BASE_MSB_ADDR(x), mask, val, HWIO_TCL_R0_TCL2TQM_RING_BASE_MSB_IN(x)); \ 3128*5113495bSYour Name HWIO_INTFREE();\ 3129*5113495bSYour Name } while (0) 3130*5113495bSYour Name 3131*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_BASE_MSB_RING_SIZE_BMSK 0x00ffff00 3132*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_BASE_MSB_RING_SIZE_SHFT 0x8 3133*5113495bSYour Name 3134*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_BASE_MSB_RING_BASE_ADDR_MSB_BMSK 0x000000ff 3135*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_BASE_MSB_RING_BASE_ADDR_MSB_SHFT 0x0 3136*5113495bSYour Name 3137*5113495bSYour Name //// Register TCL_R0_TCL2TQM_RING_ID //// 3138*5113495bSYour Name 3139*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_ID_ADDR(x) (x+0x000006b0) 3140*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_ID_PHYS(x) (x+0x000006b0) 3141*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_ID_RMSK 0x0000ffff 3142*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_ID_SHFT 0 3143*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_ID_IN(x) \ 3144*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2TQM_RING_ID_ADDR(x), HWIO_TCL_R0_TCL2TQM_RING_ID_RMSK) 3145*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_ID_INM(x, mask) \ 3146*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2TQM_RING_ID_ADDR(x), mask) 3147*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_ID_OUT(x, val) \ 3148*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL2TQM_RING_ID_ADDR(x), val) 3149*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_ID_OUTM(x, mask, val) \ 3150*5113495bSYour Name do {\ 3151*5113495bSYour Name HWIO_INTLOCK(); \ 3152*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL2TQM_RING_ID_ADDR(x), mask, val, HWIO_TCL_R0_TCL2TQM_RING_ID_IN(x)); \ 3153*5113495bSYour Name HWIO_INTFREE();\ 3154*5113495bSYour Name } while (0) 3155*5113495bSYour Name 3156*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_ID_RING_ID_BMSK 0x0000ff00 3157*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_ID_RING_ID_SHFT 0x8 3158*5113495bSYour Name 3159*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_ID_ENTRY_SIZE_BMSK 0x000000ff 3160*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_ID_ENTRY_SIZE_SHFT 0x0 3161*5113495bSYour Name 3162*5113495bSYour Name //// Register TCL_R0_TCL2TQM_RING_STATUS //// 3163*5113495bSYour Name 3164*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_STATUS_ADDR(x) (x+0x000006b4) 3165*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_STATUS_PHYS(x) (x+0x000006b4) 3166*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_STATUS_RMSK 0xffffffff 3167*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_STATUS_SHFT 0 3168*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_STATUS_IN(x) \ 3169*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2TQM_RING_STATUS_ADDR(x), HWIO_TCL_R0_TCL2TQM_RING_STATUS_RMSK) 3170*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_STATUS_INM(x, mask) \ 3171*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2TQM_RING_STATUS_ADDR(x), mask) 3172*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_STATUS_OUT(x, val) \ 3173*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL2TQM_RING_STATUS_ADDR(x), val) 3174*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_STATUS_OUTM(x, mask, val) \ 3175*5113495bSYour Name do {\ 3176*5113495bSYour Name HWIO_INTLOCK(); \ 3177*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL2TQM_RING_STATUS_ADDR(x), mask, val, HWIO_TCL_R0_TCL2TQM_RING_STATUS_IN(x)); \ 3178*5113495bSYour Name HWIO_INTFREE();\ 3179*5113495bSYour Name } while (0) 3180*5113495bSYour Name 3181*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_STATUS_NUM_AVAIL_WORDS_BMSK 0xffff0000 3182*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_STATUS_NUM_AVAIL_WORDS_SHFT 0x10 3183*5113495bSYour Name 3184*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_STATUS_NUM_VALID_WORDS_BMSK 0x0000ffff 3185*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_STATUS_NUM_VALID_WORDS_SHFT 0x0 3186*5113495bSYour Name 3187*5113495bSYour Name //// Register TCL_R0_TCL2TQM_RING_MISC //// 3188*5113495bSYour Name 3189*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_ADDR(x) (x+0x000006b8) 3190*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_PHYS(x) (x+0x000006b8) 3191*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_RMSK 0x03ffffff 3192*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_SHFT 0 3193*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_IN(x) \ 3194*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2TQM_RING_MISC_ADDR(x), HWIO_TCL_R0_TCL2TQM_RING_MISC_RMSK) 3195*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_INM(x, mask) \ 3196*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2TQM_RING_MISC_ADDR(x), mask) 3197*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_OUT(x, val) \ 3198*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL2TQM_RING_MISC_ADDR(x), val) 3199*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_OUTM(x, mask, val) \ 3200*5113495bSYour Name do {\ 3201*5113495bSYour Name HWIO_INTLOCK(); \ 3202*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL2TQM_RING_MISC_ADDR(x), mask, val, HWIO_TCL_R0_TCL2TQM_RING_MISC_IN(x)); \ 3203*5113495bSYour Name HWIO_INTFREE();\ 3204*5113495bSYour Name } while (0) 3205*5113495bSYour Name 3206*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_LOOP_CNT_BMSK 0x03c00000 3207*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_LOOP_CNT_SHFT 0x16 3208*5113495bSYour Name 3209*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_SPARE_CONTROL_BMSK 0x003fc000 3210*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_SPARE_CONTROL_SHFT 0xe 3211*5113495bSYour Name 3212*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_SRNG_SM_STATE2_BMSK 0x00003000 3213*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_SRNG_SM_STATE2_SHFT 0xc 3214*5113495bSYour Name 3215*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_SRNG_SM_STATE1_BMSK 0x00000f00 3216*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_SRNG_SM_STATE1_SHFT 0x8 3217*5113495bSYour Name 3218*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_SRNG_IS_IDLE_BMSK 0x00000080 3219*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_SRNG_IS_IDLE_SHFT 0x7 3220*5113495bSYour Name 3221*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_SRNG_ENABLE_BMSK 0x00000040 3222*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_SRNG_ENABLE_SHFT 0x6 3223*5113495bSYour Name 3224*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_DATA_TLV_SWAP_BIT_BMSK 0x00000020 3225*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_DATA_TLV_SWAP_BIT_SHFT 0x5 3226*5113495bSYour Name 3227*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_HOST_FW_SWAP_BIT_BMSK 0x00000010 3228*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_HOST_FW_SWAP_BIT_SHFT 0x4 3229*5113495bSYour Name 3230*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_MSI_SWAP_BIT_BMSK 0x00000008 3231*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_MSI_SWAP_BIT_SHFT 0x3 3232*5113495bSYour Name 3233*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_SECURITY_BIT_BMSK 0x00000004 3234*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_SECURITY_BIT_SHFT 0x2 3235*5113495bSYour Name 3236*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_LOOPCNT_DISABLE_BMSK 0x00000002 3237*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_LOOPCNT_DISABLE_SHFT 0x1 3238*5113495bSYour Name 3239*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_RING_ID_DISABLE_BMSK 0x00000001 3240*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_MISC_RING_ID_DISABLE_SHFT 0x0 3241*5113495bSYour Name 3242*5113495bSYour Name //// Register TCL_R0_TCL2TQM_RING_HP_ADDR_LSB //// 3243*5113495bSYour Name 3244*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_LSB_ADDR(x) (x+0x000006bc) 3245*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_LSB_PHYS(x) (x+0x000006bc) 3246*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_LSB_RMSK 0xffffffff 3247*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_LSB_SHFT 0 3248*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_LSB_IN(x) \ 3249*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_LSB_ADDR(x), HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_LSB_RMSK) 3250*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_LSB_INM(x, mask) \ 3251*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_LSB_ADDR(x), mask) 3252*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_LSB_OUT(x, val) \ 3253*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_LSB_ADDR(x), val) 3254*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_LSB_OUTM(x, mask, val) \ 3255*5113495bSYour Name do {\ 3256*5113495bSYour Name HWIO_INTLOCK(); \ 3257*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_LSB_ADDR(x), mask, val, HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_LSB_IN(x)); \ 3258*5113495bSYour Name HWIO_INTFREE();\ 3259*5113495bSYour Name } while (0) 3260*5113495bSYour Name 3261*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_LSB_HEAD_PTR_MEMADDR_LSB_BMSK 0xffffffff 3262*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_LSB_HEAD_PTR_MEMADDR_LSB_SHFT 0x0 3263*5113495bSYour Name 3264*5113495bSYour Name //// Register TCL_R0_TCL2TQM_RING_HP_ADDR_MSB //// 3265*5113495bSYour Name 3266*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_MSB_ADDR(x) (x+0x000006c0) 3267*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_MSB_PHYS(x) (x+0x000006c0) 3268*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_MSB_RMSK 0x000000ff 3269*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_MSB_SHFT 0 3270*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_MSB_IN(x) \ 3271*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_MSB_ADDR(x), HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_MSB_RMSK) 3272*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_MSB_INM(x, mask) \ 3273*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_MSB_ADDR(x), mask) 3274*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_MSB_OUT(x, val) \ 3275*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_MSB_ADDR(x), val) 3276*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_MSB_OUTM(x, mask, val) \ 3277*5113495bSYour Name do {\ 3278*5113495bSYour Name HWIO_INTLOCK(); \ 3279*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_MSB_ADDR(x), mask, val, HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_MSB_IN(x)); \ 3280*5113495bSYour Name HWIO_INTFREE();\ 3281*5113495bSYour Name } while (0) 3282*5113495bSYour Name 3283*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_MSB_HEAD_PTR_MEMADDR_MSB_BMSK 0x000000ff 3284*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_ADDR_MSB_HEAD_PTR_MEMADDR_MSB_SHFT 0x0 3285*5113495bSYour Name 3286*5113495bSYour Name //// Register TCL_R0_TCL2TQM_RING_PRODUCER_INT_SETUP //// 3287*5113495bSYour Name 3288*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_SETUP_ADDR(x) (x+0x000006cc) 3289*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_SETUP_PHYS(x) (x+0x000006cc) 3290*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_SETUP_RMSK 0xffffffff 3291*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_SETUP_SHFT 0 3292*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_SETUP_IN(x) \ 3293*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_SETUP_ADDR(x), HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_SETUP_RMSK) 3294*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_SETUP_INM(x, mask) \ 3295*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_SETUP_ADDR(x), mask) 3296*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_SETUP_OUT(x, val) \ 3297*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_SETUP_ADDR(x), val) 3298*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_SETUP_OUTM(x, mask, val) \ 3299*5113495bSYour Name do {\ 3300*5113495bSYour Name HWIO_INTLOCK(); \ 3301*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_SETUP_ADDR(x), mask, val, HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_SETUP_IN(x)); \ 3302*5113495bSYour Name HWIO_INTFREE();\ 3303*5113495bSYour Name } while (0) 3304*5113495bSYour Name 3305*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_SETUP_INTERRUPT_TIMER_THRESHOLD_BMSK 0xffff0000 3306*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_SETUP_INTERRUPT_TIMER_THRESHOLD_SHFT 0x10 3307*5113495bSYour Name 3308*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_SETUP_SW_INTERRUPT_MODE_BMSK 0x00008000 3309*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_SETUP_SW_INTERRUPT_MODE_SHFT 0xf 3310*5113495bSYour Name 3311*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_SETUP_BATCH_COUNTER_THRESHOLD_BMSK 0x00007fff 3312*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_SETUP_BATCH_COUNTER_THRESHOLD_SHFT 0x0 3313*5113495bSYour Name 3314*5113495bSYour Name //// Register TCL_R0_TCL2TQM_RING_PRODUCER_INT_STATUS //// 3315*5113495bSYour Name 3316*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_STATUS_ADDR(x) (x+0x000006d0) 3317*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_STATUS_PHYS(x) (x+0x000006d0) 3318*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_STATUS_RMSK 0xffffffff 3319*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_STATUS_SHFT 0 3320*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_STATUS_IN(x) \ 3321*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_STATUS_ADDR(x), HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_STATUS_RMSK) 3322*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_STATUS_INM(x, mask) \ 3323*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_STATUS_ADDR(x), mask) 3324*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_STATUS_OUT(x, val) \ 3325*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_STATUS_ADDR(x), val) 3326*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_STATUS_OUTM(x, mask, val) \ 3327*5113495bSYour Name do {\ 3328*5113495bSYour Name HWIO_INTLOCK(); \ 3329*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_STATUS_ADDR(x), mask, val, HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_STATUS_IN(x)); \ 3330*5113495bSYour Name HWIO_INTFREE();\ 3331*5113495bSYour Name } while (0) 3332*5113495bSYour Name 3333*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_STATUS_CURRENT_INTERRUPT_TIMER_VALUE_BMSK 0xffff0000 3334*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_STATUS_CURRENT_INTERRUPT_TIMER_VALUE_SHFT 0x10 3335*5113495bSYour Name 3336*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_STATUS_CURRENT_SW_INT_WIRE_VALUE_BMSK 0x00008000 3337*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_STATUS_CURRENT_SW_INT_WIRE_VALUE_SHFT 0xf 3338*5113495bSYour Name 3339*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_STATUS_INTERNAL_BATCH_COUNTER_VALUE_BMSK 0x00007fff 3340*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_INT_STATUS_INTERNAL_BATCH_COUNTER_VALUE_SHFT 0x0 3341*5113495bSYour Name 3342*5113495bSYour Name //// Register TCL_R0_TCL2TQM_RING_PRODUCER_FULL_COUNTER //// 3343*5113495bSYour Name 3344*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_FULL_COUNTER_ADDR(x) (x+0x000006d4) 3345*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_FULL_COUNTER_PHYS(x) (x+0x000006d4) 3346*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_FULL_COUNTER_RMSK 0x000003ff 3347*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_FULL_COUNTER_SHFT 0 3348*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_FULL_COUNTER_IN(x) \ 3349*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_FULL_COUNTER_ADDR(x), HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_FULL_COUNTER_RMSK) 3350*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_FULL_COUNTER_INM(x, mask) \ 3351*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask) 3352*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_FULL_COUNTER_OUT(x, val) \ 3353*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_FULL_COUNTER_ADDR(x), val) 3354*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_FULL_COUNTER_OUTM(x, mask, val) \ 3355*5113495bSYour Name do {\ 3356*5113495bSYour Name HWIO_INTLOCK(); \ 3357*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask, val, HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_FULL_COUNTER_IN(x)); \ 3358*5113495bSYour Name HWIO_INTFREE();\ 3359*5113495bSYour Name } while (0) 3360*5113495bSYour Name 3361*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_FULL_COUNTER_RING_FULL_COUNTER_BMSK 0x000003ff 3362*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_PRODUCER_FULL_COUNTER_RING_FULL_COUNTER_SHFT 0x0 3363*5113495bSYour Name 3364*5113495bSYour Name //// Register TCL_R0_TCL2TQM_RING_HP_TP_SW_OFFSET //// 3365*5113495bSYour Name 3366*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_TP_SW_OFFSET_ADDR(x) (x+0x000006fc) 3367*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_TP_SW_OFFSET_PHYS(x) (x+0x000006fc) 3368*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_TP_SW_OFFSET_RMSK 0x0000ffff 3369*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_TP_SW_OFFSET_SHFT 0 3370*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_TP_SW_OFFSET_IN(x) \ 3371*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2TQM_RING_HP_TP_SW_OFFSET_ADDR(x), HWIO_TCL_R0_TCL2TQM_RING_HP_TP_SW_OFFSET_RMSK) 3372*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_TP_SW_OFFSET_INM(x, mask) \ 3373*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2TQM_RING_HP_TP_SW_OFFSET_ADDR(x), mask) 3374*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_TP_SW_OFFSET_OUT(x, val) \ 3375*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL2TQM_RING_HP_TP_SW_OFFSET_ADDR(x), val) 3376*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ 3377*5113495bSYour Name do {\ 3378*5113495bSYour Name HWIO_INTLOCK(); \ 3379*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL2TQM_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_TCL_R0_TCL2TQM_RING_HP_TP_SW_OFFSET_IN(x)); \ 3380*5113495bSYour Name HWIO_INTFREE();\ 3381*5113495bSYour Name } while (0) 3382*5113495bSYour Name 3383*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_TP_SW_OFFSET_HP_TP_OFFSET_VALUE_BMSK 0x0000ffff 3384*5113495bSYour Name #define HWIO_TCL_R0_TCL2TQM_RING_HP_TP_SW_OFFSET_HP_TP_OFFSET_VALUE_SHFT 0x0 3385*5113495bSYour Name 3386*5113495bSYour Name //// Register TCL_R0_TCL_STATUS1_RING_BASE_LSB //// 3387*5113495bSYour Name 3388*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_BASE_LSB_ADDR(x) (x+0x00000700) 3389*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_BASE_LSB_PHYS(x) (x+0x00000700) 3390*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_BASE_LSB_RMSK 0xffffffff 3391*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_BASE_LSB_SHFT 0 3392*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_BASE_LSB_IN(x) \ 3393*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_BASE_LSB_ADDR(x), HWIO_TCL_R0_TCL_STATUS1_RING_BASE_LSB_RMSK) 3394*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_BASE_LSB_INM(x, mask) \ 3395*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_BASE_LSB_ADDR(x), mask) 3396*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_BASE_LSB_OUT(x, val) \ 3397*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS1_RING_BASE_LSB_ADDR(x), val) 3398*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_BASE_LSB_OUTM(x, mask, val) \ 3399*5113495bSYour Name do {\ 3400*5113495bSYour Name HWIO_INTLOCK(); \ 3401*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS1_RING_BASE_LSB_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS1_RING_BASE_LSB_IN(x)); \ 3402*5113495bSYour Name HWIO_INTFREE();\ 3403*5113495bSYour Name } while (0) 3404*5113495bSYour Name 3405*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_BASE_LSB_RING_BASE_ADDR_LSB_BMSK 0xffffffff 3406*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_BASE_LSB_RING_BASE_ADDR_LSB_SHFT 0x0 3407*5113495bSYour Name 3408*5113495bSYour Name //// Register TCL_R0_TCL_STATUS1_RING_BASE_MSB //// 3409*5113495bSYour Name 3410*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_BASE_MSB_ADDR(x) (x+0x00000704) 3411*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_BASE_MSB_PHYS(x) (x+0x00000704) 3412*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_BASE_MSB_RMSK 0x00ffffff 3413*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_BASE_MSB_SHFT 0 3414*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_BASE_MSB_IN(x) \ 3415*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_BASE_MSB_ADDR(x), HWIO_TCL_R0_TCL_STATUS1_RING_BASE_MSB_RMSK) 3416*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_BASE_MSB_INM(x, mask) \ 3417*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_BASE_MSB_ADDR(x), mask) 3418*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_BASE_MSB_OUT(x, val) \ 3419*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS1_RING_BASE_MSB_ADDR(x), val) 3420*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_BASE_MSB_OUTM(x, mask, val) \ 3421*5113495bSYour Name do {\ 3422*5113495bSYour Name HWIO_INTLOCK(); \ 3423*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS1_RING_BASE_MSB_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS1_RING_BASE_MSB_IN(x)); \ 3424*5113495bSYour Name HWIO_INTFREE();\ 3425*5113495bSYour Name } while (0) 3426*5113495bSYour Name 3427*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_BASE_MSB_RING_SIZE_BMSK 0x00ffff00 3428*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_BASE_MSB_RING_SIZE_SHFT 0x8 3429*5113495bSYour Name 3430*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_BASE_MSB_RING_BASE_ADDR_MSB_BMSK 0x000000ff 3431*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_BASE_MSB_RING_BASE_ADDR_MSB_SHFT 0x0 3432*5113495bSYour Name 3433*5113495bSYour Name //// Register TCL_R0_TCL_STATUS1_RING_ID //// 3434*5113495bSYour Name 3435*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_ID_ADDR(x) (x+0x00000708) 3436*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_ID_PHYS(x) (x+0x00000708) 3437*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_ID_RMSK 0x0000ffff 3438*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_ID_SHFT 0 3439*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_ID_IN(x) \ 3440*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_ID_ADDR(x), HWIO_TCL_R0_TCL_STATUS1_RING_ID_RMSK) 3441*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_ID_INM(x, mask) \ 3442*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_ID_ADDR(x), mask) 3443*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_ID_OUT(x, val) \ 3444*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS1_RING_ID_ADDR(x), val) 3445*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_ID_OUTM(x, mask, val) \ 3446*5113495bSYour Name do {\ 3447*5113495bSYour Name HWIO_INTLOCK(); \ 3448*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS1_RING_ID_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS1_RING_ID_IN(x)); \ 3449*5113495bSYour Name HWIO_INTFREE();\ 3450*5113495bSYour Name } while (0) 3451*5113495bSYour Name 3452*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_ID_RING_ID_BMSK 0x0000ff00 3453*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_ID_RING_ID_SHFT 0x8 3454*5113495bSYour Name 3455*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_ID_ENTRY_SIZE_BMSK 0x000000ff 3456*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_ID_ENTRY_SIZE_SHFT 0x0 3457*5113495bSYour Name 3458*5113495bSYour Name //// Register TCL_R0_TCL_STATUS1_RING_STATUS //// 3459*5113495bSYour Name 3460*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_STATUS_ADDR(x) (x+0x0000070c) 3461*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_STATUS_PHYS(x) (x+0x0000070c) 3462*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_STATUS_RMSK 0xffffffff 3463*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_STATUS_SHFT 0 3464*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_STATUS_IN(x) \ 3465*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_STATUS_ADDR(x), HWIO_TCL_R0_TCL_STATUS1_RING_STATUS_RMSK) 3466*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_STATUS_INM(x, mask) \ 3467*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_STATUS_ADDR(x), mask) 3468*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_STATUS_OUT(x, val) \ 3469*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS1_RING_STATUS_ADDR(x), val) 3470*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_STATUS_OUTM(x, mask, val) \ 3471*5113495bSYour Name do {\ 3472*5113495bSYour Name HWIO_INTLOCK(); \ 3473*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS1_RING_STATUS_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS1_RING_STATUS_IN(x)); \ 3474*5113495bSYour Name HWIO_INTFREE();\ 3475*5113495bSYour Name } while (0) 3476*5113495bSYour Name 3477*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_STATUS_NUM_AVAIL_WORDS_BMSK 0xffff0000 3478*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_STATUS_NUM_AVAIL_WORDS_SHFT 0x10 3479*5113495bSYour Name 3480*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_STATUS_NUM_VALID_WORDS_BMSK 0x0000ffff 3481*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_STATUS_NUM_VALID_WORDS_SHFT 0x0 3482*5113495bSYour Name 3483*5113495bSYour Name //// Register TCL_R0_TCL_STATUS1_RING_MISC //// 3484*5113495bSYour Name 3485*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_ADDR(x) (x+0x00000710) 3486*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_PHYS(x) (x+0x00000710) 3487*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_RMSK 0x03ffffff 3488*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_SHFT 0 3489*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_IN(x) \ 3490*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_MISC_ADDR(x), HWIO_TCL_R0_TCL_STATUS1_RING_MISC_RMSK) 3491*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_INM(x, mask) \ 3492*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_MISC_ADDR(x), mask) 3493*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_OUT(x, val) \ 3494*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS1_RING_MISC_ADDR(x), val) 3495*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_OUTM(x, mask, val) \ 3496*5113495bSYour Name do {\ 3497*5113495bSYour Name HWIO_INTLOCK(); \ 3498*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS1_RING_MISC_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS1_RING_MISC_IN(x)); \ 3499*5113495bSYour Name HWIO_INTFREE();\ 3500*5113495bSYour Name } while (0) 3501*5113495bSYour Name 3502*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_LOOP_CNT_BMSK 0x03c00000 3503*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_LOOP_CNT_SHFT 0x16 3504*5113495bSYour Name 3505*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_SPARE_CONTROL_BMSK 0x003fc000 3506*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_SPARE_CONTROL_SHFT 0xe 3507*5113495bSYour Name 3508*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_SRNG_SM_STATE2_BMSK 0x00003000 3509*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_SRNG_SM_STATE2_SHFT 0xc 3510*5113495bSYour Name 3511*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_SRNG_SM_STATE1_BMSK 0x00000f00 3512*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_SRNG_SM_STATE1_SHFT 0x8 3513*5113495bSYour Name 3514*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_SRNG_IS_IDLE_BMSK 0x00000080 3515*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_SRNG_IS_IDLE_SHFT 0x7 3516*5113495bSYour Name 3517*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_SRNG_ENABLE_BMSK 0x00000040 3518*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_SRNG_ENABLE_SHFT 0x6 3519*5113495bSYour Name 3520*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_DATA_TLV_SWAP_BIT_BMSK 0x00000020 3521*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_DATA_TLV_SWAP_BIT_SHFT 0x5 3522*5113495bSYour Name 3523*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_HOST_FW_SWAP_BIT_BMSK 0x00000010 3524*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_HOST_FW_SWAP_BIT_SHFT 0x4 3525*5113495bSYour Name 3526*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_MSI_SWAP_BIT_BMSK 0x00000008 3527*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_MSI_SWAP_BIT_SHFT 0x3 3528*5113495bSYour Name 3529*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_SECURITY_BIT_BMSK 0x00000004 3530*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_SECURITY_BIT_SHFT 0x2 3531*5113495bSYour Name 3532*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_LOOPCNT_DISABLE_BMSK 0x00000002 3533*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_LOOPCNT_DISABLE_SHFT 0x1 3534*5113495bSYour Name 3535*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_RING_ID_DISABLE_BMSK 0x00000001 3536*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MISC_RING_ID_DISABLE_SHFT 0x0 3537*5113495bSYour Name 3538*5113495bSYour Name //// Register TCL_R0_TCL_STATUS1_RING_HP_ADDR_LSB //// 3539*5113495bSYour Name 3540*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_LSB_ADDR(x) (x+0x00000714) 3541*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_LSB_PHYS(x) (x+0x00000714) 3542*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_LSB_RMSK 0xffffffff 3543*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_LSB_SHFT 0 3544*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_LSB_IN(x) \ 3545*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_LSB_ADDR(x), HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_LSB_RMSK) 3546*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_LSB_INM(x, mask) \ 3547*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_LSB_ADDR(x), mask) 3548*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_LSB_OUT(x, val) \ 3549*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_LSB_ADDR(x), val) 3550*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_LSB_OUTM(x, mask, val) \ 3551*5113495bSYour Name do {\ 3552*5113495bSYour Name HWIO_INTLOCK(); \ 3553*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_LSB_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_LSB_IN(x)); \ 3554*5113495bSYour Name HWIO_INTFREE();\ 3555*5113495bSYour Name } while (0) 3556*5113495bSYour Name 3557*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_LSB_HEAD_PTR_MEMADDR_LSB_BMSK 0xffffffff 3558*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_LSB_HEAD_PTR_MEMADDR_LSB_SHFT 0x0 3559*5113495bSYour Name 3560*5113495bSYour Name //// Register TCL_R0_TCL_STATUS1_RING_HP_ADDR_MSB //// 3561*5113495bSYour Name 3562*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_MSB_ADDR(x) (x+0x00000718) 3563*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_MSB_PHYS(x) (x+0x00000718) 3564*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_MSB_RMSK 0x000000ff 3565*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_MSB_SHFT 0 3566*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_MSB_IN(x) \ 3567*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_MSB_ADDR(x), HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_MSB_RMSK) 3568*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_MSB_INM(x, mask) \ 3569*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_MSB_ADDR(x), mask) 3570*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_MSB_OUT(x, val) \ 3571*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_MSB_ADDR(x), val) 3572*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_MSB_OUTM(x, mask, val) \ 3573*5113495bSYour Name do {\ 3574*5113495bSYour Name HWIO_INTLOCK(); \ 3575*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_MSB_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_MSB_IN(x)); \ 3576*5113495bSYour Name HWIO_INTFREE();\ 3577*5113495bSYour Name } while (0) 3578*5113495bSYour Name 3579*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_MSB_HEAD_PTR_MEMADDR_MSB_BMSK 0x000000ff 3580*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_ADDR_MSB_HEAD_PTR_MEMADDR_MSB_SHFT 0x0 3581*5113495bSYour Name 3582*5113495bSYour Name //// Register TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_SETUP //// 3583*5113495bSYour Name 3584*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_SETUP_ADDR(x) (x+0x00000724) 3585*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_SETUP_PHYS(x) (x+0x00000724) 3586*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_SETUP_RMSK 0xffffffff 3587*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_SETUP_SHFT 0 3588*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_SETUP_IN(x) \ 3589*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_SETUP_ADDR(x), HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_SETUP_RMSK) 3590*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_SETUP_INM(x, mask) \ 3591*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_SETUP_ADDR(x), mask) 3592*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_SETUP_OUT(x, val) \ 3593*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_SETUP_ADDR(x), val) 3594*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_SETUP_OUTM(x, mask, val) \ 3595*5113495bSYour Name do {\ 3596*5113495bSYour Name HWIO_INTLOCK(); \ 3597*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_SETUP_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_SETUP_IN(x)); \ 3598*5113495bSYour Name HWIO_INTFREE();\ 3599*5113495bSYour Name } while (0) 3600*5113495bSYour Name 3601*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_SETUP_INTERRUPT_TIMER_THRESHOLD_BMSK 0xffff0000 3602*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_SETUP_INTERRUPT_TIMER_THRESHOLD_SHFT 0x10 3603*5113495bSYour Name 3604*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_SETUP_SW_INTERRUPT_MODE_BMSK 0x00008000 3605*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_SETUP_SW_INTERRUPT_MODE_SHFT 0xf 3606*5113495bSYour Name 3607*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_SETUP_BATCH_COUNTER_THRESHOLD_BMSK 0x00007fff 3608*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_SETUP_BATCH_COUNTER_THRESHOLD_SHFT 0x0 3609*5113495bSYour Name 3610*5113495bSYour Name //// Register TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_STATUS //// 3611*5113495bSYour Name 3612*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_STATUS_ADDR(x) (x+0x00000728) 3613*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_STATUS_PHYS(x) (x+0x00000728) 3614*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_STATUS_RMSK 0xffffffff 3615*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_STATUS_SHFT 0 3616*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_STATUS_IN(x) \ 3617*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_STATUS_ADDR(x), HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_STATUS_RMSK) 3618*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_STATUS_INM(x, mask) \ 3619*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_STATUS_ADDR(x), mask) 3620*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_STATUS_OUT(x, val) \ 3621*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_STATUS_ADDR(x), val) 3622*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_STATUS_OUTM(x, mask, val) \ 3623*5113495bSYour Name do {\ 3624*5113495bSYour Name HWIO_INTLOCK(); \ 3625*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_STATUS_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_STATUS_IN(x)); \ 3626*5113495bSYour Name HWIO_INTFREE();\ 3627*5113495bSYour Name } while (0) 3628*5113495bSYour Name 3629*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_STATUS_CURRENT_INTERRUPT_TIMER_VALUE_BMSK 0xffff0000 3630*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_STATUS_CURRENT_INTERRUPT_TIMER_VALUE_SHFT 0x10 3631*5113495bSYour Name 3632*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_STATUS_CURRENT_SW_INT_WIRE_VALUE_BMSK 0x00008000 3633*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_STATUS_CURRENT_SW_INT_WIRE_VALUE_SHFT 0xf 3634*5113495bSYour Name 3635*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_STATUS_INTERNAL_BATCH_COUNTER_VALUE_BMSK 0x00007fff 3636*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_INT_STATUS_INTERNAL_BATCH_COUNTER_VALUE_SHFT 0x0 3637*5113495bSYour Name 3638*5113495bSYour Name //// Register TCL_R0_TCL_STATUS1_RING_PRODUCER_FULL_COUNTER //// 3639*5113495bSYour Name 3640*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_FULL_COUNTER_ADDR(x) (x+0x0000072c) 3641*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_FULL_COUNTER_PHYS(x) (x+0x0000072c) 3642*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_FULL_COUNTER_RMSK 0x000003ff 3643*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_FULL_COUNTER_SHFT 0 3644*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_FULL_COUNTER_IN(x) \ 3645*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_FULL_COUNTER_ADDR(x), HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_FULL_COUNTER_RMSK) 3646*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_FULL_COUNTER_INM(x, mask) \ 3647*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask) 3648*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_FULL_COUNTER_OUT(x, val) \ 3649*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_FULL_COUNTER_ADDR(x), val) 3650*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_FULL_COUNTER_OUTM(x, mask, val) \ 3651*5113495bSYour Name do {\ 3652*5113495bSYour Name HWIO_INTLOCK(); \ 3653*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_FULL_COUNTER_IN(x)); \ 3654*5113495bSYour Name HWIO_INTFREE();\ 3655*5113495bSYour Name } while (0) 3656*5113495bSYour Name 3657*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_FULL_COUNTER_RING_FULL_COUNTER_BMSK 0x000003ff 3658*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_PRODUCER_FULL_COUNTER_RING_FULL_COUNTER_SHFT 0x0 3659*5113495bSYour Name 3660*5113495bSYour Name //// Register TCL_R0_TCL_STATUS1_RING_MSI1_BASE_LSB //// 3661*5113495bSYour Name 3662*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_LSB_ADDR(x) (x+0x00000748) 3663*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_LSB_PHYS(x) (x+0x00000748) 3664*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_LSB_RMSK 0xffffffff 3665*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_LSB_SHFT 0 3666*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_LSB_IN(x) \ 3667*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_LSB_ADDR(x), HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_LSB_RMSK) 3668*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_LSB_INM(x, mask) \ 3669*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_LSB_ADDR(x), mask) 3670*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_LSB_OUT(x, val) \ 3671*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_LSB_ADDR(x), val) 3672*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \ 3673*5113495bSYour Name do {\ 3674*5113495bSYour Name HWIO_INTLOCK(); \ 3675*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_LSB_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_LSB_IN(x)); \ 3676*5113495bSYour Name HWIO_INTFREE();\ 3677*5113495bSYour Name } while (0) 3678*5113495bSYour Name 3679*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_LSB_ADDR_BMSK 0xffffffff 3680*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_LSB_ADDR_SHFT 0x0 3681*5113495bSYour Name 3682*5113495bSYour Name //// Register TCL_R0_TCL_STATUS1_RING_MSI1_BASE_MSB //// 3683*5113495bSYour Name 3684*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_MSB_ADDR(x) (x+0x0000074c) 3685*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_MSB_PHYS(x) (x+0x0000074c) 3686*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_MSB_RMSK 0x000001ff 3687*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_MSB_SHFT 0 3688*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_MSB_IN(x) \ 3689*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_MSB_ADDR(x), HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_MSB_RMSK) 3690*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_MSB_INM(x, mask) \ 3691*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_MSB_ADDR(x), mask) 3692*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_MSB_OUT(x, val) \ 3693*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_MSB_ADDR(x), val) 3694*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \ 3695*5113495bSYour Name do {\ 3696*5113495bSYour Name HWIO_INTLOCK(); \ 3697*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_MSB_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_MSB_IN(x)); \ 3698*5113495bSYour Name HWIO_INTFREE();\ 3699*5113495bSYour Name } while (0) 3700*5113495bSYour Name 3701*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_MSB_MSI1_ENABLE_BMSK 0x00000100 3702*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_MSB_MSI1_ENABLE_SHFT 0x8 3703*5113495bSYour Name 3704*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_MSB_ADDR_BMSK 0x000000ff 3705*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_BASE_MSB_ADDR_SHFT 0x0 3706*5113495bSYour Name 3707*5113495bSYour Name //// Register TCL_R0_TCL_STATUS1_RING_MSI1_DATA //// 3708*5113495bSYour Name 3709*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_DATA_ADDR(x) (x+0x00000750) 3710*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_DATA_PHYS(x) (x+0x00000750) 3711*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_DATA_RMSK 0xffffffff 3712*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_DATA_SHFT 0 3713*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_DATA_IN(x) \ 3714*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_DATA_ADDR(x), HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_DATA_RMSK) 3715*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_DATA_INM(x, mask) \ 3716*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_DATA_ADDR(x), mask) 3717*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_DATA_OUT(x, val) \ 3718*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_DATA_ADDR(x), val) 3719*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_DATA_OUTM(x, mask, val) \ 3720*5113495bSYour Name do {\ 3721*5113495bSYour Name HWIO_INTLOCK(); \ 3722*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_DATA_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_DATA_IN(x)); \ 3723*5113495bSYour Name HWIO_INTFREE();\ 3724*5113495bSYour Name } while (0) 3725*5113495bSYour Name 3726*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_DATA_VALUE_BMSK 0xffffffff 3727*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_MSI1_DATA_VALUE_SHFT 0x0 3728*5113495bSYour Name 3729*5113495bSYour Name //// Register TCL_R0_TCL_STATUS1_RING_HP_TP_SW_OFFSET //// 3730*5113495bSYour Name 3731*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_TP_SW_OFFSET_ADDR(x) (x+0x00000754) 3732*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_TP_SW_OFFSET_PHYS(x) (x+0x00000754) 3733*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_TP_SW_OFFSET_RMSK 0x0000ffff 3734*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_TP_SW_OFFSET_SHFT 0 3735*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_TP_SW_OFFSET_IN(x) \ 3736*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_HP_TP_SW_OFFSET_ADDR(x), HWIO_TCL_R0_TCL_STATUS1_RING_HP_TP_SW_OFFSET_RMSK) 3737*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_TP_SW_OFFSET_INM(x, mask) \ 3738*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS1_RING_HP_TP_SW_OFFSET_ADDR(x), mask) 3739*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_TP_SW_OFFSET_OUT(x, val) \ 3740*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS1_RING_HP_TP_SW_OFFSET_ADDR(x), val) 3741*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ 3742*5113495bSYour Name do {\ 3743*5113495bSYour Name HWIO_INTLOCK(); \ 3744*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS1_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS1_RING_HP_TP_SW_OFFSET_IN(x)); \ 3745*5113495bSYour Name HWIO_INTFREE();\ 3746*5113495bSYour Name } while (0) 3747*5113495bSYour Name 3748*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_TP_SW_OFFSET_HP_TP_OFFSET_VALUE_BMSK 0x0000ffff 3749*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS1_RING_HP_TP_SW_OFFSET_HP_TP_OFFSET_VALUE_SHFT 0x0 3750*5113495bSYour Name 3751*5113495bSYour Name //// Register TCL_R0_TCL_STATUS2_RING_BASE_LSB //// 3752*5113495bSYour Name 3753*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_BASE_LSB_ADDR(x) (x+0x00000758) 3754*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_BASE_LSB_PHYS(x) (x+0x00000758) 3755*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_BASE_LSB_RMSK 0xffffffff 3756*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_BASE_LSB_SHFT 0 3757*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_BASE_LSB_IN(x) \ 3758*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_BASE_LSB_ADDR(x), HWIO_TCL_R0_TCL_STATUS2_RING_BASE_LSB_RMSK) 3759*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_BASE_LSB_INM(x, mask) \ 3760*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_BASE_LSB_ADDR(x), mask) 3761*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_BASE_LSB_OUT(x, val) \ 3762*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS2_RING_BASE_LSB_ADDR(x), val) 3763*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_BASE_LSB_OUTM(x, mask, val) \ 3764*5113495bSYour Name do {\ 3765*5113495bSYour Name HWIO_INTLOCK(); \ 3766*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS2_RING_BASE_LSB_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS2_RING_BASE_LSB_IN(x)); \ 3767*5113495bSYour Name HWIO_INTFREE();\ 3768*5113495bSYour Name } while (0) 3769*5113495bSYour Name 3770*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_BASE_LSB_RING_BASE_ADDR_LSB_BMSK 0xffffffff 3771*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_BASE_LSB_RING_BASE_ADDR_LSB_SHFT 0x0 3772*5113495bSYour Name 3773*5113495bSYour Name //// Register TCL_R0_TCL_STATUS2_RING_BASE_MSB //// 3774*5113495bSYour Name 3775*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_BASE_MSB_ADDR(x) (x+0x0000075c) 3776*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_BASE_MSB_PHYS(x) (x+0x0000075c) 3777*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_BASE_MSB_RMSK 0x00ffffff 3778*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_BASE_MSB_SHFT 0 3779*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_BASE_MSB_IN(x) \ 3780*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_BASE_MSB_ADDR(x), HWIO_TCL_R0_TCL_STATUS2_RING_BASE_MSB_RMSK) 3781*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_BASE_MSB_INM(x, mask) \ 3782*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_BASE_MSB_ADDR(x), mask) 3783*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_BASE_MSB_OUT(x, val) \ 3784*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS2_RING_BASE_MSB_ADDR(x), val) 3785*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_BASE_MSB_OUTM(x, mask, val) \ 3786*5113495bSYour Name do {\ 3787*5113495bSYour Name HWIO_INTLOCK(); \ 3788*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS2_RING_BASE_MSB_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS2_RING_BASE_MSB_IN(x)); \ 3789*5113495bSYour Name HWIO_INTFREE();\ 3790*5113495bSYour Name } while (0) 3791*5113495bSYour Name 3792*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_BASE_MSB_RING_SIZE_BMSK 0x00ffff00 3793*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_BASE_MSB_RING_SIZE_SHFT 0x8 3794*5113495bSYour Name 3795*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_BASE_MSB_RING_BASE_ADDR_MSB_BMSK 0x000000ff 3796*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_BASE_MSB_RING_BASE_ADDR_MSB_SHFT 0x0 3797*5113495bSYour Name 3798*5113495bSYour Name //// Register TCL_R0_TCL_STATUS2_RING_ID //// 3799*5113495bSYour Name 3800*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_ID_ADDR(x) (x+0x00000760) 3801*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_ID_PHYS(x) (x+0x00000760) 3802*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_ID_RMSK 0x0000ffff 3803*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_ID_SHFT 0 3804*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_ID_IN(x) \ 3805*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_ID_ADDR(x), HWIO_TCL_R0_TCL_STATUS2_RING_ID_RMSK) 3806*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_ID_INM(x, mask) \ 3807*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_ID_ADDR(x), mask) 3808*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_ID_OUT(x, val) \ 3809*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS2_RING_ID_ADDR(x), val) 3810*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_ID_OUTM(x, mask, val) \ 3811*5113495bSYour Name do {\ 3812*5113495bSYour Name HWIO_INTLOCK(); \ 3813*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS2_RING_ID_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS2_RING_ID_IN(x)); \ 3814*5113495bSYour Name HWIO_INTFREE();\ 3815*5113495bSYour Name } while (0) 3816*5113495bSYour Name 3817*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_ID_RING_ID_BMSK 0x0000ff00 3818*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_ID_RING_ID_SHFT 0x8 3819*5113495bSYour Name 3820*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_ID_ENTRY_SIZE_BMSK 0x000000ff 3821*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_ID_ENTRY_SIZE_SHFT 0x0 3822*5113495bSYour Name 3823*5113495bSYour Name //// Register TCL_R0_TCL_STATUS2_RING_STATUS //// 3824*5113495bSYour Name 3825*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_STATUS_ADDR(x) (x+0x00000764) 3826*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_STATUS_PHYS(x) (x+0x00000764) 3827*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_STATUS_RMSK 0xffffffff 3828*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_STATUS_SHFT 0 3829*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_STATUS_IN(x) \ 3830*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_STATUS_ADDR(x), HWIO_TCL_R0_TCL_STATUS2_RING_STATUS_RMSK) 3831*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_STATUS_INM(x, mask) \ 3832*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_STATUS_ADDR(x), mask) 3833*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_STATUS_OUT(x, val) \ 3834*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS2_RING_STATUS_ADDR(x), val) 3835*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_STATUS_OUTM(x, mask, val) \ 3836*5113495bSYour Name do {\ 3837*5113495bSYour Name HWIO_INTLOCK(); \ 3838*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS2_RING_STATUS_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS2_RING_STATUS_IN(x)); \ 3839*5113495bSYour Name HWIO_INTFREE();\ 3840*5113495bSYour Name } while (0) 3841*5113495bSYour Name 3842*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_STATUS_NUM_AVAIL_WORDS_BMSK 0xffff0000 3843*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_STATUS_NUM_AVAIL_WORDS_SHFT 0x10 3844*5113495bSYour Name 3845*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_STATUS_NUM_VALID_WORDS_BMSK 0x0000ffff 3846*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_STATUS_NUM_VALID_WORDS_SHFT 0x0 3847*5113495bSYour Name 3848*5113495bSYour Name //// Register TCL_R0_TCL_STATUS2_RING_MISC //// 3849*5113495bSYour Name 3850*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_ADDR(x) (x+0x00000768) 3851*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_PHYS(x) (x+0x00000768) 3852*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_RMSK 0x03ffffff 3853*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_SHFT 0 3854*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_IN(x) \ 3855*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_MISC_ADDR(x), HWIO_TCL_R0_TCL_STATUS2_RING_MISC_RMSK) 3856*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_INM(x, mask) \ 3857*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_MISC_ADDR(x), mask) 3858*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_OUT(x, val) \ 3859*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS2_RING_MISC_ADDR(x), val) 3860*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_OUTM(x, mask, val) \ 3861*5113495bSYour Name do {\ 3862*5113495bSYour Name HWIO_INTLOCK(); \ 3863*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS2_RING_MISC_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS2_RING_MISC_IN(x)); \ 3864*5113495bSYour Name HWIO_INTFREE();\ 3865*5113495bSYour Name } while (0) 3866*5113495bSYour Name 3867*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_LOOP_CNT_BMSK 0x03c00000 3868*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_LOOP_CNT_SHFT 0x16 3869*5113495bSYour Name 3870*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_SPARE_CONTROL_BMSK 0x003fc000 3871*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_SPARE_CONTROL_SHFT 0xe 3872*5113495bSYour Name 3873*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_SRNG_SM_STATE2_BMSK 0x00003000 3874*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_SRNG_SM_STATE2_SHFT 0xc 3875*5113495bSYour Name 3876*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_SRNG_SM_STATE1_BMSK 0x00000f00 3877*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_SRNG_SM_STATE1_SHFT 0x8 3878*5113495bSYour Name 3879*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_SRNG_IS_IDLE_BMSK 0x00000080 3880*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_SRNG_IS_IDLE_SHFT 0x7 3881*5113495bSYour Name 3882*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_SRNG_ENABLE_BMSK 0x00000040 3883*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_SRNG_ENABLE_SHFT 0x6 3884*5113495bSYour Name 3885*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_DATA_TLV_SWAP_BIT_BMSK 0x00000020 3886*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_DATA_TLV_SWAP_BIT_SHFT 0x5 3887*5113495bSYour Name 3888*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_HOST_FW_SWAP_BIT_BMSK 0x00000010 3889*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_HOST_FW_SWAP_BIT_SHFT 0x4 3890*5113495bSYour Name 3891*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_MSI_SWAP_BIT_BMSK 0x00000008 3892*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_MSI_SWAP_BIT_SHFT 0x3 3893*5113495bSYour Name 3894*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_SECURITY_BIT_BMSK 0x00000004 3895*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_SECURITY_BIT_SHFT 0x2 3896*5113495bSYour Name 3897*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_LOOPCNT_DISABLE_BMSK 0x00000002 3898*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_LOOPCNT_DISABLE_SHFT 0x1 3899*5113495bSYour Name 3900*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_RING_ID_DISABLE_BMSK 0x00000001 3901*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MISC_RING_ID_DISABLE_SHFT 0x0 3902*5113495bSYour Name 3903*5113495bSYour Name //// Register TCL_R0_TCL_STATUS2_RING_HP_ADDR_LSB //// 3904*5113495bSYour Name 3905*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_LSB_ADDR(x) (x+0x0000076c) 3906*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_LSB_PHYS(x) (x+0x0000076c) 3907*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_LSB_RMSK 0xffffffff 3908*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_LSB_SHFT 0 3909*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_LSB_IN(x) \ 3910*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_LSB_ADDR(x), HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_LSB_RMSK) 3911*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_LSB_INM(x, mask) \ 3912*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_LSB_ADDR(x), mask) 3913*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_LSB_OUT(x, val) \ 3914*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_LSB_ADDR(x), val) 3915*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_LSB_OUTM(x, mask, val) \ 3916*5113495bSYour Name do {\ 3917*5113495bSYour Name HWIO_INTLOCK(); \ 3918*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_LSB_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_LSB_IN(x)); \ 3919*5113495bSYour Name HWIO_INTFREE();\ 3920*5113495bSYour Name } while (0) 3921*5113495bSYour Name 3922*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_LSB_HEAD_PTR_MEMADDR_LSB_BMSK 0xffffffff 3923*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_LSB_HEAD_PTR_MEMADDR_LSB_SHFT 0x0 3924*5113495bSYour Name 3925*5113495bSYour Name //// Register TCL_R0_TCL_STATUS2_RING_HP_ADDR_MSB //// 3926*5113495bSYour Name 3927*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_MSB_ADDR(x) (x+0x00000770) 3928*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_MSB_PHYS(x) (x+0x00000770) 3929*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_MSB_RMSK 0x000000ff 3930*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_MSB_SHFT 0 3931*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_MSB_IN(x) \ 3932*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_MSB_ADDR(x), HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_MSB_RMSK) 3933*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_MSB_INM(x, mask) \ 3934*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_MSB_ADDR(x), mask) 3935*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_MSB_OUT(x, val) \ 3936*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_MSB_ADDR(x), val) 3937*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_MSB_OUTM(x, mask, val) \ 3938*5113495bSYour Name do {\ 3939*5113495bSYour Name HWIO_INTLOCK(); \ 3940*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_MSB_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_MSB_IN(x)); \ 3941*5113495bSYour Name HWIO_INTFREE();\ 3942*5113495bSYour Name } while (0) 3943*5113495bSYour Name 3944*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_MSB_HEAD_PTR_MEMADDR_MSB_BMSK 0x000000ff 3945*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_ADDR_MSB_HEAD_PTR_MEMADDR_MSB_SHFT 0x0 3946*5113495bSYour Name 3947*5113495bSYour Name //// Register TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_SETUP //// 3948*5113495bSYour Name 3949*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_SETUP_ADDR(x) (x+0x0000077c) 3950*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_SETUP_PHYS(x) (x+0x0000077c) 3951*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_SETUP_RMSK 0xffffffff 3952*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_SETUP_SHFT 0 3953*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_SETUP_IN(x) \ 3954*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_SETUP_ADDR(x), HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_SETUP_RMSK) 3955*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_SETUP_INM(x, mask) \ 3956*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_SETUP_ADDR(x), mask) 3957*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_SETUP_OUT(x, val) \ 3958*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_SETUP_ADDR(x), val) 3959*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_SETUP_OUTM(x, mask, val) \ 3960*5113495bSYour Name do {\ 3961*5113495bSYour Name HWIO_INTLOCK(); \ 3962*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_SETUP_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_SETUP_IN(x)); \ 3963*5113495bSYour Name HWIO_INTFREE();\ 3964*5113495bSYour Name } while (0) 3965*5113495bSYour Name 3966*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_SETUP_INTERRUPT_TIMER_THRESHOLD_BMSK 0xffff0000 3967*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_SETUP_INTERRUPT_TIMER_THRESHOLD_SHFT 0x10 3968*5113495bSYour Name 3969*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_SETUP_SW_INTERRUPT_MODE_BMSK 0x00008000 3970*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_SETUP_SW_INTERRUPT_MODE_SHFT 0xf 3971*5113495bSYour Name 3972*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_SETUP_BATCH_COUNTER_THRESHOLD_BMSK 0x00007fff 3973*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_SETUP_BATCH_COUNTER_THRESHOLD_SHFT 0x0 3974*5113495bSYour Name 3975*5113495bSYour Name //// Register TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_STATUS //// 3976*5113495bSYour Name 3977*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_STATUS_ADDR(x) (x+0x00000780) 3978*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_STATUS_PHYS(x) (x+0x00000780) 3979*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_STATUS_RMSK 0xffffffff 3980*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_STATUS_SHFT 0 3981*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_STATUS_IN(x) \ 3982*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_STATUS_ADDR(x), HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_STATUS_RMSK) 3983*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_STATUS_INM(x, mask) \ 3984*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_STATUS_ADDR(x), mask) 3985*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_STATUS_OUT(x, val) \ 3986*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_STATUS_ADDR(x), val) 3987*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_STATUS_OUTM(x, mask, val) \ 3988*5113495bSYour Name do {\ 3989*5113495bSYour Name HWIO_INTLOCK(); \ 3990*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_STATUS_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_STATUS_IN(x)); \ 3991*5113495bSYour Name HWIO_INTFREE();\ 3992*5113495bSYour Name } while (0) 3993*5113495bSYour Name 3994*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_STATUS_CURRENT_INTERRUPT_TIMER_VALUE_BMSK 0xffff0000 3995*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_STATUS_CURRENT_INTERRUPT_TIMER_VALUE_SHFT 0x10 3996*5113495bSYour Name 3997*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_STATUS_CURRENT_SW_INT_WIRE_VALUE_BMSK 0x00008000 3998*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_STATUS_CURRENT_SW_INT_WIRE_VALUE_SHFT 0xf 3999*5113495bSYour Name 4000*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_STATUS_INTERNAL_BATCH_COUNTER_VALUE_BMSK 0x00007fff 4001*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_INT_STATUS_INTERNAL_BATCH_COUNTER_VALUE_SHFT 0x0 4002*5113495bSYour Name 4003*5113495bSYour Name //// Register TCL_R0_TCL_STATUS2_RING_PRODUCER_FULL_COUNTER //// 4004*5113495bSYour Name 4005*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_FULL_COUNTER_ADDR(x) (x+0x00000784) 4006*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_FULL_COUNTER_PHYS(x) (x+0x00000784) 4007*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_FULL_COUNTER_RMSK 0x000003ff 4008*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_FULL_COUNTER_SHFT 0 4009*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_FULL_COUNTER_IN(x) \ 4010*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_FULL_COUNTER_ADDR(x), HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_FULL_COUNTER_RMSK) 4011*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_FULL_COUNTER_INM(x, mask) \ 4012*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask) 4013*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_FULL_COUNTER_OUT(x, val) \ 4014*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_FULL_COUNTER_ADDR(x), val) 4015*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_FULL_COUNTER_OUTM(x, mask, val) \ 4016*5113495bSYour Name do {\ 4017*5113495bSYour Name HWIO_INTLOCK(); \ 4018*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_FULL_COUNTER_IN(x)); \ 4019*5113495bSYour Name HWIO_INTFREE();\ 4020*5113495bSYour Name } while (0) 4021*5113495bSYour Name 4022*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_FULL_COUNTER_RING_FULL_COUNTER_BMSK 0x000003ff 4023*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_PRODUCER_FULL_COUNTER_RING_FULL_COUNTER_SHFT 0x0 4024*5113495bSYour Name 4025*5113495bSYour Name //// Register TCL_R0_TCL_STATUS2_RING_MSI1_BASE_LSB //// 4026*5113495bSYour Name 4027*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_LSB_ADDR(x) (x+0x000007a0) 4028*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_LSB_PHYS(x) (x+0x000007a0) 4029*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_LSB_RMSK 0xffffffff 4030*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_LSB_SHFT 0 4031*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_LSB_IN(x) \ 4032*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_LSB_ADDR(x), HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_LSB_RMSK) 4033*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_LSB_INM(x, mask) \ 4034*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_LSB_ADDR(x), mask) 4035*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_LSB_OUT(x, val) \ 4036*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_LSB_ADDR(x), val) 4037*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \ 4038*5113495bSYour Name do {\ 4039*5113495bSYour Name HWIO_INTLOCK(); \ 4040*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_LSB_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_LSB_IN(x)); \ 4041*5113495bSYour Name HWIO_INTFREE();\ 4042*5113495bSYour Name } while (0) 4043*5113495bSYour Name 4044*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_LSB_ADDR_BMSK 0xffffffff 4045*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_LSB_ADDR_SHFT 0x0 4046*5113495bSYour Name 4047*5113495bSYour Name //// Register TCL_R0_TCL_STATUS2_RING_MSI1_BASE_MSB //// 4048*5113495bSYour Name 4049*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_MSB_ADDR(x) (x+0x000007a4) 4050*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_MSB_PHYS(x) (x+0x000007a4) 4051*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_MSB_RMSK 0x000001ff 4052*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_MSB_SHFT 0 4053*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_MSB_IN(x) \ 4054*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_MSB_ADDR(x), HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_MSB_RMSK) 4055*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_MSB_INM(x, mask) \ 4056*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_MSB_ADDR(x), mask) 4057*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_MSB_OUT(x, val) \ 4058*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_MSB_ADDR(x), val) 4059*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \ 4060*5113495bSYour Name do {\ 4061*5113495bSYour Name HWIO_INTLOCK(); \ 4062*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_MSB_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_MSB_IN(x)); \ 4063*5113495bSYour Name HWIO_INTFREE();\ 4064*5113495bSYour Name } while (0) 4065*5113495bSYour Name 4066*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_MSB_MSI1_ENABLE_BMSK 0x00000100 4067*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_MSB_MSI1_ENABLE_SHFT 0x8 4068*5113495bSYour Name 4069*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_MSB_ADDR_BMSK 0x000000ff 4070*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_BASE_MSB_ADDR_SHFT 0x0 4071*5113495bSYour Name 4072*5113495bSYour Name //// Register TCL_R0_TCL_STATUS2_RING_MSI1_DATA //// 4073*5113495bSYour Name 4074*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_DATA_ADDR(x) (x+0x000007a8) 4075*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_DATA_PHYS(x) (x+0x000007a8) 4076*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_DATA_RMSK 0xffffffff 4077*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_DATA_SHFT 0 4078*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_DATA_IN(x) \ 4079*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_DATA_ADDR(x), HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_DATA_RMSK) 4080*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_DATA_INM(x, mask) \ 4081*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_DATA_ADDR(x), mask) 4082*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_DATA_OUT(x, val) \ 4083*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_DATA_ADDR(x), val) 4084*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_DATA_OUTM(x, mask, val) \ 4085*5113495bSYour Name do {\ 4086*5113495bSYour Name HWIO_INTLOCK(); \ 4087*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_DATA_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_DATA_IN(x)); \ 4088*5113495bSYour Name HWIO_INTFREE();\ 4089*5113495bSYour Name } while (0) 4090*5113495bSYour Name 4091*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_DATA_VALUE_BMSK 0xffffffff 4092*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_MSI1_DATA_VALUE_SHFT 0x0 4093*5113495bSYour Name 4094*5113495bSYour Name //// Register TCL_R0_TCL_STATUS2_RING_HP_TP_SW_OFFSET //// 4095*5113495bSYour Name 4096*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_TP_SW_OFFSET_ADDR(x) (x+0x000007ac) 4097*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_TP_SW_OFFSET_PHYS(x) (x+0x000007ac) 4098*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_TP_SW_OFFSET_RMSK 0x0000ffff 4099*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_TP_SW_OFFSET_SHFT 0 4100*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_TP_SW_OFFSET_IN(x) \ 4101*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_HP_TP_SW_OFFSET_ADDR(x), HWIO_TCL_R0_TCL_STATUS2_RING_HP_TP_SW_OFFSET_RMSK) 4102*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_TP_SW_OFFSET_INM(x, mask) \ 4103*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL_STATUS2_RING_HP_TP_SW_OFFSET_ADDR(x), mask) 4104*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_TP_SW_OFFSET_OUT(x, val) \ 4105*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL_STATUS2_RING_HP_TP_SW_OFFSET_ADDR(x), val) 4106*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ 4107*5113495bSYour Name do {\ 4108*5113495bSYour Name HWIO_INTLOCK(); \ 4109*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL_STATUS2_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_TCL_R0_TCL_STATUS2_RING_HP_TP_SW_OFFSET_IN(x)); \ 4110*5113495bSYour Name HWIO_INTFREE();\ 4111*5113495bSYour Name } while (0) 4112*5113495bSYour Name 4113*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_TP_SW_OFFSET_HP_TP_OFFSET_VALUE_BMSK 0x0000ffff 4114*5113495bSYour Name #define HWIO_TCL_R0_TCL_STATUS2_RING_HP_TP_SW_OFFSET_HP_TP_OFFSET_VALUE_SHFT 0x0 4115*5113495bSYour Name 4116*5113495bSYour Name //// Register TCL_R0_TCL2FW_RING_BASE_LSB //// 4117*5113495bSYour Name 4118*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_BASE_LSB_ADDR(x) (x+0x000007b0) 4119*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_BASE_LSB_PHYS(x) (x+0x000007b0) 4120*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_BASE_LSB_RMSK 0xffffffff 4121*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_BASE_LSB_SHFT 0 4122*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_BASE_LSB_IN(x) \ 4123*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2FW_RING_BASE_LSB_ADDR(x), HWIO_TCL_R0_TCL2FW_RING_BASE_LSB_RMSK) 4124*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_BASE_LSB_INM(x, mask) \ 4125*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2FW_RING_BASE_LSB_ADDR(x), mask) 4126*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_BASE_LSB_OUT(x, val) \ 4127*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL2FW_RING_BASE_LSB_ADDR(x), val) 4128*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_BASE_LSB_OUTM(x, mask, val) \ 4129*5113495bSYour Name do {\ 4130*5113495bSYour Name HWIO_INTLOCK(); \ 4131*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL2FW_RING_BASE_LSB_ADDR(x), mask, val, HWIO_TCL_R0_TCL2FW_RING_BASE_LSB_IN(x)); \ 4132*5113495bSYour Name HWIO_INTFREE();\ 4133*5113495bSYour Name } while (0) 4134*5113495bSYour Name 4135*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_BASE_LSB_RING_BASE_ADDR_LSB_BMSK 0xffffffff 4136*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_BASE_LSB_RING_BASE_ADDR_LSB_SHFT 0x0 4137*5113495bSYour Name 4138*5113495bSYour Name //// Register TCL_R0_TCL2FW_RING_BASE_MSB //// 4139*5113495bSYour Name 4140*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_BASE_MSB_ADDR(x) (x+0x000007b4) 4141*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_BASE_MSB_PHYS(x) (x+0x000007b4) 4142*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_BASE_MSB_RMSK 0x00ffffff 4143*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_BASE_MSB_SHFT 0 4144*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_BASE_MSB_IN(x) \ 4145*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2FW_RING_BASE_MSB_ADDR(x), HWIO_TCL_R0_TCL2FW_RING_BASE_MSB_RMSK) 4146*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_BASE_MSB_INM(x, mask) \ 4147*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2FW_RING_BASE_MSB_ADDR(x), mask) 4148*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_BASE_MSB_OUT(x, val) \ 4149*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL2FW_RING_BASE_MSB_ADDR(x), val) 4150*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_BASE_MSB_OUTM(x, mask, val) \ 4151*5113495bSYour Name do {\ 4152*5113495bSYour Name HWIO_INTLOCK(); \ 4153*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL2FW_RING_BASE_MSB_ADDR(x), mask, val, HWIO_TCL_R0_TCL2FW_RING_BASE_MSB_IN(x)); \ 4154*5113495bSYour Name HWIO_INTFREE();\ 4155*5113495bSYour Name } while (0) 4156*5113495bSYour Name 4157*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_BASE_MSB_RING_SIZE_BMSK 0x00ffff00 4158*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_BASE_MSB_RING_SIZE_SHFT 0x8 4159*5113495bSYour Name 4160*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_BASE_MSB_RING_BASE_ADDR_MSB_BMSK 0x000000ff 4161*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_BASE_MSB_RING_BASE_ADDR_MSB_SHFT 0x0 4162*5113495bSYour Name 4163*5113495bSYour Name //// Register TCL_R0_TCL2FW_RING_ID //// 4164*5113495bSYour Name 4165*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_ID_ADDR(x) (x+0x000007b8) 4166*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_ID_PHYS(x) (x+0x000007b8) 4167*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_ID_RMSK 0x0000ffff 4168*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_ID_SHFT 0 4169*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_ID_IN(x) \ 4170*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2FW_RING_ID_ADDR(x), HWIO_TCL_R0_TCL2FW_RING_ID_RMSK) 4171*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_ID_INM(x, mask) \ 4172*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2FW_RING_ID_ADDR(x), mask) 4173*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_ID_OUT(x, val) \ 4174*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL2FW_RING_ID_ADDR(x), val) 4175*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_ID_OUTM(x, mask, val) \ 4176*5113495bSYour Name do {\ 4177*5113495bSYour Name HWIO_INTLOCK(); \ 4178*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL2FW_RING_ID_ADDR(x), mask, val, HWIO_TCL_R0_TCL2FW_RING_ID_IN(x)); \ 4179*5113495bSYour Name HWIO_INTFREE();\ 4180*5113495bSYour Name } while (0) 4181*5113495bSYour Name 4182*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_ID_RING_ID_BMSK 0x0000ff00 4183*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_ID_RING_ID_SHFT 0x8 4184*5113495bSYour Name 4185*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_ID_ENTRY_SIZE_BMSK 0x000000ff 4186*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_ID_ENTRY_SIZE_SHFT 0x0 4187*5113495bSYour Name 4188*5113495bSYour Name //// Register TCL_R0_TCL2FW_RING_STATUS //// 4189*5113495bSYour Name 4190*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_STATUS_ADDR(x) (x+0x000007bc) 4191*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_STATUS_PHYS(x) (x+0x000007bc) 4192*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_STATUS_RMSK 0xffffffff 4193*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_STATUS_SHFT 0 4194*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_STATUS_IN(x) \ 4195*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2FW_RING_STATUS_ADDR(x), HWIO_TCL_R0_TCL2FW_RING_STATUS_RMSK) 4196*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_STATUS_INM(x, mask) \ 4197*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2FW_RING_STATUS_ADDR(x), mask) 4198*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_STATUS_OUT(x, val) \ 4199*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL2FW_RING_STATUS_ADDR(x), val) 4200*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_STATUS_OUTM(x, mask, val) \ 4201*5113495bSYour Name do {\ 4202*5113495bSYour Name HWIO_INTLOCK(); \ 4203*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL2FW_RING_STATUS_ADDR(x), mask, val, HWIO_TCL_R0_TCL2FW_RING_STATUS_IN(x)); \ 4204*5113495bSYour Name HWIO_INTFREE();\ 4205*5113495bSYour Name } while (0) 4206*5113495bSYour Name 4207*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_STATUS_NUM_AVAIL_WORDS_BMSK 0xffff0000 4208*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_STATUS_NUM_AVAIL_WORDS_SHFT 0x10 4209*5113495bSYour Name 4210*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_STATUS_NUM_VALID_WORDS_BMSK 0x0000ffff 4211*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_STATUS_NUM_VALID_WORDS_SHFT 0x0 4212*5113495bSYour Name 4213*5113495bSYour Name //// Register TCL_R0_TCL2FW_RING_MISC //// 4214*5113495bSYour Name 4215*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_ADDR(x) (x+0x000007c0) 4216*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_PHYS(x) (x+0x000007c0) 4217*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_RMSK 0x03ffffff 4218*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_SHFT 0 4219*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_IN(x) \ 4220*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2FW_RING_MISC_ADDR(x), HWIO_TCL_R0_TCL2FW_RING_MISC_RMSK) 4221*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_INM(x, mask) \ 4222*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2FW_RING_MISC_ADDR(x), mask) 4223*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_OUT(x, val) \ 4224*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL2FW_RING_MISC_ADDR(x), val) 4225*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_OUTM(x, mask, val) \ 4226*5113495bSYour Name do {\ 4227*5113495bSYour Name HWIO_INTLOCK(); \ 4228*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL2FW_RING_MISC_ADDR(x), mask, val, HWIO_TCL_R0_TCL2FW_RING_MISC_IN(x)); \ 4229*5113495bSYour Name HWIO_INTFREE();\ 4230*5113495bSYour Name } while (0) 4231*5113495bSYour Name 4232*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_LOOP_CNT_BMSK 0x03c00000 4233*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_LOOP_CNT_SHFT 0x16 4234*5113495bSYour Name 4235*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_SPARE_CONTROL_BMSK 0x003fc000 4236*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_SPARE_CONTROL_SHFT 0xe 4237*5113495bSYour Name 4238*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_SRNG_SM_STATE2_BMSK 0x00003000 4239*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_SRNG_SM_STATE2_SHFT 0xc 4240*5113495bSYour Name 4241*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_SRNG_SM_STATE1_BMSK 0x00000f00 4242*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_SRNG_SM_STATE1_SHFT 0x8 4243*5113495bSYour Name 4244*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_SRNG_IS_IDLE_BMSK 0x00000080 4245*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_SRNG_IS_IDLE_SHFT 0x7 4246*5113495bSYour Name 4247*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_SRNG_ENABLE_BMSK 0x00000040 4248*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_SRNG_ENABLE_SHFT 0x6 4249*5113495bSYour Name 4250*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_DATA_TLV_SWAP_BIT_BMSK 0x00000020 4251*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_DATA_TLV_SWAP_BIT_SHFT 0x5 4252*5113495bSYour Name 4253*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_HOST_FW_SWAP_BIT_BMSK 0x00000010 4254*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_HOST_FW_SWAP_BIT_SHFT 0x4 4255*5113495bSYour Name 4256*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_MSI_SWAP_BIT_BMSK 0x00000008 4257*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_MSI_SWAP_BIT_SHFT 0x3 4258*5113495bSYour Name 4259*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_SECURITY_BIT_BMSK 0x00000004 4260*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_SECURITY_BIT_SHFT 0x2 4261*5113495bSYour Name 4262*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_LOOPCNT_DISABLE_BMSK 0x00000002 4263*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_LOOPCNT_DISABLE_SHFT 0x1 4264*5113495bSYour Name 4265*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_RING_ID_DISABLE_BMSK 0x00000001 4266*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_MISC_RING_ID_DISABLE_SHFT 0x0 4267*5113495bSYour Name 4268*5113495bSYour Name //// Register TCL_R0_TCL2FW_RING_HP_ADDR_LSB //// 4269*5113495bSYour Name 4270*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_LSB_ADDR(x) (x+0x000007c4) 4271*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_LSB_PHYS(x) (x+0x000007c4) 4272*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_LSB_RMSK 0xffffffff 4273*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_LSB_SHFT 0 4274*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_LSB_IN(x) \ 4275*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_LSB_ADDR(x), HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_LSB_RMSK) 4276*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_LSB_INM(x, mask) \ 4277*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_LSB_ADDR(x), mask) 4278*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_LSB_OUT(x, val) \ 4279*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_LSB_ADDR(x), val) 4280*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_LSB_OUTM(x, mask, val) \ 4281*5113495bSYour Name do {\ 4282*5113495bSYour Name HWIO_INTLOCK(); \ 4283*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_LSB_ADDR(x), mask, val, HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_LSB_IN(x)); \ 4284*5113495bSYour Name HWIO_INTFREE();\ 4285*5113495bSYour Name } while (0) 4286*5113495bSYour Name 4287*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_LSB_HEAD_PTR_MEMADDR_LSB_BMSK 0xffffffff 4288*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_LSB_HEAD_PTR_MEMADDR_LSB_SHFT 0x0 4289*5113495bSYour Name 4290*5113495bSYour Name //// Register TCL_R0_TCL2FW_RING_HP_ADDR_MSB //// 4291*5113495bSYour Name 4292*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_MSB_ADDR(x) (x+0x000007c8) 4293*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_MSB_PHYS(x) (x+0x000007c8) 4294*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_MSB_RMSK 0x000000ff 4295*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_MSB_SHFT 0 4296*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_MSB_IN(x) \ 4297*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_MSB_ADDR(x), HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_MSB_RMSK) 4298*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_MSB_INM(x, mask) \ 4299*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_MSB_ADDR(x), mask) 4300*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_MSB_OUT(x, val) \ 4301*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_MSB_ADDR(x), val) 4302*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_MSB_OUTM(x, mask, val) \ 4303*5113495bSYour Name do {\ 4304*5113495bSYour Name HWIO_INTLOCK(); \ 4305*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_MSB_ADDR(x), mask, val, HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_MSB_IN(x)); \ 4306*5113495bSYour Name HWIO_INTFREE();\ 4307*5113495bSYour Name } while (0) 4308*5113495bSYour Name 4309*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_MSB_HEAD_PTR_MEMADDR_MSB_BMSK 0x000000ff 4310*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_ADDR_MSB_HEAD_PTR_MEMADDR_MSB_SHFT 0x0 4311*5113495bSYour Name 4312*5113495bSYour Name //// Register TCL_R0_TCL2FW_RING_PRODUCER_INT_SETUP //// 4313*5113495bSYour Name 4314*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_SETUP_ADDR(x) (x+0x000007d4) 4315*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_SETUP_PHYS(x) (x+0x000007d4) 4316*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_SETUP_RMSK 0xffffffff 4317*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_SETUP_SHFT 0 4318*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_SETUP_IN(x) \ 4319*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_SETUP_ADDR(x), HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_SETUP_RMSK) 4320*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_SETUP_INM(x, mask) \ 4321*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_SETUP_ADDR(x), mask) 4322*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_SETUP_OUT(x, val) \ 4323*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_SETUP_ADDR(x), val) 4324*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_SETUP_OUTM(x, mask, val) \ 4325*5113495bSYour Name do {\ 4326*5113495bSYour Name HWIO_INTLOCK(); \ 4327*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_SETUP_ADDR(x), mask, val, HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_SETUP_IN(x)); \ 4328*5113495bSYour Name HWIO_INTFREE();\ 4329*5113495bSYour Name } while (0) 4330*5113495bSYour Name 4331*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_SETUP_INTERRUPT_TIMER_THRESHOLD_BMSK 0xffff0000 4332*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_SETUP_INTERRUPT_TIMER_THRESHOLD_SHFT 0x10 4333*5113495bSYour Name 4334*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_SETUP_SW_INTERRUPT_MODE_BMSK 0x00008000 4335*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_SETUP_SW_INTERRUPT_MODE_SHFT 0xf 4336*5113495bSYour Name 4337*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_SETUP_BATCH_COUNTER_THRESHOLD_BMSK 0x00007fff 4338*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_SETUP_BATCH_COUNTER_THRESHOLD_SHFT 0x0 4339*5113495bSYour Name 4340*5113495bSYour Name //// Register TCL_R0_TCL2FW_RING_PRODUCER_INT_STATUS //// 4341*5113495bSYour Name 4342*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_STATUS_ADDR(x) (x+0x000007d8) 4343*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_STATUS_PHYS(x) (x+0x000007d8) 4344*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_STATUS_RMSK 0xffffffff 4345*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_STATUS_SHFT 0 4346*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_STATUS_IN(x) \ 4347*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_STATUS_ADDR(x), HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_STATUS_RMSK) 4348*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_STATUS_INM(x, mask) \ 4349*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_STATUS_ADDR(x), mask) 4350*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_STATUS_OUT(x, val) \ 4351*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_STATUS_ADDR(x), val) 4352*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_STATUS_OUTM(x, mask, val) \ 4353*5113495bSYour Name do {\ 4354*5113495bSYour Name HWIO_INTLOCK(); \ 4355*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_STATUS_ADDR(x), mask, val, HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_STATUS_IN(x)); \ 4356*5113495bSYour Name HWIO_INTFREE();\ 4357*5113495bSYour Name } while (0) 4358*5113495bSYour Name 4359*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_STATUS_CURRENT_INTERRUPT_TIMER_VALUE_BMSK 0xffff0000 4360*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_STATUS_CURRENT_INTERRUPT_TIMER_VALUE_SHFT 0x10 4361*5113495bSYour Name 4362*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_STATUS_CURRENT_SW_INT_WIRE_VALUE_BMSK 0x00008000 4363*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_STATUS_CURRENT_SW_INT_WIRE_VALUE_SHFT 0xf 4364*5113495bSYour Name 4365*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_STATUS_INTERNAL_BATCH_COUNTER_VALUE_BMSK 0x00007fff 4366*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_INT_STATUS_INTERNAL_BATCH_COUNTER_VALUE_SHFT 0x0 4367*5113495bSYour Name 4368*5113495bSYour Name //// Register TCL_R0_TCL2FW_RING_PRODUCER_FULL_COUNTER //// 4369*5113495bSYour Name 4370*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_FULL_COUNTER_ADDR(x) (x+0x000007dc) 4371*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_FULL_COUNTER_PHYS(x) (x+0x000007dc) 4372*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_FULL_COUNTER_RMSK 0x000003ff 4373*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_FULL_COUNTER_SHFT 0 4374*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_FULL_COUNTER_IN(x) \ 4375*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2FW_RING_PRODUCER_FULL_COUNTER_ADDR(x), HWIO_TCL_R0_TCL2FW_RING_PRODUCER_FULL_COUNTER_RMSK) 4376*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_FULL_COUNTER_INM(x, mask) \ 4377*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2FW_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask) 4378*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_FULL_COUNTER_OUT(x, val) \ 4379*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL2FW_RING_PRODUCER_FULL_COUNTER_ADDR(x), val) 4380*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_FULL_COUNTER_OUTM(x, mask, val) \ 4381*5113495bSYour Name do {\ 4382*5113495bSYour Name HWIO_INTLOCK(); \ 4383*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL2FW_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask, val, HWIO_TCL_R0_TCL2FW_RING_PRODUCER_FULL_COUNTER_IN(x)); \ 4384*5113495bSYour Name HWIO_INTFREE();\ 4385*5113495bSYour Name } while (0) 4386*5113495bSYour Name 4387*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_FULL_COUNTER_RING_FULL_COUNTER_BMSK 0x000003ff 4388*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_PRODUCER_FULL_COUNTER_RING_FULL_COUNTER_SHFT 0x0 4389*5113495bSYour Name 4390*5113495bSYour Name //// Register TCL_R0_TCL2FW_RING_HP_TP_SW_OFFSET //// 4391*5113495bSYour Name 4392*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_TP_SW_OFFSET_ADDR(x) (x+0x00000804) 4393*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_TP_SW_OFFSET_PHYS(x) (x+0x00000804) 4394*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_TP_SW_OFFSET_RMSK 0x0000ffff 4395*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_TP_SW_OFFSET_SHFT 0 4396*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_TP_SW_OFFSET_IN(x) \ 4397*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2FW_RING_HP_TP_SW_OFFSET_ADDR(x), HWIO_TCL_R0_TCL2FW_RING_HP_TP_SW_OFFSET_RMSK) 4398*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_TP_SW_OFFSET_INM(x, mask) \ 4399*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_TCL2FW_RING_HP_TP_SW_OFFSET_ADDR(x), mask) 4400*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_TP_SW_OFFSET_OUT(x, val) \ 4401*5113495bSYour Name out_dword( HWIO_TCL_R0_TCL2FW_RING_HP_TP_SW_OFFSET_ADDR(x), val) 4402*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ 4403*5113495bSYour Name do {\ 4404*5113495bSYour Name HWIO_INTLOCK(); \ 4405*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_TCL2FW_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_TCL_R0_TCL2FW_RING_HP_TP_SW_OFFSET_IN(x)); \ 4406*5113495bSYour Name HWIO_INTFREE();\ 4407*5113495bSYour Name } while (0) 4408*5113495bSYour Name 4409*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_TP_SW_OFFSET_HP_TP_OFFSET_VALUE_BMSK 0x0000ffff 4410*5113495bSYour Name #define HWIO_TCL_R0_TCL2FW_RING_HP_TP_SW_OFFSET_HP_TP_OFFSET_VALUE_SHFT 0x0 4411*5113495bSYour Name 4412*5113495bSYour Name //// Register TCL_R0_GXI_TESTBUS_LOWER //// 4413*5113495bSYour Name 4414*5113495bSYour Name #define HWIO_TCL_R0_GXI_TESTBUS_LOWER_ADDR(x) (x+0x00000808) 4415*5113495bSYour Name #define HWIO_TCL_R0_GXI_TESTBUS_LOWER_PHYS(x) (x+0x00000808) 4416*5113495bSYour Name #define HWIO_TCL_R0_GXI_TESTBUS_LOWER_RMSK 0xffffffff 4417*5113495bSYour Name #define HWIO_TCL_R0_GXI_TESTBUS_LOWER_SHFT 0 4418*5113495bSYour Name #define HWIO_TCL_R0_GXI_TESTBUS_LOWER_IN(x) \ 4419*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_TESTBUS_LOWER_ADDR(x), HWIO_TCL_R0_GXI_TESTBUS_LOWER_RMSK) 4420*5113495bSYour Name #define HWIO_TCL_R0_GXI_TESTBUS_LOWER_INM(x, mask) \ 4421*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_TESTBUS_LOWER_ADDR(x), mask) 4422*5113495bSYour Name #define HWIO_TCL_R0_GXI_TESTBUS_LOWER_OUT(x, val) \ 4423*5113495bSYour Name out_dword( HWIO_TCL_R0_GXI_TESTBUS_LOWER_ADDR(x), val) 4424*5113495bSYour Name #define HWIO_TCL_R0_GXI_TESTBUS_LOWER_OUTM(x, mask, val) \ 4425*5113495bSYour Name do {\ 4426*5113495bSYour Name HWIO_INTLOCK(); \ 4427*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_GXI_TESTBUS_LOWER_ADDR(x), mask, val, HWIO_TCL_R0_GXI_TESTBUS_LOWER_IN(x)); \ 4428*5113495bSYour Name HWIO_INTFREE();\ 4429*5113495bSYour Name } while (0) 4430*5113495bSYour Name 4431*5113495bSYour Name #define HWIO_TCL_R0_GXI_TESTBUS_LOWER_VALUE_BMSK 0xffffffff 4432*5113495bSYour Name #define HWIO_TCL_R0_GXI_TESTBUS_LOWER_VALUE_SHFT 0x0 4433*5113495bSYour Name 4434*5113495bSYour Name //// Register TCL_R0_GXI_TESTBUS_UPPER //// 4435*5113495bSYour Name 4436*5113495bSYour Name #define HWIO_TCL_R0_GXI_TESTBUS_UPPER_ADDR(x) (x+0x0000080c) 4437*5113495bSYour Name #define HWIO_TCL_R0_GXI_TESTBUS_UPPER_PHYS(x) (x+0x0000080c) 4438*5113495bSYour Name #define HWIO_TCL_R0_GXI_TESTBUS_UPPER_RMSK 0x000000ff 4439*5113495bSYour Name #define HWIO_TCL_R0_GXI_TESTBUS_UPPER_SHFT 0 4440*5113495bSYour Name #define HWIO_TCL_R0_GXI_TESTBUS_UPPER_IN(x) \ 4441*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_TESTBUS_UPPER_ADDR(x), HWIO_TCL_R0_GXI_TESTBUS_UPPER_RMSK) 4442*5113495bSYour Name #define HWIO_TCL_R0_GXI_TESTBUS_UPPER_INM(x, mask) \ 4443*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_TESTBUS_UPPER_ADDR(x), mask) 4444*5113495bSYour Name #define HWIO_TCL_R0_GXI_TESTBUS_UPPER_OUT(x, val) \ 4445*5113495bSYour Name out_dword( HWIO_TCL_R0_GXI_TESTBUS_UPPER_ADDR(x), val) 4446*5113495bSYour Name #define HWIO_TCL_R0_GXI_TESTBUS_UPPER_OUTM(x, mask, val) \ 4447*5113495bSYour Name do {\ 4448*5113495bSYour Name HWIO_INTLOCK(); \ 4449*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_GXI_TESTBUS_UPPER_ADDR(x), mask, val, HWIO_TCL_R0_GXI_TESTBUS_UPPER_IN(x)); \ 4450*5113495bSYour Name HWIO_INTFREE();\ 4451*5113495bSYour Name } while (0) 4452*5113495bSYour Name 4453*5113495bSYour Name #define HWIO_TCL_R0_GXI_TESTBUS_UPPER_VALUE_BMSK 0x000000ff 4454*5113495bSYour Name #define HWIO_TCL_R0_GXI_TESTBUS_UPPER_VALUE_SHFT 0x0 4455*5113495bSYour Name 4456*5113495bSYour Name //// Register TCL_R0_GXI_SM_STATES_IX_0 //// 4457*5113495bSYour Name 4458*5113495bSYour Name #define HWIO_TCL_R0_GXI_SM_STATES_IX_0_ADDR(x) (x+0x00000810) 4459*5113495bSYour Name #define HWIO_TCL_R0_GXI_SM_STATES_IX_0_PHYS(x) (x+0x00000810) 4460*5113495bSYour Name #define HWIO_TCL_R0_GXI_SM_STATES_IX_0_RMSK 0x00000fff 4461*5113495bSYour Name #define HWIO_TCL_R0_GXI_SM_STATES_IX_0_SHFT 0 4462*5113495bSYour Name #define HWIO_TCL_R0_GXI_SM_STATES_IX_0_IN(x) \ 4463*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_SM_STATES_IX_0_ADDR(x), HWIO_TCL_R0_GXI_SM_STATES_IX_0_RMSK) 4464*5113495bSYour Name #define HWIO_TCL_R0_GXI_SM_STATES_IX_0_INM(x, mask) \ 4465*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_SM_STATES_IX_0_ADDR(x), mask) 4466*5113495bSYour Name #define HWIO_TCL_R0_GXI_SM_STATES_IX_0_OUT(x, val) \ 4467*5113495bSYour Name out_dword( HWIO_TCL_R0_GXI_SM_STATES_IX_0_ADDR(x), val) 4468*5113495bSYour Name #define HWIO_TCL_R0_GXI_SM_STATES_IX_0_OUTM(x, mask, val) \ 4469*5113495bSYour Name do {\ 4470*5113495bSYour Name HWIO_INTLOCK(); \ 4471*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_GXI_SM_STATES_IX_0_ADDR(x), mask, val, HWIO_TCL_R0_GXI_SM_STATES_IX_0_IN(x)); \ 4472*5113495bSYour Name HWIO_INTFREE();\ 4473*5113495bSYour Name } while (0) 4474*5113495bSYour Name 4475*5113495bSYour Name #define HWIO_TCL_R0_GXI_SM_STATES_IX_0_SM_STATE_RD_ADDR_BMSK 0x00000e00 4476*5113495bSYour Name #define HWIO_TCL_R0_GXI_SM_STATES_IX_0_SM_STATE_RD_ADDR_SHFT 0x9 4477*5113495bSYour Name 4478*5113495bSYour Name #define HWIO_TCL_R0_GXI_SM_STATES_IX_0_SM_STATE_WR_ADDR_BMSK 0x000001f0 4479*5113495bSYour Name #define HWIO_TCL_R0_GXI_SM_STATES_IX_0_SM_STATE_WR_ADDR_SHFT 0x4 4480*5113495bSYour Name 4481*5113495bSYour Name #define HWIO_TCL_R0_GXI_SM_STATES_IX_0_SM_STATE_WR_DATA_BMSK 0x0000000f 4482*5113495bSYour Name #define HWIO_TCL_R0_GXI_SM_STATES_IX_0_SM_STATE_WR_DATA_SHFT 0x0 4483*5113495bSYour Name 4484*5113495bSYour Name //// Register TCL_R0_GXI_END_OF_TEST_CHECK //// 4485*5113495bSYour Name 4486*5113495bSYour Name #define HWIO_TCL_R0_GXI_END_OF_TEST_CHECK_ADDR(x) (x+0x00000814) 4487*5113495bSYour Name #define HWIO_TCL_R0_GXI_END_OF_TEST_CHECK_PHYS(x) (x+0x00000814) 4488*5113495bSYour Name #define HWIO_TCL_R0_GXI_END_OF_TEST_CHECK_RMSK 0x00000001 4489*5113495bSYour Name #define HWIO_TCL_R0_GXI_END_OF_TEST_CHECK_SHFT 0 4490*5113495bSYour Name #define HWIO_TCL_R0_GXI_END_OF_TEST_CHECK_IN(x) \ 4491*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_END_OF_TEST_CHECK_ADDR(x), HWIO_TCL_R0_GXI_END_OF_TEST_CHECK_RMSK) 4492*5113495bSYour Name #define HWIO_TCL_R0_GXI_END_OF_TEST_CHECK_INM(x, mask) \ 4493*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_END_OF_TEST_CHECK_ADDR(x), mask) 4494*5113495bSYour Name #define HWIO_TCL_R0_GXI_END_OF_TEST_CHECK_OUT(x, val) \ 4495*5113495bSYour Name out_dword( HWIO_TCL_R0_GXI_END_OF_TEST_CHECK_ADDR(x), val) 4496*5113495bSYour Name #define HWIO_TCL_R0_GXI_END_OF_TEST_CHECK_OUTM(x, mask, val) \ 4497*5113495bSYour Name do {\ 4498*5113495bSYour Name HWIO_INTLOCK(); \ 4499*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_GXI_END_OF_TEST_CHECK_ADDR(x), mask, val, HWIO_TCL_R0_GXI_END_OF_TEST_CHECK_IN(x)); \ 4500*5113495bSYour Name HWIO_INTFREE();\ 4501*5113495bSYour Name } while (0) 4502*5113495bSYour Name 4503*5113495bSYour Name #define HWIO_TCL_R0_GXI_END_OF_TEST_CHECK_END_OF_TEST_SELF_CHECK_BMSK 0x00000001 4504*5113495bSYour Name #define HWIO_TCL_R0_GXI_END_OF_TEST_CHECK_END_OF_TEST_SELF_CHECK_SHFT 0x0 4505*5113495bSYour Name 4506*5113495bSYour Name //// Register TCL_R0_GXI_CLOCK_GATE_DISABLE //// 4507*5113495bSYour Name 4508*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_ADDR(x) (x+0x00000818) 4509*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_PHYS(x) (x+0x00000818) 4510*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_RMSK 0x80000fff 4511*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_SHFT 0 4512*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_IN(x) \ 4513*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_ADDR(x), HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_RMSK) 4514*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_INM(x, mask) \ 4515*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_ADDR(x), mask) 4516*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_OUT(x, val) \ 4517*5113495bSYour Name out_dword( HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_ADDR(x), val) 4518*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_OUTM(x, mask, val) \ 4519*5113495bSYour Name do {\ 4520*5113495bSYour Name HWIO_INTLOCK(); \ 4521*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_ADDR(x), mask, val, HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_IN(x)); \ 4522*5113495bSYour Name HWIO_INTFREE();\ 4523*5113495bSYour Name } while (0) 4524*5113495bSYour Name 4525*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_CLOCK_GATE_EXTEND_BMSK 0x80000000 4526*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_CLOCK_GATE_EXTEND_SHFT 0x1f 4527*5113495bSYour Name 4528*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_SPARE_BMSK 0x00000800 4529*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_SPARE_SHFT 0xb 4530*5113495bSYour Name 4531*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_WDOG_CTR_BMSK 0x00000400 4532*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_WDOG_CTR_SHFT 0xa 4533*5113495bSYour Name 4534*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_RD_FIFO_BMSK 0x00000200 4535*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_RD_FIFO_SHFT 0x9 4536*5113495bSYour Name 4537*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_WR_DATA_FIFO_BMSK 0x00000100 4538*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_WR_DATA_FIFO_SHFT 0x8 4539*5113495bSYour Name 4540*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_WR_ADDR_FIFO_BMSK 0x00000080 4541*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_WR_ADDR_FIFO_SHFT 0x7 4542*5113495bSYour Name 4543*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_RD_AXI_MAS_BMSK 0x00000040 4544*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_RD_AXI_MAS_SHFT 0x6 4545*5113495bSYour Name 4546*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_WR_DATA_AXI_MAS_BMSK 0x00000020 4547*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_WR_DATA_AXI_MAS_SHFT 0x5 4548*5113495bSYour Name 4549*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_WR_ADDR_AXI_MAS_BMSK 0x00000010 4550*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_WR_ADDR_AXI_MAS_SHFT 0x4 4551*5113495bSYour Name 4552*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_WR_DATA_CMD_BMSK 0x00000008 4553*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_WR_DATA_CMD_SHFT 0x3 4554*5113495bSYour Name 4555*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_WR_ADDR_CMD_BMSK 0x00000004 4556*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_WR_ADDR_CMD_SHFT 0x2 4557*5113495bSYour Name 4558*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_RD_CMD_BMSK 0x00000002 4559*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_RD_CMD_SHFT 0x1 4560*5113495bSYour Name 4561*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_CORE_BMSK 0x00000001 4562*5113495bSYour Name #define HWIO_TCL_R0_GXI_CLOCK_GATE_DISABLE_CORE_SHFT 0x0 4563*5113495bSYour Name 4564*5113495bSYour Name //// Register TCL_R0_GXI_GXI_ERR_INTS //// 4565*5113495bSYour Name 4566*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_INTS_ADDR(x) (x+0x0000081c) 4567*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_INTS_PHYS(x) (x+0x0000081c) 4568*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_INTS_RMSK 0x01010101 4569*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_INTS_SHFT 0 4570*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_INTS_IN(x) \ 4571*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_GXI_ERR_INTS_ADDR(x), HWIO_TCL_R0_GXI_GXI_ERR_INTS_RMSK) 4572*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_INTS_INM(x, mask) \ 4573*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_GXI_ERR_INTS_ADDR(x), mask) 4574*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_INTS_OUT(x, val) \ 4575*5113495bSYour Name out_dword( HWIO_TCL_R0_GXI_GXI_ERR_INTS_ADDR(x), val) 4576*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_INTS_OUTM(x, mask, val) \ 4577*5113495bSYour Name do {\ 4578*5113495bSYour Name HWIO_INTLOCK(); \ 4579*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_GXI_GXI_ERR_INTS_ADDR(x), mask, val, HWIO_TCL_R0_GXI_GXI_ERR_INTS_IN(x)); \ 4580*5113495bSYour Name HWIO_INTFREE();\ 4581*5113495bSYour Name } while (0) 4582*5113495bSYour Name 4583*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_INTS_GXI_WR_LAST_ERR_INT_BMSK 0x01000000 4584*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_INTS_GXI_WR_LAST_ERR_INT_SHFT 0x18 4585*5113495bSYour Name 4586*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_INTS_GXI_AXI_WR_ERR_INT_BMSK 0x00010000 4587*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_INTS_GXI_AXI_WR_ERR_INT_SHFT 0x10 4588*5113495bSYour Name 4589*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_INTS_GXI_AXI_RD_ERR_INT_BMSK 0x00000100 4590*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_INTS_GXI_AXI_RD_ERR_INT_SHFT 0x8 4591*5113495bSYour Name 4592*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_INTS_GXI_WDTIMEOUT_INT_BMSK 0x00000001 4593*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_INTS_GXI_WDTIMEOUT_INT_SHFT 0x0 4594*5113495bSYour Name 4595*5113495bSYour Name //// Register TCL_R0_GXI_GXI_ERR_STATS //// 4596*5113495bSYour Name 4597*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_STATS_ADDR(x) (x+0x00000820) 4598*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_STATS_PHYS(x) (x+0x00000820) 4599*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_STATS_RMSK 0x003f3f3f 4600*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_STATS_SHFT 0 4601*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_STATS_IN(x) \ 4602*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_GXI_ERR_STATS_ADDR(x), HWIO_TCL_R0_GXI_GXI_ERR_STATS_RMSK) 4603*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_STATS_INM(x, mask) \ 4604*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_GXI_ERR_STATS_ADDR(x), mask) 4605*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_STATS_OUT(x, val) \ 4606*5113495bSYour Name out_dword( HWIO_TCL_R0_GXI_GXI_ERR_STATS_ADDR(x), val) 4607*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_STATS_OUTM(x, mask, val) \ 4608*5113495bSYour Name do {\ 4609*5113495bSYour Name HWIO_INTLOCK(); \ 4610*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_GXI_GXI_ERR_STATS_ADDR(x), mask, val, HWIO_TCL_R0_GXI_GXI_ERR_STATS_IN(x)); \ 4611*5113495bSYour Name HWIO_INTFREE();\ 4612*5113495bSYour Name } while (0) 4613*5113495bSYour Name 4614*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_STATS_AXI_WR_LAST_ERR_PORT_BMSK 0x003f0000 4615*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_STATS_AXI_WR_LAST_ERR_PORT_SHFT 0x10 4616*5113495bSYour Name 4617*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_STATS_AXI_WR_ERR_PORT_BMSK 0x00003f00 4618*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_STATS_AXI_WR_ERR_PORT_SHFT 0x8 4619*5113495bSYour Name 4620*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_STATS_AXI_RD_ERR_PORT_BMSK 0x0000003f 4621*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_ERR_STATS_AXI_RD_ERR_PORT_SHFT 0x0 4622*5113495bSYour Name 4623*5113495bSYour Name //// Register TCL_R0_GXI_GXI_DEFAULT_CONTROL //// 4624*5113495bSYour Name 4625*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_DEFAULT_CONTROL_ADDR(x) (x+0x00000824) 4626*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_DEFAULT_CONTROL_PHYS(x) (x+0x00000824) 4627*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_DEFAULT_CONTROL_RMSK 0xffff3f3f 4628*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_DEFAULT_CONTROL_SHFT 0 4629*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_DEFAULT_CONTROL_IN(x) \ 4630*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_GXI_DEFAULT_CONTROL_ADDR(x), HWIO_TCL_R0_GXI_GXI_DEFAULT_CONTROL_RMSK) 4631*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_DEFAULT_CONTROL_INM(x, mask) \ 4632*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_GXI_DEFAULT_CONTROL_ADDR(x), mask) 4633*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_DEFAULT_CONTROL_OUT(x, val) \ 4634*5113495bSYour Name out_dword( HWIO_TCL_R0_GXI_GXI_DEFAULT_CONTROL_ADDR(x), val) 4635*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_DEFAULT_CONTROL_OUTM(x, mask, val) \ 4636*5113495bSYour Name do {\ 4637*5113495bSYour Name HWIO_INTLOCK(); \ 4638*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_GXI_GXI_DEFAULT_CONTROL_ADDR(x), mask, val, HWIO_TCL_R0_GXI_GXI_DEFAULT_CONTROL_IN(x)); \ 4639*5113495bSYour Name HWIO_INTFREE();\ 4640*5113495bSYour Name } while (0) 4641*5113495bSYour Name 4642*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_DEFAULT_CONTROL_GXI_DEFAULT_MAX_PENDING_READ_DATA_BMSK 0xff000000 4643*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_DEFAULT_CONTROL_GXI_DEFAULT_MAX_PENDING_READ_DATA_SHFT 0x18 4644*5113495bSYour Name 4645*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_DEFAULT_CONTROL_GXI_DEFAULT_MAX_PENDING_WRITE_DATA_BMSK 0x00ff0000 4646*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_DEFAULT_CONTROL_GXI_DEFAULT_MAX_PENDING_WRITE_DATA_SHFT 0x10 4647*5113495bSYour Name 4648*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_DEFAULT_CONTROL_GXI_DEFAULT_MAX_PENDING_READS_BMSK 0x00003f00 4649*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_DEFAULT_CONTROL_GXI_DEFAULT_MAX_PENDING_READS_SHFT 0x8 4650*5113495bSYour Name 4651*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_DEFAULT_CONTROL_GXI_DEFAULT_MAX_PENDING_WRITES_BMSK 0x0000003f 4652*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_DEFAULT_CONTROL_GXI_DEFAULT_MAX_PENDING_WRITES_SHFT 0x0 4653*5113495bSYour Name 4654*5113495bSYour Name //// Register TCL_R0_GXI_GXI_REDUCED_CONTROL //// 4655*5113495bSYour Name 4656*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_REDUCED_CONTROL_ADDR(x) (x+0x00000828) 4657*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_REDUCED_CONTROL_PHYS(x) (x+0x00000828) 4658*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_REDUCED_CONTROL_RMSK 0xffff3f3f 4659*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_REDUCED_CONTROL_SHFT 0 4660*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_REDUCED_CONTROL_IN(x) \ 4661*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_GXI_REDUCED_CONTROL_ADDR(x), HWIO_TCL_R0_GXI_GXI_REDUCED_CONTROL_RMSK) 4662*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_REDUCED_CONTROL_INM(x, mask) \ 4663*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_GXI_REDUCED_CONTROL_ADDR(x), mask) 4664*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_REDUCED_CONTROL_OUT(x, val) \ 4665*5113495bSYour Name out_dword( HWIO_TCL_R0_GXI_GXI_REDUCED_CONTROL_ADDR(x), val) 4666*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_REDUCED_CONTROL_OUTM(x, mask, val) \ 4667*5113495bSYour Name do {\ 4668*5113495bSYour Name HWIO_INTLOCK(); \ 4669*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_GXI_GXI_REDUCED_CONTROL_ADDR(x), mask, val, HWIO_TCL_R0_GXI_GXI_REDUCED_CONTROL_IN(x)); \ 4670*5113495bSYour Name HWIO_INTFREE();\ 4671*5113495bSYour Name } while (0) 4672*5113495bSYour Name 4673*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_REDUCED_CONTROL_GXI_REDUCED_MAX_PENDING_READ_DATA_BMSK 0xff000000 4674*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_REDUCED_CONTROL_GXI_REDUCED_MAX_PENDING_READ_DATA_SHFT 0x18 4675*5113495bSYour Name 4676*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_REDUCED_CONTROL_GXI_REDUCED_MAX_PENDING_WRITE_DATA_BMSK 0x00ff0000 4677*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_REDUCED_CONTROL_GXI_REDUCED_MAX_PENDING_WRITE_DATA_SHFT 0x10 4678*5113495bSYour Name 4679*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_REDUCED_CONTROL_GXI_REDUCED_MAX_PENDING_READS_BMSK 0x00003f00 4680*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_REDUCED_CONTROL_GXI_REDUCED_MAX_PENDING_READS_SHFT 0x8 4681*5113495bSYour Name 4682*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_REDUCED_CONTROL_GXI_REDUCED_MAX_PENDING_WRITES_BMSK 0x0000003f 4683*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_REDUCED_CONTROL_GXI_REDUCED_MAX_PENDING_WRITES_SHFT 0x0 4684*5113495bSYour Name 4685*5113495bSYour Name //// Register TCL_R0_GXI_GXI_MISC_CONTROL //// 4686*5113495bSYour Name 4687*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_ADDR(x) (x+0x0000082c) 4688*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_PHYS(x) (x+0x0000082c) 4689*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_RMSK 0x0fffffff 4690*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_SHFT 0 4691*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_IN(x) \ 4692*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_ADDR(x), HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_RMSK) 4693*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_INM(x, mask) \ 4694*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_ADDR(x), mask) 4695*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_OUT(x, val) \ 4696*5113495bSYour Name out_dword( HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_ADDR(x), val) 4697*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_OUTM(x, mask, val) \ 4698*5113495bSYour Name do {\ 4699*5113495bSYour Name HWIO_INTLOCK(); \ 4700*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_ADDR(x), mask, val, HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_IN(x)); \ 4701*5113495bSYour Name HWIO_INTFREE();\ 4702*5113495bSYour Name } while (0) 4703*5113495bSYour Name 4704*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_GXI_DELAYED_RD_FLUSH_BMSK 0x08000000 4705*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_GXI_DELAYED_RD_FLUSH_SHFT 0x1b 4706*5113495bSYour Name 4707*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_GXI_DELAYED_WR_FLUSH_BMSK 0x04000000 4708*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_GXI_DELAYED_WR_FLUSH_SHFT 0x1a 4709*5113495bSYour Name 4710*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_GXI_DISABLE_WR_PREFIL_BMSK 0x02000000 4711*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_GXI_DISABLE_WR_PREFIL_SHFT 0x19 4712*5113495bSYour Name 4713*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_GXI_MAX_WR_BOUNDARY_SPLIT_BMSK 0x01000000 4714*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_GXI_MAX_WR_BOUNDARY_SPLIT_SHFT 0x18 4715*5113495bSYour Name 4716*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_GXI_MAX_RD_BOUNDARY_SPLIT_BMSK 0x00800000 4717*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_GXI_MAX_RD_BOUNDARY_SPLIT_SHFT 0x17 4718*5113495bSYour Name 4719*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_GXI_WRITE_BURST_SIZE_BMSK 0x00700000 4720*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_GXI_WRITE_BURST_SIZE_SHFT 0x14 4721*5113495bSYour Name 4722*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_GXI_READ_BURST_SIZE_BMSK 0x000e0000 4723*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_GXI_READ_BURST_SIZE_SHFT 0x11 4724*5113495bSYour Name 4725*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_GXI_READ_ISSUE_THRESHOLD_BMSK 0x0001fe00 4726*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_GXI_READ_ISSUE_THRESHOLD_SHFT 0x9 4727*5113495bSYour Name 4728*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_GXI_WRITE_PREFETCH_THRESHOLD_BMSK 0x000001fe 4729*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_GXI_WRITE_PREFETCH_THRESHOLD_SHFT 0x1 4730*5113495bSYour Name 4731*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_GXI_CLEAR_STATS_BMSK 0x00000001 4732*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_MISC_CONTROL_GXI_CLEAR_STATS_SHFT 0x0 4733*5113495bSYour Name 4734*5113495bSYour Name //// Register TCL_R0_GXI_GXI_WDOG_CONTROL //// 4735*5113495bSYour Name 4736*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WDOG_CONTROL_ADDR(x) (x+0x00000830) 4737*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WDOG_CONTROL_PHYS(x) (x+0x00000830) 4738*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WDOG_CONTROL_RMSK 0xffff0001 4739*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WDOG_CONTROL_SHFT 0 4740*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WDOG_CONTROL_IN(x) \ 4741*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_GXI_WDOG_CONTROL_ADDR(x), HWIO_TCL_R0_GXI_GXI_WDOG_CONTROL_RMSK) 4742*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WDOG_CONTROL_INM(x, mask) \ 4743*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_GXI_WDOG_CONTROL_ADDR(x), mask) 4744*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WDOG_CONTROL_OUT(x, val) \ 4745*5113495bSYour Name out_dword( HWIO_TCL_R0_GXI_GXI_WDOG_CONTROL_ADDR(x), val) 4746*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WDOG_CONTROL_OUTM(x, mask, val) \ 4747*5113495bSYour Name do {\ 4748*5113495bSYour Name HWIO_INTLOCK(); \ 4749*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_GXI_GXI_WDOG_CONTROL_ADDR(x), mask, val, HWIO_TCL_R0_GXI_GXI_WDOG_CONTROL_IN(x)); \ 4750*5113495bSYour Name HWIO_INTFREE();\ 4751*5113495bSYour Name } while (0) 4752*5113495bSYour Name 4753*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WDOG_CONTROL_GXI_WDOG_LIMIT_BMSK 0xffff0000 4754*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WDOG_CONTROL_GXI_WDOG_LIMIT_SHFT 0x10 4755*5113495bSYour Name 4756*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WDOG_CONTROL_GXI_WDOG_DISABLE_BMSK 0x00000001 4757*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WDOG_CONTROL_GXI_WDOG_DISABLE_SHFT 0x0 4758*5113495bSYour Name 4759*5113495bSYour Name //// Register TCL_R0_GXI_GXI_WDOG_STATUS //// 4760*5113495bSYour Name 4761*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WDOG_STATUS_ADDR(x) (x+0x00000834) 4762*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WDOG_STATUS_PHYS(x) (x+0x00000834) 4763*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WDOG_STATUS_RMSK 0x0000ffff 4764*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WDOG_STATUS_SHFT 0 4765*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WDOG_STATUS_IN(x) \ 4766*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_GXI_WDOG_STATUS_ADDR(x), HWIO_TCL_R0_GXI_GXI_WDOG_STATUS_RMSK) 4767*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WDOG_STATUS_INM(x, mask) \ 4768*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_GXI_WDOG_STATUS_ADDR(x), mask) 4769*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WDOG_STATUS_OUT(x, val) \ 4770*5113495bSYour Name out_dword( HWIO_TCL_R0_GXI_GXI_WDOG_STATUS_ADDR(x), val) 4771*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WDOG_STATUS_OUTM(x, mask, val) \ 4772*5113495bSYour Name do {\ 4773*5113495bSYour Name HWIO_INTLOCK(); \ 4774*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_GXI_GXI_WDOG_STATUS_ADDR(x), mask, val, HWIO_TCL_R0_GXI_GXI_WDOG_STATUS_IN(x)); \ 4775*5113495bSYour Name HWIO_INTFREE();\ 4776*5113495bSYour Name } while (0) 4777*5113495bSYour Name 4778*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WDOG_STATUS_GXI_WDOG_STATUS_BMSK 0x0000ffff 4779*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WDOG_STATUS_GXI_WDOG_STATUS_SHFT 0x0 4780*5113495bSYour Name 4781*5113495bSYour Name //// Register TCL_R0_GXI_GXI_IDLE_COUNTERS //// 4782*5113495bSYour Name 4783*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_IDLE_COUNTERS_ADDR(x) (x+0x00000838) 4784*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_IDLE_COUNTERS_PHYS(x) (x+0x00000838) 4785*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_IDLE_COUNTERS_RMSK 0xffffffff 4786*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_IDLE_COUNTERS_SHFT 0 4787*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_IDLE_COUNTERS_IN(x) \ 4788*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_GXI_IDLE_COUNTERS_ADDR(x), HWIO_TCL_R0_GXI_GXI_IDLE_COUNTERS_RMSK) 4789*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_IDLE_COUNTERS_INM(x, mask) \ 4790*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_GXI_IDLE_COUNTERS_ADDR(x), mask) 4791*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_IDLE_COUNTERS_OUT(x, val) \ 4792*5113495bSYour Name out_dword( HWIO_TCL_R0_GXI_GXI_IDLE_COUNTERS_ADDR(x), val) 4793*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_IDLE_COUNTERS_OUTM(x, mask, val) \ 4794*5113495bSYour Name do {\ 4795*5113495bSYour Name HWIO_INTLOCK(); \ 4796*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_GXI_GXI_IDLE_COUNTERS_ADDR(x), mask, val, HWIO_TCL_R0_GXI_GXI_IDLE_COUNTERS_IN(x)); \ 4797*5113495bSYour Name HWIO_INTFREE();\ 4798*5113495bSYour Name } while (0) 4799*5113495bSYour Name 4800*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_IDLE_COUNTERS_GXI_READ_IDLE_CNT_BMSK 0xffff0000 4801*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_IDLE_COUNTERS_GXI_READ_IDLE_CNT_SHFT 0x10 4802*5113495bSYour Name 4803*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_IDLE_COUNTERS_GXI_WRITE_IDLE_CNT_BMSK 0x0000ffff 4804*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_IDLE_COUNTERS_GXI_WRITE_IDLE_CNT_SHFT 0x0 4805*5113495bSYour Name 4806*5113495bSYour Name //// Register TCL_R0_GXI_GXI_RD_LATENCY_CTRL //// 4807*5113495bSYour Name 4808*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_LATENCY_CTRL_ADDR(x) (x+0x0000083c) 4809*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_LATENCY_CTRL_PHYS(x) (x+0x0000083c) 4810*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_LATENCY_CTRL_RMSK 0x000fffff 4811*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_LATENCY_CTRL_SHFT 0 4812*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_LATENCY_CTRL_IN(x) \ 4813*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_GXI_RD_LATENCY_CTRL_ADDR(x), HWIO_TCL_R0_GXI_GXI_RD_LATENCY_CTRL_RMSK) 4814*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_LATENCY_CTRL_INM(x, mask) \ 4815*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_GXI_RD_LATENCY_CTRL_ADDR(x), mask) 4816*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_LATENCY_CTRL_OUT(x, val) \ 4817*5113495bSYour Name out_dword( HWIO_TCL_R0_GXI_GXI_RD_LATENCY_CTRL_ADDR(x), val) 4818*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_LATENCY_CTRL_OUTM(x, mask, val) \ 4819*5113495bSYour Name do {\ 4820*5113495bSYour Name HWIO_INTLOCK(); \ 4821*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_GXI_GXI_RD_LATENCY_CTRL_ADDR(x), mask, val, HWIO_TCL_R0_GXI_GXI_RD_LATENCY_CTRL_IN(x)); \ 4822*5113495bSYour Name HWIO_INTFREE();\ 4823*5113495bSYour Name } while (0) 4824*5113495bSYour Name 4825*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_LATENCY_CTRL_AXI_LATENCY_RANGE_BMSK 0x000e0000 4826*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_LATENCY_CTRL_AXI_LATENCY_RANGE_SHFT 0x11 4827*5113495bSYour Name 4828*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_LATENCY_CTRL_AXI_LATENCY_EN_BMSK 0x00010000 4829*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_LATENCY_CTRL_AXI_LATENCY_EN_SHFT 0x10 4830*5113495bSYour Name 4831*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_LATENCY_CTRL_AXI_LATENCY_MIN_BMSK 0x0000ffff 4832*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_LATENCY_CTRL_AXI_LATENCY_MIN_SHFT 0x0 4833*5113495bSYour Name 4834*5113495bSYour Name //// Register TCL_R0_GXI_GXI_WR_LATENCY_CTRL //// 4835*5113495bSYour Name 4836*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_LATENCY_CTRL_ADDR(x) (x+0x00000840) 4837*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_LATENCY_CTRL_PHYS(x) (x+0x00000840) 4838*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_LATENCY_CTRL_RMSK 0x000fffff 4839*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_LATENCY_CTRL_SHFT 0 4840*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_LATENCY_CTRL_IN(x) \ 4841*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_GXI_WR_LATENCY_CTRL_ADDR(x), HWIO_TCL_R0_GXI_GXI_WR_LATENCY_CTRL_RMSK) 4842*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_LATENCY_CTRL_INM(x, mask) \ 4843*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_GXI_WR_LATENCY_CTRL_ADDR(x), mask) 4844*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_LATENCY_CTRL_OUT(x, val) \ 4845*5113495bSYour Name out_dword( HWIO_TCL_R0_GXI_GXI_WR_LATENCY_CTRL_ADDR(x), val) 4846*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_LATENCY_CTRL_OUTM(x, mask, val) \ 4847*5113495bSYour Name do {\ 4848*5113495bSYour Name HWIO_INTLOCK(); \ 4849*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_GXI_GXI_WR_LATENCY_CTRL_ADDR(x), mask, val, HWIO_TCL_R0_GXI_GXI_WR_LATENCY_CTRL_IN(x)); \ 4850*5113495bSYour Name HWIO_INTFREE();\ 4851*5113495bSYour Name } while (0) 4852*5113495bSYour Name 4853*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_LATENCY_CTRL_AXI_LATENCY_RANGE_BMSK 0x000e0000 4854*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_LATENCY_CTRL_AXI_LATENCY_RANGE_SHFT 0x11 4855*5113495bSYour Name 4856*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_LATENCY_CTRL_AXI_LATENCY_EN_BMSK 0x00010000 4857*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_LATENCY_CTRL_AXI_LATENCY_EN_SHFT 0x10 4858*5113495bSYour Name 4859*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_LATENCY_CTRL_AXI_LATENCY_MIN_BMSK 0x0000ffff 4860*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_LATENCY_CTRL_AXI_LATENCY_MIN_SHFT 0x0 4861*5113495bSYour Name 4862*5113495bSYour Name //// Register TCL_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_0 //// 4863*5113495bSYour Name 4864*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_0_ADDR(x) (x+0x00000844) 4865*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_0_PHYS(x) (x+0x00000844) 4866*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_0_RMSK 0xffffffff 4867*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_0_SHFT 0 4868*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_0_IN(x) \ 4869*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_0_ADDR(x), HWIO_TCL_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_0_RMSK) 4870*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_0_INM(x, mask) \ 4871*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_0_ADDR(x), mask) 4872*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_0_OUT(x, val) \ 4873*5113495bSYour Name out_dword( HWIO_TCL_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_0_ADDR(x), val) 4874*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_0_OUTM(x, mask, val) \ 4875*5113495bSYour Name do {\ 4876*5113495bSYour Name HWIO_INTLOCK(); \ 4877*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_0_ADDR(x), mask, val, HWIO_TCL_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_0_IN(x)); \ 4878*5113495bSYour Name HWIO_INTFREE();\ 4879*5113495bSYour Name } while (0) 4880*5113495bSYour Name 4881*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_0_VALUE_BMSK 0xffffffff 4882*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_0_VALUE_SHFT 0x0 4883*5113495bSYour Name 4884*5113495bSYour Name //// Register TCL_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_1 //// 4885*5113495bSYour Name 4886*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_1_ADDR(x) (x+0x00000848) 4887*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_1_PHYS(x) (x+0x00000848) 4888*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_1_RMSK 0xffffffff 4889*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_1_SHFT 0 4890*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_1_IN(x) \ 4891*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_1_ADDR(x), HWIO_TCL_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_1_RMSK) 4892*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_1_INM(x, mask) \ 4893*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_1_ADDR(x), mask) 4894*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_1_OUT(x, val) \ 4895*5113495bSYour Name out_dword( HWIO_TCL_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_1_ADDR(x), val) 4896*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_1_OUTM(x, mask, val) \ 4897*5113495bSYour Name do {\ 4898*5113495bSYour Name HWIO_INTLOCK(); \ 4899*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_1_ADDR(x), mask, val, HWIO_TCL_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_1_IN(x)); \ 4900*5113495bSYour Name HWIO_INTFREE();\ 4901*5113495bSYour Name } while (0) 4902*5113495bSYour Name 4903*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_1_VALUE_BMSK 0xffffffff 4904*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_1_VALUE_SHFT 0x0 4905*5113495bSYour Name 4906*5113495bSYour Name //// Register TCL_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_0 //// 4907*5113495bSYour Name 4908*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_0_ADDR(x) (x+0x0000084c) 4909*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_0_PHYS(x) (x+0x0000084c) 4910*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_0_RMSK 0xffffffff 4911*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_0_SHFT 0 4912*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_0_IN(x) \ 4913*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_0_ADDR(x), HWIO_TCL_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_0_RMSK) 4914*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_0_INM(x, mask) \ 4915*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_0_ADDR(x), mask) 4916*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_0_OUT(x, val) \ 4917*5113495bSYour Name out_dword( HWIO_TCL_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_0_ADDR(x), val) 4918*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_0_OUTM(x, mask, val) \ 4919*5113495bSYour Name do {\ 4920*5113495bSYour Name HWIO_INTLOCK(); \ 4921*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_0_ADDR(x), mask, val, HWIO_TCL_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_0_IN(x)); \ 4922*5113495bSYour Name HWIO_INTFREE();\ 4923*5113495bSYour Name } while (0) 4924*5113495bSYour Name 4925*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_0_VALUE_BMSK 0xffffffff 4926*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_0_VALUE_SHFT 0x0 4927*5113495bSYour Name 4928*5113495bSYour Name //// Register TCL_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_1 //// 4929*5113495bSYour Name 4930*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_1_ADDR(x) (x+0x00000850) 4931*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_1_PHYS(x) (x+0x00000850) 4932*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_1_RMSK 0xffffffff 4933*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_1_SHFT 0 4934*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_1_IN(x) \ 4935*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_1_ADDR(x), HWIO_TCL_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_1_RMSK) 4936*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_1_INM(x, mask) \ 4937*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_1_ADDR(x), mask) 4938*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_1_OUT(x, val) \ 4939*5113495bSYour Name out_dword( HWIO_TCL_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_1_ADDR(x), val) 4940*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_1_OUTM(x, mask, val) \ 4941*5113495bSYour Name do {\ 4942*5113495bSYour Name HWIO_INTLOCK(); \ 4943*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_1_ADDR(x), mask, val, HWIO_TCL_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_1_IN(x)); \ 4944*5113495bSYour Name HWIO_INTFREE();\ 4945*5113495bSYour Name } while (0) 4946*5113495bSYour Name 4947*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_1_VALUE_BMSK 0xffffffff 4948*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_1_VALUE_SHFT 0x0 4949*5113495bSYour Name 4950*5113495bSYour Name //// Register TCL_R0_GXI_GXI_AXI_OUTSANDING_CTL //// 4951*5113495bSYour Name 4952*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_AXI_OUTSANDING_CTL_ADDR(x) (x+0x00000854) 4953*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_AXI_OUTSANDING_CTL_PHYS(x) (x+0x00000854) 4954*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_AXI_OUTSANDING_CTL_RMSK 0x00009f9f 4955*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_AXI_OUTSANDING_CTL_SHFT 0 4956*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_AXI_OUTSANDING_CTL_IN(x) \ 4957*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_GXI_AXI_OUTSANDING_CTL_ADDR(x), HWIO_TCL_R0_GXI_GXI_AXI_OUTSANDING_CTL_RMSK) 4958*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_AXI_OUTSANDING_CTL_INM(x, mask) \ 4959*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_GXI_GXI_AXI_OUTSANDING_CTL_ADDR(x), mask) 4960*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_AXI_OUTSANDING_CTL_OUT(x, val) \ 4961*5113495bSYour Name out_dword( HWIO_TCL_R0_GXI_GXI_AXI_OUTSANDING_CTL_ADDR(x), val) 4962*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_AXI_OUTSANDING_CTL_OUTM(x, mask, val) \ 4963*5113495bSYour Name do {\ 4964*5113495bSYour Name HWIO_INTLOCK(); \ 4965*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_GXI_GXI_AXI_OUTSANDING_CTL_ADDR(x), mask, val, HWIO_TCL_R0_GXI_GXI_AXI_OUTSANDING_CTL_IN(x)); \ 4966*5113495bSYour Name HWIO_INTFREE();\ 4967*5113495bSYour Name } while (0) 4968*5113495bSYour Name 4969*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_AXI_OUTSANDING_CTL_WR_OVR_EN_BMSK 0x00008000 4970*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_AXI_OUTSANDING_CTL_WR_OVR_EN_SHFT 0xf 4971*5113495bSYour Name 4972*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_AXI_OUTSANDING_CTL_WR_OVR_CNT_BMSK 0x00001f00 4973*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_AXI_OUTSANDING_CTL_WR_OVR_CNT_SHFT 0x8 4974*5113495bSYour Name 4975*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_AXI_OUTSANDING_CTL_RD_OVR_EN_BMSK 0x00000080 4976*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_AXI_OUTSANDING_CTL_RD_OVR_EN_SHFT 0x7 4977*5113495bSYour Name 4978*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_AXI_OUTSANDING_CTL_RD_OVR_CNT_BMSK 0x0000001f 4979*5113495bSYour Name #define HWIO_TCL_R0_GXI_GXI_AXI_OUTSANDING_CTL_RD_OVR_CNT_SHFT 0x0 4980*5113495bSYour Name 4981*5113495bSYour Name //// Register TCL_R0_ASE_GST_BASE_ADDR_LOW //// 4982*5113495bSYour Name 4983*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_BASE_ADDR_LOW_ADDR(x) (x+0x00000858) 4984*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_BASE_ADDR_LOW_PHYS(x) (x+0x00000858) 4985*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_BASE_ADDR_LOW_RMSK 0xffffffff 4986*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_BASE_ADDR_LOW_SHFT 0 4987*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_BASE_ADDR_LOW_IN(x) \ 4988*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_ASE_GST_BASE_ADDR_LOW_ADDR(x), HWIO_TCL_R0_ASE_GST_BASE_ADDR_LOW_RMSK) 4989*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_BASE_ADDR_LOW_INM(x, mask) \ 4990*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_ASE_GST_BASE_ADDR_LOW_ADDR(x), mask) 4991*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_BASE_ADDR_LOW_OUT(x, val) \ 4992*5113495bSYour Name out_dword( HWIO_TCL_R0_ASE_GST_BASE_ADDR_LOW_ADDR(x), val) 4993*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_BASE_ADDR_LOW_OUTM(x, mask, val) \ 4994*5113495bSYour Name do {\ 4995*5113495bSYour Name HWIO_INTLOCK(); \ 4996*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_ASE_GST_BASE_ADDR_LOW_ADDR(x), mask, val, HWIO_TCL_R0_ASE_GST_BASE_ADDR_LOW_IN(x)); \ 4997*5113495bSYour Name HWIO_INTFREE();\ 4998*5113495bSYour Name } while (0) 4999*5113495bSYour Name 5000*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_BASE_ADDR_LOW_VAL_BMSK 0xffffffff 5001*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_BASE_ADDR_LOW_VAL_SHFT 0x0 5002*5113495bSYour Name 5003*5113495bSYour Name //// Register TCL_R0_ASE_GST_BASE_ADDR_HIGH //// 5004*5113495bSYour Name 5005*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_BASE_ADDR_HIGH_ADDR(x) (x+0x0000085c) 5006*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_BASE_ADDR_HIGH_PHYS(x) (x+0x0000085c) 5007*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_BASE_ADDR_HIGH_RMSK 0x000000ff 5008*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_BASE_ADDR_HIGH_SHFT 0 5009*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_BASE_ADDR_HIGH_IN(x) \ 5010*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_ASE_GST_BASE_ADDR_HIGH_ADDR(x), HWIO_TCL_R0_ASE_GST_BASE_ADDR_HIGH_RMSK) 5011*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_BASE_ADDR_HIGH_INM(x, mask) \ 5012*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_ASE_GST_BASE_ADDR_HIGH_ADDR(x), mask) 5013*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_BASE_ADDR_HIGH_OUT(x, val) \ 5014*5113495bSYour Name out_dword( HWIO_TCL_R0_ASE_GST_BASE_ADDR_HIGH_ADDR(x), val) 5015*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_BASE_ADDR_HIGH_OUTM(x, mask, val) \ 5016*5113495bSYour Name do {\ 5017*5113495bSYour Name HWIO_INTLOCK(); \ 5018*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_ASE_GST_BASE_ADDR_HIGH_ADDR(x), mask, val, HWIO_TCL_R0_ASE_GST_BASE_ADDR_HIGH_IN(x)); \ 5019*5113495bSYour Name HWIO_INTFREE();\ 5020*5113495bSYour Name } while (0) 5021*5113495bSYour Name 5022*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_BASE_ADDR_HIGH_VAL_BMSK 0x000000ff 5023*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_BASE_ADDR_HIGH_VAL_SHFT 0x0 5024*5113495bSYour Name 5025*5113495bSYour Name //// Register TCL_R0_ASE_GST_SIZE //// 5026*5113495bSYour Name 5027*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_SIZE_ADDR(x) (x+0x00000860) 5028*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_SIZE_PHYS(x) (x+0x00000860) 5029*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_SIZE_RMSK 0x000fffff 5030*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_SIZE_SHFT 0 5031*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_SIZE_IN(x) \ 5032*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_ASE_GST_SIZE_ADDR(x), HWIO_TCL_R0_ASE_GST_SIZE_RMSK) 5033*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_SIZE_INM(x, mask) \ 5034*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_ASE_GST_SIZE_ADDR(x), mask) 5035*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_SIZE_OUT(x, val) \ 5036*5113495bSYour Name out_dword( HWIO_TCL_R0_ASE_GST_SIZE_ADDR(x), val) 5037*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_SIZE_OUTM(x, mask, val) \ 5038*5113495bSYour Name do {\ 5039*5113495bSYour Name HWIO_INTLOCK(); \ 5040*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_ASE_GST_SIZE_ADDR(x), mask, val, HWIO_TCL_R0_ASE_GST_SIZE_IN(x)); \ 5041*5113495bSYour Name HWIO_INTFREE();\ 5042*5113495bSYour Name } while (0) 5043*5113495bSYour Name 5044*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_SIZE_VAL_BMSK 0x000fffff 5045*5113495bSYour Name #define HWIO_TCL_R0_ASE_GST_SIZE_VAL_SHFT 0x0 5046*5113495bSYour Name 5047*5113495bSYour Name //// Register TCL_R0_ASE_SEARCH_CTRL //// 5048*5113495bSYour Name 5049*5113495bSYour Name #define HWIO_TCL_R0_ASE_SEARCH_CTRL_ADDR(x) (x+0x00000864) 5050*5113495bSYour Name #define HWIO_TCL_R0_ASE_SEARCH_CTRL_PHYS(x) (x+0x00000864) 5051*5113495bSYour Name #define HWIO_TCL_R0_ASE_SEARCH_CTRL_RMSK 0xffff3fff 5052*5113495bSYour Name #define HWIO_TCL_R0_ASE_SEARCH_CTRL_SHFT 0 5053*5113495bSYour Name #define HWIO_TCL_R0_ASE_SEARCH_CTRL_IN(x) \ 5054*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_ASE_SEARCH_CTRL_ADDR(x), HWIO_TCL_R0_ASE_SEARCH_CTRL_RMSK) 5055*5113495bSYour Name #define HWIO_TCL_R0_ASE_SEARCH_CTRL_INM(x, mask) \ 5056*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_ASE_SEARCH_CTRL_ADDR(x), mask) 5057*5113495bSYour Name #define HWIO_TCL_R0_ASE_SEARCH_CTRL_OUT(x, val) \ 5058*5113495bSYour Name out_dword( HWIO_TCL_R0_ASE_SEARCH_CTRL_ADDR(x), val) 5059*5113495bSYour Name #define HWIO_TCL_R0_ASE_SEARCH_CTRL_OUTM(x, mask, val) \ 5060*5113495bSYour Name do {\ 5061*5113495bSYour Name HWIO_INTLOCK(); \ 5062*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_ASE_SEARCH_CTRL_ADDR(x), mask, val, HWIO_TCL_R0_ASE_SEARCH_CTRL_IN(x)); \ 5063*5113495bSYour Name HWIO_INTFREE();\ 5064*5113495bSYour Name } while (0) 5065*5113495bSYour Name 5066*5113495bSYour Name #define HWIO_TCL_R0_ASE_SEARCH_CTRL_TIMEOUT_THRESH_BMSK 0xffff0000 5067*5113495bSYour Name #define HWIO_TCL_R0_ASE_SEARCH_CTRL_TIMEOUT_THRESH_SHFT 0x10 5068*5113495bSYour Name 5069*5113495bSYour Name #define HWIO_TCL_R0_ASE_SEARCH_CTRL_CACHE_CMD_READ_BYPASS_EN_BMSK 0x00002000 5070*5113495bSYour Name #define HWIO_TCL_R0_ASE_SEARCH_CTRL_CACHE_CMD_READ_BYPASS_EN_SHFT 0xd 5071*5113495bSYour Name 5072*5113495bSYour Name #define HWIO_TCL_R0_ASE_SEARCH_CTRL_CACHE_WRITE_BACK_FIX_EN_BMSK 0x00001000 5073*5113495bSYour Name #define HWIO_TCL_R0_ASE_SEARCH_CTRL_CACHE_WRITE_BACK_FIX_EN_SHFT 0xc 5074*5113495bSYour Name 5075*5113495bSYour Name #define HWIO_TCL_R0_ASE_SEARCH_CTRL_CACHE_ONLY_ENTRY_CMD_FIX_EN_BMSK 0x00000800 5076*5113495bSYour Name #define HWIO_TCL_R0_ASE_SEARCH_CTRL_CACHE_ONLY_ENTRY_CMD_FIX_EN_SHFT 0xb 5077*5113495bSYour Name 5078*5113495bSYour Name #define HWIO_TCL_R0_ASE_SEARCH_CTRL_CACHE_FAILURES_ENABLE_BMSK 0x00000400 5079*5113495bSYour Name #define HWIO_TCL_R0_ASE_SEARCH_CTRL_CACHE_FAILURES_ENABLE_SHFT 0xa 5080*5113495bSYour Name 5081*5113495bSYour Name #define HWIO_TCL_R0_ASE_SEARCH_CTRL_CACHE_DISABLE_BMSK 0x00000200 5082*5113495bSYour Name #define HWIO_TCL_R0_ASE_SEARCH_CTRL_CACHE_DISABLE_SHFT 0x9 5083*5113495bSYour Name 5084*5113495bSYour Name #define HWIO_TCL_R0_ASE_SEARCH_CTRL_SEARCH_SWAP_BMSK 0x00000100 5085*5113495bSYour Name #define HWIO_TCL_R0_ASE_SEARCH_CTRL_SEARCH_SWAP_SHFT 0x8 5086*5113495bSYour Name 5087*5113495bSYour Name #define HWIO_TCL_R0_ASE_SEARCH_CTRL_MAX_SEARCH_BMSK 0x000000ff 5088*5113495bSYour Name #define HWIO_TCL_R0_ASE_SEARCH_CTRL_MAX_SEARCH_SHFT 0x0 5089*5113495bSYour Name 5090*5113495bSYour Name //// Register TCL_R0_ASE_WATCHDOG //// 5091*5113495bSYour Name 5092*5113495bSYour Name #define HWIO_TCL_R0_ASE_WATCHDOG_ADDR(x) (x+0x00000868) 5093*5113495bSYour Name #define HWIO_TCL_R0_ASE_WATCHDOG_PHYS(x) (x+0x00000868) 5094*5113495bSYour Name #define HWIO_TCL_R0_ASE_WATCHDOG_RMSK 0xffffffff 5095*5113495bSYour Name #define HWIO_TCL_R0_ASE_WATCHDOG_SHFT 0 5096*5113495bSYour Name #define HWIO_TCL_R0_ASE_WATCHDOG_IN(x) \ 5097*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_ASE_WATCHDOG_ADDR(x), HWIO_TCL_R0_ASE_WATCHDOG_RMSK) 5098*5113495bSYour Name #define HWIO_TCL_R0_ASE_WATCHDOG_INM(x, mask) \ 5099*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_ASE_WATCHDOG_ADDR(x), mask) 5100*5113495bSYour Name #define HWIO_TCL_R0_ASE_WATCHDOG_OUT(x, val) \ 5101*5113495bSYour Name out_dword( HWIO_TCL_R0_ASE_WATCHDOG_ADDR(x), val) 5102*5113495bSYour Name #define HWIO_TCL_R0_ASE_WATCHDOG_OUTM(x, mask, val) \ 5103*5113495bSYour Name do {\ 5104*5113495bSYour Name HWIO_INTLOCK(); \ 5105*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_ASE_WATCHDOG_ADDR(x), mask, val, HWIO_TCL_R0_ASE_WATCHDOG_IN(x)); \ 5106*5113495bSYour Name HWIO_INTFREE();\ 5107*5113495bSYour Name } while (0) 5108*5113495bSYour Name 5109*5113495bSYour Name #define HWIO_TCL_R0_ASE_WATCHDOG_STATUS_BMSK 0xffff0000 5110*5113495bSYour Name #define HWIO_TCL_R0_ASE_WATCHDOG_STATUS_SHFT 0x10 5111*5113495bSYour Name 5112*5113495bSYour Name #define HWIO_TCL_R0_ASE_WATCHDOG_LIMIT_BMSK 0x0000ffff 5113*5113495bSYour Name #define HWIO_TCL_R0_ASE_WATCHDOG_LIMIT_SHFT 0x0 5114*5113495bSYour Name 5115*5113495bSYour Name //// Register TCL_R0_ASE_CLKGATE_DISABLE //// 5116*5113495bSYour Name 5117*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_ADDR(x) (x+0x0000086c) 5118*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_PHYS(x) (x+0x0000086c) 5119*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_RMSK 0xffffffff 5120*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_SHFT 0 5121*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_IN(x) \ 5122*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_ASE_CLKGATE_DISABLE_ADDR(x), HWIO_TCL_R0_ASE_CLKGATE_DISABLE_RMSK) 5123*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_INM(x, mask) \ 5124*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_ASE_CLKGATE_DISABLE_ADDR(x), mask) 5125*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_OUT(x, val) \ 5126*5113495bSYour Name out_dword( HWIO_TCL_R0_ASE_CLKGATE_DISABLE_ADDR(x), val) 5127*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_OUTM(x, mask, val) \ 5128*5113495bSYour Name do {\ 5129*5113495bSYour Name HWIO_INTLOCK(); \ 5130*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_ASE_CLKGATE_DISABLE_ADDR(x), mask, val, HWIO_TCL_R0_ASE_CLKGATE_DISABLE_IN(x)); \ 5131*5113495bSYour Name HWIO_INTFREE();\ 5132*5113495bSYour Name } while (0) 5133*5113495bSYour Name 5134*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_CLK_EXTEND_BMSK 0x80000000 5135*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_CLK_EXTEND_SHFT 0x1f 5136*5113495bSYour Name 5137*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_CPU_IF_EXTEND_BMSK 0x40000000 5138*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_CPU_IF_EXTEND_SHFT 0x1e 5139*5113495bSYour Name 5140*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_GSE_RSRVD_BMSK 0x3ffff800 5141*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_GSE_RSRVD_SHFT 0xb 5142*5113495bSYour Name 5143*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_GSE_TOP_BMSK 0x00000400 5144*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_GSE_TOP_SHFT 0xa 5145*5113495bSYour Name 5146*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_CACHE_BMSK 0x00000200 5147*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_CACHE_SHFT 0x9 5148*5113495bSYour Name 5149*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_SLOTS_ARRAY_HASH_BMSK 0x00000100 5150*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_SLOTS_ARRAY_HASH_SHFT 0x8 5151*5113495bSYour Name 5152*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_APP_RETURN_BMSK 0x00000080 5153*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_APP_RETURN_SHFT 0x7 5154*5113495bSYour Name 5155*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_PEER_RESP_BMSK 0x00000040 5156*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_PEER_RESP_SHFT 0x6 5157*5113495bSYour Name 5158*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_PEER_ISS_BMSK 0x00000020 5159*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_PEER_ISS_SHFT 0x5 5160*5113495bSYour Name 5161*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_MEM_RESP2_BMSK 0x00000010 5162*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_MEM_RESP2_SHFT 0x4 5163*5113495bSYour Name 5164*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_MEM_RESP1_BMSK 0x00000008 5165*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_MEM_RESP1_SHFT 0x3 5166*5113495bSYour Name 5167*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_MEM_ISS2_BMSK 0x00000004 5168*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_MEM_ISS2_SHFT 0x2 5169*5113495bSYour Name 5170*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_MEM_ISS1_BMSK 0x00000002 5171*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_MEM_ISS1_SHFT 0x1 5172*5113495bSYour Name 5173*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_GSE_CTL_BMSK 0x00000001 5174*5113495bSYour Name #define HWIO_TCL_R0_ASE_CLKGATE_DISABLE_GSE_CTL_SHFT 0x0 5175*5113495bSYour Name 5176*5113495bSYour Name //// Register TCL_R0_ASE_WRITE_BACK_PENDING //// 5177*5113495bSYour Name 5178*5113495bSYour Name #define HWIO_TCL_R0_ASE_WRITE_BACK_PENDING_ADDR(x) (x+0x00000870) 5179*5113495bSYour Name #define HWIO_TCL_R0_ASE_WRITE_BACK_PENDING_PHYS(x) (x+0x00000870) 5180*5113495bSYour Name #define HWIO_TCL_R0_ASE_WRITE_BACK_PENDING_RMSK 0x00000001 5181*5113495bSYour Name #define HWIO_TCL_R0_ASE_WRITE_BACK_PENDING_SHFT 0 5182*5113495bSYour Name #define HWIO_TCL_R0_ASE_WRITE_BACK_PENDING_IN(x) \ 5183*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_ASE_WRITE_BACK_PENDING_ADDR(x), HWIO_TCL_R0_ASE_WRITE_BACK_PENDING_RMSK) 5184*5113495bSYour Name #define HWIO_TCL_R0_ASE_WRITE_BACK_PENDING_INM(x, mask) \ 5185*5113495bSYour Name in_dword_masked ( HWIO_TCL_R0_ASE_WRITE_BACK_PENDING_ADDR(x), mask) 5186*5113495bSYour Name #define HWIO_TCL_R0_ASE_WRITE_BACK_PENDING_OUT(x, val) \ 5187*5113495bSYour Name out_dword( HWIO_TCL_R0_ASE_WRITE_BACK_PENDING_ADDR(x), val) 5188*5113495bSYour Name #define HWIO_TCL_R0_ASE_WRITE_BACK_PENDING_OUTM(x, mask, val) \ 5189*5113495bSYour Name do {\ 5190*5113495bSYour Name HWIO_INTLOCK(); \ 5191*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R0_ASE_WRITE_BACK_PENDING_ADDR(x), mask, val, HWIO_TCL_R0_ASE_WRITE_BACK_PENDING_IN(x)); \ 5192*5113495bSYour Name HWIO_INTFREE();\ 5193*5113495bSYour Name } while (0) 5194*5113495bSYour Name 5195*5113495bSYour Name #define HWIO_TCL_R0_ASE_WRITE_BACK_PENDING_STATUS_BMSK 0x00000001 5196*5113495bSYour Name #define HWIO_TCL_R0_ASE_WRITE_BACK_PENDING_STATUS_SHFT 0x0 5197*5113495bSYour Name 5198*5113495bSYour Name //// Register TCL_R1_SM_STATES_IX_0 //// 5199*5113495bSYour Name 5200*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_0_ADDR(x) (x+0x00001000) 5201*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_0_PHYS(x) (x+0x00001000) 5202*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_0_RMSK 0x07ffffff 5203*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_0_SHFT 0 5204*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_0_IN(x) \ 5205*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_SM_STATES_IX_0_ADDR(x), HWIO_TCL_R1_SM_STATES_IX_0_RMSK) 5206*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_0_INM(x, mask) \ 5207*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_SM_STATES_IX_0_ADDR(x), mask) 5208*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_0_OUT(x, val) \ 5209*5113495bSYour Name out_dword( HWIO_TCL_R1_SM_STATES_IX_0_ADDR(x), val) 5210*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_0_OUTM(x, mask, val) \ 5211*5113495bSYour Name do {\ 5212*5113495bSYour Name HWIO_INTLOCK(); \ 5213*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R1_SM_STATES_IX_0_ADDR(x), mask, val, HWIO_TCL_R1_SM_STATES_IX_0_IN(x)); \ 5214*5113495bSYour Name HWIO_INTFREE();\ 5215*5113495bSYour Name } while (0) 5216*5113495bSYour Name 5217*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_0_GSE_CTRL_BMSK 0x07000000 5218*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_0_GSE_CTRL_SHFT 0x18 5219*5113495bSYour Name 5220*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_0_TLV_GEN_BMSK 0x00e00000 5221*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_0_TLV_GEN_SHFT 0x15 5222*5113495bSYour Name 5223*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_0_EXTN_DESC_FETCH_BMSK 0x001c0000 5224*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_0_EXTN_DESC_FETCH_SHFT 0x12 5225*5113495bSYour Name 5226*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_0_MSDU_FETCH_BMSK 0x00038000 5227*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_0_MSDU_FETCH_SHFT 0xf 5228*5113495bSYour Name 5229*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_0_SW2TCL_CREDIT_RING_BMSK 0x00007000 5230*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_0_SW2TCL_CREDIT_RING_SHFT 0xc 5231*5113495bSYour Name 5232*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_0_FW2TCL1_RING_BMSK 0x00000e00 5233*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_0_FW2TCL1_RING_SHFT 0x9 5234*5113495bSYour Name 5235*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_0_SW2TCL3_RING_BMSK 0x000001c0 5236*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_0_SW2TCL3_RING_SHFT 0x6 5237*5113495bSYour Name 5238*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_0_SW2TCL2_RING_BMSK 0x00000038 5239*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_0_SW2TCL2_RING_SHFT 0x3 5240*5113495bSYour Name 5241*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_0_SW2TCL1_RING_BMSK 0x00000007 5242*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_0_SW2TCL1_RING_SHFT 0x0 5243*5113495bSYour Name 5244*5113495bSYour Name //// Register TCL_R1_SM_STATES_IX_1 //// 5245*5113495bSYour Name 5246*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_1_ADDR(x) (x+0x00001004) 5247*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_1_PHYS(x) (x+0x00001004) 5248*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_1_RMSK 0x0003ffff 5249*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_1_SHFT 0 5250*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_1_IN(x) \ 5251*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_SM_STATES_IX_1_ADDR(x), HWIO_TCL_R1_SM_STATES_IX_1_RMSK) 5252*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_1_INM(x, mask) \ 5253*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_SM_STATES_IX_1_ADDR(x), mask) 5254*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_1_OUT(x, val) \ 5255*5113495bSYour Name out_dword( HWIO_TCL_R1_SM_STATES_IX_1_ADDR(x), val) 5256*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_1_OUTM(x, mask, val) \ 5257*5113495bSYour Name do {\ 5258*5113495bSYour Name HWIO_INTLOCK(); \ 5259*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R1_SM_STATES_IX_1_ADDR(x), mask, val, HWIO_TCL_R1_SM_STATES_IX_1_IN(x)); \ 5260*5113495bSYour Name HWIO_INTFREE();\ 5261*5113495bSYour Name } while (0) 5262*5113495bSYour Name 5263*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_1_DSCP_TABLE_ACC_BMSK 0x00038000 5264*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_1_DSCP_TABLE_ACC_SHFT 0xf 5265*5113495bSYour Name 5266*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_1_PROD_CTRL_BMSK 0x00007000 5267*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_1_PROD_CTRL_SHFT 0xc 5268*5113495bSYour Name 5269*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_1_TCL_STATUS2_BMSK 0x00000e00 5270*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_1_TCL_STATUS2_SHFT 0x9 5271*5113495bSYour Name 5272*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_1_TCL_STATUS1_BMSK 0x000001c0 5273*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_1_TCL_STATUS1_SHFT 0x6 5274*5113495bSYour Name 5275*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_1_TCL2FW_BMSK 0x00000038 5276*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_1_TCL2FW_SHFT 0x3 5277*5113495bSYour Name 5278*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_1_TCL2TQM_BMSK 0x00000007 5279*5113495bSYour Name #define HWIO_TCL_R1_SM_STATES_IX_1_TCL2TQM_SHFT 0x0 5280*5113495bSYour Name 5281*5113495bSYour Name //// Register TCL_R1_TESTBUS_CTRL_0 //// 5282*5113495bSYour Name 5283*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_CTRL_0_ADDR(x) (x+0x00001008) 5284*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_CTRL_0_PHYS(x) (x+0x00001008) 5285*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_CTRL_0_RMSK 0x3fffffff 5286*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_CTRL_0_SHFT 0 5287*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_CTRL_0_IN(x) \ 5288*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_TESTBUS_CTRL_0_ADDR(x), HWIO_TCL_R1_TESTBUS_CTRL_0_RMSK) 5289*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_CTRL_0_INM(x, mask) \ 5290*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_TESTBUS_CTRL_0_ADDR(x), mask) 5291*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_CTRL_0_OUT(x, val) \ 5292*5113495bSYour Name out_dword( HWIO_TCL_R1_TESTBUS_CTRL_0_ADDR(x), val) 5293*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_CTRL_0_OUTM(x, mask, val) \ 5294*5113495bSYour Name do {\ 5295*5113495bSYour Name HWIO_INTLOCK(); \ 5296*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R1_TESTBUS_CTRL_0_ADDR(x), mask, val, HWIO_TCL_R1_TESTBUS_CTRL_0_IN(x)); \ 5297*5113495bSYour Name HWIO_INTFREE();\ 5298*5113495bSYour Name } while (0) 5299*5113495bSYour Name 5300*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_CTRL_0_HW_ERROR_INTERRUPT_TESTBUS_OVERWRITE_BMSK 0x20000000 5301*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_CTRL_0_HW_ERROR_INTERRUPT_TESTBUS_OVERWRITE_SHFT 0x1d 5302*5113495bSYour Name 5303*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_CTRL_0_TCL_MAIN_SELECT_BMSK 0x1f800000 5304*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_CTRL_0_TCL_MAIN_SELECT_SHFT 0x17 5305*5113495bSYour Name 5306*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_CTRL_0_GXI_SELECT_BMSK 0x007c0000 5307*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_CTRL_0_GXI_SELECT_SHFT 0x12 5308*5113495bSYour Name 5309*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_CTRL_0_FSE_SELECT_BMSK 0x0003c000 5310*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_CTRL_0_FSE_SELECT_SHFT 0xe 5311*5113495bSYour Name 5312*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_CTRL_0_ASE_SELECT_BMSK 0x00003c00 5313*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_CTRL_0_ASE_SELECT_SHFT 0xa 5314*5113495bSYour Name 5315*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_CTRL_0_PARSER_SELECT_BMSK 0x000003e0 5316*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_CTRL_0_PARSER_SELECT_SHFT 0x5 5317*5113495bSYour Name 5318*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_CTRL_0_CCE_SELECT_BMSK 0x0000001f 5319*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_CTRL_0_CCE_SELECT_SHFT 0x0 5320*5113495bSYour Name 5321*5113495bSYour Name //// Register TCL_R1_TESTBUS_LOW //// 5322*5113495bSYour Name 5323*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_LOW_ADDR(x) (x+0x0000100c) 5324*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_LOW_PHYS(x) (x+0x0000100c) 5325*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_LOW_RMSK 0xffffffff 5326*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_LOW_SHFT 0 5327*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_LOW_IN(x) \ 5328*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_TESTBUS_LOW_ADDR(x), HWIO_TCL_R1_TESTBUS_LOW_RMSK) 5329*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_LOW_INM(x, mask) \ 5330*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_TESTBUS_LOW_ADDR(x), mask) 5331*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_LOW_OUT(x, val) \ 5332*5113495bSYour Name out_dword( HWIO_TCL_R1_TESTBUS_LOW_ADDR(x), val) 5333*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_LOW_OUTM(x, mask, val) \ 5334*5113495bSYour Name do {\ 5335*5113495bSYour Name HWIO_INTLOCK(); \ 5336*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R1_TESTBUS_LOW_ADDR(x), mask, val, HWIO_TCL_R1_TESTBUS_LOW_IN(x)); \ 5337*5113495bSYour Name HWIO_INTFREE();\ 5338*5113495bSYour Name } while (0) 5339*5113495bSYour Name 5340*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_LOW_VAL_BMSK 0xffffffff 5341*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_LOW_VAL_SHFT 0x0 5342*5113495bSYour Name 5343*5113495bSYour Name //// Register TCL_R1_TESTBUS_HIGH //// 5344*5113495bSYour Name 5345*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_HIGH_ADDR(x) (x+0x00001010) 5346*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_HIGH_PHYS(x) (x+0x00001010) 5347*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_HIGH_RMSK 0x000000ff 5348*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_HIGH_SHFT 0 5349*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_HIGH_IN(x) \ 5350*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_TESTBUS_HIGH_ADDR(x), HWIO_TCL_R1_TESTBUS_HIGH_RMSK) 5351*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_HIGH_INM(x, mask) \ 5352*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_TESTBUS_HIGH_ADDR(x), mask) 5353*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_HIGH_OUT(x, val) \ 5354*5113495bSYour Name out_dword( HWIO_TCL_R1_TESTBUS_HIGH_ADDR(x), val) 5355*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_HIGH_OUTM(x, mask, val) \ 5356*5113495bSYour Name do {\ 5357*5113495bSYour Name HWIO_INTLOCK(); \ 5358*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R1_TESTBUS_HIGH_ADDR(x), mask, val, HWIO_TCL_R1_TESTBUS_HIGH_IN(x)); \ 5359*5113495bSYour Name HWIO_INTFREE();\ 5360*5113495bSYour Name } while (0) 5361*5113495bSYour Name 5362*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_HIGH_VAL_BMSK 0x000000ff 5363*5113495bSYour Name #define HWIO_TCL_R1_TESTBUS_HIGH_VAL_SHFT 0x0 5364*5113495bSYour Name 5365*5113495bSYour Name //// Register TCL_R1_EVENTMASK_IX_0 //// 5366*5113495bSYour Name 5367*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_0_ADDR(x) (x+0x00001014) 5368*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_0_PHYS(x) (x+0x00001014) 5369*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_0_RMSK 0xffffffff 5370*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_0_SHFT 0 5371*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_0_IN(x) \ 5372*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_EVENTMASK_IX_0_ADDR(x), HWIO_TCL_R1_EVENTMASK_IX_0_RMSK) 5373*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_0_INM(x, mask) \ 5374*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_EVENTMASK_IX_0_ADDR(x), mask) 5375*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_0_OUT(x, val) \ 5376*5113495bSYour Name out_dword( HWIO_TCL_R1_EVENTMASK_IX_0_ADDR(x), val) 5377*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_0_OUTM(x, mask, val) \ 5378*5113495bSYour Name do {\ 5379*5113495bSYour Name HWIO_INTLOCK(); \ 5380*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R1_EVENTMASK_IX_0_ADDR(x), mask, val, HWIO_TCL_R1_EVENTMASK_IX_0_IN(x)); \ 5381*5113495bSYour Name HWIO_INTFREE();\ 5382*5113495bSYour Name } while (0) 5383*5113495bSYour Name 5384*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_0_VAL_BMSK 0xffffffff 5385*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_0_VAL_SHFT 0x0 5386*5113495bSYour Name 5387*5113495bSYour Name //// Register TCL_R1_EVENTMASK_IX_1 //// 5388*5113495bSYour Name 5389*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_1_ADDR(x) (x+0x00001018) 5390*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_1_PHYS(x) (x+0x00001018) 5391*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_1_RMSK 0xffffffff 5392*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_1_SHFT 0 5393*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_1_IN(x) \ 5394*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_EVENTMASK_IX_1_ADDR(x), HWIO_TCL_R1_EVENTMASK_IX_1_RMSK) 5395*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_1_INM(x, mask) \ 5396*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_EVENTMASK_IX_1_ADDR(x), mask) 5397*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_1_OUT(x, val) \ 5398*5113495bSYour Name out_dword( HWIO_TCL_R1_EVENTMASK_IX_1_ADDR(x), val) 5399*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_1_OUTM(x, mask, val) \ 5400*5113495bSYour Name do {\ 5401*5113495bSYour Name HWIO_INTLOCK(); \ 5402*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R1_EVENTMASK_IX_1_ADDR(x), mask, val, HWIO_TCL_R1_EVENTMASK_IX_1_IN(x)); \ 5403*5113495bSYour Name HWIO_INTFREE();\ 5404*5113495bSYour Name } while (0) 5405*5113495bSYour Name 5406*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_1_VAL_BMSK 0xffffffff 5407*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_1_VAL_SHFT 0x0 5408*5113495bSYour Name 5409*5113495bSYour Name //// Register TCL_R1_EVENTMASK_IX_2 //// 5410*5113495bSYour Name 5411*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_2_ADDR(x) (x+0x0000101c) 5412*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_2_PHYS(x) (x+0x0000101c) 5413*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_2_RMSK 0xffffffff 5414*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_2_SHFT 0 5415*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_2_IN(x) \ 5416*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_EVENTMASK_IX_2_ADDR(x), HWIO_TCL_R1_EVENTMASK_IX_2_RMSK) 5417*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_2_INM(x, mask) \ 5418*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_EVENTMASK_IX_2_ADDR(x), mask) 5419*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_2_OUT(x, val) \ 5420*5113495bSYour Name out_dword( HWIO_TCL_R1_EVENTMASK_IX_2_ADDR(x), val) 5421*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_2_OUTM(x, mask, val) \ 5422*5113495bSYour Name do {\ 5423*5113495bSYour Name HWIO_INTLOCK(); \ 5424*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R1_EVENTMASK_IX_2_ADDR(x), mask, val, HWIO_TCL_R1_EVENTMASK_IX_2_IN(x)); \ 5425*5113495bSYour Name HWIO_INTFREE();\ 5426*5113495bSYour Name } while (0) 5427*5113495bSYour Name 5428*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_2_VAL_BMSK 0xffffffff 5429*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_2_VAL_SHFT 0x0 5430*5113495bSYour Name 5431*5113495bSYour Name //// Register TCL_R1_EVENTMASK_IX_3 //// 5432*5113495bSYour Name 5433*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_3_ADDR(x) (x+0x00001020) 5434*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_3_PHYS(x) (x+0x00001020) 5435*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_3_RMSK 0xffffffff 5436*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_3_SHFT 0 5437*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_3_IN(x) \ 5438*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_EVENTMASK_IX_3_ADDR(x), HWIO_TCL_R1_EVENTMASK_IX_3_RMSK) 5439*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_3_INM(x, mask) \ 5440*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_EVENTMASK_IX_3_ADDR(x), mask) 5441*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_3_OUT(x, val) \ 5442*5113495bSYour Name out_dword( HWIO_TCL_R1_EVENTMASK_IX_3_ADDR(x), val) 5443*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_3_OUTM(x, mask, val) \ 5444*5113495bSYour Name do {\ 5445*5113495bSYour Name HWIO_INTLOCK(); \ 5446*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R1_EVENTMASK_IX_3_ADDR(x), mask, val, HWIO_TCL_R1_EVENTMASK_IX_3_IN(x)); \ 5447*5113495bSYour Name HWIO_INTFREE();\ 5448*5113495bSYour Name } while (0) 5449*5113495bSYour Name 5450*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_3_VAL_BMSK 0xffffffff 5451*5113495bSYour Name #define HWIO_TCL_R1_EVENTMASK_IX_3_VAL_SHFT 0x0 5452*5113495bSYour Name 5453*5113495bSYour Name //// Register TCL_R1_REG_ACCESS_EVENT_GEN_CTRL //// 5454*5113495bSYour Name 5455*5113495bSYour Name #define HWIO_TCL_R1_REG_ACCESS_EVENT_GEN_CTRL_ADDR(x) (x+0x00001024) 5456*5113495bSYour Name #define HWIO_TCL_R1_REG_ACCESS_EVENT_GEN_CTRL_PHYS(x) (x+0x00001024) 5457*5113495bSYour Name #define HWIO_TCL_R1_REG_ACCESS_EVENT_GEN_CTRL_RMSK 0xffffffff 5458*5113495bSYour Name #define HWIO_TCL_R1_REG_ACCESS_EVENT_GEN_CTRL_SHFT 0 5459*5113495bSYour Name #define HWIO_TCL_R1_REG_ACCESS_EVENT_GEN_CTRL_IN(x) \ 5460*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_REG_ACCESS_EVENT_GEN_CTRL_ADDR(x), HWIO_TCL_R1_REG_ACCESS_EVENT_GEN_CTRL_RMSK) 5461*5113495bSYour Name #define HWIO_TCL_R1_REG_ACCESS_EVENT_GEN_CTRL_INM(x, mask) \ 5462*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_REG_ACCESS_EVENT_GEN_CTRL_ADDR(x), mask) 5463*5113495bSYour Name #define HWIO_TCL_R1_REG_ACCESS_EVENT_GEN_CTRL_OUT(x, val) \ 5464*5113495bSYour Name out_dword( HWIO_TCL_R1_REG_ACCESS_EVENT_GEN_CTRL_ADDR(x), val) 5465*5113495bSYour Name #define HWIO_TCL_R1_REG_ACCESS_EVENT_GEN_CTRL_OUTM(x, mask, val) \ 5466*5113495bSYour Name do {\ 5467*5113495bSYour Name HWIO_INTLOCK(); \ 5468*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R1_REG_ACCESS_EVENT_GEN_CTRL_ADDR(x), mask, val, HWIO_TCL_R1_REG_ACCESS_EVENT_GEN_CTRL_IN(x)); \ 5469*5113495bSYour Name HWIO_INTFREE();\ 5470*5113495bSYour Name } while (0) 5471*5113495bSYour Name 5472*5113495bSYour Name #define HWIO_TCL_R1_REG_ACCESS_EVENT_GEN_CTRL_ADDRESS_RANGE_END_BMSK 0xfffe0000 5473*5113495bSYour Name #define HWIO_TCL_R1_REG_ACCESS_EVENT_GEN_CTRL_ADDRESS_RANGE_END_SHFT 0x11 5474*5113495bSYour Name 5475*5113495bSYour Name #define HWIO_TCL_R1_REG_ACCESS_EVENT_GEN_CTRL_ADDRESS_RANGE_START_BMSK 0x0001fffc 5476*5113495bSYour Name #define HWIO_TCL_R1_REG_ACCESS_EVENT_GEN_CTRL_ADDRESS_RANGE_START_SHFT 0x2 5477*5113495bSYour Name 5478*5113495bSYour Name #define HWIO_TCL_R1_REG_ACCESS_EVENT_GEN_CTRL_WRITE_ACCESS_REPORT_ENABLE_BMSK 0x00000002 5479*5113495bSYour Name #define HWIO_TCL_R1_REG_ACCESS_EVENT_GEN_CTRL_WRITE_ACCESS_REPORT_ENABLE_SHFT 0x1 5480*5113495bSYour Name 5481*5113495bSYour Name #define HWIO_TCL_R1_REG_ACCESS_EVENT_GEN_CTRL_READ_ACCESS_REPORT_ENABLE_BMSK 0x00000001 5482*5113495bSYour Name #define HWIO_TCL_R1_REG_ACCESS_EVENT_GEN_CTRL_READ_ACCESS_REPORT_ENABLE_SHFT 0x0 5483*5113495bSYour Name 5484*5113495bSYour Name //// Register TCL_R1_END_OF_TEST_CHECK //// 5485*5113495bSYour Name 5486*5113495bSYour Name #define HWIO_TCL_R1_END_OF_TEST_CHECK_ADDR(x) (x+0x00001028) 5487*5113495bSYour Name #define HWIO_TCL_R1_END_OF_TEST_CHECK_PHYS(x) (x+0x00001028) 5488*5113495bSYour Name #define HWIO_TCL_R1_END_OF_TEST_CHECK_RMSK 0x00000001 5489*5113495bSYour Name #define HWIO_TCL_R1_END_OF_TEST_CHECK_SHFT 0 5490*5113495bSYour Name #define HWIO_TCL_R1_END_OF_TEST_CHECK_IN(x) \ 5491*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_END_OF_TEST_CHECK_ADDR(x), HWIO_TCL_R1_END_OF_TEST_CHECK_RMSK) 5492*5113495bSYour Name #define HWIO_TCL_R1_END_OF_TEST_CHECK_INM(x, mask) \ 5493*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_END_OF_TEST_CHECK_ADDR(x), mask) 5494*5113495bSYour Name #define HWIO_TCL_R1_END_OF_TEST_CHECK_OUT(x, val) \ 5495*5113495bSYour Name out_dword( HWIO_TCL_R1_END_OF_TEST_CHECK_ADDR(x), val) 5496*5113495bSYour Name #define HWIO_TCL_R1_END_OF_TEST_CHECK_OUTM(x, mask, val) \ 5497*5113495bSYour Name do {\ 5498*5113495bSYour Name HWIO_INTLOCK(); \ 5499*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R1_END_OF_TEST_CHECK_ADDR(x), mask, val, HWIO_TCL_R1_END_OF_TEST_CHECK_IN(x)); \ 5500*5113495bSYour Name HWIO_INTFREE();\ 5501*5113495bSYour Name } while (0) 5502*5113495bSYour Name 5503*5113495bSYour Name #define HWIO_TCL_R1_END_OF_TEST_CHECK_END_OF_TEST_SELF_CHECK_BMSK 0x00000001 5504*5113495bSYour Name #define HWIO_TCL_R1_END_OF_TEST_CHECK_END_OF_TEST_SELF_CHECK_SHFT 0x0 5505*5113495bSYour Name 5506*5113495bSYour Name //// Register TCL_R1_ASE_END_OF_TEST_CHECK //// 5507*5113495bSYour Name 5508*5113495bSYour Name #define HWIO_TCL_R1_ASE_END_OF_TEST_CHECK_ADDR(x) (x+0x0000102c) 5509*5113495bSYour Name #define HWIO_TCL_R1_ASE_END_OF_TEST_CHECK_PHYS(x) (x+0x0000102c) 5510*5113495bSYour Name #define HWIO_TCL_R1_ASE_END_OF_TEST_CHECK_RMSK 0x00000001 5511*5113495bSYour Name #define HWIO_TCL_R1_ASE_END_OF_TEST_CHECK_SHFT 0 5512*5113495bSYour Name #define HWIO_TCL_R1_ASE_END_OF_TEST_CHECK_IN(x) \ 5513*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_ASE_END_OF_TEST_CHECK_ADDR(x), HWIO_TCL_R1_ASE_END_OF_TEST_CHECK_RMSK) 5514*5113495bSYour Name #define HWIO_TCL_R1_ASE_END_OF_TEST_CHECK_INM(x, mask) \ 5515*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_ASE_END_OF_TEST_CHECK_ADDR(x), mask) 5516*5113495bSYour Name #define HWIO_TCL_R1_ASE_END_OF_TEST_CHECK_OUT(x, val) \ 5517*5113495bSYour Name out_dword( HWIO_TCL_R1_ASE_END_OF_TEST_CHECK_ADDR(x), val) 5518*5113495bSYour Name #define HWIO_TCL_R1_ASE_END_OF_TEST_CHECK_OUTM(x, mask, val) \ 5519*5113495bSYour Name do {\ 5520*5113495bSYour Name HWIO_INTLOCK(); \ 5521*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R1_ASE_END_OF_TEST_CHECK_ADDR(x), mask, val, HWIO_TCL_R1_ASE_END_OF_TEST_CHECK_IN(x)); \ 5522*5113495bSYour Name HWIO_INTFREE();\ 5523*5113495bSYour Name } while (0) 5524*5113495bSYour Name 5525*5113495bSYour Name #define HWIO_TCL_R1_ASE_END_OF_TEST_CHECK_END_OF_TEST_SELF_CHECK_BMSK 0x00000001 5526*5113495bSYour Name #define HWIO_TCL_R1_ASE_END_OF_TEST_CHECK_END_OF_TEST_SELF_CHECK_SHFT 0x0 5527*5113495bSYour Name 5528*5113495bSYour Name //// Register TCL_R1_ASE_DEBUG_CLEAR_COUNTERS //// 5529*5113495bSYour Name 5530*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_CLEAR_COUNTERS_ADDR(x) (x+0x00001030) 5531*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_CLEAR_COUNTERS_PHYS(x) (x+0x00001030) 5532*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_CLEAR_COUNTERS_RMSK 0x00000001 5533*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_CLEAR_COUNTERS_SHFT 0 5534*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_CLEAR_COUNTERS_IN(x) \ 5535*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_ASE_DEBUG_CLEAR_COUNTERS_ADDR(x), HWIO_TCL_R1_ASE_DEBUG_CLEAR_COUNTERS_RMSK) 5536*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_CLEAR_COUNTERS_INM(x, mask) \ 5537*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_ASE_DEBUG_CLEAR_COUNTERS_ADDR(x), mask) 5538*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_CLEAR_COUNTERS_OUT(x, val) \ 5539*5113495bSYour Name out_dword( HWIO_TCL_R1_ASE_DEBUG_CLEAR_COUNTERS_ADDR(x), val) 5540*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_CLEAR_COUNTERS_OUTM(x, mask, val) \ 5541*5113495bSYour Name do {\ 5542*5113495bSYour Name HWIO_INTLOCK(); \ 5543*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R1_ASE_DEBUG_CLEAR_COUNTERS_ADDR(x), mask, val, HWIO_TCL_R1_ASE_DEBUG_CLEAR_COUNTERS_IN(x)); \ 5544*5113495bSYour Name HWIO_INTFREE();\ 5545*5113495bSYour Name } while (0) 5546*5113495bSYour Name 5547*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_CLEAR_COUNTERS_EN_BMSK 0x00000001 5548*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_CLEAR_COUNTERS_EN_SHFT 0x0 5549*5113495bSYour Name 5550*5113495bSYour Name //// Register TCL_R1_ASE_DEBUG_NUM_CACHE_HITS_COUNTER //// 5551*5113495bSYour Name 5552*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_NUM_CACHE_HITS_COUNTER_ADDR(x) (x+0x00001034) 5553*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_NUM_CACHE_HITS_COUNTER_PHYS(x) (x+0x00001034) 5554*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_NUM_CACHE_HITS_COUNTER_RMSK 0xffffffff 5555*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_NUM_CACHE_HITS_COUNTER_SHFT 0 5556*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_NUM_CACHE_HITS_COUNTER_IN(x) \ 5557*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_ASE_DEBUG_NUM_CACHE_HITS_COUNTER_ADDR(x), HWIO_TCL_R1_ASE_DEBUG_NUM_CACHE_HITS_COUNTER_RMSK) 5558*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_NUM_CACHE_HITS_COUNTER_INM(x, mask) \ 5559*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_ASE_DEBUG_NUM_CACHE_HITS_COUNTER_ADDR(x), mask) 5560*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_NUM_CACHE_HITS_COUNTER_OUT(x, val) \ 5561*5113495bSYour Name out_dword( HWIO_TCL_R1_ASE_DEBUG_NUM_CACHE_HITS_COUNTER_ADDR(x), val) 5562*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_NUM_CACHE_HITS_COUNTER_OUTM(x, mask, val) \ 5563*5113495bSYour Name do {\ 5564*5113495bSYour Name HWIO_INTLOCK(); \ 5565*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R1_ASE_DEBUG_NUM_CACHE_HITS_COUNTER_ADDR(x), mask, val, HWIO_TCL_R1_ASE_DEBUG_NUM_CACHE_HITS_COUNTER_IN(x)); \ 5566*5113495bSYour Name HWIO_INTFREE();\ 5567*5113495bSYour Name } while (0) 5568*5113495bSYour Name 5569*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_NUM_CACHE_HITS_COUNTER_VAL_BMSK 0xffffffff 5570*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_NUM_CACHE_HITS_COUNTER_VAL_SHFT 0x0 5571*5113495bSYour Name 5572*5113495bSYour Name //// Register TCL_R1_ASE_DEBUG_NUM_SEARCHES_COUNTER //// 5573*5113495bSYour Name 5574*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_NUM_SEARCHES_COUNTER_ADDR(x) (x+0x00001038) 5575*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_NUM_SEARCHES_COUNTER_PHYS(x) (x+0x00001038) 5576*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_NUM_SEARCHES_COUNTER_RMSK 0xffffffff 5577*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_NUM_SEARCHES_COUNTER_SHFT 0 5578*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_NUM_SEARCHES_COUNTER_IN(x) \ 5579*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_ASE_DEBUG_NUM_SEARCHES_COUNTER_ADDR(x), HWIO_TCL_R1_ASE_DEBUG_NUM_SEARCHES_COUNTER_RMSK) 5580*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_NUM_SEARCHES_COUNTER_INM(x, mask) \ 5581*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_ASE_DEBUG_NUM_SEARCHES_COUNTER_ADDR(x), mask) 5582*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_NUM_SEARCHES_COUNTER_OUT(x, val) \ 5583*5113495bSYour Name out_dword( HWIO_TCL_R1_ASE_DEBUG_NUM_SEARCHES_COUNTER_ADDR(x), val) 5584*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_NUM_SEARCHES_COUNTER_OUTM(x, mask, val) \ 5585*5113495bSYour Name do {\ 5586*5113495bSYour Name HWIO_INTLOCK(); \ 5587*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R1_ASE_DEBUG_NUM_SEARCHES_COUNTER_ADDR(x), mask, val, HWIO_TCL_R1_ASE_DEBUG_NUM_SEARCHES_COUNTER_IN(x)); \ 5588*5113495bSYour Name HWIO_INTFREE();\ 5589*5113495bSYour Name } while (0) 5590*5113495bSYour Name 5591*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_NUM_SEARCHES_COUNTER_VAL_BMSK 0xffffffff 5592*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_NUM_SEARCHES_COUNTER_VAL_SHFT 0x0 5593*5113495bSYour Name 5594*5113495bSYour Name //// Register TCL_R1_ASE_DEBUG_CACHE_OCCUPANCY_COUNTER //// 5595*5113495bSYour Name 5596*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_CACHE_OCCUPANCY_COUNTER_ADDR(x) (x+0x0000103c) 5597*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_CACHE_OCCUPANCY_COUNTER_PHYS(x) (x+0x0000103c) 5598*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_CACHE_OCCUPANCY_COUNTER_RMSK 0x000fffff 5599*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_CACHE_OCCUPANCY_COUNTER_SHFT 0 5600*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_CACHE_OCCUPANCY_COUNTER_IN(x) \ 5601*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_ASE_DEBUG_CACHE_OCCUPANCY_COUNTER_ADDR(x), HWIO_TCL_R1_ASE_DEBUG_CACHE_OCCUPANCY_COUNTER_RMSK) 5602*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_CACHE_OCCUPANCY_COUNTER_INM(x, mask) \ 5603*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_ASE_DEBUG_CACHE_OCCUPANCY_COUNTER_ADDR(x), mask) 5604*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_CACHE_OCCUPANCY_COUNTER_OUT(x, val) \ 5605*5113495bSYour Name out_dword( HWIO_TCL_R1_ASE_DEBUG_CACHE_OCCUPANCY_COUNTER_ADDR(x), val) 5606*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_CACHE_OCCUPANCY_COUNTER_OUTM(x, mask, val) \ 5607*5113495bSYour Name do {\ 5608*5113495bSYour Name HWIO_INTLOCK(); \ 5609*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R1_ASE_DEBUG_CACHE_OCCUPANCY_COUNTER_ADDR(x), mask, val, HWIO_TCL_R1_ASE_DEBUG_CACHE_OCCUPANCY_COUNTER_IN(x)); \ 5610*5113495bSYour Name HWIO_INTFREE();\ 5611*5113495bSYour Name } while (0) 5612*5113495bSYour Name 5613*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_CACHE_OCCUPANCY_COUNTER_PEAK_BMSK 0x000ffc00 5614*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_CACHE_OCCUPANCY_COUNTER_PEAK_SHFT 0xa 5615*5113495bSYour Name 5616*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_CACHE_OCCUPANCY_COUNTER_CURR_BMSK 0x000003ff 5617*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_CACHE_OCCUPANCY_COUNTER_CURR_SHFT 0x0 5618*5113495bSYour Name 5619*5113495bSYour Name //// Register TCL_R1_ASE_DEBUG_SEARCH_STAT_COUNTER //// 5620*5113495bSYour Name 5621*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_SEARCH_STAT_COUNTER_ADDR(x) (x+0x00001040) 5622*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_SEARCH_STAT_COUNTER_PHYS(x) (x+0x00001040) 5623*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_SEARCH_STAT_COUNTER_RMSK 0x03ffffff 5624*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_SEARCH_STAT_COUNTER_SHFT 0 5625*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_SEARCH_STAT_COUNTER_IN(x) \ 5626*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_ASE_DEBUG_SEARCH_STAT_COUNTER_ADDR(x), HWIO_TCL_R1_ASE_DEBUG_SEARCH_STAT_COUNTER_RMSK) 5627*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_SEARCH_STAT_COUNTER_INM(x, mask) \ 5628*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_ASE_DEBUG_SEARCH_STAT_COUNTER_ADDR(x), mask) 5629*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_SEARCH_STAT_COUNTER_OUT(x, val) \ 5630*5113495bSYour Name out_dword( HWIO_TCL_R1_ASE_DEBUG_SEARCH_STAT_COUNTER_ADDR(x), val) 5631*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_SEARCH_STAT_COUNTER_OUTM(x, mask, val) \ 5632*5113495bSYour Name do {\ 5633*5113495bSYour Name HWIO_INTLOCK(); \ 5634*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R1_ASE_DEBUG_SEARCH_STAT_COUNTER_ADDR(x), mask, val, HWIO_TCL_R1_ASE_DEBUG_SEARCH_STAT_COUNTER_IN(x)); \ 5635*5113495bSYour Name HWIO_INTFREE();\ 5636*5113495bSYour Name } while (0) 5637*5113495bSYour Name 5638*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_SEARCH_STAT_COUNTER_SQUARE_OCCUPANCY_BMSK 0x03fffc00 5639*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_SEARCH_STAT_COUNTER_SQUARE_OCCUPANCY_SHFT 0xa 5640*5113495bSYour Name 5641*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_SEARCH_STAT_COUNTER_PEAK_NUM_SEARCH_PENDING_BMSK 0x000003e0 5642*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_SEARCH_STAT_COUNTER_PEAK_NUM_SEARCH_PENDING_SHFT 0x5 5643*5113495bSYour Name 5644*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_SEARCH_STAT_COUNTER_NUM_SEARCH_PENDING_BMSK 0x0000001f 5645*5113495bSYour Name #define HWIO_TCL_R1_ASE_DEBUG_SEARCH_STAT_COUNTER_NUM_SEARCH_PENDING_SHFT 0x0 5646*5113495bSYour Name 5647*5113495bSYour Name //// Register TCL_R1_ASE_SM_STATES //// 5648*5113495bSYour Name 5649*5113495bSYour Name #define HWIO_TCL_R1_ASE_SM_STATES_ADDR(x) (x+0x00001044) 5650*5113495bSYour Name #define HWIO_TCL_R1_ASE_SM_STATES_PHYS(x) (x+0x00001044) 5651*5113495bSYour Name #define HWIO_TCL_R1_ASE_SM_STATES_RMSK 0x003fffff 5652*5113495bSYour Name #define HWIO_TCL_R1_ASE_SM_STATES_SHFT 0 5653*5113495bSYour Name #define HWIO_TCL_R1_ASE_SM_STATES_IN(x) \ 5654*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_ASE_SM_STATES_ADDR(x), HWIO_TCL_R1_ASE_SM_STATES_RMSK) 5655*5113495bSYour Name #define HWIO_TCL_R1_ASE_SM_STATES_INM(x, mask) \ 5656*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_ASE_SM_STATES_ADDR(x), mask) 5657*5113495bSYour Name #define HWIO_TCL_R1_ASE_SM_STATES_OUT(x, val) \ 5658*5113495bSYour Name out_dword( HWIO_TCL_R1_ASE_SM_STATES_ADDR(x), val) 5659*5113495bSYour Name #define HWIO_TCL_R1_ASE_SM_STATES_OUTM(x, mask, val) \ 5660*5113495bSYour Name do {\ 5661*5113495bSYour Name HWIO_INTLOCK(); \ 5662*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R1_ASE_SM_STATES_ADDR(x), mask, val, HWIO_TCL_R1_ASE_SM_STATES_IN(x)); \ 5663*5113495bSYour Name HWIO_INTFREE();\ 5664*5113495bSYour Name } while (0) 5665*5113495bSYour Name 5666*5113495bSYour Name #define HWIO_TCL_R1_ASE_SM_STATES_GSE_CTRL_STATE_BMSK 0x00300000 5667*5113495bSYour Name #define HWIO_TCL_R1_ASE_SM_STATES_GSE_CTRL_STATE_SHFT 0x14 5668*5113495bSYour Name 5669*5113495bSYour Name #define HWIO_TCL_R1_ASE_SM_STATES_CACHE_CHK_STATE_BMSK 0x000c0000 5670*5113495bSYour Name #define HWIO_TCL_R1_ASE_SM_STATES_CACHE_CHK_STATE_SHFT 0x12 5671*5113495bSYour Name 5672*5113495bSYour Name #define HWIO_TCL_R1_ASE_SM_STATES_MEM_ISS1_STATE_BMSK 0x00030000 5673*5113495bSYour Name #define HWIO_TCL_R1_ASE_SM_STATES_MEM_ISS1_STATE_SHFT 0x10 5674*5113495bSYour Name 5675*5113495bSYour Name #define HWIO_TCL_R1_ASE_SM_STATES_MEM_ISS2_STATE_BMSK 0x0000c000 5676*5113495bSYour Name #define HWIO_TCL_R1_ASE_SM_STATES_MEM_ISS2_STATE_SHFT 0xe 5677*5113495bSYour Name 5678*5113495bSYour Name #define HWIO_TCL_R1_ASE_SM_STATES_MEM_RESP1_STATE_BMSK 0x00003800 5679*5113495bSYour Name #define HWIO_TCL_R1_ASE_SM_STATES_MEM_RESP1_STATE_SHFT 0xb 5680*5113495bSYour Name 5681*5113495bSYour Name #define HWIO_TCL_R1_ASE_SM_STATES_MEM_RESP2_STATE_BMSK 0x00000700 5682*5113495bSYour Name #define HWIO_TCL_R1_ASE_SM_STATES_MEM_RESP2_STATE_SHFT 0x8 5683*5113495bSYour Name 5684*5113495bSYour Name #define HWIO_TCL_R1_ASE_SM_STATES_PEER_ISS_STATE_BMSK 0x000000c0 5685*5113495bSYour Name #define HWIO_TCL_R1_ASE_SM_STATES_PEER_ISS_STATE_SHFT 0x6 5686*5113495bSYour Name 5687*5113495bSYour Name #define HWIO_TCL_R1_ASE_SM_STATES_PEER_RESP_STATE_BMSK 0x00000030 5688*5113495bSYour Name #define HWIO_TCL_R1_ASE_SM_STATES_PEER_RESP_STATE_SHFT 0x4 5689*5113495bSYour Name 5690*5113495bSYour Name #define HWIO_TCL_R1_ASE_SM_STATES_APP_RETURN_STATE_BMSK 0x0000000f 5691*5113495bSYour Name #define HWIO_TCL_R1_ASE_SM_STATES_APP_RETURN_STATE_SHFT 0x0 5692*5113495bSYour Name 5693*5113495bSYour Name //// Register TCL_R1_ASE_CACHE_DEBUG //// 5694*5113495bSYour Name 5695*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_ADDR(x) (x+0x00001048) 5696*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_PHYS(x) (x+0x00001048) 5697*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_RMSK 0x000003ff 5698*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_SHFT 0 5699*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_IN(x) \ 5700*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_ASE_CACHE_DEBUG_ADDR(x), HWIO_TCL_R1_ASE_CACHE_DEBUG_RMSK) 5701*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_INM(x, mask) \ 5702*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_ASE_CACHE_DEBUG_ADDR(x), mask) 5703*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_OUT(x, val) \ 5704*5113495bSYour Name out_dword( HWIO_TCL_R1_ASE_CACHE_DEBUG_ADDR(x), val) 5705*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_OUTM(x, mask, val) \ 5706*5113495bSYour Name do {\ 5707*5113495bSYour Name HWIO_INTLOCK(); \ 5708*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R1_ASE_CACHE_DEBUG_ADDR(x), mask, val, HWIO_TCL_R1_ASE_CACHE_DEBUG_IN(x)); \ 5709*5113495bSYour Name HWIO_INTFREE();\ 5710*5113495bSYour Name } while (0) 5711*5113495bSYour Name 5712*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_READ_IDX_BMSK 0x000003ff 5713*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_READ_IDX_SHFT 0x0 5714*5113495bSYour Name 5715*5113495bSYour Name //// Register TCL_R1_ASE_CACHE_DEBUG_ENTRY_STATS //// 5716*5113495bSYour Name 5717*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_STATS_ADDR(x) (x+0x0000104c) 5718*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_STATS_PHYS(x) (x+0x0000104c) 5719*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_STATS_RMSK 0x007fffff 5720*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_STATS_SHFT 0 5721*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_STATS_IN(x) \ 5722*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_STATS_ADDR(x), HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_STATS_RMSK) 5723*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_STATS_INM(x, mask) \ 5724*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_STATS_ADDR(x), mask) 5725*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_STATS_OUT(x, val) \ 5726*5113495bSYour Name out_dword( HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_STATS_ADDR(x), val) 5727*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_STATS_OUTM(x, mask, val) \ 5728*5113495bSYour Name do {\ 5729*5113495bSYour Name HWIO_INTLOCK(); \ 5730*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_STATS_ADDR(x), mask, val, HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_STATS_IN(x)); \ 5731*5113495bSYour Name HWIO_INTFREE();\ 5732*5113495bSYour Name } while (0) 5733*5113495bSYour Name 5734*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_STATS_GST_IDX_BMSK 0x007ffff8 5735*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_STATS_GST_IDX_SHFT 0x3 5736*5113495bSYour Name 5737*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_STATS_CACHE_ONLY_BMSK 0x00000004 5738*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_STATS_CACHE_ONLY_SHFT 0x2 5739*5113495bSYour Name 5740*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_STATS_DIRTY_BMSK 0x00000002 5741*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_STATS_DIRTY_SHFT 0x1 5742*5113495bSYour Name 5743*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_STATS_VALID_BMSK 0x00000001 5744*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_STATS_VALID_SHFT 0x0 5745*5113495bSYour Name 5746*5113495bSYour Name //// Register TCL_R1_ASE_CACHE_DEBUG_ENTRY_n //// 5747*5113495bSYour Name 5748*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_n_ADDR(base, n) (base+0x1050+0x4*n) 5749*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_n_PHYS(base, n) (base+0x1050+0x4*n) 5750*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_n_RMSK 0xffffffff 5751*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_n_SHFT 0 5752*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_n_MAXn 31 5753*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_n_INI(base, n) \ 5754*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_n_ADDR(base, n), HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_n_RMSK) 5755*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_n_INMI(base, n, mask) \ 5756*5113495bSYour Name in_dword_masked ( HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_n_ADDR(base, n), mask) 5757*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_n_OUTI(base, n, val) \ 5758*5113495bSYour Name out_dword( HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_n_ADDR(base, n), val) 5759*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_n_OUTMI(base, n, mask, val) \ 5760*5113495bSYour Name do {\ 5761*5113495bSYour Name HWIO_INTLOCK(); \ 5762*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_n_ADDR(base, n), mask, val, HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_n_INI(base, n)); \ 5763*5113495bSYour Name HWIO_INTFREE();\ 5764*5113495bSYour Name } while (0) 5765*5113495bSYour Name 5766*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_n_VAL_BMSK 0xffffffff 5767*5113495bSYour Name #define HWIO_TCL_R1_ASE_CACHE_DEBUG_ENTRY_n_VAL_SHFT 0x0 5768*5113495bSYour Name 5769*5113495bSYour Name //// Register TCL_R2_SW2TCL1_RING_HP //// 5770*5113495bSYour Name 5771*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL1_RING_HP_ADDR(x) (x+0x00002000) 5772*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL1_RING_HP_PHYS(x) (x+0x00002000) 5773*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL1_RING_HP_RMSK 0x000fffff 5774*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL1_RING_HP_SHFT 0 5775*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL1_RING_HP_IN(x) \ 5776*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_SW2TCL1_RING_HP_ADDR(x), HWIO_TCL_R2_SW2TCL1_RING_HP_RMSK) 5777*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL1_RING_HP_INM(x, mask) \ 5778*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_SW2TCL1_RING_HP_ADDR(x), mask) 5779*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL1_RING_HP_OUT(x, val) \ 5780*5113495bSYour Name out_dword( HWIO_TCL_R2_SW2TCL1_RING_HP_ADDR(x), val) 5781*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL1_RING_HP_OUTM(x, mask, val) \ 5782*5113495bSYour Name do {\ 5783*5113495bSYour Name HWIO_INTLOCK(); \ 5784*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R2_SW2TCL1_RING_HP_ADDR(x), mask, val, HWIO_TCL_R2_SW2TCL1_RING_HP_IN(x)); \ 5785*5113495bSYour Name HWIO_INTFREE();\ 5786*5113495bSYour Name } while (0) 5787*5113495bSYour Name 5788*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL1_RING_HP_HEAD_PTR_BMSK 0x000fffff 5789*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL1_RING_HP_HEAD_PTR_SHFT 0x0 5790*5113495bSYour Name 5791*5113495bSYour Name //// Register TCL_R2_SW2TCL1_RING_TP //// 5792*5113495bSYour Name 5793*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL1_RING_TP_ADDR(x) (x+0x00002004) 5794*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL1_RING_TP_PHYS(x) (x+0x00002004) 5795*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL1_RING_TP_RMSK 0x000fffff 5796*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL1_RING_TP_SHFT 0 5797*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL1_RING_TP_IN(x) \ 5798*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_SW2TCL1_RING_TP_ADDR(x), HWIO_TCL_R2_SW2TCL1_RING_TP_RMSK) 5799*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL1_RING_TP_INM(x, mask) \ 5800*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_SW2TCL1_RING_TP_ADDR(x), mask) 5801*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL1_RING_TP_OUT(x, val) \ 5802*5113495bSYour Name out_dword( HWIO_TCL_R2_SW2TCL1_RING_TP_ADDR(x), val) 5803*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL1_RING_TP_OUTM(x, mask, val) \ 5804*5113495bSYour Name do {\ 5805*5113495bSYour Name HWIO_INTLOCK(); \ 5806*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R2_SW2TCL1_RING_TP_ADDR(x), mask, val, HWIO_TCL_R2_SW2TCL1_RING_TP_IN(x)); \ 5807*5113495bSYour Name HWIO_INTFREE();\ 5808*5113495bSYour Name } while (0) 5809*5113495bSYour Name 5810*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL1_RING_TP_TAIL_PTR_BMSK 0x000fffff 5811*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL1_RING_TP_TAIL_PTR_SHFT 0x0 5812*5113495bSYour Name 5813*5113495bSYour Name //// Register TCL_R2_SW2TCL2_RING_HP //// 5814*5113495bSYour Name 5815*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL2_RING_HP_ADDR(x) (x+0x00002008) 5816*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL2_RING_HP_PHYS(x) (x+0x00002008) 5817*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL2_RING_HP_RMSK 0x000fffff 5818*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL2_RING_HP_SHFT 0 5819*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL2_RING_HP_IN(x) \ 5820*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_SW2TCL2_RING_HP_ADDR(x), HWIO_TCL_R2_SW2TCL2_RING_HP_RMSK) 5821*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL2_RING_HP_INM(x, mask) \ 5822*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_SW2TCL2_RING_HP_ADDR(x), mask) 5823*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL2_RING_HP_OUT(x, val) \ 5824*5113495bSYour Name out_dword( HWIO_TCL_R2_SW2TCL2_RING_HP_ADDR(x), val) 5825*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL2_RING_HP_OUTM(x, mask, val) \ 5826*5113495bSYour Name do {\ 5827*5113495bSYour Name HWIO_INTLOCK(); \ 5828*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R2_SW2TCL2_RING_HP_ADDR(x), mask, val, HWIO_TCL_R2_SW2TCL2_RING_HP_IN(x)); \ 5829*5113495bSYour Name HWIO_INTFREE();\ 5830*5113495bSYour Name } while (0) 5831*5113495bSYour Name 5832*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL2_RING_HP_HEAD_PTR_BMSK 0x000fffff 5833*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL2_RING_HP_HEAD_PTR_SHFT 0x0 5834*5113495bSYour Name 5835*5113495bSYour Name //// Register TCL_R2_SW2TCL2_RING_TP //// 5836*5113495bSYour Name 5837*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL2_RING_TP_ADDR(x) (x+0x0000200c) 5838*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL2_RING_TP_PHYS(x) (x+0x0000200c) 5839*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL2_RING_TP_RMSK 0x000fffff 5840*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL2_RING_TP_SHFT 0 5841*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL2_RING_TP_IN(x) \ 5842*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_SW2TCL2_RING_TP_ADDR(x), HWIO_TCL_R2_SW2TCL2_RING_TP_RMSK) 5843*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL2_RING_TP_INM(x, mask) \ 5844*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_SW2TCL2_RING_TP_ADDR(x), mask) 5845*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL2_RING_TP_OUT(x, val) \ 5846*5113495bSYour Name out_dword( HWIO_TCL_R2_SW2TCL2_RING_TP_ADDR(x), val) 5847*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL2_RING_TP_OUTM(x, mask, val) \ 5848*5113495bSYour Name do {\ 5849*5113495bSYour Name HWIO_INTLOCK(); \ 5850*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R2_SW2TCL2_RING_TP_ADDR(x), mask, val, HWIO_TCL_R2_SW2TCL2_RING_TP_IN(x)); \ 5851*5113495bSYour Name HWIO_INTFREE();\ 5852*5113495bSYour Name } while (0) 5853*5113495bSYour Name 5854*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL2_RING_TP_TAIL_PTR_BMSK 0x000fffff 5855*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL2_RING_TP_TAIL_PTR_SHFT 0x0 5856*5113495bSYour Name 5857*5113495bSYour Name //// Register TCL_R2_SW2TCL3_RING_HP //// 5858*5113495bSYour Name 5859*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL3_RING_HP_ADDR(x) (x+0x00002010) 5860*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL3_RING_HP_PHYS(x) (x+0x00002010) 5861*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL3_RING_HP_RMSK 0x000fffff 5862*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL3_RING_HP_SHFT 0 5863*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL3_RING_HP_IN(x) \ 5864*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_SW2TCL3_RING_HP_ADDR(x), HWIO_TCL_R2_SW2TCL3_RING_HP_RMSK) 5865*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL3_RING_HP_INM(x, mask) \ 5866*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_SW2TCL3_RING_HP_ADDR(x), mask) 5867*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL3_RING_HP_OUT(x, val) \ 5868*5113495bSYour Name out_dword( HWIO_TCL_R2_SW2TCL3_RING_HP_ADDR(x), val) 5869*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL3_RING_HP_OUTM(x, mask, val) \ 5870*5113495bSYour Name do {\ 5871*5113495bSYour Name HWIO_INTLOCK(); \ 5872*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R2_SW2TCL3_RING_HP_ADDR(x), mask, val, HWIO_TCL_R2_SW2TCL3_RING_HP_IN(x)); \ 5873*5113495bSYour Name HWIO_INTFREE();\ 5874*5113495bSYour Name } while (0) 5875*5113495bSYour Name 5876*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL3_RING_HP_HEAD_PTR_BMSK 0x000fffff 5877*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL3_RING_HP_HEAD_PTR_SHFT 0x0 5878*5113495bSYour Name 5879*5113495bSYour Name //// Register TCL_R2_SW2TCL3_RING_TP //// 5880*5113495bSYour Name 5881*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL3_RING_TP_ADDR(x) (x+0x00002014) 5882*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL3_RING_TP_PHYS(x) (x+0x00002014) 5883*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL3_RING_TP_RMSK 0x000fffff 5884*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL3_RING_TP_SHFT 0 5885*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL3_RING_TP_IN(x) \ 5886*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_SW2TCL3_RING_TP_ADDR(x), HWIO_TCL_R2_SW2TCL3_RING_TP_RMSK) 5887*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL3_RING_TP_INM(x, mask) \ 5888*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_SW2TCL3_RING_TP_ADDR(x), mask) 5889*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL3_RING_TP_OUT(x, val) \ 5890*5113495bSYour Name out_dword( HWIO_TCL_R2_SW2TCL3_RING_TP_ADDR(x), val) 5891*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL3_RING_TP_OUTM(x, mask, val) \ 5892*5113495bSYour Name do {\ 5893*5113495bSYour Name HWIO_INTLOCK(); \ 5894*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R2_SW2TCL3_RING_TP_ADDR(x), mask, val, HWIO_TCL_R2_SW2TCL3_RING_TP_IN(x)); \ 5895*5113495bSYour Name HWIO_INTFREE();\ 5896*5113495bSYour Name } while (0) 5897*5113495bSYour Name 5898*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL3_RING_TP_TAIL_PTR_BMSK 0x000fffff 5899*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL3_RING_TP_TAIL_PTR_SHFT 0x0 5900*5113495bSYour Name 5901*5113495bSYour Name //// Register TCL_R2_SW2TCL_CREDIT_RING_HP //// 5902*5113495bSYour Name 5903*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL_CREDIT_RING_HP_ADDR(x) (x+0x00002018) 5904*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL_CREDIT_RING_HP_PHYS(x) (x+0x00002018) 5905*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL_CREDIT_RING_HP_RMSK 0x000fffff 5906*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL_CREDIT_RING_HP_SHFT 0 5907*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL_CREDIT_RING_HP_IN(x) \ 5908*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_SW2TCL_CREDIT_RING_HP_ADDR(x), HWIO_TCL_R2_SW2TCL_CREDIT_RING_HP_RMSK) 5909*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL_CREDIT_RING_HP_INM(x, mask) \ 5910*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_SW2TCL_CREDIT_RING_HP_ADDR(x), mask) 5911*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL_CREDIT_RING_HP_OUT(x, val) \ 5912*5113495bSYour Name out_dword( HWIO_TCL_R2_SW2TCL_CREDIT_RING_HP_ADDR(x), val) 5913*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL_CREDIT_RING_HP_OUTM(x, mask, val) \ 5914*5113495bSYour Name do {\ 5915*5113495bSYour Name HWIO_INTLOCK(); \ 5916*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R2_SW2TCL_CREDIT_RING_HP_ADDR(x), mask, val, HWIO_TCL_R2_SW2TCL_CREDIT_RING_HP_IN(x)); \ 5917*5113495bSYour Name HWIO_INTFREE();\ 5918*5113495bSYour Name } while (0) 5919*5113495bSYour Name 5920*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL_CREDIT_RING_HP_HEAD_PTR_BMSK 0x000fffff 5921*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL_CREDIT_RING_HP_HEAD_PTR_SHFT 0x0 5922*5113495bSYour Name 5923*5113495bSYour Name //// Register TCL_R2_SW2TCL_CREDIT_RING_TP //// 5924*5113495bSYour Name 5925*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL_CREDIT_RING_TP_ADDR(x) (x+0x0000201c) 5926*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL_CREDIT_RING_TP_PHYS(x) (x+0x0000201c) 5927*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL_CREDIT_RING_TP_RMSK 0x000fffff 5928*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL_CREDIT_RING_TP_SHFT 0 5929*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL_CREDIT_RING_TP_IN(x) \ 5930*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_SW2TCL_CREDIT_RING_TP_ADDR(x), HWIO_TCL_R2_SW2TCL_CREDIT_RING_TP_RMSK) 5931*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL_CREDIT_RING_TP_INM(x, mask) \ 5932*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_SW2TCL_CREDIT_RING_TP_ADDR(x), mask) 5933*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL_CREDIT_RING_TP_OUT(x, val) \ 5934*5113495bSYour Name out_dword( HWIO_TCL_R2_SW2TCL_CREDIT_RING_TP_ADDR(x), val) 5935*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL_CREDIT_RING_TP_OUTM(x, mask, val) \ 5936*5113495bSYour Name do {\ 5937*5113495bSYour Name HWIO_INTLOCK(); \ 5938*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R2_SW2TCL_CREDIT_RING_TP_ADDR(x), mask, val, HWIO_TCL_R2_SW2TCL_CREDIT_RING_TP_IN(x)); \ 5939*5113495bSYour Name HWIO_INTFREE();\ 5940*5113495bSYour Name } while (0) 5941*5113495bSYour Name 5942*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL_CREDIT_RING_TP_TAIL_PTR_BMSK 0x000fffff 5943*5113495bSYour Name #define HWIO_TCL_R2_SW2TCL_CREDIT_RING_TP_TAIL_PTR_SHFT 0x0 5944*5113495bSYour Name 5945*5113495bSYour Name //// Register TCL_R2_FW2TCL1_RING_HP //// 5946*5113495bSYour Name 5947*5113495bSYour Name #define HWIO_TCL_R2_FW2TCL1_RING_HP_ADDR(x) (x+0x00002020) 5948*5113495bSYour Name #define HWIO_TCL_R2_FW2TCL1_RING_HP_PHYS(x) (x+0x00002020) 5949*5113495bSYour Name #define HWIO_TCL_R2_FW2TCL1_RING_HP_RMSK 0x0000ffff 5950*5113495bSYour Name #define HWIO_TCL_R2_FW2TCL1_RING_HP_SHFT 0 5951*5113495bSYour Name #define HWIO_TCL_R2_FW2TCL1_RING_HP_IN(x) \ 5952*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_FW2TCL1_RING_HP_ADDR(x), HWIO_TCL_R2_FW2TCL1_RING_HP_RMSK) 5953*5113495bSYour Name #define HWIO_TCL_R2_FW2TCL1_RING_HP_INM(x, mask) \ 5954*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_FW2TCL1_RING_HP_ADDR(x), mask) 5955*5113495bSYour Name #define HWIO_TCL_R2_FW2TCL1_RING_HP_OUT(x, val) \ 5956*5113495bSYour Name out_dword( HWIO_TCL_R2_FW2TCL1_RING_HP_ADDR(x), val) 5957*5113495bSYour Name #define HWIO_TCL_R2_FW2TCL1_RING_HP_OUTM(x, mask, val) \ 5958*5113495bSYour Name do {\ 5959*5113495bSYour Name HWIO_INTLOCK(); \ 5960*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R2_FW2TCL1_RING_HP_ADDR(x), mask, val, HWIO_TCL_R2_FW2TCL1_RING_HP_IN(x)); \ 5961*5113495bSYour Name HWIO_INTFREE();\ 5962*5113495bSYour Name } while (0) 5963*5113495bSYour Name 5964*5113495bSYour Name #define HWIO_TCL_R2_FW2TCL1_RING_HP_HEAD_PTR_BMSK 0x0000ffff 5965*5113495bSYour Name #define HWIO_TCL_R2_FW2TCL1_RING_HP_HEAD_PTR_SHFT 0x0 5966*5113495bSYour Name 5967*5113495bSYour Name //// Register TCL_R2_FW2TCL1_RING_TP //// 5968*5113495bSYour Name 5969*5113495bSYour Name #define HWIO_TCL_R2_FW2TCL1_RING_TP_ADDR(x) (x+0x00002024) 5970*5113495bSYour Name #define HWIO_TCL_R2_FW2TCL1_RING_TP_PHYS(x) (x+0x00002024) 5971*5113495bSYour Name #define HWIO_TCL_R2_FW2TCL1_RING_TP_RMSK 0x0000ffff 5972*5113495bSYour Name #define HWIO_TCL_R2_FW2TCL1_RING_TP_SHFT 0 5973*5113495bSYour Name #define HWIO_TCL_R2_FW2TCL1_RING_TP_IN(x) \ 5974*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_FW2TCL1_RING_TP_ADDR(x), HWIO_TCL_R2_FW2TCL1_RING_TP_RMSK) 5975*5113495bSYour Name #define HWIO_TCL_R2_FW2TCL1_RING_TP_INM(x, mask) \ 5976*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_FW2TCL1_RING_TP_ADDR(x), mask) 5977*5113495bSYour Name #define HWIO_TCL_R2_FW2TCL1_RING_TP_OUT(x, val) \ 5978*5113495bSYour Name out_dword( HWIO_TCL_R2_FW2TCL1_RING_TP_ADDR(x), val) 5979*5113495bSYour Name #define HWIO_TCL_R2_FW2TCL1_RING_TP_OUTM(x, mask, val) \ 5980*5113495bSYour Name do {\ 5981*5113495bSYour Name HWIO_INTLOCK(); \ 5982*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R2_FW2TCL1_RING_TP_ADDR(x), mask, val, HWIO_TCL_R2_FW2TCL1_RING_TP_IN(x)); \ 5983*5113495bSYour Name HWIO_INTFREE();\ 5984*5113495bSYour Name } while (0) 5985*5113495bSYour Name 5986*5113495bSYour Name #define HWIO_TCL_R2_FW2TCL1_RING_TP_TAIL_PTR_BMSK 0x0000ffff 5987*5113495bSYour Name #define HWIO_TCL_R2_FW2TCL1_RING_TP_TAIL_PTR_SHFT 0x0 5988*5113495bSYour Name 5989*5113495bSYour Name //// Register TCL_R2_TCL2TQM_RING_HP //// 5990*5113495bSYour Name 5991*5113495bSYour Name #define HWIO_TCL_R2_TCL2TQM_RING_HP_ADDR(x) (x+0x00002028) 5992*5113495bSYour Name #define HWIO_TCL_R2_TCL2TQM_RING_HP_PHYS(x) (x+0x00002028) 5993*5113495bSYour Name #define HWIO_TCL_R2_TCL2TQM_RING_HP_RMSK 0x0000ffff 5994*5113495bSYour Name #define HWIO_TCL_R2_TCL2TQM_RING_HP_SHFT 0 5995*5113495bSYour Name #define HWIO_TCL_R2_TCL2TQM_RING_HP_IN(x) \ 5996*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_TCL2TQM_RING_HP_ADDR(x), HWIO_TCL_R2_TCL2TQM_RING_HP_RMSK) 5997*5113495bSYour Name #define HWIO_TCL_R2_TCL2TQM_RING_HP_INM(x, mask) \ 5998*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_TCL2TQM_RING_HP_ADDR(x), mask) 5999*5113495bSYour Name #define HWIO_TCL_R2_TCL2TQM_RING_HP_OUT(x, val) \ 6000*5113495bSYour Name out_dword( HWIO_TCL_R2_TCL2TQM_RING_HP_ADDR(x), val) 6001*5113495bSYour Name #define HWIO_TCL_R2_TCL2TQM_RING_HP_OUTM(x, mask, val) \ 6002*5113495bSYour Name do {\ 6003*5113495bSYour Name HWIO_INTLOCK(); \ 6004*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R2_TCL2TQM_RING_HP_ADDR(x), mask, val, HWIO_TCL_R2_TCL2TQM_RING_HP_IN(x)); \ 6005*5113495bSYour Name HWIO_INTFREE();\ 6006*5113495bSYour Name } while (0) 6007*5113495bSYour Name 6008*5113495bSYour Name #define HWIO_TCL_R2_TCL2TQM_RING_HP_HEAD_PTR_BMSK 0x0000ffff 6009*5113495bSYour Name #define HWIO_TCL_R2_TCL2TQM_RING_HP_HEAD_PTR_SHFT 0x0 6010*5113495bSYour Name 6011*5113495bSYour Name //// Register TCL_R2_TCL2TQM_RING_TP //// 6012*5113495bSYour Name 6013*5113495bSYour Name #define HWIO_TCL_R2_TCL2TQM_RING_TP_ADDR(x) (x+0x0000202c) 6014*5113495bSYour Name #define HWIO_TCL_R2_TCL2TQM_RING_TP_PHYS(x) (x+0x0000202c) 6015*5113495bSYour Name #define HWIO_TCL_R2_TCL2TQM_RING_TP_RMSK 0x0000ffff 6016*5113495bSYour Name #define HWIO_TCL_R2_TCL2TQM_RING_TP_SHFT 0 6017*5113495bSYour Name #define HWIO_TCL_R2_TCL2TQM_RING_TP_IN(x) \ 6018*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_TCL2TQM_RING_TP_ADDR(x), HWIO_TCL_R2_TCL2TQM_RING_TP_RMSK) 6019*5113495bSYour Name #define HWIO_TCL_R2_TCL2TQM_RING_TP_INM(x, mask) \ 6020*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_TCL2TQM_RING_TP_ADDR(x), mask) 6021*5113495bSYour Name #define HWIO_TCL_R2_TCL2TQM_RING_TP_OUT(x, val) \ 6022*5113495bSYour Name out_dword( HWIO_TCL_R2_TCL2TQM_RING_TP_ADDR(x), val) 6023*5113495bSYour Name #define HWIO_TCL_R2_TCL2TQM_RING_TP_OUTM(x, mask, val) \ 6024*5113495bSYour Name do {\ 6025*5113495bSYour Name HWIO_INTLOCK(); \ 6026*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R2_TCL2TQM_RING_TP_ADDR(x), mask, val, HWIO_TCL_R2_TCL2TQM_RING_TP_IN(x)); \ 6027*5113495bSYour Name HWIO_INTFREE();\ 6028*5113495bSYour Name } while (0) 6029*5113495bSYour Name 6030*5113495bSYour Name #define HWIO_TCL_R2_TCL2TQM_RING_TP_TAIL_PTR_BMSK 0x0000ffff 6031*5113495bSYour Name #define HWIO_TCL_R2_TCL2TQM_RING_TP_TAIL_PTR_SHFT 0x0 6032*5113495bSYour Name 6033*5113495bSYour Name //// Register TCL_R2_TCL_STATUS1_RING_HP //// 6034*5113495bSYour Name 6035*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS1_RING_HP_ADDR(x) (x+0x00002030) 6036*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS1_RING_HP_PHYS(x) (x+0x00002030) 6037*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS1_RING_HP_RMSK 0x0000ffff 6038*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS1_RING_HP_SHFT 0 6039*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS1_RING_HP_IN(x) \ 6040*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_TCL_STATUS1_RING_HP_ADDR(x), HWIO_TCL_R2_TCL_STATUS1_RING_HP_RMSK) 6041*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS1_RING_HP_INM(x, mask) \ 6042*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_TCL_STATUS1_RING_HP_ADDR(x), mask) 6043*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS1_RING_HP_OUT(x, val) \ 6044*5113495bSYour Name out_dword( HWIO_TCL_R2_TCL_STATUS1_RING_HP_ADDR(x), val) 6045*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS1_RING_HP_OUTM(x, mask, val) \ 6046*5113495bSYour Name do {\ 6047*5113495bSYour Name HWIO_INTLOCK(); \ 6048*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R2_TCL_STATUS1_RING_HP_ADDR(x), mask, val, HWIO_TCL_R2_TCL_STATUS1_RING_HP_IN(x)); \ 6049*5113495bSYour Name HWIO_INTFREE();\ 6050*5113495bSYour Name } while (0) 6051*5113495bSYour Name 6052*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS1_RING_HP_HEAD_PTR_BMSK 0x0000ffff 6053*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS1_RING_HP_HEAD_PTR_SHFT 0x0 6054*5113495bSYour Name 6055*5113495bSYour Name //// Register TCL_R2_TCL_STATUS1_RING_TP //// 6056*5113495bSYour Name 6057*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS1_RING_TP_ADDR(x) (x+0x00002034) 6058*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS1_RING_TP_PHYS(x) (x+0x00002034) 6059*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS1_RING_TP_RMSK 0x0000ffff 6060*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS1_RING_TP_SHFT 0 6061*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS1_RING_TP_IN(x) \ 6062*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_TCL_STATUS1_RING_TP_ADDR(x), HWIO_TCL_R2_TCL_STATUS1_RING_TP_RMSK) 6063*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS1_RING_TP_INM(x, mask) \ 6064*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_TCL_STATUS1_RING_TP_ADDR(x), mask) 6065*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS1_RING_TP_OUT(x, val) \ 6066*5113495bSYour Name out_dword( HWIO_TCL_R2_TCL_STATUS1_RING_TP_ADDR(x), val) 6067*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS1_RING_TP_OUTM(x, mask, val) \ 6068*5113495bSYour Name do {\ 6069*5113495bSYour Name HWIO_INTLOCK(); \ 6070*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R2_TCL_STATUS1_RING_TP_ADDR(x), mask, val, HWIO_TCL_R2_TCL_STATUS1_RING_TP_IN(x)); \ 6071*5113495bSYour Name HWIO_INTFREE();\ 6072*5113495bSYour Name } while (0) 6073*5113495bSYour Name 6074*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS1_RING_TP_TAIL_PTR_BMSK 0x0000ffff 6075*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS1_RING_TP_TAIL_PTR_SHFT 0x0 6076*5113495bSYour Name 6077*5113495bSYour Name //// Register TCL_R2_TCL_STATUS2_RING_HP //// 6078*5113495bSYour Name 6079*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS2_RING_HP_ADDR(x) (x+0x00002038) 6080*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS2_RING_HP_PHYS(x) (x+0x00002038) 6081*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS2_RING_HP_RMSK 0x0000ffff 6082*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS2_RING_HP_SHFT 0 6083*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS2_RING_HP_IN(x) \ 6084*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_TCL_STATUS2_RING_HP_ADDR(x), HWIO_TCL_R2_TCL_STATUS2_RING_HP_RMSK) 6085*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS2_RING_HP_INM(x, mask) \ 6086*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_TCL_STATUS2_RING_HP_ADDR(x), mask) 6087*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS2_RING_HP_OUT(x, val) \ 6088*5113495bSYour Name out_dword( HWIO_TCL_R2_TCL_STATUS2_RING_HP_ADDR(x), val) 6089*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS2_RING_HP_OUTM(x, mask, val) \ 6090*5113495bSYour Name do {\ 6091*5113495bSYour Name HWIO_INTLOCK(); \ 6092*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R2_TCL_STATUS2_RING_HP_ADDR(x), mask, val, HWIO_TCL_R2_TCL_STATUS2_RING_HP_IN(x)); \ 6093*5113495bSYour Name HWIO_INTFREE();\ 6094*5113495bSYour Name } while (0) 6095*5113495bSYour Name 6096*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS2_RING_HP_HEAD_PTR_BMSK 0x0000ffff 6097*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS2_RING_HP_HEAD_PTR_SHFT 0x0 6098*5113495bSYour Name 6099*5113495bSYour Name //// Register TCL_R2_TCL_STATUS2_RING_TP //// 6100*5113495bSYour Name 6101*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS2_RING_TP_ADDR(x) (x+0x0000203c) 6102*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS2_RING_TP_PHYS(x) (x+0x0000203c) 6103*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS2_RING_TP_RMSK 0x0000ffff 6104*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS2_RING_TP_SHFT 0 6105*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS2_RING_TP_IN(x) \ 6106*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_TCL_STATUS2_RING_TP_ADDR(x), HWIO_TCL_R2_TCL_STATUS2_RING_TP_RMSK) 6107*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS2_RING_TP_INM(x, mask) \ 6108*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_TCL_STATUS2_RING_TP_ADDR(x), mask) 6109*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS2_RING_TP_OUT(x, val) \ 6110*5113495bSYour Name out_dword( HWIO_TCL_R2_TCL_STATUS2_RING_TP_ADDR(x), val) 6111*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS2_RING_TP_OUTM(x, mask, val) \ 6112*5113495bSYour Name do {\ 6113*5113495bSYour Name HWIO_INTLOCK(); \ 6114*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R2_TCL_STATUS2_RING_TP_ADDR(x), mask, val, HWIO_TCL_R2_TCL_STATUS2_RING_TP_IN(x)); \ 6115*5113495bSYour Name HWIO_INTFREE();\ 6116*5113495bSYour Name } while (0) 6117*5113495bSYour Name 6118*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS2_RING_TP_TAIL_PTR_BMSK 0x0000ffff 6119*5113495bSYour Name #define HWIO_TCL_R2_TCL_STATUS2_RING_TP_TAIL_PTR_SHFT 0x0 6120*5113495bSYour Name 6121*5113495bSYour Name //// Register TCL_R2_TCL2FW_RING_HP //// 6122*5113495bSYour Name 6123*5113495bSYour Name #define HWIO_TCL_R2_TCL2FW_RING_HP_ADDR(x) (x+0x00002040) 6124*5113495bSYour Name #define HWIO_TCL_R2_TCL2FW_RING_HP_PHYS(x) (x+0x00002040) 6125*5113495bSYour Name #define HWIO_TCL_R2_TCL2FW_RING_HP_RMSK 0x0000ffff 6126*5113495bSYour Name #define HWIO_TCL_R2_TCL2FW_RING_HP_SHFT 0 6127*5113495bSYour Name #define HWIO_TCL_R2_TCL2FW_RING_HP_IN(x) \ 6128*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_TCL2FW_RING_HP_ADDR(x), HWIO_TCL_R2_TCL2FW_RING_HP_RMSK) 6129*5113495bSYour Name #define HWIO_TCL_R2_TCL2FW_RING_HP_INM(x, mask) \ 6130*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_TCL2FW_RING_HP_ADDR(x), mask) 6131*5113495bSYour Name #define HWIO_TCL_R2_TCL2FW_RING_HP_OUT(x, val) \ 6132*5113495bSYour Name out_dword( HWIO_TCL_R2_TCL2FW_RING_HP_ADDR(x), val) 6133*5113495bSYour Name #define HWIO_TCL_R2_TCL2FW_RING_HP_OUTM(x, mask, val) \ 6134*5113495bSYour Name do {\ 6135*5113495bSYour Name HWIO_INTLOCK(); \ 6136*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R2_TCL2FW_RING_HP_ADDR(x), mask, val, HWIO_TCL_R2_TCL2FW_RING_HP_IN(x)); \ 6137*5113495bSYour Name HWIO_INTFREE();\ 6138*5113495bSYour Name } while (0) 6139*5113495bSYour Name 6140*5113495bSYour Name #define HWIO_TCL_R2_TCL2FW_RING_HP_HEAD_PTR_BMSK 0x0000ffff 6141*5113495bSYour Name #define HWIO_TCL_R2_TCL2FW_RING_HP_HEAD_PTR_SHFT 0x0 6142*5113495bSYour Name 6143*5113495bSYour Name //// Register TCL_R2_TCL2FW_RING_TP //// 6144*5113495bSYour Name 6145*5113495bSYour Name #define HWIO_TCL_R2_TCL2FW_RING_TP_ADDR(x) (x+0x00002044) 6146*5113495bSYour Name #define HWIO_TCL_R2_TCL2FW_RING_TP_PHYS(x) (x+0x00002044) 6147*5113495bSYour Name #define HWIO_TCL_R2_TCL2FW_RING_TP_RMSK 0x0000ffff 6148*5113495bSYour Name #define HWIO_TCL_R2_TCL2FW_RING_TP_SHFT 0 6149*5113495bSYour Name #define HWIO_TCL_R2_TCL2FW_RING_TP_IN(x) \ 6150*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_TCL2FW_RING_TP_ADDR(x), HWIO_TCL_R2_TCL2FW_RING_TP_RMSK) 6151*5113495bSYour Name #define HWIO_TCL_R2_TCL2FW_RING_TP_INM(x, mask) \ 6152*5113495bSYour Name in_dword_masked ( HWIO_TCL_R2_TCL2FW_RING_TP_ADDR(x), mask) 6153*5113495bSYour Name #define HWIO_TCL_R2_TCL2FW_RING_TP_OUT(x, val) \ 6154*5113495bSYour Name out_dword( HWIO_TCL_R2_TCL2FW_RING_TP_ADDR(x), val) 6155*5113495bSYour Name #define HWIO_TCL_R2_TCL2FW_RING_TP_OUTM(x, mask, val) \ 6156*5113495bSYour Name do {\ 6157*5113495bSYour Name HWIO_INTLOCK(); \ 6158*5113495bSYour Name out_dword_masked_ns(HWIO_TCL_R2_TCL2FW_RING_TP_ADDR(x), mask, val, HWIO_TCL_R2_TCL2FW_RING_TP_IN(x)); \ 6159*5113495bSYour Name HWIO_INTFREE();\ 6160*5113495bSYour Name } while (0) 6161*5113495bSYour Name 6162*5113495bSYour Name #define HWIO_TCL_R2_TCL2FW_RING_TP_TAIL_PTR_BMSK 0x0000ffff 6163*5113495bSYour Name #define HWIO_TCL_R2_TCL2FW_RING_TP_TAIL_PTR_SHFT 0x0 6164*5113495bSYour Name 6165*5113495bSYour Name 6166*5113495bSYour Name #endif 6167*5113495bSYour Name 6168