1*5113495bSYour Name /* 2*5113495bSYour Name * Copyright (c) 2019, The Linux Foundation. All rights reserved. 3*5113495bSYour Name * 4*5113495bSYour Name * Permission to use, copy, modify, and/or distribute this software for any 5*5113495bSYour Name * purpose with or without fee is hereby granted, provided that the above 6*5113495bSYour Name * copyright notice and this permission notice appear in all copies. 7*5113495bSYour Name * 8*5113495bSYour Name * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9*5113495bSYour Name * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10*5113495bSYour Name * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11*5113495bSYour Name * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12*5113495bSYour Name * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13*5113495bSYour Name * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14*5113495bSYour Name * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15*5113495bSYour Name */ 16*5113495bSYour Name 17*5113495bSYour Name #ifndef _PHYRX_ABORT_REQUEST_INFO_H_ 18*5113495bSYour Name #define _PHYRX_ABORT_REQUEST_INFO_H_ 19*5113495bSYour Name #if !defined(__ASSEMBLER__) 20*5113495bSYour Name #endif 21*5113495bSYour Name 22*5113495bSYour Name 23*5113495bSYour Name // ################ START SUMMARY ################# 24*5113495bSYour Name // 25*5113495bSYour Name // Dword Fields 26*5113495bSYour Name // 0 phyrx_abort_reason[7:0], phy_enters_nap_state[8], phy_enters_defer_state[9], reserved_0[15:10], receive_duration[31:16] 27*5113495bSYour Name // 28*5113495bSYour Name // ################ END SUMMARY ################# 29*5113495bSYour Name 30*5113495bSYour Name #define NUM_OF_DWORDS_PHYRX_ABORT_REQUEST_INFO 1 31*5113495bSYour Name 32*5113495bSYour Name struct phyrx_abort_request_info { 33*5113495bSYour Name uint32_t phyrx_abort_reason : 8, //[7:0] 34*5113495bSYour Name phy_enters_nap_state : 1, //[8] 35*5113495bSYour Name phy_enters_defer_state : 1, //[9] 36*5113495bSYour Name reserved_0 : 6, //[15:10] 37*5113495bSYour Name receive_duration : 16; //[31:16] 38*5113495bSYour Name }; 39*5113495bSYour Name 40*5113495bSYour Name /* 41*5113495bSYour Name 42*5113495bSYour Name phyrx_abort_reason 43*5113495bSYour Name 44*5113495bSYour Name <enum 0 phyrx_err_phy_off> Reception aborted due to 45*5113495bSYour Name receiving a PHY_OFF TLV 46*5113495bSYour Name 47*5113495bSYour Name <enum 1 phyrx_err_synth_off> 48*5113495bSYour Name 49*5113495bSYour Name <enum 2 phyrx_err_ofdma_timing> 50*5113495bSYour Name 51*5113495bSYour Name <enum 3 phyrx_err_ofdma_signal_parity> 52*5113495bSYour Name 53*5113495bSYour Name <enum 4 phyrx_err_ofdma_rate_illegal> 54*5113495bSYour Name 55*5113495bSYour Name <enum 5 phyrx_err_ofdma_length_illegal> 56*5113495bSYour Name 57*5113495bSYour Name <enum 6 phyrx_err_ofdma_restart> 58*5113495bSYour Name 59*5113495bSYour Name <enum 7 phyrx_err_ofdma_service> 60*5113495bSYour Name 61*5113495bSYour Name <enum 8 phyrx_err_ppdu_ofdma_power_drop> 62*5113495bSYour Name 63*5113495bSYour Name 64*5113495bSYour Name 65*5113495bSYour Name <enum 9 phyrx_err_cck_blokker> 66*5113495bSYour Name 67*5113495bSYour Name <enum 10 phyrx_err_cck_timing> 68*5113495bSYour Name 69*5113495bSYour Name <enum 11 phyrx_err_cck_header_crc> 70*5113495bSYour Name 71*5113495bSYour Name <enum 12 phyrx_err_cck_rate_illegal> 72*5113495bSYour Name 73*5113495bSYour Name <enum 13 phyrx_err_cck_length_illegal> 74*5113495bSYour Name 75*5113495bSYour Name <enum 14 phyrx_err_cck_restart> 76*5113495bSYour Name 77*5113495bSYour Name <enum 15 phyrx_err_cck_service> 78*5113495bSYour Name 79*5113495bSYour Name <enum 16 phyrx_err_cck_power_drop> 80*5113495bSYour Name 81*5113495bSYour Name 82*5113495bSYour Name 83*5113495bSYour Name <enum 17 phyrx_err_ht_crc_err> 84*5113495bSYour Name 85*5113495bSYour Name <enum 18 phyrx_err_ht_length_illegal> 86*5113495bSYour Name 87*5113495bSYour Name <enum 19 phyrx_err_ht_rate_illegal> 88*5113495bSYour Name 89*5113495bSYour Name <enum 20 phyrx_err_ht_zlf> 90*5113495bSYour Name 91*5113495bSYour Name <enum 21 phyrx_err_false_radar_ext> 92*5113495bSYour Name 93*5113495bSYour Name 94*5113495bSYour Name 95*5113495bSYour Name <enum 22 phyrx_err_green_field> 96*5113495bSYour Name 97*5113495bSYour Name 98*5113495bSYour Name 99*5113495bSYour Name <enum 23 phyrx_err_bw_gt_dyn_bw> 100*5113495bSYour Name 101*5113495bSYour Name <enum 24 phyrx_err_leg_ht_mismatch> 102*5113495bSYour Name 103*5113495bSYour Name <enum 25 phyrx_err_vht_crc_error> 104*5113495bSYour Name 105*5113495bSYour Name <enum 26 phyrx_err_vht_siga_unsupported> 106*5113495bSYour Name 107*5113495bSYour Name <enum 27 phyrx_err_vht_lsig_len_invalid> 108*5113495bSYour Name 109*5113495bSYour Name <enum 28 phyrx_err_vht_ndp_or_zlf> 110*5113495bSYour Name 111*5113495bSYour Name <enum 29 phyrx_err_vht_nsym_lt_zero> 112*5113495bSYour Name 113*5113495bSYour Name <enum 30 phyrx_err_vht_rx_extra_symbol_mismatch> 114*5113495bSYour Name 115*5113495bSYour Name <enum 31 phyrx_err_vht_rx_skip_group_id0> 116*5113495bSYour Name 117*5113495bSYour Name <enum 32 phyrx_err_vht_rx_skip_group_id1to62> 118*5113495bSYour Name 119*5113495bSYour Name <enum 33 phyrx_err_vht_rx_skip_group_id63> 120*5113495bSYour Name 121*5113495bSYour Name <enum 34 phyrx_err_ofdm_ldpc_decoder_disabled> 122*5113495bSYour Name 123*5113495bSYour Name <enum 35 phyrx_err_defer_nap> 124*5113495bSYour Name 125*5113495bSYour Name <enum 36 phyrx_err_fdomain_timeout> 126*5113495bSYour Name 127*5113495bSYour Name <enum 37 phyrx_err_lsig_rel_check> 128*5113495bSYour Name 129*5113495bSYour Name <enum 38 phyrx_err_bt_collision> 130*5113495bSYour Name 131*5113495bSYour Name <enum 39 phyrx_err_unsupported_mu_feedback> 132*5113495bSYour Name 133*5113495bSYour Name <enum 40 phyrx_err_ppdu_tx_interrupt_rx> 134*5113495bSYour Name 135*5113495bSYour Name <enum 41 phyrx_err_unsupported_cbf> 136*5113495bSYour Name 137*5113495bSYour Name 138*5113495bSYour Name 139*5113495bSYour Name <enum 42 phyrx_err_other> Should not really be used. If 140*5113495bSYour Name needed, ask for documentation update 141*5113495bSYour Name 142*5113495bSYour Name 143*5113495bSYour Name 144*5113495bSYour Name <enum 43 phyrx_err_he_siga_unsupported > <enum 44 145*5113495bSYour Name phyrx_err_he_crc_error > <enum 45 146*5113495bSYour Name phyrx_err_he_sigb_unsupported > <enum 46 147*5113495bSYour Name phyrx_err_he_mu_mode_unsupported > <enum 47 148*5113495bSYour Name phyrx_err_he_ndp_or_zlf > <enum 48 phyrx_err_he_nsym_lt_zero 149*5113495bSYour Name > <enum 49 phyrx_err_he_ru_params_unsupported > <enum 50 150*5113495bSYour Name phyrx_err_he_num_users_unsupported ><enum 51 151*5113495bSYour Name phyrx_err_he_sounding_params_unsupported > 152*5113495bSYour Name 153*5113495bSYour Name 154*5113495bSYour Name 155*5113495bSYour Name <enum 52 phyrx_err_MU_UL_no_power_detected> 156*5113495bSYour Name 157*5113495bSYour Name <enum 53 phyrx_err_MU_UL_not_for_me> 158*5113495bSYour Name 159*5113495bSYour Name 160*5113495bSYour Name 161*5113495bSYour Name <legal 0 - 53> 162*5113495bSYour Name 163*5113495bSYour Name phy_enters_nap_state 164*5113495bSYour Name 165*5113495bSYour Name When set, PHY enters PHY NAP state after sending this 166*5113495bSYour Name abort 167*5113495bSYour Name 168*5113495bSYour Name 169*5113495bSYour Name 170*5113495bSYour Name Note that nap and defer state are mutually exclusive. 171*5113495bSYour Name 172*5113495bSYour Name 173*5113495bSYour Name 174*5113495bSYour Name Field put pro-actively in place....usage still to be 175*5113495bSYour Name agreed upon. 176*5113495bSYour Name 177*5113495bSYour Name <legal all> 178*5113495bSYour Name 179*5113495bSYour Name phy_enters_defer_state 180*5113495bSYour Name 181*5113495bSYour Name When set, PHY enters PHY defer state after sending this 182*5113495bSYour Name abort 183*5113495bSYour Name 184*5113495bSYour Name 185*5113495bSYour Name 186*5113495bSYour Name Note that nap and defer state are mutually exclusive. 187*5113495bSYour Name 188*5113495bSYour Name 189*5113495bSYour Name 190*5113495bSYour Name Field put pro-actively in place....usage still to be 191*5113495bSYour Name agreed upon. 192*5113495bSYour Name 193*5113495bSYour Name <legal all> 194*5113495bSYour Name 195*5113495bSYour Name reserved_0 196*5113495bSYour Name 197*5113495bSYour Name <legal 0> 198*5113495bSYour Name 199*5113495bSYour Name receive_duration 200*5113495bSYour Name 201*5113495bSYour Name The remaining receive duration of this PPDU in the 202*5113495bSYour Name medium (in us). When PHY does not know this duration when 203*5113495bSYour Name this TLV is generated, the field will be set to 0. 204*5113495bSYour Name 205*5113495bSYour Name The timing reference point is the reception by the MAC 206*5113495bSYour Name of this TLV. The value shall be accurate to within 2us. 207*5113495bSYour Name 208*5113495bSYour Name 209*5113495bSYour Name 210*5113495bSYour Name In case Phy_enters_nap_state and/or 211*5113495bSYour Name Phy_enters_defer_state is set, there is a possibility that 212*5113495bSYour Name MAC PMM can also decide to go into a low(er) power state. 213*5113495bSYour Name 214*5113495bSYour Name <legal all> 215*5113495bSYour Name */ 216*5113495bSYour Name 217*5113495bSYour Name 218*5113495bSYour Name /* Description PHYRX_ABORT_REQUEST_INFO_0_PHYRX_ABORT_REASON 219*5113495bSYour Name 220*5113495bSYour Name <enum 0 phyrx_err_phy_off> Reception aborted due to 221*5113495bSYour Name receiving a PHY_OFF TLV 222*5113495bSYour Name 223*5113495bSYour Name <enum 1 phyrx_err_synth_off> 224*5113495bSYour Name 225*5113495bSYour Name <enum 2 phyrx_err_ofdma_timing> 226*5113495bSYour Name 227*5113495bSYour Name <enum 3 phyrx_err_ofdma_signal_parity> 228*5113495bSYour Name 229*5113495bSYour Name <enum 4 phyrx_err_ofdma_rate_illegal> 230*5113495bSYour Name 231*5113495bSYour Name <enum 5 phyrx_err_ofdma_length_illegal> 232*5113495bSYour Name 233*5113495bSYour Name <enum 6 phyrx_err_ofdma_restart> 234*5113495bSYour Name 235*5113495bSYour Name <enum 7 phyrx_err_ofdma_service> 236*5113495bSYour Name 237*5113495bSYour Name <enum 8 phyrx_err_ppdu_ofdma_power_drop> 238*5113495bSYour Name 239*5113495bSYour Name 240*5113495bSYour Name 241*5113495bSYour Name <enum 9 phyrx_err_cck_blokker> 242*5113495bSYour Name 243*5113495bSYour Name <enum 10 phyrx_err_cck_timing> 244*5113495bSYour Name 245*5113495bSYour Name <enum 11 phyrx_err_cck_header_crc> 246*5113495bSYour Name 247*5113495bSYour Name <enum 12 phyrx_err_cck_rate_illegal> 248*5113495bSYour Name 249*5113495bSYour Name <enum 13 phyrx_err_cck_length_illegal> 250*5113495bSYour Name 251*5113495bSYour Name <enum 14 phyrx_err_cck_restart> 252*5113495bSYour Name 253*5113495bSYour Name <enum 15 phyrx_err_cck_service> 254*5113495bSYour Name 255*5113495bSYour Name <enum 16 phyrx_err_cck_power_drop> 256*5113495bSYour Name 257*5113495bSYour Name 258*5113495bSYour Name 259*5113495bSYour Name <enum 17 phyrx_err_ht_crc_err> 260*5113495bSYour Name 261*5113495bSYour Name <enum 18 phyrx_err_ht_length_illegal> 262*5113495bSYour Name 263*5113495bSYour Name <enum 19 phyrx_err_ht_rate_illegal> 264*5113495bSYour Name 265*5113495bSYour Name <enum 20 phyrx_err_ht_zlf> 266*5113495bSYour Name 267*5113495bSYour Name <enum 21 phyrx_err_false_radar_ext> 268*5113495bSYour Name 269*5113495bSYour Name 270*5113495bSYour Name 271*5113495bSYour Name <enum 22 phyrx_err_green_field> 272*5113495bSYour Name 273*5113495bSYour Name 274*5113495bSYour Name 275*5113495bSYour Name <enum 23 phyrx_err_bw_gt_dyn_bw> 276*5113495bSYour Name 277*5113495bSYour Name <enum 24 phyrx_err_leg_ht_mismatch> 278*5113495bSYour Name 279*5113495bSYour Name <enum 25 phyrx_err_vht_crc_error> 280*5113495bSYour Name 281*5113495bSYour Name <enum 26 phyrx_err_vht_siga_unsupported> 282*5113495bSYour Name 283*5113495bSYour Name <enum 27 phyrx_err_vht_lsig_len_invalid> 284*5113495bSYour Name 285*5113495bSYour Name <enum 28 phyrx_err_vht_ndp_or_zlf> 286*5113495bSYour Name 287*5113495bSYour Name <enum 29 phyrx_err_vht_nsym_lt_zero> 288*5113495bSYour Name 289*5113495bSYour Name <enum 30 phyrx_err_vht_rx_extra_symbol_mismatch> 290*5113495bSYour Name 291*5113495bSYour Name <enum 31 phyrx_err_vht_rx_skip_group_id0> 292*5113495bSYour Name 293*5113495bSYour Name <enum 32 phyrx_err_vht_rx_skip_group_id1to62> 294*5113495bSYour Name 295*5113495bSYour Name <enum 33 phyrx_err_vht_rx_skip_group_id63> 296*5113495bSYour Name 297*5113495bSYour Name <enum 34 phyrx_err_ofdm_ldpc_decoder_disabled> 298*5113495bSYour Name 299*5113495bSYour Name <enum 35 phyrx_err_defer_nap> 300*5113495bSYour Name 301*5113495bSYour Name <enum 36 phyrx_err_fdomain_timeout> 302*5113495bSYour Name 303*5113495bSYour Name <enum 37 phyrx_err_lsig_rel_check> 304*5113495bSYour Name 305*5113495bSYour Name <enum 38 phyrx_err_bt_collision> 306*5113495bSYour Name 307*5113495bSYour Name <enum 39 phyrx_err_unsupported_mu_feedback> 308*5113495bSYour Name 309*5113495bSYour Name <enum 40 phyrx_err_ppdu_tx_interrupt_rx> 310*5113495bSYour Name 311*5113495bSYour Name <enum 41 phyrx_err_unsupported_cbf> 312*5113495bSYour Name 313*5113495bSYour Name 314*5113495bSYour Name 315*5113495bSYour Name <enum 42 phyrx_err_other> Should not really be used. If 316*5113495bSYour Name needed, ask for documentation update 317*5113495bSYour Name 318*5113495bSYour Name 319*5113495bSYour Name 320*5113495bSYour Name <enum 43 phyrx_err_he_siga_unsupported > <enum 44 321*5113495bSYour Name phyrx_err_he_crc_error > <enum 45 322*5113495bSYour Name phyrx_err_he_sigb_unsupported > <enum 46 323*5113495bSYour Name phyrx_err_he_mu_mode_unsupported > <enum 47 324*5113495bSYour Name phyrx_err_he_ndp_or_zlf > <enum 48 phyrx_err_he_nsym_lt_zero 325*5113495bSYour Name > <enum 49 phyrx_err_he_ru_params_unsupported > <enum 50 326*5113495bSYour Name phyrx_err_he_num_users_unsupported ><enum 51 327*5113495bSYour Name phyrx_err_he_sounding_params_unsupported > 328*5113495bSYour Name 329*5113495bSYour Name 330*5113495bSYour Name 331*5113495bSYour Name <enum 52 phyrx_err_MU_UL_no_power_detected> 332*5113495bSYour Name 333*5113495bSYour Name <enum 53 phyrx_err_MU_UL_not_for_me> 334*5113495bSYour Name 335*5113495bSYour Name 336*5113495bSYour Name 337*5113495bSYour Name <legal 0 - 53> 338*5113495bSYour Name */ 339*5113495bSYour Name #define PHYRX_ABORT_REQUEST_INFO_0_PHYRX_ABORT_REASON_OFFSET 0x00000000 340*5113495bSYour Name #define PHYRX_ABORT_REQUEST_INFO_0_PHYRX_ABORT_REASON_LSB 0 341*5113495bSYour Name #define PHYRX_ABORT_REQUEST_INFO_0_PHYRX_ABORT_REASON_MASK 0x000000ff 342*5113495bSYour Name 343*5113495bSYour Name /* Description PHYRX_ABORT_REQUEST_INFO_0_PHY_ENTERS_NAP_STATE 344*5113495bSYour Name 345*5113495bSYour Name When set, PHY enters PHY NAP state after sending this 346*5113495bSYour Name abort 347*5113495bSYour Name 348*5113495bSYour Name 349*5113495bSYour Name 350*5113495bSYour Name Note that nap and defer state are mutually exclusive. 351*5113495bSYour Name 352*5113495bSYour Name 353*5113495bSYour Name 354*5113495bSYour Name Field put pro-actively in place....usage still to be 355*5113495bSYour Name agreed upon. 356*5113495bSYour Name 357*5113495bSYour Name <legal all> 358*5113495bSYour Name */ 359*5113495bSYour Name #define PHYRX_ABORT_REQUEST_INFO_0_PHY_ENTERS_NAP_STATE_OFFSET 0x00000000 360*5113495bSYour Name #define PHYRX_ABORT_REQUEST_INFO_0_PHY_ENTERS_NAP_STATE_LSB 8 361*5113495bSYour Name #define PHYRX_ABORT_REQUEST_INFO_0_PHY_ENTERS_NAP_STATE_MASK 0x00000100 362*5113495bSYour Name 363*5113495bSYour Name /* Description PHYRX_ABORT_REQUEST_INFO_0_PHY_ENTERS_DEFER_STATE 364*5113495bSYour Name 365*5113495bSYour Name When set, PHY enters PHY defer state after sending this 366*5113495bSYour Name abort 367*5113495bSYour Name 368*5113495bSYour Name 369*5113495bSYour Name 370*5113495bSYour Name Note that nap and defer state are mutually exclusive. 371*5113495bSYour Name 372*5113495bSYour Name 373*5113495bSYour Name 374*5113495bSYour Name Field put pro-actively in place....usage still to be 375*5113495bSYour Name agreed upon. 376*5113495bSYour Name 377*5113495bSYour Name <legal all> 378*5113495bSYour Name */ 379*5113495bSYour Name #define PHYRX_ABORT_REQUEST_INFO_0_PHY_ENTERS_DEFER_STATE_OFFSET 0x00000000 380*5113495bSYour Name #define PHYRX_ABORT_REQUEST_INFO_0_PHY_ENTERS_DEFER_STATE_LSB 9 381*5113495bSYour Name #define PHYRX_ABORT_REQUEST_INFO_0_PHY_ENTERS_DEFER_STATE_MASK 0x00000200 382*5113495bSYour Name 383*5113495bSYour Name /* Description PHYRX_ABORT_REQUEST_INFO_0_RESERVED_0 384*5113495bSYour Name 385*5113495bSYour Name <legal 0> 386*5113495bSYour Name */ 387*5113495bSYour Name #define PHYRX_ABORT_REQUEST_INFO_0_RESERVED_0_OFFSET 0x00000000 388*5113495bSYour Name #define PHYRX_ABORT_REQUEST_INFO_0_RESERVED_0_LSB 10 389*5113495bSYour Name #define PHYRX_ABORT_REQUEST_INFO_0_RESERVED_0_MASK 0x0000fc00 390*5113495bSYour Name 391*5113495bSYour Name /* Description PHYRX_ABORT_REQUEST_INFO_0_RECEIVE_DURATION 392*5113495bSYour Name 393*5113495bSYour Name The remaining receive duration of this PPDU in the 394*5113495bSYour Name medium (in us). When PHY does not know this duration when 395*5113495bSYour Name this TLV is generated, the field will be set to 0. 396*5113495bSYour Name 397*5113495bSYour Name The timing reference point is the reception by the MAC 398*5113495bSYour Name of this TLV. The value shall be accurate to within 2us. 399*5113495bSYour Name 400*5113495bSYour Name 401*5113495bSYour Name 402*5113495bSYour Name In case Phy_enters_nap_state and/or 403*5113495bSYour Name Phy_enters_defer_state is set, there is a possibility that 404*5113495bSYour Name MAC PMM can also decide to go into a low(er) power state. 405*5113495bSYour Name 406*5113495bSYour Name <legal all> 407*5113495bSYour Name */ 408*5113495bSYour Name #define PHYRX_ABORT_REQUEST_INFO_0_RECEIVE_DURATION_OFFSET 0x00000000 409*5113495bSYour Name #define PHYRX_ABORT_REQUEST_INFO_0_RECEIVE_DURATION_LSB 16 410*5113495bSYour Name #define PHYRX_ABORT_REQUEST_INFO_0_RECEIVE_DURATION_MASK 0xffff0000 411*5113495bSYour Name 412*5113495bSYour Name 413*5113495bSYour Name #endif // _PHYRX_ABORT_REQUEST_INFO_H_ 414