1 /* 2 * Copyright (c) 2019, The Linux Foundation. All rights reserved. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for any 5 * purpose with or without fee is hereby granted, provided that the above 6 * copyright notice and this permission notice appear in all copies. 7 * 8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15 */ 16 17 #ifndef _PHYRX_RSSI_LEGACY_H_ 18 #define _PHYRX_RSSI_LEGACY_H_ 19 #if !defined(__ASSEMBLER__) 20 #endif 21 22 #include "receive_rssi_info.h" 23 24 // ################ START SUMMARY ################# 25 // 26 // Dword Fields 27 // 0 reception_type[3:0], rx_chain_mask_type[4], reserved_0[5], receive_bandwidth[7:6], rx_chain_mask[15:8], phy_ppdu_id[31:16] 28 // 1 sw_phy_meta_data[31:0] 29 // 2 ppdu_start_timestamp[31:0] 30 // 3-18 struct receive_rssi_info pre_rssi_info_details; 31 // 19-34 struct receive_rssi_info preamble_rssi_info_details; 32 // 35 pre_rssi_comb[7:0], rssi_comb[15:8], normalized_pre_rssi_comb[23:16], normalized_rssi_comb[31:24] 33 // 36 rssi_comb_ppdu[7:0], rssi_db_to_dbm_offset[15:8], rssi_for_spatial_reuse[23:16], rssi_for_trigger_resp[31:24] 34 // 35 // ################ END SUMMARY ################# 36 37 #define NUM_OF_DWORDS_PHYRX_RSSI_LEGACY 37 38 39 struct phyrx_rssi_legacy { 40 uint32_t reception_type : 4, //[3:0] 41 rx_chain_mask_type : 1, //[4] 42 reserved_0 : 1, //[5] 43 receive_bandwidth : 2, //[7:6] 44 rx_chain_mask : 8, //[15:8] 45 phy_ppdu_id : 16; //[31:16] 46 uint32_t sw_phy_meta_data : 32; //[31:0] 47 uint32_t ppdu_start_timestamp : 32; //[31:0] 48 struct receive_rssi_info pre_rssi_info_details; 49 struct receive_rssi_info preamble_rssi_info_details; 50 uint32_t pre_rssi_comb : 8, //[7:0] 51 rssi_comb : 8, //[15:8] 52 normalized_pre_rssi_comb : 8, //[23:16] 53 normalized_rssi_comb : 8; //[31:24] 54 uint32_t rssi_comb_ppdu : 8, //[7:0] 55 rssi_db_to_dbm_offset : 8, //[15:8] 56 rssi_for_spatial_reuse : 8, //[23:16] 57 rssi_for_trigger_resp : 8; //[31:24] 58 }; 59 60 /* 61 62 reception_type 63 64 This field helps MAC SW determine which field in this 65 (and following TLVs) will contain valid information. For 66 example some RSSI info not valid in case of uplink_ofdma.. 67 68 69 70 In case of UL MU OFDMA or UL MU-MIMO reception 71 pre-announced by MAC during trigger Tx, e-nums 0 or 1 should 72 be used. 73 74 75 76 In case of UL MU OFDMA+MIMO reception, or in case of UL 77 MU reception when PHY has not been pre-informed, e-num 2 78 should be used. 79 80 If this happens, the UL MU frame in the medium is by 81 definition not for this device. 82 83 As reference, see doc: 84 85 Lithium_mac_phy_interface_hld.docx 86 87 Chapter: 7.15.1: 11ax UL MU Reception TLV sequences when 88 this device is not targeted. 89 90 91 92 <enum 0 reception_is_uplink_ofdma> 93 94 <enum 1 reception_is_uplink_mimo> 95 96 <enum 2 reception_is_other> 97 98 <enum 3 reception_is_frameless> PHY RX has been 99 instructed in advance that the upcoming reception is 100 frameless. This implieas that in advance it is known that 101 all frames will collide in the medium, and nothing can be 102 properly decoded... This can happen during the CTS reception 103 in response to the triggered MU-RTS transmission. 104 105 MAC takes no action when seeing this e_num. For the 106 frameless reception the indication in pkt_end is the final 107 one evaluated by the MAC 108 109 110 111 For the relationship between pkt_type and this field, 112 see the table at the end of this TLV description. 113 114 <legal 0-3> 115 116 rx_chain_mask_type 117 118 Indicates if the field rx_chain_mask represents the mask 119 at start of reception (on which the Rssi_comb value is 120 based), or the setting used during the remainder of the 121 reception 122 123 124 125 1'b0: rxtd.listen_pri80_mask 126 127 1'b1: Final receive mask 128 129 130 131 <legal all> 132 133 reserved_0 134 135 <legal 0> 136 137 receive_bandwidth 138 139 Full receive Bandwidth 140 141 142 143 <enum 0 full_rx_bw_20_mhz> 144 145 <enum 1 full_rx_bw_40_mhz> 146 147 <enum 2 full_rx_bw_80_mhz> 148 149 <enum 3 full_rx_bw_160_mhz> 150 151 152 153 <legal 0-3> 154 155 rx_chain_mask 156 157 The chain mask at the start of the reception of this 158 frame. 159 160 161 162 each bit is one antenna 163 164 0: the chain is NOT used 165 166 1: the chain is used 167 168 169 170 Supports up to 8 chains 171 172 173 174 Used in 11ax TPC calculations for UL OFDMA/MIMO and has 175 to be in sync with the rssi_comb value as this is also used 176 by the MAC for the TPC calculations. 177 178 <legal all> 179 180 phy_ppdu_id 181 182 A ppdu counter value that PHY increments for every PPDU 183 received. The counter value wraps around 184 185 <legal all> 186 187 sw_phy_meta_data 188 189 32 bit Meta data that SW can program in a 32 bit PHY 190 register and PHY will insert the value in every 191 RX_RSSI_LEGACY TLV that it generates. 192 193 SW uses this field to embed among other things some SW 194 channel info. 195 196 ppdu_start_timestamp 197 198 Timestamp that indicates when the PPDU that contained 199 this MPDU started on the medium. 200 201 202 203 Note that PHY will detect the start later, and will have 204 to derive out of the preamble info when the frame actually 205 appeared on the medium 206 207 <legal 0- 10> 208 209 struct receive_rssi_info pre_rssi_info_details 210 211 This field is not valid when reception_is_uplink_ofdma 212 213 214 215 Overview of the pre-RSSI values. That is RSSI values 216 measured on the medium before this reception started. 217 218 struct receive_rssi_info preamble_rssi_info_details 219 220 This field is not valid when reception_is_uplink_ofdma 221 222 223 224 Overview of the RSSI values measured during the 225 pre-amble phase of this reception 226 227 pre_rssi_comb 228 229 Combined pre_rssi of all chains. Based on primary 230 channel RSSI. 231 232 233 234 RSSI is reported as 8b signed values. Nominally value is 235 in dB units above or below the noisefloor(minCCApwr). 236 237 238 239 The resolution can be: 240 241 1dB or 0.5dB. This is statically configured within the 242 PHY and MAC 243 244 245 246 In case of 1dB, the Range is: 247 248 -128dB to 127dB 249 250 251 252 In case of 0.5dB, the Range is: 253 254 -64dB to 63.5dB 255 256 257 258 <legal all> 259 260 rssi_comb 261 262 Combined rssi of all chains. Based on primary channel 263 RSSI. 264 265 266 267 RSSI is reported as 8b signed values. Nominally value is 268 in dB units above or below the noisefloor(minCCApwr). 269 270 271 272 The resolution can be: 273 274 1dB or 0.5dB. This is statically configured within the 275 PHY and MAC 276 277 278 279 In case of 1dB, the Range is: 280 281 -128dB to 127dB 282 283 284 285 In case of 0.5dB, the Range is: 286 287 -64dB to 63.5dB 288 289 290 291 <legal all> 292 293 normalized_pre_rssi_comb 294 295 Combined pre_rssi of all chains, but normalized back to 296 a single chain. This avoids PDG from having to evaluate this 297 in combination with receive chain mask and perform all kinds 298 of pre-processing algorithms. 299 300 301 302 Based on primary channel RSSI. 303 304 305 306 RSSI is reported as 8b signed values. Nominally value is 307 in dB units above or below the noisefloor(minCCApwr). 308 309 310 311 The resolution can be: 312 313 1dB or 0.5dB. This is statically configured within the 314 PHY and MAC 315 316 317 318 In case of 1dB, the Range is: 319 320 -128dB to 127dB 321 322 323 324 In case of 0.5dB, the Range is: 325 326 -64dB to 63.5dB 327 328 329 330 <legal all> 331 332 normalized_rssi_comb 333 334 Combined rssi of all chains, but normalized back to a 335 single chain. This avoids PDG from having to evaluate this 336 in combination with receive chain mask and perform all kinds 337 of pre-processing algorithms. 338 339 340 341 Based on primary channel RSSI. 342 343 344 345 RSSI is reported as 8b signed values. Nominally value is 346 in dB units above or below the noisefloor(minCCApwr). 347 348 349 350 The resolution can be: 351 352 1dB or 0.5dB. This is statically configured within the 353 PHY and MAC 354 355 In case of 1dB, the Range is: 356 357 -128dB to 127dB 358 359 360 361 In case of 0.5dB, the Range is: 362 363 -64dB to 63.5dB 364 365 366 367 <legal all> 368 369 rssi_comb_ppdu 370 371 Combined rssi of all chains, based on active 372 RUs/subchannels, a.k.a. rssi_pkt_bw_mac 373 374 375 376 RSSI is reported as 8b signed values. Nominally value is 377 in dB units above or below the noisefloor(minCCApwr). 378 379 380 381 The resolution can be: 382 383 1dB or 0.5dB. This is statically configured within the 384 PHY and MAC 385 386 387 388 In case of 1dB, the Range is: 389 390 -128dB to 127dB 391 392 393 394 In case of 0.5dB, the Range is: 395 396 -64dB to 63.5dB 397 398 399 400 When packet BW is 20 MHz, 401 402 rssi_comb_ppdu = rssi_comb. 403 404 405 406 When packet BW > 20 MHz, 407 408 rssi_comb < rssi_comb_ppdu because rssi_comb only 409 includes power of primary 20 MHz while rssi_comb_ppdu 410 includes power of active RUs/subchannels. 411 412 413 414 <legal all> 415 416 rssi_db_to_dbm_offset 417 418 Offset between 'dB' and 'dBm' values. SW can use this 419 value to convert RSSI 'dBm' values back to 'dB,' and report 420 both the values. 421 422 423 424 When rssi_db_to_dbm_offset = 0, 425 426 all rssi_xxx fields are defined in dB. 427 428 429 430 When rssi_db_to_dbm_offset is a large negative value, 431 all rssi_xxx fields are defined in dBm. 432 433 434 435 <legal all> 436 437 rssi_for_spatial_reuse 438 439 <legal all> 440 441 rssi_for_trigger_resp 442 443 RSSI to be used by PDG for transmit (power) selection 444 during trigger response, reported as an 8-bit signed value 445 446 447 448 The resolution can be: 449 450 1dB or 0.5dB. This is statically configured within the 451 PHY and MAC 452 453 454 455 In case of 1dB, the Range is: 456 457 -128dB to 127dB 458 459 460 461 In case of 0.5dB, the Range is: 462 463 -64dB to 63.5dB 464 465 466 467 As per 802.11ax draft 3.3 subsubclauses 28.3.14.2, for 468 trigger response, the received power should be measured from 469 the non-HE portion of the preamble of the PPDU containing 470 the trigger, normalized to 20 MHz, averaged over the 471 antennas over which the average pathloss is being computed. 472 473 <legal all> 474 */ 475 476 477 /* Description PHYRX_RSSI_LEGACY_0_RECEPTION_TYPE 478 479 This field helps MAC SW determine which field in this 480 (and following TLVs) will contain valid information. For 481 example some RSSI info not valid in case of uplink_ofdma.. 482 483 484 485 In case of UL MU OFDMA or UL MU-MIMO reception 486 pre-announced by MAC during trigger Tx, e-nums 0 or 1 should 487 be used. 488 489 490 491 In case of UL MU OFDMA+MIMO reception, or in case of UL 492 MU reception when PHY has not been pre-informed, e-num 2 493 should be used. 494 495 If this happens, the UL MU frame in the medium is by 496 definition not for this device. 497 498 As reference, see doc: 499 500 Lithium_mac_phy_interface_hld.docx 501 502 Chapter: 7.15.1: 11ax UL MU Reception TLV sequences when 503 this device is not targeted. 504 505 506 507 <enum 0 reception_is_uplink_ofdma> 508 509 <enum 1 reception_is_uplink_mimo> 510 511 <enum 2 reception_is_other> 512 513 <enum 3 reception_is_frameless> PHY RX has been 514 instructed in advance that the upcoming reception is 515 frameless. This implieas that in advance it is known that 516 all frames will collide in the medium, and nothing can be 517 properly decoded... This can happen during the CTS reception 518 in response to the triggered MU-RTS transmission. 519 520 MAC takes no action when seeing this e_num. For the 521 frameless reception the indication in pkt_end is the final 522 one evaluated by the MAC 523 524 525 526 For the relationship between pkt_type and this field, 527 see the table at the end of this TLV description. 528 529 <legal 0-3> 530 */ 531 #define PHYRX_RSSI_LEGACY_0_RECEPTION_TYPE_OFFSET 0x00000000 532 #define PHYRX_RSSI_LEGACY_0_RECEPTION_TYPE_LSB 0 533 #define PHYRX_RSSI_LEGACY_0_RECEPTION_TYPE_MASK 0x0000000f 534 535 /* Description PHYRX_RSSI_LEGACY_0_RX_CHAIN_MASK_TYPE 536 537 Indicates if the field rx_chain_mask represents the mask 538 at start of reception (on which the Rssi_comb value is 539 based), or the setting used during the remainder of the 540 reception 541 542 543 544 1'b0: rxtd.listen_pri80_mask 545 546 1'b1: Final receive mask 547 548 549 550 <legal all> 551 */ 552 #define PHYRX_RSSI_LEGACY_0_RX_CHAIN_MASK_TYPE_OFFSET 0x00000000 553 #define PHYRX_RSSI_LEGACY_0_RX_CHAIN_MASK_TYPE_LSB 4 554 #define PHYRX_RSSI_LEGACY_0_RX_CHAIN_MASK_TYPE_MASK 0x00000010 555 556 /* Description PHYRX_RSSI_LEGACY_0_RESERVED_0 557 558 <legal 0> 559 */ 560 #define PHYRX_RSSI_LEGACY_0_RESERVED_0_OFFSET 0x00000000 561 #define PHYRX_RSSI_LEGACY_0_RESERVED_0_LSB 5 562 #define PHYRX_RSSI_LEGACY_0_RESERVED_0_MASK 0x00000020 563 564 /* Description PHYRX_RSSI_LEGACY_0_RECEIVE_BANDWIDTH 565 566 Full receive Bandwidth 567 568 569 570 <enum 0 full_rx_bw_20_mhz> 571 572 <enum 1 full_rx_bw_40_mhz> 573 574 <enum 2 full_rx_bw_80_mhz> 575 576 <enum 3 full_rx_bw_160_mhz> 577 578 579 580 <legal 0-3> 581 */ 582 #define PHYRX_RSSI_LEGACY_0_RECEIVE_BANDWIDTH_OFFSET 0x00000000 583 #define PHYRX_RSSI_LEGACY_0_RECEIVE_BANDWIDTH_LSB 6 584 #define PHYRX_RSSI_LEGACY_0_RECEIVE_BANDWIDTH_MASK 0x000000c0 585 586 /* Description PHYRX_RSSI_LEGACY_0_RX_CHAIN_MASK 587 588 The chain mask at the start of the reception of this 589 frame. 590 591 592 593 each bit is one antenna 594 595 0: the chain is NOT used 596 597 1: the chain is used 598 599 600 601 Supports up to 8 chains 602 603 604 605 Used in 11ax TPC calculations for UL OFDMA/MIMO and has 606 to be in sync with the rssi_comb value as this is also used 607 by the MAC for the TPC calculations. 608 609 <legal all> 610 */ 611 #define PHYRX_RSSI_LEGACY_0_RX_CHAIN_MASK_OFFSET 0x00000000 612 #define PHYRX_RSSI_LEGACY_0_RX_CHAIN_MASK_LSB 8 613 #define PHYRX_RSSI_LEGACY_0_RX_CHAIN_MASK_MASK 0x0000ff00 614 615 /* Description PHYRX_RSSI_LEGACY_0_PHY_PPDU_ID 616 617 A ppdu counter value that PHY increments for every PPDU 618 received. The counter value wraps around 619 620 <legal all> 621 */ 622 #define PHYRX_RSSI_LEGACY_0_PHY_PPDU_ID_OFFSET 0x00000000 623 #define PHYRX_RSSI_LEGACY_0_PHY_PPDU_ID_LSB 16 624 #define PHYRX_RSSI_LEGACY_0_PHY_PPDU_ID_MASK 0xffff0000 625 626 /* Description PHYRX_RSSI_LEGACY_1_SW_PHY_META_DATA 627 628 32 bit Meta data that SW can program in a 32 bit PHY 629 register and PHY will insert the value in every 630 RX_RSSI_LEGACY TLV that it generates. 631 632 SW uses this field to embed among other things some SW 633 channel info. 634 */ 635 #define PHYRX_RSSI_LEGACY_1_SW_PHY_META_DATA_OFFSET 0x00000004 636 #define PHYRX_RSSI_LEGACY_1_SW_PHY_META_DATA_LSB 0 637 #define PHYRX_RSSI_LEGACY_1_SW_PHY_META_DATA_MASK 0xffffffff 638 639 /* Description PHYRX_RSSI_LEGACY_2_PPDU_START_TIMESTAMP 640 641 Timestamp that indicates when the PPDU that contained 642 this MPDU started on the medium. 643 644 645 646 Note that PHY will detect the start later, and will have 647 to derive out of the preamble info when the frame actually 648 appeared on the medium 649 650 <legal 0- 10> 651 */ 652 #define PHYRX_RSSI_LEGACY_2_PPDU_START_TIMESTAMP_OFFSET 0x00000008 653 #define PHYRX_RSSI_LEGACY_2_PPDU_START_TIMESTAMP_LSB 0 654 #define PHYRX_RSSI_LEGACY_2_PPDU_START_TIMESTAMP_MASK 0xffffffff 655 656 /* EXTERNAL REFERENCE : struct receive_rssi_info pre_rssi_info_details */ 657 658 659 /* Description PHYRX_RSSI_LEGACY_3_PRE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN0 660 661 RSSI of RX PPDU on chain 0 of primary 20 MHz bandwidth. 662 663 Value of 0x80 indicates invalid. 664 */ 665 #define PHYRX_RSSI_LEGACY_3_PRE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN0_OFFSET 0x0000000c 666 #define PHYRX_RSSI_LEGACY_3_PRE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN0_LSB 0 667 #define PHYRX_RSSI_LEGACY_3_PRE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN0_MASK 0x000000ff 668 669 /* Description PHYRX_RSSI_LEGACY_3_PRE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN0 670 671 RSSI of RX PPDU on chain 0 of extension 20 MHz 672 bandwidth. 673 674 Value of 0x80 indicates invalid. 675 */ 676 #define PHYRX_RSSI_LEGACY_3_PRE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN0_OFFSET 0x0000000c 677 #define PHYRX_RSSI_LEGACY_3_PRE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN0_LSB 8 678 #define PHYRX_RSSI_LEGACY_3_PRE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN0_MASK 0x0000ff00 679 680 /* Description PHYRX_RSSI_LEGACY_3_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN0 681 682 RSSI of RX PPDU on chain 0 of extension 40, low 20 MHz 683 bandwidth. 684 685 Value of 0x80 indicates invalid. 686 */ 687 #define PHYRX_RSSI_LEGACY_3_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN0_OFFSET 0x0000000c 688 #define PHYRX_RSSI_LEGACY_3_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN0_LSB 16 689 #define PHYRX_RSSI_LEGACY_3_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN0_MASK 0x00ff0000 690 691 /* Description PHYRX_RSSI_LEGACY_3_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN0 692 693 RSSI of RX PPDU on chain 0 of extension 40, high 20 MHz 694 bandwidth. 695 696 Value of 0x80 indicates invalid. 697 */ 698 #define PHYRX_RSSI_LEGACY_3_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN0_OFFSET 0x0000000c 699 #define PHYRX_RSSI_LEGACY_3_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN0_LSB 24 700 #define PHYRX_RSSI_LEGACY_3_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN0_MASK 0xff000000 701 702 /* Description PHYRX_RSSI_LEGACY_4_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN0 703 704 RSSI of RX PPDU on chain 0 of extension 80, low 20 MHz 705 bandwidth. 706 707 Value of 0x80 indicates invalid. 708 */ 709 #define PHYRX_RSSI_LEGACY_4_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN0_OFFSET 0x00000010 710 #define PHYRX_RSSI_LEGACY_4_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN0_LSB 0 711 #define PHYRX_RSSI_LEGACY_4_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN0_MASK 0x000000ff 712 713 /* Description PHYRX_RSSI_LEGACY_4_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN0 714 715 RSSI of RX PPDU on chain 0 of extension 80, low-high 20 716 MHz bandwidth. 717 718 Value of 0x80 indicates invalid. 719 */ 720 #define PHYRX_RSSI_LEGACY_4_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN0_OFFSET 0x00000010 721 #define PHYRX_RSSI_LEGACY_4_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN0_LSB 8 722 #define PHYRX_RSSI_LEGACY_4_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN0_MASK 0x0000ff00 723 724 /* Description PHYRX_RSSI_LEGACY_4_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN0 725 726 RSSI of RX PPDU on chain 0 of extension 80, high-low 20 727 MHz bandwidth. 728 729 Value of 0x80 indicates invalid. 730 */ 731 #define PHYRX_RSSI_LEGACY_4_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN0_OFFSET 0x00000010 732 #define PHYRX_RSSI_LEGACY_4_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN0_LSB 16 733 #define PHYRX_RSSI_LEGACY_4_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN0_MASK 0x00ff0000 734 735 /* Description PHYRX_RSSI_LEGACY_4_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN0 736 737 RSSI of RX PPDU on chain 0 of extension 80, high 20 MHz 738 bandwidth. 739 740 Value of 0x80 indicates invalid. 741 */ 742 #define PHYRX_RSSI_LEGACY_4_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN0_OFFSET 0x00000010 743 #define PHYRX_RSSI_LEGACY_4_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN0_LSB 24 744 #define PHYRX_RSSI_LEGACY_4_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN0_MASK 0xff000000 745 746 /* Description PHYRX_RSSI_LEGACY_5_PRE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN1 747 748 RSSI of RX PPDU on chain 1 of primary 20 MHz bandwidth. 749 750 Value of 0x80 indicates invalid. 751 */ 752 #define PHYRX_RSSI_LEGACY_5_PRE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN1_OFFSET 0x00000014 753 #define PHYRX_RSSI_LEGACY_5_PRE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN1_LSB 0 754 #define PHYRX_RSSI_LEGACY_5_PRE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN1_MASK 0x000000ff 755 756 /* Description PHYRX_RSSI_LEGACY_5_PRE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN1 757 758 RSSI of RX PPDU on chain 1 of extension 20 MHz 759 bandwidth. 760 761 Value of 0x80 indicates invalid. 762 */ 763 #define PHYRX_RSSI_LEGACY_5_PRE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN1_OFFSET 0x00000014 764 #define PHYRX_RSSI_LEGACY_5_PRE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN1_LSB 8 765 #define PHYRX_RSSI_LEGACY_5_PRE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN1_MASK 0x0000ff00 766 767 /* Description PHYRX_RSSI_LEGACY_5_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN1 768 769 RSSI of RX PPDU on chain 1 of extension 40, low 20 MHz 770 bandwidth. 771 772 Value of 0x80 indicates invalid. 773 */ 774 #define PHYRX_RSSI_LEGACY_5_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN1_OFFSET 0x00000014 775 #define PHYRX_RSSI_LEGACY_5_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN1_LSB 16 776 #define PHYRX_RSSI_LEGACY_5_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN1_MASK 0x00ff0000 777 778 /* Description PHYRX_RSSI_LEGACY_5_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN1 779 780 RSSI of RX PPDU on chain 1 of extension 40, high 20 MHz 781 bandwidth. 782 783 Value of 0x80 indicates invalid. 784 */ 785 #define PHYRX_RSSI_LEGACY_5_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN1_OFFSET 0x00000014 786 #define PHYRX_RSSI_LEGACY_5_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN1_LSB 24 787 #define PHYRX_RSSI_LEGACY_5_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN1_MASK 0xff000000 788 789 /* Description PHYRX_RSSI_LEGACY_6_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN1 790 791 RSSI of RX PPDU on chain 1 of extension 80, low 20 MHz 792 bandwidth. 793 794 Value of 0x80 indicates invalid. 795 */ 796 #define PHYRX_RSSI_LEGACY_6_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN1_OFFSET 0x00000018 797 #define PHYRX_RSSI_LEGACY_6_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN1_LSB 0 798 #define PHYRX_RSSI_LEGACY_6_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN1_MASK 0x000000ff 799 800 /* Description PHYRX_RSSI_LEGACY_6_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN1 801 802 RSSI of RX PPDU on chain 1 of extension 80, low-high 20 803 MHz bandwidth. 804 805 Value of 0x80 indicates invalid. 806 */ 807 #define PHYRX_RSSI_LEGACY_6_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN1_OFFSET 0x00000018 808 #define PHYRX_RSSI_LEGACY_6_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN1_LSB 8 809 #define PHYRX_RSSI_LEGACY_6_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN1_MASK 0x0000ff00 810 811 /* Description PHYRX_RSSI_LEGACY_6_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN1 812 813 RSSI of RX PPDU on chain 1 of extension 80, high-low 20 814 MHz bandwidth. 815 816 Value of 0x80 indicates invalid. 817 */ 818 #define PHYRX_RSSI_LEGACY_6_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN1_OFFSET 0x00000018 819 #define PHYRX_RSSI_LEGACY_6_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN1_LSB 16 820 #define PHYRX_RSSI_LEGACY_6_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN1_MASK 0x00ff0000 821 822 /* Description PHYRX_RSSI_LEGACY_6_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN1 823 824 RSSI of RX PPDU on chain 1 of extension 80, high 20 MHz 825 bandwidth. 826 827 Value of 0x80 indicates invalid. 828 */ 829 #define PHYRX_RSSI_LEGACY_6_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN1_OFFSET 0x00000018 830 #define PHYRX_RSSI_LEGACY_6_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN1_LSB 24 831 #define PHYRX_RSSI_LEGACY_6_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN1_MASK 0xff000000 832 833 /* Description PHYRX_RSSI_LEGACY_7_PRE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN2 834 835 RSSI of RX PPDU on chain 2 of primary 20 MHz bandwidth. 836 837 Value of 0x80 indicates invalid. 838 */ 839 #define PHYRX_RSSI_LEGACY_7_PRE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN2_OFFSET 0x0000001c 840 #define PHYRX_RSSI_LEGACY_7_PRE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN2_LSB 0 841 #define PHYRX_RSSI_LEGACY_7_PRE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN2_MASK 0x000000ff 842 843 /* Description PHYRX_RSSI_LEGACY_7_PRE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN2 844 845 RSSI of RX PPDU on chain 2 of extension 20 MHz 846 bandwidth. 847 848 Value of 0x80 indicates invalid. 849 */ 850 #define PHYRX_RSSI_LEGACY_7_PRE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN2_OFFSET 0x0000001c 851 #define PHYRX_RSSI_LEGACY_7_PRE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN2_LSB 8 852 #define PHYRX_RSSI_LEGACY_7_PRE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN2_MASK 0x0000ff00 853 854 /* Description PHYRX_RSSI_LEGACY_7_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN2 855 856 RSSI of RX PPDU on chain 2 of extension 40, low 20 MHz 857 bandwidth. 858 859 Value of 0x80 indicates invalid. 860 */ 861 #define PHYRX_RSSI_LEGACY_7_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN2_OFFSET 0x0000001c 862 #define PHYRX_RSSI_LEGACY_7_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN2_LSB 16 863 #define PHYRX_RSSI_LEGACY_7_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN2_MASK 0x00ff0000 864 865 /* Description PHYRX_RSSI_LEGACY_7_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN2 866 867 RSSI of RX PPDU on chain 2 of extension 40, high 20 MHz 868 bandwidth. 869 870 Value of 0x80 indicates invalid. 871 */ 872 #define PHYRX_RSSI_LEGACY_7_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN2_OFFSET 0x0000001c 873 #define PHYRX_RSSI_LEGACY_7_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN2_LSB 24 874 #define PHYRX_RSSI_LEGACY_7_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN2_MASK 0xff000000 875 876 /* Description PHYRX_RSSI_LEGACY_8_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN2 877 878 RSSI of RX PPDU on chain 2 of extension 80, low 20 MHz 879 bandwidth. 880 881 Value of 0x80 indicates invalid. 882 */ 883 #define PHYRX_RSSI_LEGACY_8_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN2_OFFSET 0x00000020 884 #define PHYRX_RSSI_LEGACY_8_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN2_LSB 0 885 #define PHYRX_RSSI_LEGACY_8_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN2_MASK 0x000000ff 886 887 /* Description PHYRX_RSSI_LEGACY_8_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN2 888 889 RSSI of RX PPDU on chain 2 of extension 80, low-high 20 890 MHz bandwidth. 891 892 Value of 0x80 indicates invalid. 893 */ 894 #define PHYRX_RSSI_LEGACY_8_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN2_OFFSET 0x00000020 895 #define PHYRX_RSSI_LEGACY_8_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN2_LSB 8 896 #define PHYRX_RSSI_LEGACY_8_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN2_MASK 0x0000ff00 897 898 /* Description PHYRX_RSSI_LEGACY_8_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN2 899 900 RSSI of RX PPDU on chain 2 of extension 80, high-low 20 901 MHz bandwidth. 902 903 Value of 0x80 indicates invalid. 904 */ 905 #define PHYRX_RSSI_LEGACY_8_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN2_OFFSET 0x00000020 906 #define PHYRX_RSSI_LEGACY_8_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN2_LSB 16 907 #define PHYRX_RSSI_LEGACY_8_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN2_MASK 0x00ff0000 908 909 /* Description PHYRX_RSSI_LEGACY_8_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN2 910 911 RSSI of RX PPDU on chain 2 of extension 80, high 20 MHz 912 bandwidth. 913 914 Value of 0x80 indicates invalid. 915 */ 916 #define PHYRX_RSSI_LEGACY_8_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN2_OFFSET 0x00000020 917 #define PHYRX_RSSI_LEGACY_8_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN2_LSB 24 918 #define PHYRX_RSSI_LEGACY_8_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN2_MASK 0xff000000 919 920 /* Description PHYRX_RSSI_LEGACY_9_PRE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN3 921 922 RSSI of RX PPDU on chain 3 of primary 20 MHz bandwidth. 923 924 Value of 0x80 indicates invalid. 925 */ 926 #define PHYRX_RSSI_LEGACY_9_PRE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN3_OFFSET 0x00000024 927 #define PHYRX_RSSI_LEGACY_9_PRE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN3_LSB 0 928 #define PHYRX_RSSI_LEGACY_9_PRE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN3_MASK 0x000000ff 929 930 /* Description PHYRX_RSSI_LEGACY_9_PRE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN3 931 932 RSSI of RX PPDU on chain 3 of extension 20 MHz 933 bandwidth. 934 935 Value of 0x80 indicates invalid. 936 */ 937 #define PHYRX_RSSI_LEGACY_9_PRE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN3_OFFSET 0x00000024 938 #define PHYRX_RSSI_LEGACY_9_PRE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN3_LSB 8 939 #define PHYRX_RSSI_LEGACY_9_PRE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN3_MASK 0x0000ff00 940 941 /* Description PHYRX_RSSI_LEGACY_9_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN3 942 943 RSSI of RX PPDU on chain 3 of extension 40, low 20 MHz 944 bandwidth. 945 946 Value of 0x80 indicates invalid. 947 */ 948 #define PHYRX_RSSI_LEGACY_9_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN3_OFFSET 0x00000024 949 #define PHYRX_RSSI_LEGACY_9_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN3_LSB 16 950 #define PHYRX_RSSI_LEGACY_9_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN3_MASK 0x00ff0000 951 952 /* Description PHYRX_RSSI_LEGACY_9_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN3 953 954 RSSI of RX PPDU on chain 3 of extension 40, high 20 MHz 955 bandwidth. 956 957 Value of 0x80 indicates invalid. 958 */ 959 #define PHYRX_RSSI_LEGACY_9_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN3_OFFSET 0x00000024 960 #define PHYRX_RSSI_LEGACY_9_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN3_LSB 24 961 #define PHYRX_RSSI_LEGACY_9_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN3_MASK 0xff000000 962 963 /* Description PHYRX_RSSI_LEGACY_10_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN3 964 965 RSSI of RX PPDU on chain 3 of extension 80, low 20 MHz 966 bandwidth. 967 968 Value of 0x80 indicates invalid. 969 */ 970 #define PHYRX_RSSI_LEGACY_10_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN3_OFFSET 0x00000028 971 #define PHYRX_RSSI_LEGACY_10_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN3_LSB 0 972 #define PHYRX_RSSI_LEGACY_10_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN3_MASK 0x000000ff 973 974 /* Description PHYRX_RSSI_LEGACY_10_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN3 975 976 RSSI of RX PPDU on chain 3 of extension 80, low-high 20 977 MHz bandwidth. 978 979 Value of 0x80 indicates invalid. 980 */ 981 #define PHYRX_RSSI_LEGACY_10_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN3_OFFSET 0x00000028 982 #define PHYRX_RSSI_LEGACY_10_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN3_LSB 8 983 #define PHYRX_RSSI_LEGACY_10_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN3_MASK 0x0000ff00 984 985 /* Description PHYRX_RSSI_LEGACY_10_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN3 986 987 RSSI of RX PPDU on chain 3 of extension 80, high-low 20 988 MHz bandwidth. 989 990 Value of 0x80 indicates invalid. 991 */ 992 #define PHYRX_RSSI_LEGACY_10_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN3_OFFSET 0x00000028 993 #define PHYRX_RSSI_LEGACY_10_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN3_LSB 16 994 #define PHYRX_RSSI_LEGACY_10_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN3_MASK 0x00ff0000 995 996 /* Description PHYRX_RSSI_LEGACY_10_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN3 997 998 RSSI of RX PPDU on chain 3 of extension 80, high 20 MHz 999 bandwidth. 1000 1001 Value of 0x80 indicates invalid. 1002 */ 1003 #define PHYRX_RSSI_LEGACY_10_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN3_OFFSET 0x00000028 1004 #define PHYRX_RSSI_LEGACY_10_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN3_LSB 24 1005 #define PHYRX_RSSI_LEGACY_10_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN3_MASK 0xff000000 1006 1007 /* Description PHYRX_RSSI_LEGACY_11_PRE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN4 1008 1009 RSSI of RX PPDU on chain 4 of primary 20 MHz bandwidth. 1010 1011 Value of 0x80 indicates invalid. 1012 */ 1013 #define PHYRX_RSSI_LEGACY_11_PRE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN4_OFFSET 0x0000002c 1014 #define PHYRX_RSSI_LEGACY_11_PRE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN4_LSB 0 1015 #define PHYRX_RSSI_LEGACY_11_PRE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN4_MASK 0x000000ff 1016 1017 /* Description PHYRX_RSSI_LEGACY_11_PRE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN4 1018 1019 RSSI of RX PPDU on chain 4 of extension 20 MHz 1020 bandwidth. 1021 1022 Value of 0x80 indicates invalid. 1023 */ 1024 #define PHYRX_RSSI_LEGACY_11_PRE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN4_OFFSET 0x0000002c 1025 #define PHYRX_RSSI_LEGACY_11_PRE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN4_LSB 8 1026 #define PHYRX_RSSI_LEGACY_11_PRE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN4_MASK 0x0000ff00 1027 1028 /* Description PHYRX_RSSI_LEGACY_11_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN4 1029 1030 RSSI of RX PPDU on chain 4 of extension 40, low 20 MHz 1031 bandwidth. 1032 1033 Value of 0x80 indicates invalid. 1034 */ 1035 #define PHYRX_RSSI_LEGACY_11_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN4_OFFSET 0x0000002c 1036 #define PHYRX_RSSI_LEGACY_11_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN4_LSB 16 1037 #define PHYRX_RSSI_LEGACY_11_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN4_MASK 0x00ff0000 1038 1039 /* Description PHYRX_RSSI_LEGACY_11_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN4 1040 1041 RSSI of RX PPDU on chain 4 of extension 40, high 20 MHz 1042 bandwidth. 1043 1044 Value of 0x80 indicates invalid. 1045 */ 1046 #define PHYRX_RSSI_LEGACY_11_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN4_OFFSET 0x0000002c 1047 #define PHYRX_RSSI_LEGACY_11_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN4_LSB 24 1048 #define PHYRX_RSSI_LEGACY_11_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN4_MASK 0xff000000 1049 1050 /* Description PHYRX_RSSI_LEGACY_12_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN4 1051 1052 RSSI of RX PPDU on chain 4 of extension 80, low 20 MHz 1053 bandwidth. 1054 1055 Value of 0x80 indicates invalid. 1056 */ 1057 #define PHYRX_RSSI_LEGACY_12_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN4_OFFSET 0x00000030 1058 #define PHYRX_RSSI_LEGACY_12_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN4_LSB 0 1059 #define PHYRX_RSSI_LEGACY_12_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN4_MASK 0x000000ff 1060 1061 /* Description PHYRX_RSSI_LEGACY_12_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN4 1062 1063 RSSI of RX PPDU on chain 4 of extension 80, low-high 20 1064 MHz bandwidth. 1065 1066 Value of 0x80 indicates invalid. 1067 */ 1068 #define PHYRX_RSSI_LEGACY_12_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN4_OFFSET 0x00000030 1069 #define PHYRX_RSSI_LEGACY_12_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN4_LSB 8 1070 #define PHYRX_RSSI_LEGACY_12_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN4_MASK 0x0000ff00 1071 1072 /* Description PHYRX_RSSI_LEGACY_12_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN4 1073 1074 RSSI of RX PPDU on chain 4 of extension 80, high-low 20 1075 MHz bandwidth. 1076 1077 Value of 0x80 indicates invalid. 1078 */ 1079 #define PHYRX_RSSI_LEGACY_12_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN4_OFFSET 0x00000030 1080 #define PHYRX_RSSI_LEGACY_12_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN4_LSB 16 1081 #define PHYRX_RSSI_LEGACY_12_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN4_MASK 0x00ff0000 1082 1083 /* Description PHYRX_RSSI_LEGACY_12_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN4 1084 1085 RSSI of RX PPDU on chain 4 of extension 80, high 20 MHz 1086 bandwidth. 1087 1088 Value of 0x80 indicates invalid. 1089 */ 1090 #define PHYRX_RSSI_LEGACY_12_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN4_OFFSET 0x00000030 1091 #define PHYRX_RSSI_LEGACY_12_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN4_LSB 24 1092 #define PHYRX_RSSI_LEGACY_12_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN4_MASK 0xff000000 1093 1094 /* Description PHYRX_RSSI_LEGACY_13_PRE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN5 1095 1096 RSSI of RX PPDU on chain 0 of primary 20 MHz bandwidth. 1097 1098 Value of 0x80 indicates invalid. 1099 */ 1100 #define PHYRX_RSSI_LEGACY_13_PRE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN5_OFFSET 0x00000034 1101 #define PHYRX_RSSI_LEGACY_13_PRE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN5_LSB 0 1102 #define PHYRX_RSSI_LEGACY_13_PRE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN5_MASK 0x000000ff 1103 1104 /* Description PHYRX_RSSI_LEGACY_13_PRE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN5 1105 1106 RSSI of RX PPDU on chain 5 of extension 20 MHz 1107 bandwidth. 1108 1109 Value of 0x80 indicates invalid. 1110 */ 1111 #define PHYRX_RSSI_LEGACY_13_PRE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN5_OFFSET 0x00000034 1112 #define PHYRX_RSSI_LEGACY_13_PRE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN5_LSB 8 1113 #define PHYRX_RSSI_LEGACY_13_PRE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN5_MASK 0x0000ff00 1114 1115 /* Description PHYRX_RSSI_LEGACY_13_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN5 1116 1117 RSSI of RX PPDU on chain 5 of extension 40, low 20 MHz 1118 bandwidth. 1119 1120 Value of 0x80 indicates invalid. 1121 */ 1122 #define PHYRX_RSSI_LEGACY_13_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN5_OFFSET 0x00000034 1123 #define PHYRX_RSSI_LEGACY_13_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN5_LSB 16 1124 #define PHYRX_RSSI_LEGACY_13_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN5_MASK 0x00ff0000 1125 1126 /* Description PHYRX_RSSI_LEGACY_13_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN5 1127 1128 RSSI of RX PPDU on chain 5 of extension 40, high 20 MHz 1129 bandwidth. 1130 1131 Value of 0x80 indicates invalid. 1132 */ 1133 #define PHYRX_RSSI_LEGACY_13_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN5_OFFSET 0x00000034 1134 #define PHYRX_RSSI_LEGACY_13_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN5_LSB 24 1135 #define PHYRX_RSSI_LEGACY_13_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN5_MASK 0xff000000 1136 1137 /* Description PHYRX_RSSI_LEGACY_14_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN5 1138 1139 RSSI of RX PPDU on chain 5 of extension 80, low 20 MHz 1140 bandwidth. 1141 1142 Value of 0x80 indicates invalid. 1143 */ 1144 #define PHYRX_RSSI_LEGACY_14_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN5_OFFSET 0x00000038 1145 #define PHYRX_RSSI_LEGACY_14_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN5_LSB 0 1146 #define PHYRX_RSSI_LEGACY_14_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN5_MASK 0x000000ff 1147 1148 /* Description PHYRX_RSSI_LEGACY_14_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN5 1149 1150 RSSI of RX PPDU on chain 5 of extension 80, low-high 20 1151 MHz bandwidth. 1152 1153 Value of 0x80 indicates invalid. 1154 */ 1155 #define PHYRX_RSSI_LEGACY_14_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN5_OFFSET 0x00000038 1156 #define PHYRX_RSSI_LEGACY_14_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN5_LSB 8 1157 #define PHYRX_RSSI_LEGACY_14_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN5_MASK 0x0000ff00 1158 1159 /* Description PHYRX_RSSI_LEGACY_14_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN5 1160 1161 RSSI of RX PPDU on chain 5 of extension 80, high-low 20 1162 MHz bandwidth. 1163 1164 Value of 0x80 indicates invalid. 1165 */ 1166 #define PHYRX_RSSI_LEGACY_14_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN5_OFFSET 0x00000038 1167 #define PHYRX_RSSI_LEGACY_14_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN5_LSB 16 1168 #define PHYRX_RSSI_LEGACY_14_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN5_MASK 0x00ff0000 1169 1170 /* Description PHYRX_RSSI_LEGACY_14_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN5 1171 1172 RSSI of RX PPDU on chain 5 of extension 80, high 20 MHz 1173 bandwidth. 1174 1175 Value of 0x80 indicates invalid. 1176 */ 1177 #define PHYRX_RSSI_LEGACY_14_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN5_OFFSET 0x00000038 1178 #define PHYRX_RSSI_LEGACY_14_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN5_LSB 24 1179 #define PHYRX_RSSI_LEGACY_14_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN5_MASK 0xff000000 1180 1181 /* Description PHYRX_RSSI_LEGACY_15_PRE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN6 1182 1183 RSSI of RX PPDU on chain 6 of primary 20 MHz bandwidth. 1184 1185 Value of 0x80 indicates invalid. 1186 */ 1187 #define PHYRX_RSSI_LEGACY_15_PRE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN6_OFFSET 0x0000003c 1188 #define PHYRX_RSSI_LEGACY_15_PRE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN6_LSB 0 1189 #define PHYRX_RSSI_LEGACY_15_PRE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN6_MASK 0x000000ff 1190 1191 /* Description PHYRX_RSSI_LEGACY_15_PRE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN6 1192 1193 RSSI of RX PPDU on chain 6 of extension 20 MHz 1194 bandwidth. 1195 1196 Value of 0x80 indicates invalid. 1197 */ 1198 #define PHYRX_RSSI_LEGACY_15_PRE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN6_OFFSET 0x0000003c 1199 #define PHYRX_RSSI_LEGACY_15_PRE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN6_LSB 8 1200 #define PHYRX_RSSI_LEGACY_15_PRE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN6_MASK 0x0000ff00 1201 1202 /* Description PHYRX_RSSI_LEGACY_15_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN6 1203 1204 RSSI of RX PPDU on chain 6 of extension 40, low 20 MHz 1205 bandwidth. 1206 1207 Value of 0x80 indicates invalid. 1208 */ 1209 #define PHYRX_RSSI_LEGACY_15_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN6_OFFSET 0x0000003c 1210 #define PHYRX_RSSI_LEGACY_15_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN6_LSB 16 1211 #define PHYRX_RSSI_LEGACY_15_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN6_MASK 0x00ff0000 1212 1213 /* Description PHYRX_RSSI_LEGACY_15_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN6 1214 1215 RSSI of RX PPDU on chain 6 of extension 40, high 20 MHz 1216 bandwidth. 1217 1218 Value of 0x80 indicates invalid. 1219 */ 1220 #define PHYRX_RSSI_LEGACY_15_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN6_OFFSET 0x0000003c 1221 #define PHYRX_RSSI_LEGACY_15_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN6_LSB 24 1222 #define PHYRX_RSSI_LEGACY_15_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN6_MASK 0xff000000 1223 1224 /* Description PHYRX_RSSI_LEGACY_16_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN6 1225 1226 RSSI of RX PPDU on chain 6 of extension 80, low 20 MHz 1227 bandwidth. 1228 1229 Value of 0x80 indicates invalid. 1230 */ 1231 #define PHYRX_RSSI_LEGACY_16_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN6_OFFSET 0x00000040 1232 #define PHYRX_RSSI_LEGACY_16_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN6_LSB 0 1233 #define PHYRX_RSSI_LEGACY_16_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN6_MASK 0x000000ff 1234 1235 /* Description PHYRX_RSSI_LEGACY_16_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN6 1236 1237 RSSI of RX PPDU on chain 6 of extension 80, low-high 20 1238 MHz bandwidth. 1239 1240 Value of 0x80 indicates invalid. 1241 */ 1242 #define PHYRX_RSSI_LEGACY_16_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN6_OFFSET 0x00000040 1243 #define PHYRX_RSSI_LEGACY_16_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN6_LSB 8 1244 #define PHYRX_RSSI_LEGACY_16_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN6_MASK 0x0000ff00 1245 1246 /* Description PHYRX_RSSI_LEGACY_16_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN6 1247 1248 RSSI of RX PPDU on chain 6 of extension 80, high-low 20 1249 MHz bandwidth. 1250 1251 Value of 0x80 indicates invalid. 1252 */ 1253 #define PHYRX_RSSI_LEGACY_16_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN6_OFFSET 0x00000040 1254 #define PHYRX_RSSI_LEGACY_16_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN6_LSB 16 1255 #define PHYRX_RSSI_LEGACY_16_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN6_MASK 0x00ff0000 1256 1257 /* Description PHYRX_RSSI_LEGACY_16_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN6 1258 1259 RSSI of RX PPDU on chain 6 of extension 80, high 20 MHz 1260 bandwidth. 1261 1262 Value of 0x80 indicates invalid. 1263 */ 1264 #define PHYRX_RSSI_LEGACY_16_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN6_OFFSET 0x00000040 1265 #define PHYRX_RSSI_LEGACY_16_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN6_LSB 24 1266 #define PHYRX_RSSI_LEGACY_16_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN6_MASK 0xff000000 1267 1268 /* Description PHYRX_RSSI_LEGACY_17_PRE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN7 1269 1270 RSSI of RX PPDU on chain 7 of primary 20 MHz bandwidth. 1271 1272 Value of 0x80 indicates invalid. 1273 */ 1274 #define PHYRX_RSSI_LEGACY_17_PRE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN7_OFFSET 0x00000044 1275 #define PHYRX_RSSI_LEGACY_17_PRE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN7_LSB 0 1276 #define PHYRX_RSSI_LEGACY_17_PRE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN7_MASK 0x000000ff 1277 1278 /* Description PHYRX_RSSI_LEGACY_17_PRE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN7 1279 1280 RSSI of RX PPDU on chain 7 of extension 20 MHz 1281 bandwidth. 1282 1283 Value of 0x80 indicates invalid. 1284 */ 1285 #define PHYRX_RSSI_LEGACY_17_PRE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN7_OFFSET 0x00000044 1286 #define PHYRX_RSSI_LEGACY_17_PRE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN7_LSB 8 1287 #define PHYRX_RSSI_LEGACY_17_PRE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN7_MASK 0x0000ff00 1288 1289 /* Description PHYRX_RSSI_LEGACY_17_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN7 1290 1291 RSSI of RX PPDU on chain 7 of extension 40, low 20 MHz 1292 bandwidth. 1293 1294 Value of 0x80 indicates invalid. 1295 */ 1296 #define PHYRX_RSSI_LEGACY_17_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN7_OFFSET 0x00000044 1297 #define PHYRX_RSSI_LEGACY_17_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN7_LSB 16 1298 #define PHYRX_RSSI_LEGACY_17_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN7_MASK 0x00ff0000 1299 1300 /* Description PHYRX_RSSI_LEGACY_17_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN7 1301 1302 RSSI of RX PPDU on chain 7 of extension 40, high 20 MHz 1303 bandwidth. 1304 1305 Value of 0x80 indicates invalid. 1306 */ 1307 #define PHYRX_RSSI_LEGACY_17_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN7_OFFSET 0x00000044 1308 #define PHYRX_RSSI_LEGACY_17_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN7_LSB 24 1309 #define PHYRX_RSSI_LEGACY_17_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN7_MASK 0xff000000 1310 1311 /* Description PHYRX_RSSI_LEGACY_18_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN7 1312 1313 RSSI of RX PPDU on chain 7 of extension 80, low 20 MHz 1314 bandwidth. 1315 1316 Value of 0x80 indicates invalid. 1317 */ 1318 #define PHYRX_RSSI_LEGACY_18_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN7_OFFSET 0x00000048 1319 #define PHYRX_RSSI_LEGACY_18_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN7_LSB 0 1320 #define PHYRX_RSSI_LEGACY_18_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN7_MASK 0x000000ff 1321 1322 /* Description PHYRX_RSSI_LEGACY_18_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN7 1323 1324 RSSI of RX PPDU on chain 7 of extension 80, low-high 20 1325 MHz bandwidth. 1326 1327 Value of 0x80 indicates invalid. 1328 */ 1329 #define PHYRX_RSSI_LEGACY_18_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN7_OFFSET 0x00000048 1330 #define PHYRX_RSSI_LEGACY_18_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN7_LSB 8 1331 #define PHYRX_RSSI_LEGACY_18_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN7_MASK 0x0000ff00 1332 1333 /* Description PHYRX_RSSI_LEGACY_18_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN7 1334 1335 RSSI of RX PPDU on chain 7 of extension 80, high-low 20 1336 MHz bandwidth. 1337 1338 Value of 0x80 indicates invalid. 1339 */ 1340 #define PHYRX_RSSI_LEGACY_18_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN7_OFFSET 0x00000048 1341 #define PHYRX_RSSI_LEGACY_18_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN7_LSB 16 1342 #define PHYRX_RSSI_LEGACY_18_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN7_MASK 0x00ff0000 1343 1344 /* Description PHYRX_RSSI_LEGACY_18_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN7 1345 1346 RSSI of RX PPDU on chain 7 of extension 80, high 20 MHz 1347 bandwidth. 1348 1349 Value of 0x80 indicates invalid. 1350 */ 1351 #define PHYRX_RSSI_LEGACY_18_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN7_OFFSET 0x00000048 1352 #define PHYRX_RSSI_LEGACY_18_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN7_LSB 24 1353 #define PHYRX_RSSI_LEGACY_18_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN7_MASK 0xff000000 1354 1355 /* EXTERNAL REFERENCE : struct receive_rssi_info preamble_rssi_info_details */ 1356 1357 1358 /* Description PHYRX_RSSI_LEGACY_19_PREAMBLE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN0 1359 1360 RSSI of RX PPDU on chain 0 of primary 20 MHz bandwidth. 1361 1362 Value of 0x80 indicates invalid. 1363 */ 1364 #define PHYRX_RSSI_LEGACY_19_PREAMBLE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN0_OFFSET 0x0000004c 1365 #define PHYRX_RSSI_LEGACY_19_PREAMBLE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN0_LSB 0 1366 #define PHYRX_RSSI_LEGACY_19_PREAMBLE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN0_MASK 0x000000ff 1367 1368 /* Description PHYRX_RSSI_LEGACY_19_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN0 1369 1370 RSSI of RX PPDU on chain 0 of extension 20 MHz 1371 bandwidth. 1372 1373 Value of 0x80 indicates invalid. 1374 */ 1375 #define PHYRX_RSSI_LEGACY_19_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN0_OFFSET 0x0000004c 1376 #define PHYRX_RSSI_LEGACY_19_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN0_LSB 8 1377 #define PHYRX_RSSI_LEGACY_19_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN0_MASK 0x0000ff00 1378 1379 /* Description PHYRX_RSSI_LEGACY_19_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN0 1380 1381 RSSI of RX PPDU on chain 0 of extension 40, low 20 MHz 1382 bandwidth. 1383 1384 Value of 0x80 indicates invalid. 1385 */ 1386 #define PHYRX_RSSI_LEGACY_19_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN0_OFFSET 0x0000004c 1387 #define PHYRX_RSSI_LEGACY_19_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN0_LSB 16 1388 #define PHYRX_RSSI_LEGACY_19_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN0_MASK 0x00ff0000 1389 1390 /* Description PHYRX_RSSI_LEGACY_19_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN0 1391 1392 RSSI of RX PPDU on chain 0 of extension 40, high 20 MHz 1393 bandwidth. 1394 1395 Value of 0x80 indicates invalid. 1396 */ 1397 #define PHYRX_RSSI_LEGACY_19_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN0_OFFSET 0x0000004c 1398 #define PHYRX_RSSI_LEGACY_19_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN0_LSB 24 1399 #define PHYRX_RSSI_LEGACY_19_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN0_MASK 0xff000000 1400 1401 /* Description PHYRX_RSSI_LEGACY_20_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN0 1402 1403 RSSI of RX PPDU on chain 0 of extension 80, low 20 MHz 1404 bandwidth. 1405 1406 Value of 0x80 indicates invalid. 1407 */ 1408 #define PHYRX_RSSI_LEGACY_20_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN0_OFFSET 0x00000050 1409 #define PHYRX_RSSI_LEGACY_20_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN0_LSB 0 1410 #define PHYRX_RSSI_LEGACY_20_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN0_MASK 0x000000ff 1411 1412 /* Description PHYRX_RSSI_LEGACY_20_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN0 1413 1414 RSSI of RX PPDU on chain 0 of extension 80, low-high 20 1415 MHz bandwidth. 1416 1417 Value of 0x80 indicates invalid. 1418 */ 1419 #define PHYRX_RSSI_LEGACY_20_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN0_OFFSET 0x00000050 1420 #define PHYRX_RSSI_LEGACY_20_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN0_LSB 8 1421 #define PHYRX_RSSI_LEGACY_20_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN0_MASK 0x0000ff00 1422 1423 /* Description PHYRX_RSSI_LEGACY_20_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN0 1424 1425 RSSI of RX PPDU on chain 0 of extension 80, high-low 20 1426 MHz bandwidth. 1427 1428 Value of 0x80 indicates invalid. 1429 */ 1430 #define PHYRX_RSSI_LEGACY_20_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN0_OFFSET 0x00000050 1431 #define PHYRX_RSSI_LEGACY_20_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN0_LSB 16 1432 #define PHYRX_RSSI_LEGACY_20_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN0_MASK 0x00ff0000 1433 1434 /* Description PHYRX_RSSI_LEGACY_20_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN0 1435 1436 RSSI of RX PPDU on chain 0 of extension 80, high 20 MHz 1437 bandwidth. 1438 1439 Value of 0x80 indicates invalid. 1440 */ 1441 #define PHYRX_RSSI_LEGACY_20_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN0_OFFSET 0x00000050 1442 #define PHYRX_RSSI_LEGACY_20_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN0_LSB 24 1443 #define PHYRX_RSSI_LEGACY_20_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN0_MASK 0xff000000 1444 1445 /* Description PHYRX_RSSI_LEGACY_21_PREAMBLE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN1 1446 1447 RSSI of RX PPDU on chain 1 of primary 20 MHz bandwidth. 1448 1449 Value of 0x80 indicates invalid. 1450 */ 1451 #define PHYRX_RSSI_LEGACY_21_PREAMBLE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN1_OFFSET 0x00000054 1452 #define PHYRX_RSSI_LEGACY_21_PREAMBLE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN1_LSB 0 1453 #define PHYRX_RSSI_LEGACY_21_PREAMBLE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN1_MASK 0x000000ff 1454 1455 /* Description PHYRX_RSSI_LEGACY_21_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN1 1456 1457 RSSI of RX PPDU on chain 1 of extension 20 MHz 1458 bandwidth. 1459 1460 Value of 0x80 indicates invalid. 1461 */ 1462 #define PHYRX_RSSI_LEGACY_21_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN1_OFFSET 0x00000054 1463 #define PHYRX_RSSI_LEGACY_21_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN1_LSB 8 1464 #define PHYRX_RSSI_LEGACY_21_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN1_MASK 0x0000ff00 1465 1466 /* Description PHYRX_RSSI_LEGACY_21_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN1 1467 1468 RSSI of RX PPDU on chain 1 of extension 40, low 20 MHz 1469 bandwidth. 1470 1471 Value of 0x80 indicates invalid. 1472 */ 1473 #define PHYRX_RSSI_LEGACY_21_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN1_OFFSET 0x00000054 1474 #define PHYRX_RSSI_LEGACY_21_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN1_LSB 16 1475 #define PHYRX_RSSI_LEGACY_21_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN1_MASK 0x00ff0000 1476 1477 /* Description PHYRX_RSSI_LEGACY_21_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN1 1478 1479 RSSI of RX PPDU on chain 1 of extension 40, high 20 MHz 1480 bandwidth. 1481 1482 Value of 0x80 indicates invalid. 1483 */ 1484 #define PHYRX_RSSI_LEGACY_21_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN1_OFFSET 0x00000054 1485 #define PHYRX_RSSI_LEGACY_21_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN1_LSB 24 1486 #define PHYRX_RSSI_LEGACY_21_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN1_MASK 0xff000000 1487 1488 /* Description PHYRX_RSSI_LEGACY_22_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN1 1489 1490 RSSI of RX PPDU on chain 1 of extension 80, low 20 MHz 1491 bandwidth. 1492 1493 Value of 0x80 indicates invalid. 1494 */ 1495 #define PHYRX_RSSI_LEGACY_22_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN1_OFFSET 0x00000058 1496 #define PHYRX_RSSI_LEGACY_22_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN1_LSB 0 1497 #define PHYRX_RSSI_LEGACY_22_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN1_MASK 0x000000ff 1498 1499 /* Description PHYRX_RSSI_LEGACY_22_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN1 1500 1501 RSSI of RX PPDU on chain 1 of extension 80, low-high 20 1502 MHz bandwidth. 1503 1504 Value of 0x80 indicates invalid. 1505 */ 1506 #define PHYRX_RSSI_LEGACY_22_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN1_OFFSET 0x00000058 1507 #define PHYRX_RSSI_LEGACY_22_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN1_LSB 8 1508 #define PHYRX_RSSI_LEGACY_22_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN1_MASK 0x0000ff00 1509 1510 /* Description PHYRX_RSSI_LEGACY_22_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN1 1511 1512 RSSI of RX PPDU on chain 1 of extension 80, high-low 20 1513 MHz bandwidth. 1514 1515 Value of 0x80 indicates invalid. 1516 */ 1517 #define PHYRX_RSSI_LEGACY_22_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN1_OFFSET 0x00000058 1518 #define PHYRX_RSSI_LEGACY_22_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN1_LSB 16 1519 #define PHYRX_RSSI_LEGACY_22_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN1_MASK 0x00ff0000 1520 1521 /* Description PHYRX_RSSI_LEGACY_22_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN1 1522 1523 RSSI of RX PPDU on chain 1 of extension 80, high 20 MHz 1524 bandwidth. 1525 1526 Value of 0x80 indicates invalid. 1527 */ 1528 #define PHYRX_RSSI_LEGACY_22_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN1_OFFSET 0x00000058 1529 #define PHYRX_RSSI_LEGACY_22_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN1_LSB 24 1530 #define PHYRX_RSSI_LEGACY_22_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN1_MASK 0xff000000 1531 1532 /* Description PHYRX_RSSI_LEGACY_23_PREAMBLE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN2 1533 1534 RSSI of RX PPDU on chain 2 of primary 20 MHz bandwidth. 1535 1536 Value of 0x80 indicates invalid. 1537 */ 1538 #define PHYRX_RSSI_LEGACY_23_PREAMBLE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN2_OFFSET 0x0000005c 1539 #define PHYRX_RSSI_LEGACY_23_PREAMBLE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN2_LSB 0 1540 #define PHYRX_RSSI_LEGACY_23_PREAMBLE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN2_MASK 0x000000ff 1541 1542 /* Description PHYRX_RSSI_LEGACY_23_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN2 1543 1544 RSSI of RX PPDU on chain 2 of extension 20 MHz 1545 bandwidth. 1546 1547 Value of 0x80 indicates invalid. 1548 */ 1549 #define PHYRX_RSSI_LEGACY_23_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN2_OFFSET 0x0000005c 1550 #define PHYRX_RSSI_LEGACY_23_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN2_LSB 8 1551 #define PHYRX_RSSI_LEGACY_23_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN2_MASK 0x0000ff00 1552 1553 /* Description PHYRX_RSSI_LEGACY_23_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN2 1554 1555 RSSI of RX PPDU on chain 2 of extension 40, low 20 MHz 1556 bandwidth. 1557 1558 Value of 0x80 indicates invalid. 1559 */ 1560 #define PHYRX_RSSI_LEGACY_23_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN2_OFFSET 0x0000005c 1561 #define PHYRX_RSSI_LEGACY_23_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN2_LSB 16 1562 #define PHYRX_RSSI_LEGACY_23_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN2_MASK 0x00ff0000 1563 1564 /* Description PHYRX_RSSI_LEGACY_23_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN2 1565 1566 RSSI of RX PPDU on chain 2 of extension 40, high 20 MHz 1567 bandwidth. 1568 1569 Value of 0x80 indicates invalid. 1570 */ 1571 #define PHYRX_RSSI_LEGACY_23_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN2_OFFSET 0x0000005c 1572 #define PHYRX_RSSI_LEGACY_23_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN2_LSB 24 1573 #define PHYRX_RSSI_LEGACY_23_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN2_MASK 0xff000000 1574 1575 /* Description PHYRX_RSSI_LEGACY_24_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN2 1576 1577 RSSI of RX PPDU on chain 2 of extension 80, low 20 MHz 1578 bandwidth. 1579 1580 Value of 0x80 indicates invalid. 1581 */ 1582 #define PHYRX_RSSI_LEGACY_24_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN2_OFFSET 0x00000060 1583 #define PHYRX_RSSI_LEGACY_24_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN2_LSB 0 1584 #define PHYRX_RSSI_LEGACY_24_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN2_MASK 0x000000ff 1585 1586 /* Description PHYRX_RSSI_LEGACY_24_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN2 1587 1588 RSSI of RX PPDU on chain 2 of extension 80, low-high 20 1589 MHz bandwidth. 1590 1591 Value of 0x80 indicates invalid. 1592 */ 1593 #define PHYRX_RSSI_LEGACY_24_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN2_OFFSET 0x00000060 1594 #define PHYRX_RSSI_LEGACY_24_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN2_LSB 8 1595 #define PHYRX_RSSI_LEGACY_24_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN2_MASK 0x0000ff00 1596 1597 /* Description PHYRX_RSSI_LEGACY_24_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN2 1598 1599 RSSI of RX PPDU on chain 2 of extension 80, high-low 20 1600 MHz bandwidth. 1601 1602 Value of 0x80 indicates invalid. 1603 */ 1604 #define PHYRX_RSSI_LEGACY_24_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN2_OFFSET 0x00000060 1605 #define PHYRX_RSSI_LEGACY_24_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN2_LSB 16 1606 #define PHYRX_RSSI_LEGACY_24_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN2_MASK 0x00ff0000 1607 1608 /* Description PHYRX_RSSI_LEGACY_24_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN2 1609 1610 RSSI of RX PPDU on chain 2 of extension 80, high 20 MHz 1611 bandwidth. 1612 1613 Value of 0x80 indicates invalid. 1614 */ 1615 #define PHYRX_RSSI_LEGACY_24_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN2_OFFSET 0x00000060 1616 #define PHYRX_RSSI_LEGACY_24_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN2_LSB 24 1617 #define PHYRX_RSSI_LEGACY_24_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN2_MASK 0xff000000 1618 1619 /* Description PHYRX_RSSI_LEGACY_25_PREAMBLE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN3 1620 1621 RSSI of RX PPDU on chain 3 of primary 20 MHz bandwidth. 1622 1623 Value of 0x80 indicates invalid. 1624 */ 1625 #define PHYRX_RSSI_LEGACY_25_PREAMBLE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN3_OFFSET 0x00000064 1626 #define PHYRX_RSSI_LEGACY_25_PREAMBLE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN3_LSB 0 1627 #define PHYRX_RSSI_LEGACY_25_PREAMBLE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN3_MASK 0x000000ff 1628 1629 /* Description PHYRX_RSSI_LEGACY_25_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN3 1630 1631 RSSI of RX PPDU on chain 3 of extension 20 MHz 1632 bandwidth. 1633 1634 Value of 0x80 indicates invalid. 1635 */ 1636 #define PHYRX_RSSI_LEGACY_25_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN3_OFFSET 0x00000064 1637 #define PHYRX_RSSI_LEGACY_25_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN3_LSB 8 1638 #define PHYRX_RSSI_LEGACY_25_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN3_MASK 0x0000ff00 1639 1640 /* Description PHYRX_RSSI_LEGACY_25_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN3 1641 1642 RSSI of RX PPDU on chain 3 of extension 40, low 20 MHz 1643 bandwidth. 1644 1645 Value of 0x80 indicates invalid. 1646 */ 1647 #define PHYRX_RSSI_LEGACY_25_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN3_OFFSET 0x00000064 1648 #define PHYRX_RSSI_LEGACY_25_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN3_LSB 16 1649 #define PHYRX_RSSI_LEGACY_25_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN3_MASK 0x00ff0000 1650 1651 /* Description PHYRX_RSSI_LEGACY_25_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN3 1652 1653 RSSI of RX PPDU on chain 3 of extension 40, high 20 MHz 1654 bandwidth. 1655 1656 Value of 0x80 indicates invalid. 1657 */ 1658 #define PHYRX_RSSI_LEGACY_25_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN3_OFFSET 0x00000064 1659 #define PHYRX_RSSI_LEGACY_25_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN3_LSB 24 1660 #define PHYRX_RSSI_LEGACY_25_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN3_MASK 0xff000000 1661 1662 /* Description PHYRX_RSSI_LEGACY_26_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN3 1663 1664 RSSI of RX PPDU on chain 3 of extension 80, low 20 MHz 1665 bandwidth. 1666 1667 Value of 0x80 indicates invalid. 1668 */ 1669 #define PHYRX_RSSI_LEGACY_26_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN3_OFFSET 0x00000068 1670 #define PHYRX_RSSI_LEGACY_26_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN3_LSB 0 1671 #define PHYRX_RSSI_LEGACY_26_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN3_MASK 0x000000ff 1672 1673 /* Description PHYRX_RSSI_LEGACY_26_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN3 1674 1675 RSSI of RX PPDU on chain 3 of extension 80, low-high 20 1676 MHz bandwidth. 1677 1678 Value of 0x80 indicates invalid. 1679 */ 1680 #define PHYRX_RSSI_LEGACY_26_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN3_OFFSET 0x00000068 1681 #define PHYRX_RSSI_LEGACY_26_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN3_LSB 8 1682 #define PHYRX_RSSI_LEGACY_26_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN3_MASK 0x0000ff00 1683 1684 /* Description PHYRX_RSSI_LEGACY_26_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN3 1685 1686 RSSI of RX PPDU on chain 3 of extension 80, high-low 20 1687 MHz bandwidth. 1688 1689 Value of 0x80 indicates invalid. 1690 */ 1691 #define PHYRX_RSSI_LEGACY_26_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN3_OFFSET 0x00000068 1692 #define PHYRX_RSSI_LEGACY_26_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN3_LSB 16 1693 #define PHYRX_RSSI_LEGACY_26_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN3_MASK 0x00ff0000 1694 1695 /* Description PHYRX_RSSI_LEGACY_26_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN3 1696 1697 RSSI of RX PPDU on chain 3 of extension 80, high 20 MHz 1698 bandwidth. 1699 1700 Value of 0x80 indicates invalid. 1701 */ 1702 #define PHYRX_RSSI_LEGACY_26_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN3_OFFSET 0x00000068 1703 #define PHYRX_RSSI_LEGACY_26_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN3_LSB 24 1704 #define PHYRX_RSSI_LEGACY_26_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN3_MASK 0xff000000 1705 1706 /* Description PHYRX_RSSI_LEGACY_27_PREAMBLE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN4 1707 1708 RSSI of RX PPDU on chain 4 of primary 20 MHz bandwidth. 1709 1710 Value of 0x80 indicates invalid. 1711 */ 1712 #define PHYRX_RSSI_LEGACY_27_PREAMBLE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN4_OFFSET 0x0000006c 1713 #define PHYRX_RSSI_LEGACY_27_PREAMBLE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN4_LSB 0 1714 #define PHYRX_RSSI_LEGACY_27_PREAMBLE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN4_MASK 0x000000ff 1715 1716 /* Description PHYRX_RSSI_LEGACY_27_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN4 1717 1718 RSSI of RX PPDU on chain 4 of extension 20 MHz 1719 bandwidth. 1720 1721 Value of 0x80 indicates invalid. 1722 */ 1723 #define PHYRX_RSSI_LEGACY_27_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN4_OFFSET 0x0000006c 1724 #define PHYRX_RSSI_LEGACY_27_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN4_LSB 8 1725 #define PHYRX_RSSI_LEGACY_27_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN4_MASK 0x0000ff00 1726 1727 /* Description PHYRX_RSSI_LEGACY_27_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN4 1728 1729 RSSI of RX PPDU on chain 4 of extension 40, low 20 MHz 1730 bandwidth. 1731 1732 Value of 0x80 indicates invalid. 1733 */ 1734 #define PHYRX_RSSI_LEGACY_27_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN4_OFFSET 0x0000006c 1735 #define PHYRX_RSSI_LEGACY_27_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN4_LSB 16 1736 #define PHYRX_RSSI_LEGACY_27_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN4_MASK 0x00ff0000 1737 1738 /* Description PHYRX_RSSI_LEGACY_27_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN4 1739 1740 RSSI of RX PPDU on chain 4 of extension 40, high 20 MHz 1741 bandwidth. 1742 1743 Value of 0x80 indicates invalid. 1744 */ 1745 #define PHYRX_RSSI_LEGACY_27_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN4_OFFSET 0x0000006c 1746 #define PHYRX_RSSI_LEGACY_27_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN4_LSB 24 1747 #define PHYRX_RSSI_LEGACY_27_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN4_MASK 0xff000000 1748 1749 /* Description PHYRX_RSSI_LEGACY_28_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN4 1750 1751 RSSI of RX PPDU on chain 4 of extension 80, low 20 MHz 1752 bandwidth. 1753 1754 Value of 0x80 indicates invalid. 1755 */ 1756 #define PHYRX_RSSI_LEGACY_28_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN4_OFFSET 0x00000070 1757 #define PHYRX_RSSI_LEGACY_28_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN4_LSB 0 1758 #define PHYRX_RSSI_LEGACY_28_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN4_MASK 0x000000ff 1759 1760 /* Description PHYRX_RSSI_LEGACY_28_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN4 1761 1762 RSSI of RX PPDU on chain 4 of extension 80, low-high 20 1763 MHz bandwidth. 1764 1765 Value of 0x80 indicates invalid. 1766 */ 1767 #define PHYRX_RSSI_LEGACY_28_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN4_OFFSET 0x00000070 1768 #define PHYRX_RSSI_LEGACY_28_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN4_LSB 8 1769 #define PHYRX_RSSI_LEGACY_28_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN4_MASK 0x0000ff00 1770 1771 /* Description PHYRX_RSSI_LEGACY_28_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN4 1772 1773 RSSI of RX PPDU on chain 4 of extension 80, high-low 20 1774 MHz bandwidth. 1775 1776 Value of 0x80 indicates invalid. 1777 */ 1778 #define PHYRX_RSSI_LEGACY_28_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN4_OFFSET 0x00000070 1779 #define PHYRX_RSSI_LEGACY_28_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN4_LSB 16 1780 #define PHYRX_RSSI_LEGACY_28_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN4_MASK 0x00ff0000 1781 1782 /* Description PHYRX_RSSI_LEGACY_28_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN4 1783 1784 RSSI of RX PPDU on chain 4 of extension 80, high 20 MHz 1785 bandwidth. 1786 1787 Value of 0x80 indicates invalid. 1788 */ 1789 #define PHYRX_RSSI_LEGACY_28_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN4_OFFSET 0x00000070 1790 #define PHYRX_RSSI_LEGACY_28_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN4_LSB 24 1791 #define PHYRX_RSSI_LEGACY_28_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN4_MASK 0xff000000 1792 1793 /* Description PHYRX_RSSI_LEGACY_29_PREAMBLE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN5 1794 1795 RSSI of RX PPDU on chain 0 of primary 20 MHz bandwidth. 1796 1797 Value of 0x80 indicates invalid. 1798 */ 1799 #define PHYRX_RSSI_LEGACY_29_PREAMBLE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN5_OFFSET 0x00000074 1800 #define PHYRX_RSSI_LEGACY_29_PREAMBLE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN5_LSB 0 1801 #define PHYRX_RSSI_LEGACY_29_PREAMBLE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN5_MASK 0x000000ff 1802 1803 /* Description PHYRX_RSSI_LEGACY_29_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN5 1804 1805 RSSI of RX PPDU on chain 5 of extension 20 MHz 1806 bandwidth. 1807 1808 Value of 0x80 indicates invalid. 1809 */ 1810 #define PHYRX_RSSI_LEGACY_29_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN5_OFFSET 0x00000074 1811 #define PHYRX_RSSI_LEGACY_29_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN5_LSB 8 1812 #define PHYRX_RSSI_LEGACY_29_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN5_MASK 0x0000ff00 1813 1814 /* Description PHYRX_RSSI_LEGACY_29_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN5 1815 1816 RSSI of RX PPDU on chain 5 of extension 40, low 20 MHz 1817 bandwidth. 1818 1819 Value of 0x80 indicates invalid. 1820 */ 1821 #define PHYRX_RSSI_LEGACY_29_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN5_OFFSET 0x00000074 1822 #define PHYRX_RSSI_LEGACY_29_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN5_LSB 16 1823 #define PHYRX_RSSI_LEGACY_29_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN5_MASK 0x00ff0000 1824 1825 /* Description PHYRX_RSSI_LEGACY_29_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN5 1826 1827 RSSI of RX PPDU on chain 5 of extension 40, high 20 MHz 1828 bandwidth. 1829 1830 Value of 0x80 indicates invalid. 1831 */ 1832 #define PHYRX_RSSI_LEGACY_29_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN5_OFFSET 0x00000074 1833 #define PHYRX_RSSI_LEGACY_29_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN5_LSB 24 1834 #define PHYRX_RSSI_LEGACY_29_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN5_MASK 0xff000000 1835 1836 /* Description PHYRX_RSSI_LEGACY_30_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN5 1837 1838 RSSI of RX PPDU on chain 5 of extension 80, low 20 MHz 1839 bandwidth. 1840 1841 Value of 0x80 indicates invalid. 1842 */ 1843 #define PHYRX_RSSI_LEGACY_30_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN5_OFFSET 0x00000078 1844 #define PHYRX_RSSI_LEGACY_30_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN5_LSB 0 1845 #define PHYRX_RSSI_LEGACY_30_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN5_MASK 0x000000ff 1846 1847 /* Description PHYRX_RSSI_LEGACY_30_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN5 1848 1849 RSSI of RX PPDU on chain 5 of extension 80, low-high 20 1850 MHz bandwidth. 1851 1852 Value of 0x80 indicates invalid. 1853 */ 1854 #define PHYRX_RSSI_LEGACY_30_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN5_OFFSET 0x00000078 1855 #define PHYRX_RSSI_LEGACY_30_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN5_LSB 8 1856 #define PHYRX_RSSI_LEGACY_30_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN5_MASK 0x0000ff00 1857 1858 /* Description PHYRX_RSSI_LEGACY_30_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN5 1859 1860 RSSI of RX PPDU on chain 5 of extension 80, high-low 20 1861 MHz bandwidth. 1862 1863 Value of 0x80 indicates invalid. 1864 */ 1865 #define PHYRX_RSSI_LEGACY_30_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN5_OFFSET 0x00000078 1866 #define PHYRX_RSSI_LEGACY_30_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN5_LSB 16 1867 #define PHYRX_RSSI_LEGACY_30_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN5_MASK 0x00ff0000 1868 1869 /* Description PHYRX_RSSI_LEGACY_30_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN5 1870 1871 RSSI of RX PPDU on chain 5 of extension 80, high 20 MHz 1872 bandwidth. 1873 1874 Value of 0x80 indicates invalid. 1875 */ 1876 #define PHYRX_RSSI_LEGACY_30_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN5_OFFSET 0x00000078 1877 #define PHYRX_RSSI_LEGACY_30_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN5_LSB 24 1878 #define PHYRX_RSSI_LEGACY_30_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN5_MASK 0xff000000 1879 1880 /* Description PHYRX_RSSI_LEGACY_31_PREAMBLE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN6 1881 1882 RSSI of RX PPDU on chain 6 of primary 20 MHz bandwidth. 1883 1884 Value of 0x80 indicates invalid. 1885 */ 1886 #define PHYRX_RSSI_LEGACY_31_PREAMBLE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN6_OFFSET 0x0000007c 1887 #define PHYRX_RSSI_LEGACY_31_PREAMBLE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN6_LSB 0 1888 #define PHYRX_RSSI_LEGACY_31_PREAMBLE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN6_MASK 0x000000ff 1889 1890 /* Description PHYRX_RSSI_LEGACY_31_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN6 1891 1892 RSSI of RX PPDU on chain 6 of extension 20 MHz 1893 bandwidth. 1894 1895 Value of 0x80 indicates invalid. 1896 */ 1897 #define PHYRX_RSSI_LEGACY_31_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN6_OFFSET 0x0000007c 1898 #define PHYRX_RSSI_LEGACY_31_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN6_LSB 8 1899 #define PHYRX_RSSI_LEGACY_31_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN6_MASK 0x0000ff00 1900 1901 /* Description PHYRX_RSSI_LEGACY_31_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN6 1902 1903 RSSI of RX PPDU on chain 6 of extension 40, low 20 MHz 1904 bandwidth. 1905 1906 Value of 0x80 indicates invalid. 1907 */ 1908 #define PHYRX_RSSI_LEGACY_31_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN6_OFFSET 0x0000007c 1909 #define PHYRX_RSSI_LEGACY_31_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN6_LSB 16 1910 #define PHYRX_RSSI_LEGACY_31_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN6_MASK 0x00ff0000 1911 1912 /* Description PHYRX_RSSI_LEGACY_31_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN6 1913 1914 RSSI of RX PPDU on chain 6 of extension 40, high 20 MHz 1915 bandwidth. 1916 1917 Value of 0x80 indicates invalid. 1918 */ 1919 #define PHYRX_RSSI_LEGACY_31_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN6_OFFSET 0x0000007c 1920 #define PHYRX_RSSI_LEGACY_31_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN6_LSB 24 1921 #define PHYRX_RSSI_LEGACY_31_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN6_MASK 0xff000000 1922 1923 /* Description PHYRX_RSSI_LEGACY_32_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN6 1924 1925 RSSI of RX PPDU on chain 6 of extension 80, low 20 MHz 1926 bandwidth. 1927 1928 Value of 0x80 indicates invalid. 1929 */ 1930 #define PHYRX_RSSI_LEGACY_32_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN6_OFFSET 0x00000080 1931 #define PHYRX_RSSI_LEGACY_32_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN6_LSB 0 1932 #define PHYRX_RSSI_LEGACY_32_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN6_MASK 0x000000ff 1933 1934 /* Description PHYRX_RSSI_LEGACY_32_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN6 1935 1936 RSSI of RX PPDU on chain 6 of extension 80, low-high 20 1937 MHz bandwidth. 1938 1939 Value of 0x80 indicates invalid. 1940 */ 1941 #define PHYRX_RSSI_LEGACY_32_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN6_OFFSET 0x00000080 1942 #define PHYRX_RSSI_LEGACY_32_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN6_LSB 8 1943 #define PHYRX_RSSI_LEGACY_32_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN6_MASK 0x0000ff00 1944 1945 /* Description PHYRX_RSSI_LEGACY_32_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN6 1946 1947 RSSI of RX PPDU on chain 6 of extension 80, high-low 20 1948 MHz bandwidth. 1949 1950 Value of 0x80 indicates invalid. 1951 */ 1952 #define PHYRX_RSSI_LEGACY_32_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN6_OFFSET 0x00000080 1953 #define PHYRX_RSSI_LEGACY_32_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN6_LSB 16 1954 #define PHYRX_RSSI_LEGACY_32_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN6_MASK 0x00ff0000 1955 1956 /* Description PHYRX_RSSI_LEGACY_32_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN6 1957 1958 RSSI of RX PPDU on chain 6 of extension 80, high 20 MHz 1959 bandwidth. 1960 1961 Value of 0x80 indicates invalid. 1962 */ 1963 #define PHYRX_RSSI_LEGACY_32_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN6_OFFSET 0x00000080 1964 #define PHYRX_RSSI_LEGACY_32_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN6_LSB 24 1965 #define PHYRX_RSSI_LEGACY_32_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN6_MASK 0xff000000 1966 1967 /* Description PHYRX_RSSI_LEGACY_33_PREAMBLE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN7 1968 1969 RSSI of RX PPDU on chain 7 of primary 20 MHz bandwidth. 1970 1971 Value of 0x80 indicates invalid. 1972 */ 1973 #define PHYRX_RSSI_LEGACY_33_PREAMBLE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN7_OFFSET 0x00000084 1974 #define PHYRX_RSSI_LEGACY_33_PREAMBLE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN7_LSB 0 1975 #define PHYRX_RSSI_LEGACY_33_PREAMBLE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN7_MASK 0x000000ff 1976 1977 /* Description PHYRX_RSSI_LEGACY_33_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN7 1978 1979 RSSI of RX PPDU on chain 7 of extension 20 MHz 1980 bandwidth. 1981 1982 Value of 0x80 indicates invalid. 1983 */ 1984 #define PHYRX_RSSI_LEGACY_33_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN7_OFFSET 0x00000084 1985 #define PHYRX_RSSI_LEGACY_33_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN7_LSB 8 1986 #define PHYRX_RSSI_LEGACY_33_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN7_MASK 0x0000ff00 1987 1988 /* Description PHYRX_RSSI_LEGACY_33_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN7 1989 1990 RSSI of RX PPDU on chain 7 of extension 40, low 20 MHz 1991 bandwidth. 1992 1993 Value of 0x80 indicates invalid. 1994 */ 1995 #define PHYRX_RSSI_LEGACY_33_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN7_OFFSET 0x00000084 1996 #define PHYRX_RSSI_LEGACY_33_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN7_LSB 16 1997 #define PHYRX_RSSI_LEGACY_33_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN7_MASK 0x00ff0000 1998 1999 /* Description PHYRX_RSSI_LEGACY_33_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN7 2000 2001 RSSI of RX PPDU on chain 7 of extension 40, high 20 MHz 2002 bandwidth. 2003 2004 Value of 0x80 indicates invalid. 2005 */ 2006 #define PHYRX_RSSI_LEGACY_33_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN7_OFFSET 0x00000084 2007 #define PHYRX_RSSI_LEGACY_33_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN7_LSB 24 2008 #define PHYRX_RSSI_LEGACY_33_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN7_MASK 0xff000000 2009 2010 /* Description PHYRX_RSSI_LEGACY_34_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN7 2011 2012 RSSI of RX PPDU on chain 7 of extension 80, low 20 MHz 2013 bandwidth. 2014 2015 Value of 0x80 indicates invalid. 2016 */ 2017 #define PHYRX_RSSI_LEGACY_34_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN7_OFFSET 0x00000088 2018 #define PHYRX_RSSI_LEGACY_34_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN7_LSB 0 2019 #define PHYRX_RSSI_LEGACY_34_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN7_MASK 0x000000ff 2020 2021 /* Description PHYRX_RSSI_LEGACY_34_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN7 2022 2023 RSSI of RX PPDU on chain 7 of extension 80, low-high 20 2024 MHz bandwidth. 2025 2026 Value of 0x80 indicates invalid. 2027 */ 2028 #define PHYRX_RSSI_LEGACY_34_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN7_OFFSET 0x00000088 2029 #define PHYRX_RSSI_LEGACY_34_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN7_LSB 8 2030 #define PHYRX_RSSI_LEGACY_34_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN7_MASK 0x0000ff00 2031 2032 /* Description PHYRX_RSSI_LEGACY_34_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN7 2033 2034 RSSI of RX PPDU on chain 7 of extension 80, high-low 20 2035 MHz bandwidth. 2036 2037 Value of 0x80 indicates invalid. 2038 */ 2039 #define PHYRX_RSSI_LEGACY_34_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN7_OFFSET 0x00000088 2040 #define PHYRX_RSSI_LEGACY_34_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN7_LSB 16 2041 #define PHYRX_RSSI_LEGACY_34_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN7_MASK 0x00ff0000 2042 2043 /* Description PHYRX_RSSI_LEGACY_34_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN7 2044 2045 RSSI of RX PPDU on chain 7 of extension 80, high 20 MHz 2046 bandwidth. 2047 2048 Value of 0x80 indicates invalid. 2049 */ 2050 #define PHYRX_RSSI_LEGACY_34_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN7_OFFSET 0x00000088 2051 #define PHYRX_RSSI_LEGACY_34_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN7_LSB 24 2052 #define PHYRX_RSSI_LEGACY_34_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN7_MASK 0xff000000 2053 2054 /* Description PHYRX_RSSI_LEGACY_35_PRE_RSSI_COMB 2055 2056 Combined pre_rssi of all chains. Based on primary 2057 channel RSSI. 2058 2059 2060 2061 RSSI is reported as 8b signed values. Nominally value is 2062 in dB units above or below the noisefloor(minCCApwr). 2063 2064 2065 2066 The resolution can be: 2067 2068 1dB or 0.5dB. This is statically configured within the 2069 PHY and MAC 2070 2071 2072 2073 In case of 1dB, the Range is: 2074 2075 -128dB to 127dB 2076 2077 2078 2079 In case of 0.5dB, the Range is: 2080 2081 -64dB to 63.5dB 2082 2083 2084 2085 <legal all> 2086 */ 2087 #define PHYRX_RSSI_LEGACY_35_PRE_RSSI_COMB_OFFSET 0x0000008c 2088 #define PHYRX_RSSI_LEGACY_35_PRE_RSSI_COMB_LSB 0 2089 #define PHYRX_RSSI_LEGACY_35_PRE_RSSI_COMB_MASK 0x000000ff 2090 2091 /* Description PHYRX_RSSI_LEGACY_35_RSSI_COMB 2092 2093 Combined rssi of all chains. Based on primary channel 2094 RSSI. 2095 2096 2097 2098 RSSI is reported as 8b signed values. Nominally value is 2099 in dB units above or below the noisefloor(minCCApwr). 2100 2101 2102 2103 The resolution can be: 2104 2105 1dB or 0.5dB. This is statically configured within the 2106 PHY and MAC 2107 2108 2109 2110 In case of 1dB, the Range is: 2111 2112 -128dB to 127dB 2113 2114 2115 2116 In case of 0.5dB, the Range is: 2117 2118 -64dB to 63.5dB 2119 2120 2121 2122 <legal all> 2123 */ 2124 #define PHYRX_RSSI_LEGACY_35_RSSI_COMB_OFFSET 0x0000008c 2125 #define PHYRX_RSSI_LEGACY_35_RSSI_COMB_LSB 8 2126 #define PHYRX_RSSI_LEGACY_35_RSSI_COMB_MASK 0x0000ff00 2127 2128 /* Description PHYRX_RSSI_LEGACY_35_NORMALIZED_PRE_RSSI_COMB 2129 2130 Combined pre_rssi of all chains, but normalized back to 2131 a single chain. This avoids PDG from having to evaluate this 2132 in combination with receive chain mask and perform all kinds 2133 of pre-processing algorithms. 2134 2135 2136 2137 Based on primary channel RSSI. 2138 2139 2140 2141 RSSI is reported as 8b signed values. Nominally value is 2142 in dB units above or below the noisefloor(minCCApwr). 2143 2144 2145 2146 The resolution can be: 2147 2148 1dB or 0.5dB. This is statically configured within the 2149 PHY and MAC 2150 2151 2152 2153 In case of 1dB, the Range is: 2154 2155 -128dB to 127dB 2156 2157 2158 2159 In case of 0.5dB, the Range is: 2160 2161 -64dB to 63.5dB 2162 2163 2164 2165 <legal all> 2166 */ 2167 #define PHYRX_RSSI_LEGACY_35_NORMALIZED_PRE_RSSI_COMB_OFFSET 0x0000008c 2168 #define PHYRX_RSSI_LEGACY_35_NORMALIZED_PRE_RSSI_COMB_LSB 16 2169 #define PHYRX_RSSI_LEGACY_35_NORMALIZED_PRE_RSSI_COMB_MASK 0x00ff0000 2170 2171 /* Description PHYRX_RSSI_LEGACY_35_NORMALIZED_RSSI_COMB 2172 2173 Combined rssi of all chains, but normalized back to a 2174 single chain. This avoids PDG from having to evaluate this 2175 in combination with receive chain mask and perform all kinds 2176 of pre-processing algorithms. 2177 2178 2179 2180 Based on primary channel RSSI. 2181 2182 2183 2184 RSSI is reported as 8b signed values. Nominally value is 2185 in dB units above or below the noisefloor(minCCApwr). 2186 2187 2188 2189 The resolution can be: 2190 2191 1dB or 0.5dB. This is statically configured within the 2192 PHY and MAC 2193 2194 In case of 1dB, the Range is: 2195 2196 -128dB to 127dB 2197 2198 2199 2200 In case of 0.5dB, the Range is: 2201 2202 -64dB to 63.5dB 2203 2204 2205 2206 <legal all> 2207 */ 2208 #define PHYRX_RSSI_LEGACY_35_NORMALIZED_RSSI_COMB_OFFSET 0x0000008c 2209 #define PHYRX_RSSI_LEGACY_35_NORMALIZED_RSSI_COMB_LSB 24 2210 #define PHYRX_RSSI_LEGACY_35_NORMALIZED_RSSI_COMB_MASK 0xff000000 2211 2212 /* Description PHYRX_RSSI_LEGACY_36_RSSI_COMB_PPDU 2213 2214 Combined rssi of all chains, based on active 2215 RUs/subchannels, a.k.a. rssi_pkt_bw_mac 2216 2217 2218 2219 RSSI is reported as 8b signed values. Nominally value is 2220 in dB units above or below the noisefloor(minCCApwr). 2221 2222 2223 2224 The resolution can be: 2225 2226 1dB or 0.5dB. This is statically configured within the 2227 PHY and MAC 2228 2229 2230 2231 In case of 1dB, the Range is: 2232 2233 -128dB to 127dB 2234 2235 2236 2237 In case of 0.5dB, the Range is: 2238 2239 -64dB to 63.5dB 2240 2241 2242 2243 When packet BW is 20 MHz, 2244 2245 rssi_comb_ppdu = rssi_comb. 2246 2247 2248 2249 When packet BW > 20 MHz, 2250 2251 rssi_comb < rssi_comb_ppdu because rssi_comb only 2252 includes power of primary 20 MHz while rssi_comb_ppdu 2253 includes power of active RUs/subchannels. 2254 2255 2256 2257 <legal all> 2258 */ 2259 #define PHYRX_RSSI_LEGACY_36_RSSI_COMB_PPDU_OFFSET 0x00000090 2260 #define PHYRX_RSSI_LEGACY_36_RSSI_COMB_PPDU_LSB 0 2261 #define PHYRX_RSSI_LEGACY_36_RSSI_COMB_PPDU_MASK 0x000000ff 2262 2263 /* Description PHYRX_RSSI_LEGACY_36_RSSI_DB_TO_DBM_OFFSET 2264 2265 Offset between 'dB' and 'dBm' values. SW can use this 2266 value to convert RSSI 'dBm' values back to 'dB,' and report 2267 both the values. 2268 2269 2270 2271 When rssi_db_to_dbm_offset = 0, 2272 2273 all rssi_xxx fields are defined in dB. 2274 2275 2276 2277 When rssi_db_to_dbm_offset is a large negative value, 2278 all rssi_xxx fields are defined in dBm. 2279 2280 2281 2282 <legal all> 2283 */ 2284 #define PHYRX_RSSI_LEGACY_36_RSSI_DB_TO_DBM_OFFSET_OFFSET 0x00000090 2285 #define PHYRX_RSSI_LEGACY_36_RSSI_DB_TO_DBM_OFFSET_LSB 8 2286 #define PHYRX_RSSI_LEGACY_36_RSSI_DB_TO_DBM_OFFSET_MASK 0x0000ff00 2287 2288 /* Description PHYRX_RSSI_LEGACY_36_RSSI_FOR_SPATIAL_REUSE 2289 2290 RSSI to be used by HWSCH for transmit (power) selection 2291 during an SR opportunity, reported as an 8-bit signed value 2292 2293 <legal all> 2294 */ 2295 #define PHYRX_RSSI_LEGACY_36_RSSI_FOR_SPATIAL_REUSE_OFFSET 0x00000090 2296 #define PHYRX_RSSI_LEGACY_36_RSSI_FOR_SPATIAL_REUSE_LSB 16 2297 #define PHYRX_RSSI_LEGACY_36_RSSI_FOR_SPATIAL_REUSE_MASK 0x00ff0000 2298 2299 /* Description PHYRX_RSSI_LEGACY_36_RSSI_FOR_TRIGGER_RESP 2300 2301 RSSI to be used by PDG for transmit (power) selection 2302 during trigger response, reported as an 8-bit signed value 2303 2304 2305 <legal all> 2306 */ 2307 #define PHYRX_RSSI_LEGACY_36_RSSI_FOR_TRIGGER_RESP_OFFSET 0x00000090 2308 #define PHYRX_RSSI_LEGACY_36_RSSI_FOR_TRIGGER_RESP_LSB 24 2309 #define PHYRX_RSSI_LEGACY_36_RSSI_FOR_TRIGGER_RESP_MASK 0xff000000 2310 2311 2312 #endif // _PHYRX_RSSI_LEGACY_H_ 2313