1 /* 2 * Copyright (c) 2019, The Linux Foundation. All rights reserved. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for any 5 * purpose with or without fee is hereby granted, provided that the above 6 * copyright notice and this permission notice appear in all copies. 7 * 8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15 */ 16 17 #ifndef _REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_H_ 18 #define _REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_H_ 19 #if !defined(__ASSEMBLER__) 20 #endif 21 22 #include "uniform_reo_status_header.h" 23 24 // ################ START SUMMARY ################# 25 // 26 // Dword Fields 27 // 0-1 struct uniform_reo_status_header status_header; 28 // 2 threshold_index[1:0], reserved_2[31:2] 29 // 3 link_descriptor_counter0[23:0], reserved_3[31:24] 30 // 4 link_descriptor_counter1[23:0], reserved_4[31:24] 31 // 5 link_descriptor_counter2[23:0], reserved_5[31:24] 32 // 6 link_descriptor_counter_sum[25:0], reserved_6[31:26] 33 // 7 reserved_7[31:0] 34 // 8 reserved_8[31:0] 35 // 9 reserved_9a[31:0] 36 // 10 reserved_10a[31:0] 37 // 11 reserved_11a[31:0] 38 // 12 reserved_12a[31:0] 39 // 13 reserved_13a[31:0] 40 // 14 reserved_14a[31:0] 41 // 15 reserved_15a[31:0] 42 // 16 reserved_16a[31:0] 43 // 17 reserved_17a[31:0] 44 // 18 reserved_18a[31:0] 45 // 19 reserved_19a[31:0] 46 // 20 reserved_20a[31:0] 47 // 21 reserved_21a[31:0] 48 // 22 reserved_22a[31:0] 49 // 23 reserved_23a[31:0] 50 // 24 reserved_24a[27:0], looping_count[31:28] 51 // 52 // ################ END SUMMARY ################# 53 54 #define NUM_OF_DWORDS_REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS 25 55 56 struct reo_descriptor_threshold_reached_status { 57 struct uniform_reo_status_header status_header; 58 uint32_t threshold_index : 2, //[1:0] 59 reserved_2 : 30; //[31:2] 60 uint32_t link_descriptor_counter0 : 24, //[23:0] 61 reserved_3 : 8; //[31:24] 62 uint32_t link_descriptor_counter1 : 24, //[23:0] 63 reserved_4 : 8; //[31:24] 64 uint32_t link_descriptor_counter2 : 24, //[23:0] 65 reserved_5 : 8; //[31:24] 66 uint32_t link_descriptor_counter_sum : 26, //[25:0] 67 reserved_6 : 6; //[31:26] 68 uint32_t reserved_7 : 32; //[31:0] 69 uint32_t reserved_8 : 32; //[31:0] 70 uint32_t reserved_9a : 32; //[31:0] 71 uint32_t reserved_10a : 32; //[31:0] 72 uint32_t reserved_11a : 32; //[31:0] 73 uint32_t reserved_12a : 32; //[31:0] 74 uint32_t reserved_13a : 32; //[31:0] 75 uint32_t reserved_14a : 32; //[31:0] 76 uint32_t reserved_15a : 32; //[31:0] 77 uint32_t reserved_16a : 32; //[31:0] 78 uint32_t reserved_17a : 32; //[31:0] 79 uint32_t reserved_18a : 32; //[31:0] 80 uint32_t reserved_19a : 32; //[31:0] 81 uint32_t reserved_20a : 32; //[31:0] 82 uint32_t reserved_21a : 32; //[31:0] 83 uint32_t reserved_22a : 32; //[31:0] 84 uint32_t reserved_23a : 32; //[31:0] 85 uint32_t reserved_24a : 28, //[27:0] 86 looping_count : 4; //[31:28] 87 }; 88 89 /* 90 91 struct uniform_reo_status_header status_header 92 93 Consumer: SW 94 95 Producer: REO 96 97 98 99 Details that can link this status with the original 100 command. It also contains info on how long REO took to 101 execute this command. 102 103 threshold_index 104 105 The index of the threshold register whose value got 106 reached 107 108 109 110 <enum 0 reo_desc_counter0_threshold> 111 112 <enum 1 reo_desc_counter1_threshold> 113 114 <enum 2 reo_desc_counter2_threshold> 115 116 <enum 3 reo_desc_counter_sum_threshold> 117 118 119 120 <legal all> 121 122 reserved_2 123 124 <legal 0> 125 126 link_descriptor_counter0 127 128 Value of this counter at generation of this message 129 130 <legal all> 131 132 reserved_3 133 134 <legal 0> 135 136 link_descriptor_counter1 137 138 Value of this counter at generation of this message 139 140 <legal all> 141 142 reserved_4 143 144 <legal 0> 145 146 link_descriptor_counter2 147 148 Value of this counter at generation of this message 149 150 <legal all> 151 152 reserved_5 153 154 <legal 0> 155 156 link_descriptor_counter_sum 157 158 Value of this counter at generation of this message 159 160 <legal all> 161 162 reserved_6 163 164 <legal 0> 165 166 reserved_7 167 168 <legal 0> 169 170 reserved_8 171 172 <legal 0> 173 174 reserved_9a 175 176 <legal 0> 177 178 reserved_10a 179 180 <legal 0> 181 182 reserved_11a 183 184 <legal 0> 185 186 reserved_12a 187 188 <legal 0> 189 190 reserved_13a 191 192 <legal 0> 193 194 reserved_14a 195 196 <legal 0> 197 198 reserved_15a 199 200 <legal 0> 201 202 reserved_16a 203 204 <legal 0> 205 206 reserved_17a 207 208 <legal 0> 209 210 reserved_18a 211 212 <legal 0> 213 214 reserved_19a 215 216 <legal 0> 217 218 reserved_20a 219 220 <legal 0> 221 222 reserved_21a 223 224 <legal 0> 225 226 reserved_22a 227 228 <legal 0> 229 230 reserved_23a 231 232 <legal 0> 233 234 reserved_24a 235 236 <legal 0> 237 238 looping_count 239 240 A count value that indicates the number of times the 241 producer of entries into this Ring has looped around the 242 ring. 243 244 At initialization time, this value is set to 0. On the 245 first loop, this value is set to 1. After the max value is 246 reached allowed by the number of bits for this field, the 247 count value continues with 0 again. 248 249 250 251 In case SW is the consumer of the ring entries, it can 252 use this field to figure out up to where the producer of 253 entries has created new entries. This eliminates the need to 254 check where the head pointer' of the ring is located once 255 the SW starts processing an interrupt indicating that new 256 entries have been put into this ring... 257 258 259 260 Also note that SW if it wants only needs to look at the 261 LSB bit of this count value. 262 263 <legal all> 264 */ 265 266 267 /* EXTERNAL REFERENCE : struct uniform_reo_status_header status_header */ 268 269 270 /* Description REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_0_STATUS_HEADER_REO_STATUS_NUMBER 271 272 Consumer: SW , DEBUG 273 274 Producer: REO 275 276 277 278 The value in this field is equal to value of the 279 'REO_CMD_Number' field the REO command 280 281 282 283 This field helps to correlate the statuses with the REO 284 commands. 285 286 287 288 <legal all> 289 */ 290 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_0_STATUS_HEADER_REO_STATUS_NUMBER_OFFSET 0x00000000 291 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_0_STATUS_HEADER_REO_STATUS_NUMBER_LSB 0 292 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_0_STATUS_HEADER_REO_STATUS_NUMBER_MASK 0x0000ffff 293 294 /* Description REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_0_STATUS_HEADER_CMD_EXECUTION_TIME 295 296 Consumer: DEBUG 297 298 Producer: REO 299 300 301 302 The amount of time REO took to excecute the command. 303 Note that this time does not include the duration of the 304 command waiting in the command ring, before the execution 305 started. 306 307 308 309 In us. 310 311 312 313 <legal all> 314 */ 315 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_0_STATUS_HEADER_CMD_EXECUTION_TIME_OFFSET 0x00000000 316 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_0_STATUS_HEADER_CMD_EXECUTION_TIME_LSB 16 317 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_0_STATUS_HEADER_CMD_EXECUTION_TIME_MASK 0x03ff0000 318 319 /* Description REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_0_STATUS_HEADER_REO_CMD_EXECUTION_STATUS 320 321 Consumer: DEBUG 322 323 Producer: REO 324 325 326 327 Execution status of the command. 328 329 330 331 <enum 0 reo_successful_execution> Command has 332 successfully be executed 333 334 <enum 1 reo_blocked_execution> Command could not be 335 executed as the queue or cache was blocked 336 337 <enum 2 reo_failed_execution> Command has encountered 338 problems when executing, like the queue descriptor not being 339 valid. None of the status fields in the entire STATUS TLV 340 are valid. 341 342 <enum 3 reo_resource_blocked> Command is NOT executed 343 because one or more descriptors were blocked. This is SW 344 programming mistake. 345 346 None of the status fields in the entire STATUS TLV are 347 valid. 348 349 350 351 <legal 0-3> 352 */ 353 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_0_STATUS_HEADER_REO_CMD_EXECUTION_STATUS_OFFSET 0x00000000 354 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_0_STATUS_HEADER_REO_CMD_EXECUTION_STATUS_LSB 26 355 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_0_STATUS_HEADER_REO_CMD_EXECUTION_STATUS_MASK 0x0c000000 356 357 /* Description REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_0_STATUS_HEADER_RESERVED_0A 358 359 <legal 0> 360 */ 361 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_0_STATUS_HEADER_RESERVED_0A_OFFSET 0x00000000 362 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_0_STATUS_HEADER_RESERVED_0A_LSB 28 363 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_0_STATUS_HEADER_RESERVED_0A_MASK 0xf0000000 364 365 /* Description REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_1_STATUS_HEADER_TIMESTAMP 366 367 Timestamp at the moment that this status report is 368 written. 369 370 371 372 <legal all> 373 */ 374 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_1_STATUS_HEADER_TIMESTAMP_OFFSET 0x00000004 375 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_1_STATUS_HEADER_TIMESTAMP_LSB 0 376 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_1_STATUS_HEADER_TIMESTAMP_MASK 0xffffffff 377 378 /* Description REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_2_THRESHOLD_INDEX 379 380 The index of the threshold register whose value got 381 reached 382 383 384 385 <enum 0 reo_desc_counter0_threshold> 386 387 <enum 1 reo_desc_counter1_threshold> 388 389 <enum 2 reo_desc_counter2_threshold> 390 391 <enum 3 reo_desc_counter_sum_threshold> 392 393 394 395 <legal all> 396 */ 397 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_2_THRESHOLD_INDEX_OFFSET 0x00000008 398 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_2_THRESHOLD_INDEX_LSB 0 399 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_2_THRESHOLD_INDEX_MASK 0x00000003 400 401 /* Description REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_2_RESERVED_2 402 403 <legal 0> 404 */ 405 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_2_RESERVED_2_OFFSET 0x00000008 406 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_2_RESERVED_2_LSB 2 407 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_2_RESERVED_2_MASK 0xfffffffc 408 409 /* Description REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_3_LINK_DESCRIPTOR_COUNTER0 410 411 Value of this counter at generation of this message 412 413 <legal all> 414 */ 415 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_3_LINK_DESCRIPTOR_COUNTER0_OFFSET 0x0000000c 416 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_3_LINK_DESCRIPTOR_COUNTER0_LSB 0 417 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_3_LINK_DESCRIPTOR_COUNTER0_MASK 0x00ffffff 418 419 /* Description REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_3_RESERVED_3 420 421 <legal 0> 422 */ 423 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_3_RESERVED_3_OFFSET 0x0000000c 424 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_3_RESERVED_3_LSB 24 425 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_3_RESERVED_3_MASK 0xff000000 426 427 /* Description REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_4_LINK_DESCRIPTOR_COUNTER1 428 429 Value of this counter at generation of this message 430 431 <legal all> 432 */ 433 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_4_LINK_DESCRIPTOR_COUNTER1_OFFSET 0x00000010 434 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_4_LINK_DESCRIPTOR_COUNTER1_LSB 0 435 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_4_LINK_DESCRIPTOR_COUNTER1_MASK 0x00ffffff 436 437 /* Description REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_4_RESERVED_4 438 439 <legal 0> 440 */ 441 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_4_RESERVED_4_OFFSET 0x00000010 442 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_4_RESERVED_4_LSB 24 443 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_4_RESERVED_4_MASK 0xff000000 444 445 /* Description REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_5_LINK_DESCRIPTOR_COUNTER2 446 447 Value of this counter at generation of this message 448 449 <legal all> 450 */ 451 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_5_LINK_DESCRIPTOR_COUNTER2_OFFSET 0x00000014 452 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_5_LINK_DESCRIPTOR_COUNTER2_LSB 0 453 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_5_LINK_DESCRIPTOR_COUNTER2_MASK 0x00ffffff 454 455 /* Description REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_5_RESERVED_5 456 457 <legal 0> 458 */ 459 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_5_RESERVED_5_OFFSET 0x00000014 460 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_5_RESERVED_5_LSB 24 461 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_5_RESERVED_5_MASK 0xff000000 462 463 /* Description REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_6_LINK_DESCRIPTOR_COUNTER_SUM 464 465 Value of this counter at generation of this message 466 467 <legal all> 468 */ 469 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_6_LINK_DESCRIPTOR_COUNTER_SUM_OFFSET 0x00000018 470 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_6_LINK_DESCRIPTOR_COUNTER_SUM_LSB 0 471 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_6_LINK_DESCRIPTOR_COUNTER_SUM_MASK 0x03ffffff 472 473 /* Description REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_6_RESERVED_6 474 475 <legal 0> 476 */ 477 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_6_RESERVED_6_OFFSET 0x00000018 478 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_6_RESERVED_6_LSB 26 479 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_6_RESERVED_6_MASK 0xfc000000 480 481 /* Description REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_7_RESERVED_7 482 483 <legal 0> 484 */ 485 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_7_RESERVED_7_OFFSET 0x0000001c 486 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_7_RESERVED_7_LSB 0 487 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_7_RESERVED_7_MASK 0xffffffff 488 489 /* Description REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_8_RESERVED_8 490 491 <legal 0> 492 */ 493 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_8_RESERVED_8_OFFSET 0x00000020 494 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_8_RESERVED_8_LSB 0 495 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_8_RESERVED_8_MASK 0xffffffff 496 497 /* Description REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_9_RESERVED_9A 498 499 <legal 0> 500 */ 501 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_9_RESERVED_9A_OFFSET 0x00000024 502 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_9_RESERVED_9A_LSB 0 503 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_9_RESERVED_9A_MASK 0xffffffff 504 505 /* Description REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_10_RESERVED_10A 506 507 <legal 0> 508 */ 509 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_10_RESERVED_10A_OFFSET 0x00000028 510 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_10_RESERVED_10A_LSB 0 511 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_10_RESERVED_10A_MASK 0xffffffff 512 513 /* Description REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_11_RESERVED_11A 514 515 <legal 0> 516 */ 517 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_11_RESERVED_11A_OFFSET 0x0000002c 518 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_11_RESERVED_11A_LSB 0 519 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_11_RESERVED_11A_MASK 0xffffffff 520 521 /* Description REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_12_RESERVED_12A 522 523 <legal 0> 524 */ 525 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_12_RESERVED_12A_OFFSET 0x00000030 526 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_12_RESERVED_12A_LSB 0 527 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_12_RESERVED_12A_MASK 0xffffffff 528 529 /* Description REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_13_RESERVED_13A 530 531 <legal 0> 532 */ 533 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_13_RESERVED_13A_OFFSET 0x00000034 534 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_13_RESERVED_13A_LSB 0 535 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_13_RESERVED_13A_MASK 0xffffffff 536 537 /* Description REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_14_RESERVED_14A 538 539 <legal 0> 540 */ 541 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_14_RESERVED_14A_OFFSET 0x00000038 542 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_14_RESERVED_14A_LSB 0 543 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_14_RESERVED_14A_MASK 0xffffffff 544 545 /* Description REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_15_RESERVED_15A 546 547 <legal 0> 548 */ 549 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_15_RESERVED_15A_OFFSET 0x0000003c 550 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_15_RESERVED_15A_LSB 0 551 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_15_RESERVED_15A_MASK 0xffffffff 552 553 /* Description REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_16_RESERVED_16A 554 555 <legal 0> 556 */ 557 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_16_RESERVED_16A_OFFSET 0x00000040 558 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_16_RESERVED_16A_LSB 0 559 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_16_RESERVED_16A_MASK 0xffffffff 560 561 /* Description REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_17_RESERVED_17A 562 563 <legal 0> 564 */ 565 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_17_RESERVED_17A_OFFSET 0x00000044 566 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_17_RESERVED_17A_LSB 0 567 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_17_RESERVED_17A_MASK 0xffffffff 568 569 /* Description REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_18_RESERVED_18A 570 571 <legal 0> 572 */ 573 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_18_RESERVED_18A_OFFSET 0x00000048 574 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_18_RESERVED_18A_LSB 0 575 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_18_RESERVED_18A_MASK 0xffffffff 576 577 /* Description REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_19_RESERVED_19A 578 579 <legal 0> 580 */ 581 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_19_RESERVED_19A_OFFSET 0x0000004c 582 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_19_RESERVED_19A_LSB 0 583 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_19_RESERVED_19A_MASK 0xffffffff 584 585 /* Description REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_20_RESERVED_20A 586 587 <legal 0> 588 */ 589 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_20_RESERVED_20A_OFFSET 0x00000050 590 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_20_RESERVED_20A_LSB 0 591 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_20_RESERVED_20A_MASK 0xffffffff 592 593 /* Description REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_21_RESERVED_21A 594 595 <legal 0> 596 */ 597 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_21_RESERVED_21A_OFFSET 0x00000054 598 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_21_RESERVED_21A_LSB 0 599 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_21_RESERVED_21A_MASK 0xffffffff 600 601 /* Description REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_22_RESERVED_22A 602 603 <legal 0> 604 */ 605 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_22_RESERVED_22A_OFFSET 0x00000058 606 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_22_RESERVED_22A_LSB 0 607 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_22_RESERVED_22A_MASK 0xffffffff 608 609 /* Description REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_23_RESERVED_23A 610 611 <legal 0> 612 */ 613 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_23_RESERVED_23A_OFFSET 0x0000005c 614 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_23_RESERVED_23A_LSB 0 615 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_23_RESERVED_23A_MASK 0xffffffff 616 617 /* Description REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_24_RESERVED_24A 618 619 <legal 0> 620 */ 621 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_24_RESERVED_24A_OFFSET 0x00000060 622 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_24_RESERVED_24A_LSB 0 623 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_24_RESERVED_24A_MASK 0x0fffffff 624 625 /* Description REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_24_LOOPING_COUNT 626 627 A count value that indicates the number of times the 628 producer of entries into this Ring has looped around the 629 ring. 630 631 At initialization time, this value is set to 0. On the 632 first loop, this value is set to 1. After the max value is 633 reached allowed by the number of bits for this field, the 634 count value continues with 0 again. 635 636 637 638 In case SW is the consumer of the ring entries, it can 639 use this field to figure out up to where the producer of 640 entries has created new entries. This eliminates the need to 641 check where the head pointer' of the ring is located once 642 the SW starts processing an interrupt indicating that new 643 entries have been put into this ring... 644 645 646 647 Also note that SW if it wants only needs to look at the 648 LSB bit of this count value. 649 650 <legal all> 651 */ 652 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_24_LOOPING_COUNT_OFFSET 0x00000060 653 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_24_LOOPING_COUNT_LSB 28 654 #define REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_24_LOOPING_COUNT_MASK 0xf0000000 655 656 657 #endif // _REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_H_ 658