xref: /wlan-driver/fw-api/hw/qcn9000/rx_attention.h (revision 5113495b16420b49004c444715d2daae2066e7dc)
1 /*
2  * Copyright (c) 2019, The Linux Foundation. All rights reserved.
3  *
4  * Permission to use, copy, modify, and/or distribute this software for any
5  * purpose with or without fee is hereby granted, provided that the above
6  * copyright notice and this permission notice appear in all copies.
7  *
8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15  */
16 
17 #ifndef _RX_ATTENTION_H_
18 #define _RX_ATTENTION_H_
19 #if !defined(__ASSEMBLER__)
20 #endif
21 
22 
23 // ################ START SUMMARY #################
24 //
25 //	Dword	Fields
26 //	0	rxpcu_mpdu_filter_in_category[1:0], sw_frame_group_id[8:2], reserved_0[15:9], phy_ppdu_id[31:16]
27 //	1	first_mpdu[0], reserved_1a[1], mcast_bcast[2], ast_index_not_found[3], ast_index_timeout[4], power_mgmt[5], non_qos[6], null_data[7], mgmt_type[8], ctrl_type[9], more_data[10], eosp[11], a_msdu_error[12], fragment_flag[13], order[14], cce_match[15], overflow_err[16], msdu_length_err[17], tcp_udp_chksum_fail[18], ip_chksum_fail[19], sa_idx_invalid[20], da_idx_invalid[21], reserved_1b[22], rx_in_tx_decrypt_byp[23], encrypt_required[24], directed[25], buffer_fragment[26], mpdu_length_err[27], tkip_mic_err[28], decrypt_err[29], unencrypted_frame_err[30], fcs_err[31]
28 //	2	flow_idx_timeout[0], flow_idx_invalid[1], wifi_parser_error[2], amsdu_parser_error[3], sa_idx_timeout[4], da_idx_timeout[5], msdu_limit_error[6], da_is_valid[7], da_is_mcbc[8], sa_is_valid[9], decrypt_status_code[12:10], rx_bitmap_not_updated[13], reserved_2[30:14], msdu_done[31]
29 //
30 // ################ END SUMMARY #################
31 
32 #define NUM_OF_DWORDS_RX_ATTENTION 3
33 
34 struct rx_attention {
35              uint32_t rxpcu_mpdu_filter_in_category   :  2, //[1:0]
36                       sw_frame_group_id               :  7, //[8:2]
37                       reserved_0                      :  7, //[15:9]
38                       phy_ppdu_id                     : 16; //[31:16]
39              uint32_t first_mpdu                      :  1, //[0]
40                       reserved_1a                     :  1, //[1]
41                       mcast_bcast                     :  1, //[2]
42                       ast_index_not_found             :  1, //[3]
43                       ast_index_timeout               :  1, //[4]
44                       power_mgmt                      :  1, //[5]
45                       non_qos                         :  1, //[6]
46                       null_data                       :  1, //[7]
47                       mgmt_type                       :  1, //[8]
48                       ctrl_type                       :  1, //[9]
49                       more_data                       :  1, //[10]
50                       eosp                            :  1, //[11]
51                       a_msdu_error                    :  1, //[12]
52                       fragment_flag                   :  1, //[13]
53                       order                           :  1, //[14]
54                       cce_match                       :  1, //[15]
55                       overflow_err                    :  1, //[16]
56                       msdu_length_err                 :  1, //[17]
57                       tcp_udp_chksum_fail             :  1, //[18]
58                       ip_chksum_fail                  :  1, //[19]
59                       sa_idx_invalid                  :  1, //[20]
60                       da_idx_invalid                  :  1, //[21]
61                       reserved_1b                     :  1, //[22]
62                       rx_in_tx_decrypt_byp            :  1, //[23]
63                       encrypt_required                :  1, //[24]
64                       directed                        :  1, //[25]
65                       buffer_fragment                 :  1, //[26]
66                       mpdu_length_err                 :  1, //[27]
67                       tkip_mic_err                    :  1, //[28]
68                       decrypt_err                     :  1, //[29]
69                       unencrypted_frame_err           :  1, //[30]
70                       fcs_err                         :  1; //[31]
71              uint32_t flow_idx_timeout                :  1, //[0]
72                       flow_idx_invalid                :  1, //[1]
73                       wifi_parser_error               :  1, //[2]
74                       amsdu_parser_error              :  1, //[3]
75                       sa_idx_timeout                  :  1, //[4]
76                       da_idx_timeout                  :  1, //[5]
77                       msdu_limit_error                :  1, //[6]
78                       da_is_valid                     :  1, //[7]
79                       da_is_mcbc                      :  1, //[8]
80                       sa_is_valid                     :  1, //[9]
81                       decrypt_status_code             :  3, //[12:10]
82                       rx_bitmap_not_updated           :  1, //[13]
83                       reserved_2                      : 17, //[30:14]
84                       msdu_done                       :  1; //[31]
85 };
86 
87 /*
88 
89 rxpcu_mpdu_filter_in_category
90 
91 			Field indicates what the reason was that this MPDU frame
92 			was allowed to come into the receive path by RXPCU
93 
94 			<enum 0 rxpcu_filter_pass> This MPDU passed the normal
95 			frame filter programming of rxpcu
96 
97 			<enum 1 rxpcu_monitor_client> This MPDU did NOT pass the
98 			regular frame filter and would have been dropped, were it
99 			not for the frame fitting into the 'monitor_client'
100 			category.
101 
102 			<enum 2 rxpcu_monitor_other> This MPDU did NOT pass the
103 			regular frame filter and also did not pass the
104 			rxpcu_monitor_client filter. It would have been dropped
105 			accept that it did pass the 'monitor_other' category.
106 
107 			<legal 0-2>
108 
109 sw_frame_group_id
110 
111 			SW processes frames based on certain classifications.
112 			This field indicates to what sw classification this MPDU is
113 			mapped.
114 
115 			The classification is given in priority order
116 
117 
118 
119 			<enum 0 sw_frame_group_NDP_frame>
120 
121 
122 
123 			<enum 1 sw_frame_group_Multicast_data>
124 
125 			<enum 2 sw_frame_group_Unicast_data>
126 
127 			<enum 3 sw_frame_group_Null_data > This includes mpdus
128 			of type Data Null as well as QoS Data Null
129 
130 
131 
132 			<enum 4 sw_frame_group_mgmt_0000 >
133 
134 			<enum 5 sw_frame_group_mgmt_0001 >
135 
136 			<enum 6 sw_frame_group_mgmt_0010 >
137 
138 			<enum 7 sw_frame_group_mgmt_0011 >
139 
140 			<enum 8 sw_frame_group_mgmt_0100 >
141 
142 			<enum 9 sw_frame_group_mgmt_0101 >
143 
144 			<enum 10 sw_frame_group_mgmt_0110 >
145 
146 			<enum 11 sw_frame_group_mgmt_0111 >
147 
148 			<enum 12 sw_frame_group_mgmt_1000 >
149 
150 			<enum 13 sw_frame_group_mgmt_1001 >
151 
152 			<enum 14 sw_frame_group_mgmt_1010 >
153 
154 			<enum 15 sw_frame_group_mgmt_1011 >
155 
156 			<enum 16 sw_frame_group_mgmt_1100 >
157 
158 			<enum 17 sw_frame_group_mgmt_1101 >
159 
160 			<enum 18 sw_frame_group_mgmt_1110 >
161 
162 			<enum 19 sw_frame_group_mgmt_1111 >
163 
164 
165 
166 			<enum 20 sw_frame_group_ctrl_0000 >
167 
168 			<enum 21 sw_frame_group_ctrl_0001 >
169 
170 			<enum 22 sw_frame_group_ctrl_0010 >
171 
172 			<enum 23 sw_frame_group_ctrl_0011 >
173 
174 			<enum 24 sw_frame_group_ctrl_0100 >
175 
176 			<enum 25 sw_frame_group_ctrl_0101 >
177 
178 			<enum 26 sw_frame_group_ctrl_0110 >
179 
180 			<enum 27 sw_frame_group_ctrl_0111 >
181 
182 			<enum 28 sw_frame_group_ctrl_1000 >
183 
184 			<enum 29 sw_frame_group_ctrl_1001 >
185 
186 			<enum 30 sw_frame_group_ctrl_1010 >
187 
188 			<enum 31 sw_frame_group_ctrl_1011 >
189 
190 			<enum 32 sw_frame_group_ctrl_1100 >
191 
192 			<enum 33 sw_frame_group_ctrl_1101 >
193 
194 			<enum 34 sw_frame_group_ctrl_1110 >
195 
196 			<enum 35 sw_frame_group_ctrl_1111 >
197 
198 
199 
200 			<enum 36 sw_frame_group_unsupported> This covers type 3
201 			and protocol version != 0
202 
203 
204 
205 
206 
207 
208 			<legal 0-37>
209 
210 reserved_0
211 
212 			<legal 0>
213 
214 phy_ppdu_id
215 
216 			A ppdu counter value that PHY increments for every PPDU
217 			received. The counter value wraps around
218 
219 			<legal all>
220 
221 first_mpdu
222 
223 			Indicates the first MSDU of the PPDU.  If both
224 			first_mpdu and last_mpdu are set in the MSDU then this is a
225 			not an A-MPDU frame but a stand alone MPDU.  Interior MPDU
226 			in an A-MPDU shall have both first_mpdu and last_mpdu bits
227 			set to 0.  The PPDU start status will only be valid when
228 			this bit is set.
229 
230 reserved_1a
231 
232 			<legal 0>
233 
234 mcast_bcast
235 
236 			Multicast / broadcast indicator.  Only set when the MAC
237 			address 1 bit 0 is set indicating mcast/bcast and the BSSID
238 			matches one of the 4 BSSID registers. Only set when
239 			first_msdu is set.
240 
241 ast_index_not_found
242 
243 			Only valid when first_msdu is set.
244 
245 
246 
247 			Indicates no AST matching entries within the the max
248 			search count.
249 
250 ast_index_timeout
251 
252 			Only valid when first_msdu is set.
253 
254 
255 
256 			Indicates an unsuccessful search in the address seach
257 			table due to timeout.
258 
259 power_mgmt
260 
261 			Power management bit set in the 802.11 header.  Only set
262 			when first_msdu is set.
263 
264 non_qos
265 
266 			Set if packet is not a non-QoS data frame.  Only set
267 			when first_msdu is set.
268 
269 null_data
270 
271 			Set if frame type indicates either null data or QoS null
272 			data format.  Only set when first_msdu is set.
273 
274 mgmt_type
275 
276 			Set if packet is a management packet.  Only set when
277 			first_msdu is set.
278 
279 ctrl_type
280 
281 			Set if packet is a control packet.  Only set when
282 			first_msdu is set.
283 
284 more_data
285 
286 			Set if more bit in frame control is set.  Only set when
287 			first_msdu is set.
288 
289 eosp
290 
291 			Set if the EOSP (end of service period) bit in the QoS
292 			control field is set.  Only set when first_msdu is set.
293 
294 a_msdu_error
295 
296 			Set if number of MSDUs in A-MSDU is above a threshold or
297 			if the size of the MSDU is invalid.  This receive buffer
298 			will contain all of the remainder of the MSDUs in this MPDU
299 			without decapsulation.
300 
301 fragment_flag
302 
303 			Indicates that this is an 802.11 fragment frame.  This
304 			is set when either the more_frag bit is set in the frame
305 			control or the fragment number is not zero.  Only set when
306 			first_msdu is set.
307 
308 order
309 
310 			Set if the order bit in the frame control is set.  Only
311 			set when first_msdu is set.
312 
313 cce_match
314 
315 			Indicates that this status has a corresponding MSDU that
316 			requires FW processing.  The OLE will have classification
317 			ring mask registers which will indicate the ring(s) for
318 			packets and descriptors which need FW attention.
319 
320 overflow_err
321 
322 			RXPCU Receive FIFO ran out of space to receive the full
323 			MPDU. Therefor this MPDU is terminated early and is thus
324 			corrupted.
325 
326 
327 
328 			This MPDU will not be ACKed.
329 
330 			RXPCU might still be able to correctly receive the
331 			following MPDUs in the PPDU if enough fifo space became
332 			available in time
333 
334 msdu_length_err
335 
336 			Indicates that the MSDU length from the 802.3
337 			encapsulated length field extends beyond the MPDU boundary
338 			or if the length is less than 14 bytes.
339 
340 			Merged with original other_msdu_err: Indicates that the
341 			MSDU threshold was exceeded and thus all the rest of the
342 			MSDUs will not be scattered and will not be decasulated but
343 			will be DMA'ed in RAW format as a single MSDU buffer
344 
345 tcp_udp_chksum_fail
346 
347 			Indicates that the computed checksum (tcp_udp_chksum)
348 			did not match the checksum in the TCP/UDP header.
349 
350 ip_chksum_fail
351 
352 			Indicates that the computed checksum did not match the
353 			checksum in the IP header.
354 
355 sa_idx_invalid
356 
357 			Indicates no matching entry was found in the address
358 			search table for the source MAC address.
359 
360 da_idx_invalid
361 
362 			Indicates no matching entry was found in the address
363 			search table for the destination MAC address.
364 
365 reserved_1b
366 
367 			<legal 0>
368 
369 rx_in_tx_decrypt_byp
370 
371 			Indicates that RX packet is not decrypted as Crypto is
372 			busy with TX packet processing.
373 
374 encrypt_required
375 
376 			Indicates that this data type frame is not encrypted
377 			even if the policy for this MPDU requires encryption as
378 			indicated in the peer entry key type.
379 
380 directed
381 
382 			MPDU is a directed packet which means that the RA
383 			matched our STA addresses.  In proxySTA it means that the TA
384 			matched an entry in our address search table with the
385 			corresponding no_ack bit is the address search entry
386 			cleared.
387 
388 buffer_fragment
389 
390 			Indicates that at least one of the rx buffers has been
391 			fragmented.  If set the FW should look at the rx_frag_info
392 			descriptor described below.
393 
394 mpdu_length_err
395 
396 			Indicates that the MPDU was pre-maturely terminated
397 			resulting in a truncated MPDU.  Don't trust the MPDU length
398 			field.
399 
400 tkip_mic_err
401 
402 			Indicates that the MPDU Michael integrity check failed
403 
404 decrypt_err
405 
406 			Indicates that the MPDU decrypt integrity check failed
407 			or CRYPTO received an encrypted frame, but did not get a
408 			valid corresponding key id in the peer entry.
409 
410 unencrypted_frame_err
411 
412 			Copied here by RX OLE from the RX_MPDU_END TLV
413 
414 fcs_err
415 
416 			Indicates that the MPDU FCS check failed
417 
418 flow_idx_timeout
419 
420 			Indicates an unsuccessful flow search due to the
421 			expiring of the search timer.
422 
423 			<legal all>
424 
425 flow_idx_invalid
426 
427 			flow id is not valid
428 
429 			<legal all>
430 
431 wifi_parser_error
432 
433 			Indicates that the WiFi frame has one of the following
434 			errors
435 
436 			o has less than minimum allowed bytes as per standard
437 
438 			o has incomplete VLAN LLC/SNAP (only for non A-MSDUs)
439 
440 			<legal all>
441 
442 amsdu_parser_error
443 
444 			A-MSDU could not be properly de-agregated.
445 
446 			<legal all>
447 
448 sa_idx_timeout
449 
450 			Indicates an unsuccessful MAC source address search due
451 			to the expiring of the search timer.
452 
453 da_idx_timeout
454 
455 			Indicates an unsuccessful MAC destination address search
456 			due to the expiring of the search timer.
457 
458 msdu_limit_error
459 
460 			Indicates that the MSDU threshold was exceeded and thus
461 			all the rest of the MSDUs will not be scattered and will not
462 			be decasulated but will be DMA'ed in RAW format as a single
463 			MSDU buffer
464 
465 da_is_valid
466 
467 			Indicates that OLE found a valid DA entry
468 
469 da_is_mcbc
470 
471 			Field Only valid if da_is_valid is set
472 
473 
474 
475 			Indicates the DA address was a Multicast of Broadcast
476 			address.
477 
478 sa_is_valid
479 
480 			Indicates that OLE found a valid SA entry
481 
482 decrypt_status_code
483 
484 			Field provides insight into the decryption performed
485 
486 
487 
488 			<enum 0 decrypt_ok> Frame had protection enabled and
489 			decrypted properly
490 
491 			<enum 1 decrypt_unprotected_frame > Frame is unprotected
492 			and hence bypassed
493 
494 			<enum 2 decrypt_data_err > Frame has protection enabled
495 			and could not be properly decrypted due to MIC/ICV mismatch
496 			etc.
497 
498 			<enum 3 decrypt_key_invalid > Frame has protection
499 			enabled but the key that was required to decrypt this frame
500 			was not valid
501 
502 			<enum 4 decrypt_peer_entry_invalid > Frame has
503 			protection enabled but the key that was required to decrypt
504 			this frame was not valid
505 
506 			<enum 5 decrypt_other > Reserved for other indications
507 
508 
509 
510 			<legal 0 - 5>
511 
512 rx_bitmap_not_updated
513 
514 			Frame is received, but RXPCU could not update the
515 			receive bitmap due to (temporary) fifo contraints.
516 
517 			<legal all>
518 
519 reserved_2
520 
521 			<legal 0>
522 
523 msdu_done
524 
525 			If set indicates that the RX packet data, RX header
526 			data, RX PPDU start descriptor, RX MPDU start/end
527 			descriptor, RX MSDU start/end descriptors and RX Attention
528 			descriptor are all valid.  This bit must be in the last
529 			octet of the descriptor.
530 */
531 
532 
533 /* Description		RX_ATTENTION_0_RXPCU_MPDU_FILTER_IN_CATEGORY
534 
535 			Field indicates what the reason was that this MPDU frame
536 			was allowed to come into the receive path by RXPCU
537 
538 			<enum 0 rxpcu_filter_pass> This MPDU passed the normal
539 			frame filter programming of rxpcu
540 
541 			<enum 1 rxpcu_monitor_client> This MPDU did NOT pass the
542 			regular frame filter and would have been dropped, were it
543 			not for the frame fitting into the 'monitor_client'
544 			category.
545 
546 			<enum 2 rxpcu_monitor_other> This MPDU did NOT pass the
547 			regular frame filter and also did not pass the
548 			rxpcu_monitor_client filter. It would have been dropped
549 			accept that it did pass the 'monitor_other' category.
550 
551 			<legal 0-2>
552 */
553 #define RX_ATTENTION_0_RXPCU_MPDU_FILTER_IN_CATEGORY_OFFSET          0x00000000
554 #define RX_ATTENTION_0_RXPCU_MPDU_FILTER_IN_CATEGORY_LSB             0
555 #define RX_ATTENTION_0_RXPCU_MPDU_FILTER_IN_CATEGORY_MASK            0x00000003
556 
557 /* Description		RX_ATTENTION_0_SW_FRAME_GROUP_ID
558 
559 			SW processes frames based on certain classifications.
560 			This field indicates to what sw classification this MPDU is
561 			mapped.
562 
563 			The classification is given in priority order
564 
565 
566 
567 			<enum 0 sw_frame_group_NDP_frame>
568 
569 
570 
571 			<enum 1 sw_frame_group_Multicast_data>
572 
573 			<enum 2 sw_frame_group_Unicast_data>
574 
575 			<enum 3 sw_frame_group_Null_data > This includes mpdus
576 			of type Data Null as well as QoS Data Null
577 
578 
579 
580 			<enum 4 sw_frame_group_mgmt_0000 >
581 
582 			<enum 5 sw_frame_group_mgmt_0001 >
583 
584 			<enum 6 sw_frame_group_mgmt_0010 >
585 
586 			<enum 7 sw_frame_group_mgmt_0011 >
587 
588 			<enum 8 sw_frame_group_mgmt_0100 >
589 
590 			<enum 9 sw_frame_group_mgmt_0101 >
591 
592 			<enum 10 sw_frame_group_mgmt_0110 >
593 
594 			<enum 11 sw_frame_group_mgmt_0111 >
595 
596 			<enum 12 sw_frame_group_mgmt_1000 >
597 
598 			<enum 13 sw_frame_group_mgmt_1001 >
599 
600 			<enum 14 sw_frame_group_mgmt_1010 >
601 
602 			<enum 15 sw_frame_group_mgmt_1011 >
603 
604 			<enum 16 sw_frame_group_mgmt_1100 >
605 
606 			<enum 17 sw_frame_group_mgmt_1101 >
607 
608 			<enum 18 sw_frame_group_mgmt_1110 >
609 
610 			<enum 19 sw_frame_group_mgmt_1111 >
611 
612 
613 
614 			<enum 20 sw_frame_group_ctrl_0000 >
615 
616 			<enum 21 sw_frame_group_ctrl_0001 >
617 
618 			<enum 22 sw_frame_group_ctrl_0010 >
619 
620 			<enum 23 sw_frame_group_ctrl_0011 >
621 
622 			<enum 24 sw_frame_group_ctrl_0100 >
623 
624 			<enum 25 sw_frame_group_ctrl_0101 >
625 
626 			<enum 26 sw_frame_group_ctrl_0110 >
627 
628 			<enum 27 sw_frame_group_ctrl_0111 >
629 
630 			<enum 28 sw_frame_group_ctrl_1000 >
631 
632 			<enum 29 sw_frame_group_ctrl_1001 >
633 
634 			<enum 30 sw_frame_group_ctrl_1010 >
635 
636 			<enum 31 sw_frame_group_ctrl_1011 >
637 
638 			<enum 32 sw_frame_group_ctrl_1100 >
639 
640 			<enum 33 sw_frame_group_ctrl_1101 >
641 
642 			<enum 34 sw_frame_group_ctrl_1110 >
643 
644 			<enum 35 sw_frame_group_ctrl_1111 >
645 
646 
647 
648 			<enum 36 sw_frame_group_unsupported> This covers type 3
649 			and protocol version != 0
650 
651 
652 
653 
654 
655 
656 			<legal 0-37>
657 */
658 #define RX_ATTENTION_0_SW_FRAME_GROUP_ID_OFFSET                      0x00000000
659 #define RX_ATTENTION_0_SW_FRAME_GROUP_ID_LSB                         2
660 #define RX_ATTENTION_0_SW_FRAME_GROUP_ID_MASK                        0x000001fc
661 
662 /* Description		RX_ATTENTION_0_RESERVED_0
663 
664 			<legal 0>
665 */
666 #define RX_ATTENTION_0_RESERVED_0_OFFSET                             0x00000000
667 #define RX_ATTENTION_0_RESERVED_0_LSB                                9
668 #define RX_ATTENTION_0_RESERVED_0_MASK                               0x0000fe00
669 
670 /* Description		RX_ATTENTION_0_PHY_PPDU_ID
671 
672 			A ppdu counter value that PHY increments for every PPDU
673 			received. The counter value wraps around
674 
675 			<legal all>
676 */
677 #define RX_ATTENTION_0_PHY_PPDU_ID_OFFSET                            0x00000000
678 #define RX_ATTENTION_0_PHY_PPDU_ID_LSB                               16
679 #define RX_ATTENTION_0_PHY_PPDU_ID_MASK                              0xffff0000
680 
681 /* Description		RX_ATTENTION_1_FIRST_MPDU
682 
683 			Indicates the first MSDU of the PPDU.  If both
684 			first_mpdu and last_mpdu are set in the MSDU then this is a
685 			not an A-MPDU frame but a stand alone MPDU.  Interior MPDU
686 			in an A-MPDU shall have both first_mpdu and last_mpdu bits
687 			set to 0.  The PPDU start status will only be valid when
688 			this bit is set.
689 */
690 #define RX_ATTENTION_1_FIRST_MPDU_OFFSET                             0x00000004
691 #define RX_ATTENTION_1_FIRST_MPDU_LSB                                0
692 #define RX_ATTENTION_1_FIRST_MPDU_MASK                               0x00000001
693 
694 /* Description		RX_ATTENTION_1_RESERVED_1A
695 
696 			<legal 0>
697 */
698 #define RX_ATTENTION_1_RESERVED_1A_OFFSET                            0x00000004
699 #define RX_ATTENTION_1_RESERVED_1A_LSB                               1
700 #define RX_ATTENTION_1_RESERVED_1A_MASK                              0x00000002
701 
702 /* Description		RX_ATTENTION_1_MCAST_BCAST
703 
704 			Multicast / broadcast indicator.  Only set when the MAC
705 			address 1 bit 0 is set indicating mcast/bcast and the BSSID
706 			matches one of the 4 BSSID registers. Only set when
707 			first_msdu is set.
708 */
709 #define RX_ATTENTION_1_MCAST_BCAST_OFFSET                            0x00000004
710 #define RX_ATTENTION_1_MCAST_BCAST_LSB                               2
711 #define RX_ATTENTION_1_MCAST_BCAST_MASK                              0x00000004
712 
713 /* Description		RX_ATTENTION_1_AST_INDEX_NOT_FOUND
714 
715 			Only valid when first_msdu is set.
716 
717 
718 
719 			Indicates no AST matching entries within the the max
720 			search count.
721 */
722 #define RX_ATTENTION_1_AST_INDEX_NOT_FOUND_OFFSET                    0x00000004
723 #define RX_ATTENTION_1_AST_INDEX_NOT_FOUND_LSB                       3
724 #define RX_ATTENTION_1_AST_INDEX_NOT_FOUND_MASK                      0x00000008
725 
726 /* Description		RX_ATTENTION_1_AST_INDEX_TIMEOUT
727 
728 			Only valid when first_msdu is set.
729 
730 
731 
732 			Indicates an unsuccessful search in the address seach
733 			table due to timeout.
734 */
735 #define RX_ATTENTION_1_AST_INDEX_TIMEOUT_OFFSET                      0x00000004
736 #define RX_ATTENTION_1_AST_INDEX_TIMEOUT_LSB                         4
737 #define RX_ATTENTION_1_AST_INDEX_TIMEOUT_MASK                        0x00000010
738 
739 /* Description		RX_ATTENTION_1_POWER_MGMT
740 
741 			Power management bit set in the 802.11 header.  Only set
742 			when first_msdu is set.
743 */
744 #define RX_ATTENTION_1_POWER_MGMT_OFFSET                             0x00000004
745 #define RX_ATTENTION_1_POWER_MGMT_LSB                                5
746 #define RX_ATTENTION_1_POWER_MGMT_MASK                               0x00000020
747 
748 /* Description		RX_ATTENTION_1_NON_QOS
749 
750 			Set if packet is not a non-QoS data frame.  Only set
751 			when first_msdu is set.
752 */
753 #define RX_ATTENTION_1_NON_QOS_OFFSET                                0x00000004
754 #define RX_ATTENTION_1_NON_QOS_LSB                                   6
755 #define RX_ATTENTION_1_NON_QOS_MASK                                  0x00000040
756 
757 /* Description		RX_ATTENTION_1_NULL_DATA
758 
759 			Set if frame type indicates either null data or QoS null
760 			data format.  Only set when first_msdu is set.
761 */
762 #define RX_ATTENTION_1_NULL_DATA_OFFSET                              0x00000004
763 #define RX_ATTENTION_1_NULL_DATA_LSB                                 7
764 #define RX_ATTENTION_1_NULL_DATA_MASK                                0x00000080
765 
766 /* Description		RX_ATTENTION_1_MGMT_TYPE
767 
768 			Set if packet is a management packet.  Only set when
769 			first_msdu is set.
770 */
771 #define RX_ATTENTION_1_MGMT_TYPE_OFFSET                              0x00000004
772 #define RX_ATTENTION_1_MGMT_TYPE_LSB                                 8
773 #define RX_ATTENTION_1_MGMT_TYPE_MASK                                0x00000100
774 
775 /* Description		RX_ATTENTION_1_CTRL_TYPE
776 
777 			Set if packet is a control packet.  Only set when
778 			first_msdu is set.
779 */
780 #define RX_ATTENTION_1_CTRL_TYPE_OFFSET                              0x00000004
781 #define RX_ATTENTION_1_CTRL_TYPE_LSB                                 9
782 #define RX_ATTENTION_1_CTRL_TYPE_MASK                                0x00000200
783 
784 /* Description		RX_ATTENTION_1_MORE_DATA
785 
786 			Set if more bit in frame control is set.  Only set when
787 			first_msdu is set.
788 */
789 #define RX_ATTENTION_1_MORE_DATA_OFFSET                              0x00000004
790 #define RX_ATTENTION_1_MORE_DATA_LSB                                 10
791 #define RX_ATTENTION_1_MORE_DATA_MASK                                0x00000400
792 
793 /* Description		RX_ATTENTION_1_EOSP
794 
795 			Set if the EOSP (end of service period) bit in the QoS
796 			control field is set.  Only set when first_msdu is set.
797 */
798 #define RX_ATTENTION_1_EOSP_OFFSET                                   0x00000004
799 #define RX_ATTENTION_1_EOSP_LSB                                      11
800 #define RX_ATTENTION_1_EOSP_MASK                                     0x00000800
801 
802 /* Description		RX_ATTENTION_1_A_MSDU_ERROR
803 
804 			Set if number of MSDUs in A-MSDU is above a threshold or
805 			if the size of the MSDU is invalid.  This receive buffer
806 			will contain all of the remainder of the MSDUs in this MPDU
807 			without decapsulation.
808 */
809 #define RX_ATTENTION_1_A_MSDU_ERROR_OFFSET                           0x00000004
810 #define RX_ATTENTION_1_A_MSDU_ERROR_LSB                              12
811 #define RX_ATTENTION_1_A_MSDU_ERROR_MASK                             0x00001000
812 
813 /* Description		RX_ATTENTION_1_FRAGMENT_FLAG
814 
815 			Indicates that this is an 802.11 fragment frame.  This
816 			is set when either the more_frag bit is set in the frame
817 			control or the fragment number is not zero.  Only set when
818 			first_msdu is set.
819 */
820 #define RX_ATTENTION_1_FRAGMENT_FLAG_OFFSET                          0x00000004
821 #define RX_ATTENTION_1_FRAGMENT_FLAG_LSB                             13
822 #define RX_ATTENTION_1_FRAGMENT_FLAG_MASK                            0x00002000
823 
824 /* Description		RX_ATTENTION_1_ORDER
825 
826 			Set if the order bit in the frame control is set.  Only
827 			set when first_msdu is set.
828 */
829 #define RX_ATTENTION_1_ORDER_OFFSET                                  0x00000004
830 #define RX_ATTENTION_1_ORDER_LSB                                     14
831 #define RX_ATTENTION_1_ORDER_MASK                                    0x00004000
832 
833 /* Description		RX_ATTENTION_1_CCE_MATCH
834 
835 			Indicates that this status has a corresponding MSDU that
836 			requires FW processing.  The OLE will have classification
837 			ring mask registers which will indicate the ring(s) for
838 			packets and descriptors which need FW attention.
839 */
840 #define RX_ATTENTION_1_CCE_MATCH_OFFSET                              0x00000004
841 #define RX_ATTENTION_1_CCE_MATCH_LSB                                 15
842 #define RX_ATTENTION_1_CCE_MATCH_MASK                                0x00008000
843 
844 /* Description		RX_ATTENTION_1_OVERFLOW_ERR
845 
846 			RXPCU Receive FIFO ran out of space to receive the full
847 			MPDU. Therefor this MPDU is terminated early and is thus
848 			corrupted.
849 
850 
851 
852 			This MPDU will not be ACKed.
853 
854 			RXPCU might still be able to correctly receive the
855 			following MPDUs in the PPDU if enough fifo space became
856 			available in time
857 */
858 #define RX_ATTENTION_1_OVERFLOW_ERR_OFFSET                           0x00000004
859 #define RX_ATTENTION_1_OVERFLOW_ERR_LSB                              16
860 #define RX_ATTENTION_1_OVERFLOW_ERR_MASK                             0x00010000
861 
862 /* Description		RX_ATTENTION_1_MSDU_LENGTH_ERR
863 
864 			Indicates that the MSDU length from the 802.3
865 			encapsulated length field extends beyond the MPDU boundary
866 			or if the length is less than 14 bytes.
867 
868 			Merged with original other_msdu_err: Indicates that the
869 			MSDU threshold was exceeded and thus all the rest of the
870 			MSDUs will not be scattered and will not be decasulated but
871 			will be DMA'ed in RAW format as a single MSDU buffer
872 */
873 #define RX_ATTENTION_1_MSDU_LENGTH_ERR_OFFSET                        0x00000004
874 #define RX_ATTENTION_1_MSDU_LENGTH_ERR_LSB                           17
875 #define RX_ATTENTION_1_MSDU_LENGTH_ERR_MASK                          0x00020000
876 
877 /* Description		RX_ATTENTION_1_TCP_UDP_CHKSUM_FAIL
878 
879 			Indicates that the computed checksum (tcp_udp_chksum)
880 			did not match the checksum in the TCP/UDP header.
881 */
882 #define RX_ATTENTION_1_TCP_UDP_CHKSUM_FAIL_OFFSET                    0x00000004
883 #define RX_ATTENTION_1_TCP_UDP_CHKSUM_FAIL_LSB                       18
884 #define RX_ATTENTION_1_TCP_UDP_CHKSUM_FAIL_MASK                      0x00040000
885 
886 /* Description		RX_ATTENTION_1_IP_CHKSUM_FAIL
887 
888 			Indicates that the computed checksum did not match the
889 			checksum in the IP header.
890 */
891 #define RX_ATTENTION_1_IP_CHKSUM_FAIL_OFFSET                         0x00000004
892 #define RX_ATTENTION_1_IP_CHKSUM_FAIL_LSB                            19
893 #define RX_ATTENTION_1_IP_CHKSUM_FAIL_MASK                           0x00080000
894 
895 /* Description		RX_ATTENTION_1_SA_IDX_INVALID
896 
897 			Indicates no matching entry was found in the address
898 			search table for the source MAC address.
899 */
900 #define RX_ATTENTION_1_SA_IDX_INVALID_OFFSET                         0x00000004
901 #define RX_ATTENTION_1_SA_IDX_INVALID_LSB                            20
902 #define RX_ATTENTION_1_SA_IDX_INVALID_MASK                           0x00100000
903 
904 /* Description		RX_ATTENTION_1_DA_IDX_INVALID
905 
906 			Indicates no matching entry was found in the address
907 			search table for the destination MAC address.
908 */
909 #define RX_ATTENTION_1_DA_IDX_INVALID_OFFSET                         0x00000004
910 #define RX_ATTENTION_1_DA_IDX_INVALID_LSB                            21
911 #define RX_ATTENTION_1_DA_IDX_INVALID_MASK                           0x00200000
912 
913 /* Description		RX_ATTENTION_1_RESERVED_1B
914 
915 			<legal 0>
916 */
917 #define RX_ATTENTION_1_RESERVED_1B_OFFSET                            0x00000004
918 #define RX_ATTENTION_1_RESERVED_1B_LSB                               22
919 #define RX_ATTENTION_1_RESERVED_1B_MASK                              0x00400000
920 
921 /* Description		RX_ATTENTION_1_RX_IN_TX_DECRYPT_BYP
922 
923 			Indicates that RX packet is not decrypted as Crypto is
924 			busy with TX packet processing.
925 */
926 #define RX_ATTENTION_1_RX_IN_TX_DECRYPT_BYP_OFFSET                   0x00000004
927 #define RX_ATTENTION_1_RX_IN_TX_DECRYPT_BYP_LSB                      23
928 #define RX_ATTENTION_1_RX_IN_TX_DECRYPT_BYP_MASK                     0x00800000
929 
930 /* Description		RX_ATTENTION_1_ENCRYPT_REQUIRED
931 
932 			Indicates that this data type frame is not encrypted
933 			even if the policy for this MPDU requires encryption as
934 			indicated in the peer entry key type.
935 */
936 #define RX_ATTENTION_1_ENCRYPT_REQUIRED_OFFSET                       0x00000004
937 #define RX_ATTENTION_1_ENCRYPT_REQUIRED_LSB                          24
938 #define RX_ATTENTION_1_ENCRYPT_REQUIRED_MASK                         0x01000000
939 
940 /* Description		RX_ATTENTION_1_DIRECTED
941 
942 			MPDU is a directed packet which means that the RA
943 			matched our STA addresses.  In proxySTA it means that the TA
944 			matched an entry in our address search table with the
945 			corresponding no_ack bit is the address search entry
946 			cleared.
947 */
948 #define RX_ATTENTION_1_DIRECTED_OFFSET                               0x00000004
949 #define RX_ATTENTION_1_DIRECTED_LSB                                  25
950 #define RX_ATTENTION_1_DIRECTED_MASK                                 0x02000000
951 
952 /* Description		RX_ATTENTION_1_BUFFER_FRAGMENT
953 
954 			Indicates that at least one of the rx buffers has been
955 			fragmented.  If set the FW should look at the rx_frag_info
956 			descriptor described below.
957 */
958 #define RX_ATTENTION_1_BUFFER_FRAGMENT_OFFSET                        0x00000004
959 #define RX_ATTENTION_1_BUFFER_FRAGMENT_LSB                           26
960 #define RX_ATTENTION_1_BUFFER_FRAGMENT_MASK                          0x04000000
961 
962 /* Description		RX_ATTENTION_1_MPDU_LENGTH_ERR
963 
964 			Indicates that the MPDU was pre-maturely terminated
965 			resulting in a truncated MPDU.  Don't trust the MPDU length
966 			field.
967 */
968 #define RX_ATTENTION_1_MPDU_LENGTH_ERR_OFFSET                        0x00000004
969 #define RX_ATTENTION_1_MPDU_LENGTH_ERR_LSB                           27
970 #define RX_ATTENTION_1_MPDU_LENGTH_ERR_MASK                          0x08000000
971 
972 /* Description		RX_ATTENTION_1_TKIP_MIC_ERR
973 
974 			Indicates that the MPDU Michael integrity check failed
975 */
976 #define RX_ATTENTION_1_TKIP_MIC_ERR_OFFSET                           0x00000004
977 #define RX_ATTENTION_1_TKIP_MIC_ERR_LSB                              28
978 #define RX_ATTENTION_1_TKIP_MIC_ERR_MASK                             0x10000000
979 
980 /* Description		RX_ATTENTION_1_DECRYPT_ERR
981 
982 			Indicates that the MPDU decrypt integrity check failed
983 			or CRYPTO received an encrypted frame, but did not get a
984 			valid corresponding key id in the peer entry.
985 */
986 #define RX_ATTENTION_1_DECRYPT_ERR_OFFSET                            0x00000004
987 #define RX_ATTENTION_1_DECRYPT_ERR_LSB                               29
988 #define RX_ATTENTION_1_DECRYPT_ERR_MASK                              0x20000000
989 
990 /* Description		RX_ATTENTION_1_UNENCRYPTED_FRAME_ERR
991 
992 			Copied here by RX OLE from the RX_MPDU_END TLV
993 */
994 #define RX_ATTENTION_1_UNENCRYPTED_FRAME_ERR_OFFSET                  0x00000004
995 #define RX_ATTENTION_1_UNENCRYPTED_FRAME_ERR_LSB                     30
996 #define RX_ATTENTION_1_UNENCRYPTED_FRAME_ERR_MASK                    0x40000000
997 
998 /* Description		RX_ATTENTION_1_FCS_ERR
999 
1000 			Indicates that the MPDU FCS check failed
1001 */
1002 #define RX_ATTENTION_1_FCS_ERR_OFFSET                                0x00000004
1003 #define RX_ATTENTION_1_FCS_ERR_LSB                                   31
1004 #define RX_ATTENTION_1_FCS_ERR_MASK                                  0x80000000
1005 
1006 /* Description		RX_ATTENTION_2_FLOW_IDX_TIMEOUT
1007 
1008 			Indicates an unsuccessful flow search due to the
1009 			expiring of the search timer.
1010 
1011 			<legal all>
1012 */
1013 #define RX_ATTENTION_2_FLOW_IDX_TIMEOUT_OFFSET                       0x00000008
1014 #define RX_ATTENTION_2_FLOW_IDX_TIMEOUT_LSB                          0
1015 #define RX_ATTENTION_2_FLOW_IDX_TIMEOUT_MASK                         0x00000001
1016 
1017 /* Description		RX_ATTENTION_2_FLOW_IDX_INVALID
1018 
1019 			flow id is not valid
1020 
1021 			<legal all>
1022 */
1023 #define RX_ATTENTION_2_FLOW_IDX_INVALID_OFFSET                       0x00000008
1024 #define RX_ATTENTION_2_FLOW_IDX_INVALID_LSB                          1
1025 #define RX_ATTENTION_2_FLOW_IDX_INVALID_MASK                         0x00000002
1026 
1027 /* Description		RX_ATTENTION_2_WIFI_PARSER_ERROR
1028 
1029 			Indicates that the WiFi frame has one of the following
1030 			errors
1031 
1032 			o has less than minimum allowed bytes as per standard
1033 
1034 			o has incomplete VLAN LLC/SNAP (only for non A-MSDUs)
1035 
1036 			<legal all>
1037 */
1038 #define RX_ATTENTION_2_WIFI_PARSER_ERROR_OFFSET                      0x00000008
1039 #define RX_ATTENTION_2_WIFI_PARSER_ERROR_LSB                         2
1040 #define RX_ATTENTION_2_WIFI_PARSER_ERROR_MASK                        0x00000004
1041 
1042 /* Description		RX_ATTENTION_2_AMSDU_PARSER_ERROR
1043 
1044 			A-MSDU could not be properly de-agregated.
1045 
1046 			<legal all>
1047 */
1048 #define RX_ATTENTION_2_AMSDU_PARSER_ERROR_OFFSET                     0x00000008
1049 #define RX_ATTENTION_2_AMSDU_PARSER_ERROR_LSB                        3
1050 #define RX_ATTENTION_2_AMSDU_PARSER_ERROR_MASK                       0x00000008
1051 
1052 /* Description		RX_ATTENTION_2_SA_IDX_TIMEOUT
1053 
1054 			Indicates an unsuccessful MAC source address search due
1055 			to the expiring of the search timer.
1056 */
1057 #define RX_ATTENTION_2_SA_IDX_TIMEOUT_OFFSET                         0x00000008
1058 #define RX_ATTENTION_2_SA_IDX_TIMEOUT_LSB                            4
1059 #define RX_ATTENTION_2_SA_IDX_TIMEOUT_MASK                           0x00000010
1060 
1061 /* Description		RX_ATTENTION_2_DA_IDX_TIMEOUT
1062 
1063 			Indicates an unsuccessful MAC destination address search
1064 			due to the expiring of the search timer.
1065 */
1066 #define RX_ATTENTION_2_DA_IDX_TIMEOUT_OFFSET                         0x00000008
1067 #define RX_ATTENTION_2_DA_IDX_TIMEOUT_LSB                            5
1068 #define RX_ATTENTION_2_DA_IDX_TIMEOUT_MASK                           0x00000020
1069 
1070 /* Description		RX_ATTENTION_2_MSDU_LIMIT_ERROR
1071 
1072 			Indicates that the MSDU threshold was exceeded and thus
1073 			all the rest of the MSDUs will not be scattered and will not
1074 			be decasulated but will be DMA'ed in RAW format as a single
1075 			MSDU buffer
1076 */
1077 #define RX_ATTENTION_2_MSDU_LIMIT_ERROR_OFFSET                       0x00000008
1078 #define RX_ATTENTION_2_MSDU_LIMIT_ERROR_LSB                          6
1079 #define RX_ATTENTION_2_MSDU_LIMIT_ERROR_MASK                         0x00000040
1080 
1081 /* Description		RX_ATTENTION_2_DA_IS_VALID
1082 
1083 			Indicates that OLE found a valid DA entry
1084 */
1085 #define RX_ATTENTION_2_DA_IS_VALID_OFFSET                            0x00000008
1086 #define RX_ATTENTION_2_DA_IS_VALID_LSB                               7
1087 #define RX_ATTENTION_2_DA_IS_VALID_MASK                              0x00000080
1088 
1089 /* Description		RX_ATTENTION_2_DA_IS_MCBC
1090 
1091 			Field Only valid if da_is_valid is set
1092 
1093 
1094 
1095 			Indicates the DA address was a Multicast of Broadcast
1096 			address.
1097 */
1098 #define RX_ATTENTION_2_DA_IS_MCBC_OFFSET                             0x00000008
1099 #define RX_ATTENTION_2_DA_IS_MCBC_LSB                                8
1100 #define RX_ATTENTION_2_DA_IS_MCBC_MASK                               0x00000100
1101 
1102 /* Description		RX_ATTENTION_2_SA_IS_VALID
1103 
1104 			Indicates that OLE found a valid SA entry
1105 */
1106 #define RX_ATTENTION_2_SA_IS_VALID_OFFSET                            0x00000008
1107 #define RX_ATTENTION_2_SA_IS_VALID_LSB                               9
1108 #define RX_ATTENTION_2_SA_IS_VALID_MASK                              0x00000200
1109 
1110 /* Description		RX_ATTENTION_2_DECRYPT_STATUS_CODE
1111 
1112 			Field provides insight into the decryption performed
1113 
1114 
1115 
1116 			<enum 0 decrypt_ok> Frame had protection enabled and
1117 			decrypted properly
1118 
1119 			<enum 1 decrypt_unprotected_frame > Frame is unprotected
1120 			and hence bypassed
1121 
1122 			<enum 2 decrypt_data_err > Frame has protection enabled
1123 			and could not be properly decrypted due to MIC/ICV mismatch
1124 			etc.
1125 
1126 			<enum 3 decrypt_key_invalid > Frame has protection
1127 			enabled but the key that was required to decrypt this frame
1128 			was not valid
1129 
1130 			<enum 4 decrypt_peer_entry_invalid > Frame has
1131 			protection enabled but the key that was required to decrypt
1132 			this frame was not valid
1133 
1134 			<enum 5 decrypt_other > Reserved for other indications
1135 
1136 
1137 
1138 			<legal 0 - 5>
1139 */
1140 #define RX_ATTENTION_2_DECRYPT_STATUS_CODE_OFFSET                    0x00000008
1141 #define RX_ATTENTION_2_DECRYPT_STATUS_CODE_LSB                       10
1142 #define RX_ATTENTION_2_DECRYPT_STATUS_CODE_MASK                      0x00001c00
1143 
1144 /* Description		RX_ATTENTION_2_RX_BITMAP_NOT_UPDATED
1145 
1146 			Frame is received, but RXPCU could not update the
1147 			receive bitmap due to (temporary) fifo contraints.
1148 
1149 			<legal all>
1150 */
1151 #define RX_ATTENTION_2_RX_BITMAP_NOT_UPDATED_OFFSET                  0x00000008
1152 #define RX_ATTENTION_2_RX_BITMAP_NOT_UPDATED_LSB                     13
1153 #define RX_ATTENTION_2_RX_BITMAP_NOT_UPDATED_MASK                    0x00002000
1154 
1155 /* Description		RX_ATTENTION_2_RESERVED_2
1156 
1157 			<legal 0>
1158 */
1159 #define RX_ATTENTION_2_RESERVED_2_OFFSET                             0x00000008
1160 #define RX_ATTENTION_2_RESERVED_2_LSB                                14
1161 #define RX_ATTENTION_2_RESERVED_2_MASK                               0x7fffc000
1162 
1163 /* Description		RX_ATTENTION_2_MSDU_DONE
1164 
1165 			If set indicates that the RX packet data, RX header
1166 			data, RX PPDU start descriptor, RX MPDU start/end
1167 			descriptor, RX MSDU start/end descriptors and RX Attention
1168 			descriptor are all valid.  This bit must be in the last
1169 			octet of the descriptor.
1170 */
1171 #define RX_ATTENTION_2_MSDU_DONE_OFFSET                              0x00000008
1172 #define RX_ATTENTION_2_MSDU_DONE_LSB                                 31
1173 #define RX_ATTENTION_2_MSDU_DONE_MASK                                0x80000000
1174 
1175 
1176 #endif // _RX_ATTENTION_H_
1177