1 /* 2 * Copyright (c) 2019, The Linux Foundation. All rights reserved. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for any 5 * purpose with or without fee is hereby granted, provided that the above 6 * copyright notice and this permission notice appear in all copies. 7 * 8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15 */ 16 17 #ifndef _TX_MSDU_EXTENSION_H_ 18 #define _TX_MSDU_EXTENSION_H_ 19 #if !defined(__ASSEMBLER__) 20 #endif 21 22 23 // ################ START SUMMARY ################# 24 // 25 // Dword Fields 26 // 0 tso_enable[0], reserved_0a[6:1], tcp_flag[15:7], tcp_flag_mask[24:16], reserved_0b[31:25] 27 // 1 l2_length[15:0], ip_length[31:16] 28 // 2 tcp_seq_number[31:0] 29 // 3 ip_identification[15:0], udp_length[31:16] 30 // 4 checksum_offset[13:0], partial_checksum_en[14], reserved_4a[15], payload_start_offset[29:16], reserved_4b[31:30] 31 // 5 payload_end_offset[13:0], reserved_5a[15:14], wds[16], reserved_5b[31:17] 32 // 6 buf0_ptr_31_0[31:0] 33 // 7 buf0_ptr_39_32[7:0], reserved_7a[15:8], buf0_len[31:16] 34 // 8 buf1_ptr_31_0[31:0] 35 // 9 buf1_ptr_39_32[7:0], reserved_9a[15:8], buf1_len[31:16] 36 // 10 buf2_ptr_31_0[31:0] 37 // 11 buf2_ptr_39_32[7:0], reserved_11a[15:8], buf2_len[31:16] 38 // 12 buf3_ptr_31_0[31:0] 39 // 13 buf3_ptr_39_32[7:0], reserved_13a[15:8], buf3_len[31:16] 40 // 14 buf4_ptr_31_0[31:0] 41 // 15 buf4_ptr_39_32[7:0], reserved_15a[15:8], buf4_len[31:16] 42 // 16 buf5_ptr_31_0[31:0] 43 // 17 buf5_ptr_39_32[7:0], reserved_17a[15:8], buf5_len[31:16] 44 // 45 // ################ END SUMMARY ################# 46 47 #define NUM_OF_DWORDS_TX_MSDU_EXTENSION 18 48 49 struct tx_msdu_extension { 50 uint32_t tso_enable : 1, //[0] 51 reserved_0a : 6, //[6:1] 52 tcp_flag : 9, //[15:7] 53 tcp_flag_mask : 9, //[24:16] 54 reserved_0b : 7; //[31:25] 55 uint32_t l2_length : 16, //[15:0] 56 ip_length : 16; //[31:16] 57 uint32_t tcp_seq_number : 32; //[31:0] 58 uint32_t ip_identification : 16, //[15:0] 59 udp_length : 16; //[31:16] 60 uint32_t checksum_offset : 14, //[13:0] 61 partial_checksum_en : 1, //[14] 62 reserved_4a : 1, //[15] 63 payload_start_offset : 14, //[29:16] 64 reserved_4b : 2; //[31:30] 65 uint32_t payload_end_offset : 14, //[13:0] 66 reserved_5a : 2, //[15:14] 67 wds : 1, //[16] 68 reserved_5b : 15; //[31:17] 69 uint32_t buf0_ptr_31_0 : 32; //[31:0] 70 uint32_t buf0_ptr_39_32 : 8, //[7:0] 71 reserved_7a : 8, //[15:8] 72 buf0_len : 16; //[31:16] 73 uint32_t buf1_ptr_31_0 : 32; //[31:0] 74 uint32_t buf1_ptr_39_32 : 8, //[7:0] 75 reserved_9a : 8, //[15:8] 76 buf1_len : 16; //[31:16] 77 uint32_t buf2_ptr_31_0 : 32; //[31:0] 78 uint32_t buf2_ptr_39_32 : 8, //[7:0] 79 reserved_11a : 8, //[15:8] 80 buf2_len : 16; //[31:16] 81 uint32_t buf3_ptr_31_0 : 32; //[31:0] 82 uint32_t buf3_ptr_39_32 : 8, //[7:0] 83 reserved_13a : 8, //[15:8] 84 buf3_len : 16; //[31:16] 85 uint32_t buf4_ptr_31_0 : 32; //[31:0] 86 uint32_t buf4_ptr_39_32 : 8, //[7:0] 87 reserved_15a : 8, //[15:8] 88 buf4_len : 16; //[31:16] 89 uint32_t buf5_ptr_31_0 : 32; //[31:0] 90 uint32_t buf5_ptr_39_32 : 8, //[7:0] 91 reserved_17a : 8, //[15:8] 92 buf5_len : 16; //[31:16] 93 }; 94 95 /* 96 97 tso_enable 98 99 Enable transmit segmentation offload <legal all> 100 101 reserved_0a 102 103 FW will set to 0, MAC will ignore. <legal 0> 104 105 tcp_flag 106 107 TCP flags 108 109 {NS,CWR,ECE,URG,ACK,PSH, RST ,SYN,FIN}<legal all> 110 111 tcp_flag_mask 112 113 TCP flag mask. Tcp_flag is inserted into the header 114 based on the mask, if tso is enabled 115 116 reserved_0b 117 118 FW will set to 0, MAC will ignore. <legal 0> 119 120 l2_length 121 122 L2 length for the msdu, if tso is enabled <legal all> 123 124 ip_length 125 126 Ip length for the msdu, if tso is enabled <legal all> 127 128 tcp_seq_number 129 130 Tcp_seq_number for the msdu, if tso is enabled <legal 131 all> 132 133 ip_identification 134 135 Ip_identification for the msdu, if tso is enabled <legal 136 all> 137 138 udp_length 139 140 TXDMA is copies this field into MSDU START TLV 141 142 checksum_offset 143 144 The calculated checksum from start offset to end offset 145 will be added to the checksum at the offset given by this 146 field<legal all> 147 148 partial_checksum_en 149 150 Partial Checksum Enable Bit. 151 152 <legal 0-1> 153 154 reserved_4a 155 156 <Legal 0> 157 158 payload_start_offset 159 160 L4 checksum calculations will start fromt this offset 161 162 <Legal all> 163 164 reserved_4b 165 166 <Legal 0> 167 168 payload_end_offset 169 170 L4 checksum calculations will end at this offset. 171 172 <Legal all> 173 174 reserved_5a 175 176 <Legal 0> 177 178 wds 179 180 If set the current packet is 4-address frame. Required 181 because an aggregate can include some frames with 3 address 182 format and other frames with 4 address format. Used by the 183 OLE during encapsulation. 184 185 Note: there is also global wds tx control in the 186 TX_PEER_ENTRY 187 188 <legal all> 189 190 reserved_5b 191 192 <Legal 0> 193 194 buf0_ptr_31_0 195 196 Lower 32 bits of the first buffer pointer 197 198 199 200 NOTE: SW/FW manages the 'cookie' info related to this 201 buffer together with the 'cookie' info for this 202 MSDU_EXTENSION descriptor 203 204 <legal all> 205 206 buf0_ptr_39_32 207 208 Upper 8 bits of the first buffer pointer <legal all> 209 210 reserved_7a 211 212 <Legal 0> 213 214 buf0_len 215 216 Length of the first buffer <legal all> 217 218 buf1_ptr_31_0 219 220 Lower 32 bits of the second buffer pointer 221 222 223 224 NOTE: SW/FW manages the 'cookie' info related to this 225 buffer together with the 'cookie' info for this 226 MSDU_EXTENSION descriptor 227 228 <legal all> 229 230 buf1_ptr_39_32 231 232 Upper 8 bits of the second buffer pointer <legal all> 233 234 reserved_9a 235 236 <Legal 0> 237 238 buf1_len 239 240 Length of the second buffer <legal all> 241 242 buf2_ptr_31_0 243 244 Lower 32 bits of the third buffer pointer 245 246 NOTE: SW/FW manages the 'cookie' info related to this 247 buffer together with the 'cookie' info for this 248 MSDU_EXTENSION descriptor 249 250 <legal all> 251 252 buf2_ptr_39_32 253 254 Upper 8 bits of the third buffer pointer <legal all> 255 256 reserved_11a 257 258 <Legal 0> 259 260 buf2_len 261 262 Length of the third buffer <legal all> 263 264 buf3_ptr_31_0 265 266 Lower 32 bits of the fourth buffer pointer 267 268 269 270 NOTE: SW/FW manages the 'cookie' info related to this 271 buffer together with the 'cookie' info for this 272 MSDU_EXTENSION descriptor 273 274 <legal all> 275 276 buf3_ptr_39_32 277 278 Upper 8 bits of the fourth buffer pointer <legal all> 279 280 reserved_13a 281 282 <Legal 0> 283 284 buf3_len 285 286 Length of the fourth buffer <legal all> 287 288 buf4_ptr_31_0 289 290 Lower 32 bits of the fifth buffer pointer 291 292 293 294 NOTE: SW/FW manages the 'cookie' info related to this 295 buffer together with the 'cookie' info for this 296 MSDU_EXTENSION descriptor 297 298 <legal all> 299 300 buf4_ptr_39_32 301 302 Upper 8 bits of the fifth buffer pointer <legal all> 303 304 reserved_15a 305 306 <Legal 0> 307 308 buf4_len 309 310 Length of the fifth buffer <legal all> 311 312 buf5_ptr_31_0 313 314 Lower 32 bits of the sixth buffer pointer 315 316 317 318 NOTE: SW/FW manages the 'cookie' info related to this 319 buffer together with the 'cookie' info for this 320 MSDU_EXTENSION descriptor 321 322 <legal all> 323 324 buf5_ptr_39_32 325 326 Upper 8 bits of the sixth buffer pointer <legal all> 327 328 reserved_17a 329 330 <Legal 0> 331 332 buf5_len 333 334 Length of the sixth buffer <legal all> 335 */ 336 337 338 /* Description TX_MSDU_EXTENSION_0_TSO_ENABLE 339 340 Enable transmit segmentation offload <legal all> 341 */ 342 #define TX_MSDU_EXTENSION_0_TSO_ENABLE_OFFSET 0x00000000 343 #define TX_MSDU_EXTENSION_0_TSO_ENABLE_LSB 0 344 #define TX_MSDU_EXTENSION_0_TSO_ENABLE_MASK 0x00000001 345 346 /* Description TX_MSDU_EXTENSION_0_RESERVED_0A 347 348 FW will set to 0, MAC will ignore. <legal 0> 349 */ 350 #define TX_MSDU_EXTENSION_0_RESERVED_0A_OFFSET 0x00000000 351 #define TX_MSDU_EXTENSION_0_RESERVED_0A_LSB 1 352 #define TX_MSDU_EXTENSION_0_RESERVED_0A_MASK 0x0000007e 353 354 /* Description TX_MSDU_EXTENSION_0_TCP_FLAG 355 356 TCP flags 357 358 {NS,CWR,ECE,URG,ACK,PSH, RST ,SYN,FIN}<legal all> 359 */ 360 #define TX_MSDU_EXTENSION_0_TCP_FLAG_OFFSET 0x00000000 361 #define TX_MSDU_EXTENSION_0_TCP_FLAG_LSB 7 362 #define TX_MSDU_EXTENSION_0_TCP_FLAG_MASK 0x0000ff80 363 364 /* Description TX_MSDU_EXTENSION_0_TCP_FLAG_MASK 365 366 TCP flag mask. Tcp_flag is inserted into the header 367 based on the mask, if tso is enabled 368 */ 369 #define TX_MSDU_EXTENSION_0_TCP_FLAG_MASK_OFFSET 0x00000000 370 #define TX_MSDU_EXTENSION_0_TCP_FLAG_MASK_LSB 16 371 #define TX_MSDU_EXTENSION_0_TCP_FLAG_MASK_MASK 0x01ff0000 372 373 /* Description TX_MSDU_EXTENSION_0_RESERVED_0B 374 375 FW will set to 0, MAC will ignore. <legal 0> 376 */ 377 #define TX_MSDU_EXTENSION_0_RESERVED_0B_OFFSET 0x00000000 378 #define TX_MSDU_EXTENSION_0_RESERVED_0B_LSB 25 379 #define TX_MSDU_EXTENSION_0_RESERVED_0B_MASK 0xfe000000 380 381 /* Description TX_MSDU_EXTENSION_1_L2_LENGTH 382 383 L2 length for the msdu, if tso is enabled <legal all> 384 */ 385 #define TX_MSDU_EXTENSION_1_L2_LENGTH_OFFSET 0x00000004 386 #define TX_MSDU_EXTENSION_1_L2_LENGTH_LSB 0 387 #define TX_MSDU_EXTENSION_1_L2_LENGTH_MASK 0x0000ffff 388 389 /* Description TX_MSDU_EXTENSION_1_IP_LENGTH 390 391 Ip length for the msdu, if tso is enabled <legal all> 392 */ 393 #define TX_MSDU_EXTENSION_1_IP_LENGTH_OFFSET 0x00000004 394 #define TX_MSDU_EXTENSION_1_IP_LENGTH_LSB 16 395 #define TX_MSDU_EXTENSION_1_IP_LENGTH_MASK 0xffff0000 396 397 /* Description TX_MSDU_EXTENSION_2_TCP_SEQ_NUMBER 398 399 Tcp_seq_number for the msdu, if tso is enabled <legal 400 all> 401 */ 402 #define TX_MSDU_EXTENSION_2_TCP_SEQ_NUMBER_OFFSET 0x00000008 403 #define TX_MSDU_EXTENSION_2_TCP_SEQ_NUMBER_LSB 0 404 #define TX_MSDU_EXTENSION_2_TCP_SEQ_NUMBER_MASK 0xffffffff 405 406 /* Description TX_MSDU_EXTENSION_3_IP_IDENTIFICATION 407 408 Ip_identification for the msdu, if tso is enabled <legal 409 all> 410 */ 411 #define TX_MSDU_EXTENSION_3_IP_IDENTIFICATION_OFFSET 0x0000000c 412 #define TX_MSDU_EXTENSION_3_IP_IDENTIFICATION_LSB 0 413 #define TX_MSDU_EXTENSION_3_IP_IDENTIFICATION_MASK 0x0000ffff 414 415 /* Description TX_MSDU_EXTENSION_3_UDP_LENGTH 416 417 TXDMA is copies this field into MSDU START TLV 418 */ 419 #define TX_MSDU_EXTENSION_3_UDP_LENGTH_OFFSET 0x0000000c 420 #define TX_MSDU_EXTENSION_3_UDP_LENGTH_LSB 16 421 #define TX_MSDU_EXTENSION_3_UDP_LENGTH_MASK 0xffff0000 422 423 /* Description TX_MSDU_EXTENSION_4_CHECKSUM_OFFSET 424 425 The calculated checksum from start offset to end offset 426 will be added to the checksum at the offset given by this 427 field<legal all> 428 */ 429 #define TX_MSDU_EXTENSION_4_CHECKSUM_OFFSET_OFFSET 0x00000010 430 #define TX_MSDU_EXTENSION_4_CHECKSUM_OFFSET_LSB 0 431 #define TX_MSDU_EXTENSION_4_CHECKSUM_OFFSET_MASK 0x00003fff 432 433 /* Description TX_MSDU_EXTENSION_4_PARTIAL_CHECKSUM_EN 434 435 Partial Checksum Enable Bit. 436 437 <legal 0-1> 438 */ 439 #define TX_MSDU_EXTENSION_4_PARTIAL_CHECKSUM_EN_OFFSET 0x00000010 440 #define TX_MSDU_EXTENSION_4_PARTIAL_CHECKSUM_EN_LSB 14 441 #define TX_MSDU_EXTENSION_4_PARTIAL_CHECKSUM_EN_MASK 0x00004000 442 443 /* Description TX_MSDU_EXTENSION_4_RESERVED_4A 444 445 <Legal 0> 446 */ 447 #define TX_MSDU_EXTENSION_4_RESERVED_4A_OFFSET 0x00000010 448 #define TX_MSDU_EXTENSION_4_RESERVED_4A_LSB 15 449 #define TX_MSDU_EXTENSION_4_RESERVED_4A_MASK 0x00008000 450 451 /* Description TX_MSDU_EXTENSION_4_PAYLOAD_START_OFFSET 452 453 L4 checksum calculations will start fromt this offset 454 455 <Legal all> 456 */ 457 #define TX_MSDU_EXTENSION_4_PAYLOAD_START_OFFSET_OFFSET 0x00000010 458 #define TX_MSDU_EXTENSION_4_PAYLOAD_START_OFFSET_LSB 16 459 #define TX_MSDU_EXTENSION_4_PAYLOAD_START_OFFSET_MASK 0x3fff0000 460 461 /* Description TX_MSDU_EXTENSION_4_RESERVED_4B 462 463 <Legal 0> 464 */ 465 #define TX_MSDU_EXTENSION_4_RESERVED_4B_OFFSET 0x00000010 466 #define TX_MSDU_EXTENSION_4_RESERVED_4B_LSB 30 467 #define TX_MSDU_EXTENSION_4_RESERVED_4B_MASK 0xc0000000 468 469 /* Description TX_MSDU_EXTENSION_5_PAYLOAD_END_OFFSET 470 471 L4 checksum calculations will end at this offset. 472 473 <Legal all> 474 */ 475 #define TX_MSDU_EXTENSION_5_PAYLOAD_END_OFFSET_OFFSET 0x00000014 476 #define TX_MSDU_EXTENSION_5_PAYLOAD_END_OFFSET_LSB 0 477 #define TX_MSDU_EXTENSION_5_PAYLOAD_END_OFFSET_MASK 0x00003fff 478 479 /* Description TX_MSDU_EXTENSION_5_RESERVED_5A 480 481 <Legal 0> 482 */ 483 #define TX_MSDU_EXTENSION_5_RESERVED_5A_OFFSET 0x00000014 484 #define TX_MSDU_EXTENSION_5_RESERVED_5A_LSB 14 485 #define TX_MSDU_EXTENSION_5_RESERVED_5A_MASK 0x0000c000 486 487 /* Description TX_MSDU_EXTENSION_5_WDS 488 489 If set the current packet is 4-address frame. Required 490 because an aggregate can include some frames with 3 address 491 format and other frames with 4 address format. Used by the 492 OLE during encapsulation. 493 494 Note: there is also global wds tx control in the 495 TX_PEER_ENTRY 496 497 <legal all> 498 */ 499 #define TX_MSDU_EXTENSION_5_WDS_OFFSET 0x00000014 500 #define TX_MSDU_EXTENSION_5_WDS_LSB 16 501 #define TX_MSDU_EXTENSION_5_WDS_MASK 0x00010000 502 503 /* Description TX_MSDU_EXTENSION_5_RESERVED_5B 504 505 <Legal 0> 506 */ 507 #define TX_MSDU_EXTENSION_5_RESERVED_5B_OFFSET 0x00000014 508 #define TX_MSDU_EXTENSION_5_RESERVED_5B_LSB 17 509 #define TX_MSDU_EXTENSION_5_RESERVED_5B_MASK 0xfffe0000 510 511 /* Description TX_MSDU_EXTENSION_6_BUF0_PTR_31_0 512 513 Lower 32 bits of the first buffer pointer 514 515 516 517 NOTE: SW/FW manages the 'cookie' info related to this 518 buffer together with the 'cookie' info for this 519 MSDU_EXTENSION descriptor 520 521 <legal all> 522 */ 523 #define TX_MSDU_EXTENSION_6_BUF0_PTR_31_0_OFFSET 0x00000018 524 #define TX_MSDU_EXTENSION_6_BUF0_PTR_31_0_LSB 0 525 #define TX_MSDU_EXTENSION_6_BUF0_PTR_31_0_MASK 0xffffffff 526 527 /* Description TX_MSDU_EXTENSION_7_BUF0_PTR_39_32 528 529 Upper 8 bits of the first buffer pointer <legal all> 530 */ 531 #define TX_MSDU_EXTENSION_7_BUF0_PTR_39_32_OFFSET 0x0000001c 532 #define TX_MSDU_EXTENSION_7_BUF0_PTR_39_32_LSB 0 533 #define TX_MSDU_EXTENSION_7_BUF0_PTR_39_32_MASK 0x000000ff 534 535 /* Description TX_MSDU_EXTENSION_7_RESERVED_7A 536 537 <Legal 0> 538 */ 539 #define TX_MSDU_EXTENSION_7_RESERVED_7A_OFFSET 0x0000001c 540 #define TX_MSDU_EXTENSION_7_RESERVED_7A_LSB 8 541 #define TX_MSDU_EXTENSION_7_RESERVED_7A_MASK 0x0000ff00 542 543 /* Description TX_MSDU_EXTENSION_7_BUF0_LEN 544 545 Length of the first buffer <legal all> 546 */ 547 #define TX_MSDU_EXTENSION_7_BUF0_LEN_OFFSET 0x0000001c 548 #define TX_MSDU_EXTENSION_7_BUF0_LEN_LSB 16 549 #define TX_MSDU_EXTENSION_7_BUF0_LEN_MASK 0xffff0000 550 551 /* Description TX_MSDU_EXTENSION_8_BUF1_PTR_31_0 552 553 Lower 32 bits of the second buffer pointer 554 555 556 557 NOTE: SW/FW manages the 'cookie' info related to this 558 buffer together with the 'cookie' info for this 559 MSDU_EXTENSION descriptor 560 561 <legal all> 562 */ 563 #define TX_MSDU_EXTENSION_8_BUF1_PTR_31_0_OFFSET 0x00000020 564 #define TX_MSDU_EXTENSION_8_BUF1_PTR_31_0_LSB 0 565 #define TX_MSDU_EXTENSION_8_BUF1_PTR_31_0_MASK 0xffffffff 566 567 /* Description TX_MSDU_EXTENSION_9_BUF1_PTR_39_32 568 569 Upper 8 bits of the second buffer pointer <legal all> 570 */ 571 #define TX_MSDU_EXTENSION_9_BUF1_PTR_39_32_OFFSET 0x00000024 572 #define TX_MSDU_EXTENSION_9_BUF1_PTR_39_32_LSB 0 573 #define TX_MSDU_EXTENSION_9_BUF1_PTR_39_32_MASK 0x000000ff 574 575 /* Description TX_MSDU_EXTENSION_9_RESERVED_9A 576 577 <Legal 0> 578 */ 579 #define TX_MSDU_EXTENSION_9_RESERVED_9A_OFFSET 0x00000024 580 #define TX_MSDU_EXTENSION_9_RESERVED_9A_LSB 8 581 #define TX_MSDU_EXTENSION_9_RESERVED_9A_MASK 0x0000ff00 582 583 /* Description TX_MSDU_EXTENSION_9_BUF1_LEN 584 585 Length of the second buffer <legal all> 586 */ 587 #define TX_MSDU_EXTENSION_9_BUF1_LEN_OFFSET 0x00000024 588 #define TX_MSDU_EXTENSION_9_BUF1_LEN_LSB 16 589 #define TX_MSDU_EXTENSION_9_BUF1_LEN_MASK 0xffff0000 590 591 /* Description TX_MSDU_EXTENSION_10_BUF2_PTR_31_0 592 593 Lower 32 bits of the third buffer pointer 594 595 NOTE: SW/FW manages the 'cookie' info related to this 596 buffer together with the 'cookie' info for this 597 MSDU_EXTENSION descriptor 598 599 <legal all> 600 */ 601 #define TX_MSDU_EXTENSION_10_BUF2_PTR_31_0_OFFSET 0x00000028 602 #define TX_MSDU_EXTENSION_10_BUF2_PTR_31_0_LSB 0 603 #define TX_MSDU_EXTENSION_10_BUF2_PTR_31_0_MASK 0xffffffff 604 605 /* Description TX_MSDU_EXTENSION_11_BUF2_PTR_39_32 606 607 Upper 8 bits of the third buffer pointer <legal all> 608 */ 609 #define TX_MSDU_EXTENSION_11_BUF2_PTR_39_32_OFFSET 0x0000002c 610 #define TX_MSDU_EXTENSION_11_BUF2_PTR_39_32_LSB 0 611 #define TX_MSDU_EXTENSION_11_BUF2_PTR_39_32_MASK 0x000000ff 612 613 /* Description TX_MSDU_EXTENSION_11_RESERVED_11A 614 615 <Legal 0> 616 */ 617 #define TX_MSDU_EXTENSION_11_RESERVED_11A_OFFSET 0x0000002c 618 #define TX_MSDU_EXTENSION_11_RESERVED_11A_LSB 8 619 #define TX_MSDU_EXTENSION_11_RESERVED_11A_MASK 0x0000ff00 620 621 /* Description TX_MSDU_EXTENSION_11_BUF2_LEN 622 623 Length of the third buffer <legal all> 624 */ 625 #define TX_MSDU_EXTENSION_11_BUF2_LEN_OFFSET 0x0000002c 626 #define TX_MSDU_EXTENSION_11_BUF2_LEN_LSB 16 627 #define TX_MSDU_EXTENSION_11_BUF2_LEN_MASK 0xffff0000 628 629 /* Description TX_MSDU_EXTENSION_12_BUF3_PTR_31_0 630 631 Lower 32 bits of the fourth buffer pointer 632 633 634 635 NOTE: SW/FW manages the 'cookie' info related to this 636 buffer together with the 'cookie' info for this 637 MSDU_EXTENSION descriptor 638 639 <legal all> 640 */ 641 #define TX_MSDU_EXTENSION_12_BUF3_PTR_31_0_OFFSET 0x00000030 642 #define TX_MSDU_EXTENSION_12_BUF3_PTR_31_0_LSB 0 643 #define TX_MSDU_EXTENSION_12_BUF3_PTR_31_0_MASK 0xffffffff 644 645 /* Description TX_MSDU_EXTENSION_13_BUF3_PTR_39_32 646 647 Upper 8 bits of the fourth buffer pointer <legal all> 648 */ 649 #define TX_MSDU_EXTENSION_13_BUF3_PTR_39_32_OFFSET 0x00000034 650 #define TX_MSDU_EXTENSION_13_BUF3_PTR_39_32_LSB 0 651 #define TX_MSDU_EXTENSION_13_BUF3_PTR_39_32_MASK 0x000000ff 652 653 /* Description TX_MSDU_EXTENSION_13_RESERVED_13A 654 655 <Legal 0> 656 */ 657 #define TX_MSDU_EXTENSION_13_RESERVED_13A_OFFSET 0x00000034 658 #define TX_MSDU_EXTENSION_13_RESERVED_13A_LSB 8 659 #define TX_MSDU_EXTENSION_13_RESERVED_13A_MASK 0x0000ff00 660 661 /* Description TX_MSDU_EXTENSION_13_BUF3_LEN 662 663 Length of the fourth buffer <legal all> 664 */ 665 #define TX_MSDU_EXTENSION_13_BUF3_LEN_OFFSET 0x00000034 666 #define TX_MSDU_EXTENSION_13_BUF3_LEN_LSB 16 667 #define TX_MSDU_EXTENSION_13_BUF3_LEN_MASK 0xffff0000 668 669 /* Description TX_MSDU_EXTENSION_14_BUF4_PTR_31_0 670 671 Lower 32 bits of the fifth buffer pointer 672 673 674 675 NOTE: SW/FW manages the 'cookie' info related to this 676 buffer together with the 'cookie' info for this 677 MSDU_EXTENSION descriptor 678 679 <legal all> 680 */ 681 #define TX_MSDU_EXTENSION_14_BUF4_PTR_31_0_OFFSET 0x00000038 682 #define TX_MSDU_EXTENSION_14_BUF4_PTR_31_0_LSB 0 683 #define TX_MSDU_EXTENSION_14_BUF4_PTR_31_0_MASK 0xffffffff 684 685 /* Description TX_MSDU_EXTENSION_15_BUF4_PTR_39_32 686 687 Upper 8 bits of the fifth buffer pointer <legal all> 688 */ 689 #define TX_MSDU_EXTENSION_15_BUF4_PTR_39_32_OFFSET 0x0000003c 690 #define TX_MSDU_EXTENSION_15_BUF4_PTR_39_32_LSB 0 691 #define TX_MSDU_EXTENSION_15_BUF4_PTR_39_32_MASK 0x000000ff 692 693 /* Description TX_MSDU_EXTENSION_15_RESERVED_15A 694 695 <Legal 0> 696 */ 697 #define TX_MSDU_EXTENSION_15_RESERVED_15A_OFFSET 0x0000003c 698 #define TX_MSDU_EXTENSION_15_RESERVED_15A_LSB 8 699 #define TX_MSDU_EXTENSION_15_RESERVED_15A_MASK 0x0000ff00 700 701 /* Description TX_MSDU_EXTENSION_15_BUF4_LEN 702 703 Length of the fifth buffer <legal all> 704 */ 705 #define TX_MSDU_EXTENSION_15_BUF4_LEN_OFFSET 0x0000003c 706 #define TX_MSDU_EXTENSION_15_BUF4_LEN_LSB 16 707 #define TX_MSDU_EXTENSION_15_BUF4_LEN_MASK 0xffff0000 708 709 /* Description TX_MSDU_EXTENSION_16_BUF5_PTR_31_0 710 711 Lower 32 bits of the sixth buffer pointer 712 713 714 715 NOTE: SW/FW manages the 'cookie' info related to this 716 buffer together with the 'cookie' info for this 717 MSDU_EXTENSION descriptor 718 719 <legal all> 720 */ 721 #define TX_MSDU_EXTENSION_16_BUF5_PTR_31_0_OFFSET 0x00000040 722 #define TX_MSDU_EXTENSION_16_BUF5_PTR_31_0_LSB 0 723 #define TX_MSDU_EXTENSION_16_BUF5_PTR_31_0_MASK 0xffffffff 724 725 /* Description TX_MSDU_EXTENSION_17_BUF5_PTR_39_32 726 727 Upper 8 bits of the sixth buffer pointer <legal all> 728 */ 729 #define TX_MSDU_EXTENSION_17_BUF5_PTR_39_32_OFFSET 0x00000044 730 #define TX_MSDU_EXTENSION_17_BUF5_PTR_39_32_LSB 0 731 #define TX_MSDU_EXTENSION_17_BUF5_PTR_39_32_MASK 0x000000ff 732 733 /* Description TX_MSDU_EXTENSION_17_RESERVED_17A 734 735 <Legal 0> 736 */ 737 #define TX_MSDU_EXTENSION_17_RESERVED_17A_OFFSET 0x00000044 738 #define TX_MSDU_EXTENSION_17_RESERVED_17A_LSB 8 739 #define TX_MSDU_EXTENSION_17_RESERVED_17A_MASK 0x0000ff00 740 741 /* Description TX_MSDU_EXTENSION_17_BUF5_LEN 742 743 Length of the sixth buffer <legal all> 744 */ 745 #define TX_MSDU_EXTENSION_17_BUF5_LEN_OFFSET 0x00000044 746 #define TX_MSDU_EXTENSION_17_BUF5_LEN_LSB 16 747 #define TX_MSDU_EXTENSION_17_BUF5_LEN_MASK 0xffff0000 748 749 750 #endif // _TX_MSDU_EXTENSION_H_ 751