xref: /wlan-driver/fw-api/hw/qcn9224/v1/eht_sig_usr_mu_mimo_info.h (revision 5113495b16420b49004c444715d2daae2066e7dc)
1 
2 /*
3  * Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved.
4  *
5  * Permission to use, copy, modify, and/or distribute this software for any
6  * purpose with or without fee is hereby granted, provided that the above
7  * copyright notice and this permission notice appear in all copies.
8  *
9  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16  */
17 
18 
19 
20 
21 
22 
23 
24 
25 
26 
27 #ifndef _EHT_SIG_USR_MU_MIMO_INFO_H_
28 #define _EHT_SIG_USR_MU_MIMO_INFO_H_
29 #if !defined(__ASSEMBLER__)
30 #endif
31 
32 #define NUM_OF_DWORDS_EHT_SIG_USR_MU_MIMO_INFO 2
33 
34 
35 struct eht_sig_usr_mu_mimo_info {
36 #ifndef WIFI_BIT_ORDER_BIG_ENDIAN
37              uint32_t sta_id                                                  : 11, // [10:0]
38                       sta_mcs                                                 :  4, // [14:11]
39                       sta_coding                                              :  1, // [15:15]
40                       sta_spatial_config                                      :  6, // [21:16]
41                       reserved_0a                                             :  1, // [22:22]
42                       rx_integrity_check_passed                               :  1, // [23:23]
43                       subband80_cc_mask                                       :  8; // [31:24]
44              uint32_t user_order_subband80_0                                  :  8, // [7:0]
45                       user_order_subband80_1                                  :  8, // [15:8]
46                       user_order_subband80_2                                  :  8, // [23:16]
47                       user_order_subband80_3                                  :  8; // [31:24]
48 #else
49              uint32_t subband80_cc_mask                                       :  8, // [31:24]
50                       rx_integrity_check_passed                               :  1, // [23:23]
51                       reserved_0a                                             :  1, // [22:22]
52                       sta_spatial_config                                      :  6, // [21:16]
53                       sta_coding                                              :  1, // [15:15]
54                       sta_mcs                                                 :  4, // [14:11]
55                       sta_id                                                  : 11; // [10:0]
56              uint32_t user_order_subband80_3                                  :  8, // [31:24]
57                       user_order_subband80_2                                  :  8, // [23:16]
58                       user_order_subband80_1                                  :  8, // [15:8]
59                       user_order_subband80_0                                  :  8; // [7:0]
60 #endif
61 };
62 
63 
64 
65 
66 #define EHT_SIG_USR_MU_MIMO_INFO_STA_ID_OFFSET                                      0x00000000
67 #define EHT_SIG_USR_MU_MIMO_INFO_STA_ID_LSB                                         0
68 #define EHT_SIG_USR_MU_MIMO_INFO_STA_ID_MSB                                         10
69 #define EHT_SIG_USR_MU_MIMO_INFO_STA_ID_MASK                                        0x000007ff
70 
71 
72 
73 
74 #define EHT_SIG_USR_MU_MIMO_INFO_STA_MCS_OFFSET                                     0x00000000
75 #define EHT_SIG_USR_MU_MIMO_INFO_STA_MCS_LSB                                        11
76 #define EHT_SIG_USR_MU_MIMO_INFO_STA_MCS_MSB                                        14
77 #define EHT_SIG_USR_MU_MIMO_INFO_STA_MCS_MASK                                       0x00007800
78 
79 
80 
81 
82 #define EHT_SIG_USR_MU_MIMO_INFO_STA_CODING_OFFSET                                  0x00000000
83 #define EHT_SIG_USR_MU_MIMO_INFO_STA_CODING_LSB                                     15
84 #define EHT_SIG_USR_MU_MIMO_INFO_STA_CODING_MSB                                     15
85 #define EHT_SIG_USR_MU_MIMO_INFO_STA_CODING_MASK                                    0x00008000
86 
87 
88 
89 
90 #define EHT_SIG_USR_MU_MIMO_INFO_STA_SPATIAL_CONFIG_OFFSET                          0x00000000
91 #define EHT_SIG_USR_MU_MIMO_INFO_STA_SPATIAL_CONFIG_LSB                             16
92 #define EHT_SIG_USR_MU_MIMO_INFO_STA_SPATIAL_CONFIG_MSB                             21
93 #define EHT_SIG_USR_MU_MIMO_INFO_STA_SPATIAL_CONFIG_MASK                            0x003f0000
94 
95 
96 
97 
98 #define EHT_SIG_USR_MU_MIMO_INFO_RESERVED_0A_OFFSET                                 0x00000000
99 #define EHT_SIG_USR_MU_MIMO_INFO_RESERVED_0A_LSB                                    22
100 #define EHT_SIG_USR_MU_MIMO_INFO_RESERVED_0A_MSB                                    22
101 #define EHT_SIG_USR_MU_MIMO_INFO_RESERVED_0A_MASK                                   0x00400000
102 
103 
104 
105 
106 #define EHT_SIG_USR_MU_MIMO_INFO_RX_INTEGRITY_CHECK_PASSED_OFFSET                   0x00000000
107 #define EHT_SIG_USR_MU_MIMO_INFO_RX_INTEGRITY_CHECK_PASSED_LSB                      23
108 #define EHT_SIG_USR_MU_MIMO_INFO_RX_INTEGRITY_CHECK_PASSED_MSB                      23
109 #define EHT_SIG_USR_MU_MIMO_INFO_RX_INTEGRITY_CHECK_PASSED_MASK                     0x00800000
110 
111 
112 
113 
114 #define EHT_SIG_USR_MU_MIMO_INFO_SUBBAND80_CC_MASK_OFFSET                           0x00000000
115 #define EHT_SIG_USR_MU_MIMO_INFO_SUBBAND80_CC_MASK_LSB                              24
116 #define EHT_SIG_USR_MU_MIMO_INFO_SUBBAND80_CC_MASK_MSB                              31
117 #define EHT_SIG_USR_MU_MIMO_INFO_SUBBAND80_CC_MASK_MASK                             0xff000000
118 
119 
120 
121 
122 #define EHT_SIG_USR_MU_MIMO_INFO_USER_ORDER_SUBBAND80_0_OFFSET                      0x00000004
123 #define EHT_SIG_USR_MU_MIMO_INFO_USER_ORDER_SUBBAND80_0_LSB                         0
124 #define EHT_SIG_USR_MU_MIMO_INFO_USER_ORDER_SUBBAND80_0_MSB                         7
125 #define EHT_SIG_USR_MU_MIMO_INFO_USER_ORDER_SUBBAND80_0_MASK                        0x000000ff
126 
127 
128 
129 
130 #define EHT_SIG_USR_MU_MIMO_INFO_USER_ORDER_SUBBAND80_1_OFFSET                      0x00000004
131 #define EHT_SIG_USR_MU_MIMO_INFO_USER_ORDER_SUBBAND80_1_LSB                         8
132 #define EHT_SIG_USR_MU_MIMO_INFO_USER_ORDER_SUBBAND80_1_MSB                         15
133 #define EHT_SIG_USR_MU_MIMO_INFO_USER_ORDER_SUBBAND80_1_MASK                        0x0000ff00
134 
135 
136 
137 
138 #define EHT_SIG_USR_MU_MIMO_INFO_USER_ORDER_SUBBAND80_2_OFFSET                      0x00000004
139 #define EHT_SIG_USR_MU_MIMO_INFO_USER_ORDER_SUBBAND80_2_LSB                         16
140 #define EHT_SIG_USR_MU_MIMO_INFO_USER_ORDER_SUBBAND80_2_MSB                         23
141 #define EHT_SIG_USR_MU_MIMO_INFO_USER_ORDER_SUBBAND80_2_MASK                        0x00ff0000
142 
143 
144 
145 
146 #define EHT_SIG_USR_MU_MIMO_INFO_USER_ORDER_SUBBAND80_3_OFFSET                      0x00000004
147 #define EHT_SIG_USR_MU_MIMO_INFO_USER_ORDER_SUBBAND80_3_LSB                         24
148 #define EHT_SIG_USR_MU_MIMO_INFO_USER_ORDER_SUBBAND80_3_MSB                         31
149 #define EHT_SIG_USR_MU_MIMO_INFO_USER_ORDER_SUBBAND80_3_MASK                        0xff000000
150 
151 
152 
153 
154 #endif
155