xref: /wlan-driver/fw-api/hw/qcn9224/v1/mlo_sta_id_details.h (revision 5113495b16420b49004c444715d2daae2066e7dc)
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2 /* Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved.
3  *
4  * Permission to use, copy, modify, and/or distribute this software for any
5  * purpose with or without fee is hereby granted, provided that the above
6  * copyright notice and this permission notice appear in all copies.
7  *
8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15  */
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25 
26 #ifndef _MLO_STA_ID_DETAILS_H_
27 #define _MLO_STA_ID_DETAILS_H_
28 #if !defined(__ASSEMBLER__)
29 #endif
30 
31 #define NUM_OF_WORDS_MLO_STA_ID_DETAILS 1
32 
33 
34 struct mlo_sta_id_details {
35 #ifndef WIFI_BIT_ORDER_BIG_ENDIAN
36              uint16_t nstr_mlo_sta_id                                         : 10,
37                       block_self_ml_sync                                      :  1,
38                       block_partner_ml_sync                                   :  1,
39                       nstr_mlo_sta_id_valid                                   :  1,
40                       reserved_0a                                             :  3;
41 #else
42              uint16_t reserved_0a                                             :  3,
43                       nstr_mlo_sta_id_valid                                   :  1,
44                       block_partner_ml_sync                                   :  1,
45                       block_self_ml_sync                                      :  1,
46                       nstr_mlo_sta_id                                         : 10;
47 #endif
48 };
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53 #define MLO_STA_ID_DETAILS_NSTR_MLO_STA_ID_OFFSET                                   0x00000000
54 #define MLO_STA_ID_DETAILS_NSTR_MLO_STA_ID_LSB                                      0
55 #define MLO_STA_ID_DETAILS_NSTR_MLO_STA_ID_MSB                                      9
56 #define MLO_STA_ID_DETAILS_NSTR_MLO_STA_ID_MASK                                     0x000003ff
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61 #define MLO_STA_ID_DETAILS_BLOCK_SELF_ML_SYNC_OFFSET                                0x00000000
62 #define MLO_STA_ID_DETAILS_BLOCK_SELF_ML_SYNC_LSB                                   10
63 #define MLO_STA_ID_DETAILS_BLOCK_SELF_ML_SYNC_MSB                                   10
64 #define MLO_STA_ID_DETAILS_BLOCK_SELF_ML_SYNC_MASK                                  0x00000400
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69 #define MLO_STA_ID_DETAILS_BLOCK_PARTNER_ML_SYNC_OFFSET                             0x00000000
70 #define MLO_STA_ID_DETAILS_BLOCK_PARTNER_ML_SYNC_LSB                                11
71 #define MLO_STA_ID_DETAILS_BLOCK_PARTNER_ML_SYNC_MSB                                11
72 #define MLO_STA_ID_DETAILS_BLOCK_PARTNER_ML_SYNC_MASK                               0x00000800
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77 #define MLO_STA_ID_DETAILS_NSTR_MLO_STA_ID_VALID_OFFSET                             0x00000000
78 #define MLO_STA_ID_DETAILS_NSTR_MLO_STA_ID_VALID_LSB                                12
79 #define MLO_STA_ID_DETAILS_NSTR_MLO_STA_ID_VALID_MSB                                12
80 #define MLO_STA_ID_DETAILS_NSTR_MLO_STA_ID_VALID_MASK                               0x00001000
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85 #define MLO_STA_ID_DETAILS_RESERVED_0A_OFFSET                                       0x00000000
86 #define MLO_STA_ID_DETAILS_RESERVED_0A_LSB                                          13
87 #define MLO_STA_ID_DETAILS_RESERVED_0A_MSB                                          15
88 #define MLO_STA_ID_DETAILS_RESERVED_0A_MASK                                         0x0000e000
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91 
92 #endif
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