1 2 /* Copyright (c) 2021, Qualcomm Innovation Center, Inc. All rights reserved. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for any 5 * purpose with or without fee is hereby granted, provided that the above 6 * copyright notice and this permission notice appear in all copies. 7 * 8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15 */ 16 17 18 19 20 21 22 23 24 25 26 #ifndef _REO_UPDATE_RX_REO_QUEUE_STATUS_H_ 27 #define _REO_UPDATE_RX_REO_QUEUE_STATUS_H_ 28 #if !defined(__ASSEMBLER__) 29 #endif 30 31 #include "uniform_reo_status_header.h" 32 #define NUM_OF_DWORDS_REO_UPDATE_RX_REO_QUEUE_STATUS 26 33 34 #define NUM_OF_QWORDS_REO_UPDATE_RX_REO_QUEUE_STATUS 13 35 36 37 struct reo_update_rx_reo_queue_status { 38 #ifndef WIFI_BIT_ORDER_BIG_ENDIAN 39 struct uniform_reo_status_header status_header; 40 uint32_t reserved_2a : 32; 41 uint32_t reserved_3a : 32; 42 uint32_t reserved_4a : 32; 43 uint32_t reserved_5a : 32; 44 uint32_t reserved_6a : 32; 45 uint32_t reserved_7a : 32; 46 uint32_t reserved_8a : 32; 47 uint32_t reserved_9a : 32; 48 uint32_t reserved_10a : 32; 49 uint32_t reserved_11a : 32; 50 uint32_t reserved_12a : 32; 51 uint32_t reserved_13a : 32; 52 uint32_t reserved_14a : 32; 53 uint32_t reserved_15a : 32; 54 uint32_t reserved_16a : 32; 55 uint32_t reserved_17a : 32; 56 uint32_t reserved_18a : 32; 57 uint32_t reserved_19a : 32; 58 uint32_t reserved_20a : 32; 59 uint32_t reserved_21a : 32; 60 uint32_t reserved_22a : 32; 61 uint32_t reserved_23a : 32; 62 uint32_t reserved_24a : 32; 63 uint32_t reserved_25a : 28, 64 looping_count : 4; 65 #else 66 struct uniform_reo_status_header status_header; 67 uint32_t reserved_2a : 32; 68 uint32_t reserved_3a : 32; 69 uint32_t reserved_4a : 32; 70 uint32_t reserved_5a : 32; 71 uint32_t reserved_6a : 32; 72 uint32_t reserved_7a : 32; 73 uint32_t reserved_8a : 32; 74 uint32_t reserved_9a : 32; 75 uint32_t reserved_10a : 32; 76 uint32_t reserved_11a : 32; 77 uint32_t reserved_12a : 32; 78 uint32_t reserved_13a : 32; 79 uint32_t reserved_14a : 32; 80 uint32_t reserved_15a : 32; 81 uint32_t reserved_16a : 32; 82 uint32_t reserved_17a : 32; 83 uint32_t reserved_18a : 32; 84 uint32_t reserved_19a : 32; 85 uint32_t reserved_20a : 32; 86 uint32_t reserved_21a : 32; 87 uint32_t reserved_22a : 32; 88 uint32_t reserved_23a : 32; 89 uint32_t reserved_24a : 32; 90 uint32_t looping_count : 4, 91 reserved_25a : 28; 92 #endif 93 }; 94 95 96 97 98 99 100 101 #define REO_UPDATE_RX_REO_QUEUE_STATUS_STATUS_HEADER_REO_STATUS_NUMBER_OFFSET 0x0000000000000000 102 #define REO_UPDATE_RX_REO_QUEUE_STATUS_STATUS_HEADER_REO_STATUS_NUMBER_LSB 0 103 #define REO_UPDATE_RX_REO_QUEUE_STATUS_STATUS_HEADER_REO_STATUS_NUMBER_MSB 15 104 #define REO_UPDATE_RX_REO_QUEUE_STATUS_STATUS_HEADER_REO_STATUS_NUMBER_MASK 0x000000000000ffff 105 106 107 108 109 #define REO_UPDATE_RX_REO_QUEUE_STATUS_STATUS_HEADER_CMD_EXECUTION_TIME_OFFSET 0x0000000000000000 110 #define REO_UPDATE_RX_REO_QUEUE_STATUS_STATUS_HEADER_CMD_EXECUTION_TIME_LSB 16 111 #define REO_UPDATE_RX_REO_QUEUE_STATUS_STATUS_HEADER_CMD_EXECUTION_TIME_MSB 25 112 #define REO_UPDATE_RX_REO_QUEUE_STATUS_STATUS_HEADER_CMD_EXECUTION_TIME_MASK 0x0000000003ff0000 113 114 115 116 117 #define REO_UPDATE_RX_REO_QUEUE_STATUS_STATUS_HEADER_REO_CMD_EXECUTION_STATUS_OFFSET 0x0000000000000000 118 #define REO_UPDATE_RX_REO_QUEUE_STATUS_STATUS_HEADER_REO_CMD_EXECUTION_STATUS_LSB 26 119 #define REO_UPDATE_RX_REO_QUEUE_STATUS_STATUS_HEADER_REO_CMD_EXECUTION_STATUS_MSB 27 120 #define REO_UPDATE_RX_REO_QUEUE_STATUS_STATUS_HEADER_REO_CMD_EXECUTION_STATUS_MASK 0x000000000c000000 121 122 123 124 125 #define REO_UPDATE_RX_REO_QUEUE_STATUS_STATUS_HEADER_RESERVED_0A_OFFSET 0x0000000000000000 126 #define REO_UPDATE_RX_REO_QUEUE_STATUS_STATUS_HEADER_RESERVED_0A_LSB 28 127 #define REO_UPDATE_RX_REO_QUEUE_STATUS_STATUS_HEADER_RESERVED_0A_MSB 31 128 #define REO_UPDATE_RX_REO_QUEUE_STATUS_STATUS_HEADER_RESERVED_0A_MASK 0x00000000f0000000 129 130 131 132 133 #define REO_UPDATE_RX_REO_QUEUE_STATUS_STATUS_HEADER_TIMESTAMP_OFFSET 0x0000000000000000 134 #define REO_UPDATE_RX_REO_QUEUE_STATUS_STATUS_HEADER_TIMESTAMP_LSB 32 135 #define REO_UPDATE_RX_REO_QUEUE_STATUS_STATUS_HEADER_TIMESTAMP_MSB 63 136 #define REO_UPDATE_RX_REO_QUEUE_STATUS_STATUS_HEADER_TIMESTAMP_MASK 0xffffffff00000000 137 138 139 140 141 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_2A_OFFSET 0x0000000000000008 142 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_2A_LSB 0 143 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_2A_MSB 31 144 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_2A_MASK 0x00000000ffffffff 145 146 147 148 149 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_3A_OFFSET 0x0000000000000008 150 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_3A_LSB 32 151 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_3A_MSB 63 152 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_3A_MASK 0xffffffff00000000 153 154 155 156 157 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_4A_OFFSET 0x0000000000000010 158 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_4A_LSB 0 159 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_4A_MSB 31 160 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_4A_MASK 0x00000000ffffffff 161 162 163 164 165 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_5A_OFFSET 0x0000000000000010 166 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_5A_LSB 32 167 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_5A_MSB 63 168 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_5A_MASK 0xffffffff00000000 169 170 171 172 173 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_6A_OFFSET 0x0000000000000018 174 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_6A_LSB 0 175 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_6A_MSB 31 176 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_6A_MASK 0x00000000ffffffff 177 178 179 180 181 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_7A_OFFSET 0x0000000000000018 182 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_7A_LSB 32 183 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_7A_MSB 63 184 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_7A_MASK 0xffffffff00000000 185 186 187 188 189 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_8A_OFFSET 0x0000000000000020 190 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_8A_LSB 0 191 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_8A_MSB 31 192 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_8A_MASK 0x00000000ffffffff 193 194 195 196 197 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_9A_OFFSET 0x0000000000000020 198 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_9A_LSB 32 199 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_9A_MSB 63 200 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_9A_MASK 0xffffffff00000000 201 202 203 204 205 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_10A_OFFSET 0x0000000000000028 206 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_10A_LSB 0 207 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_10A_MSB 31 208 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_10A_MASK 0x00000000ffffffff 209 210 211 212 213 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_11A_OFFSET 0x0000000000000028 214 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_11A_LSB 32 215 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_11A_MSB 63 216 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_11A_MASK 0xffffffff00000000 217 218 219 220 221 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_12A_OFFSET 0x0000000000000030 222 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_12A_LSB 0 223 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_12A_MSB 31 224 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_12A_MASK 0x00000000ffffffff 225 226 227 228 229 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_13A_OFFSET 0x0000000000000030 230 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_13A_LSB 32 231 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_13A_MSB 63 232 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_13A_MASK 0xffffffff00000000 233 234 235 236 237 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_14A_OFFSET 0x0000000000000038 238 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_14A_LSB 0 239 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_14A_MSB 31 240 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_14A_MASK 0x00000000ffffffff 241 242 243 244 245 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_15A_OFFSET 0x0000000000000038 246 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_15A_LSB 32 247 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_15A_MSB 63 248 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_15A_MASK 0xffffffff00000000 249 250 251 252 253 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_16A_OFFSET 0x0000000000000040 254 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_16A_LSB 0 255 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_16A_MSB 31 256 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_16A_MASK 0x00000000ffffffff 257 258 259 260 261 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_17A_OFFSET 0x0000000000000040 262 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_17A_LSB 32 263 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_17A_MSB 63 264 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_17A_MASK 0xffffffff00000000 265 266 267 268 269 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_18A_OFFSET 0x0000000000000048 270 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_18A_LSB 0 271 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_18A_MSB 31 272 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_18A_MASK 0x00000000ffffffff 273 274 275 276 277 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_19A_OFFSET 0x0000000000000048 278 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_19A_LSB 32 279 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_19A_MSB 63 280 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_19A_MASK 0xffffffff00000000 281 282 283 284 285 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_20A_OFFSET 0x0000000000000050 286 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_20A_LSB 0 287 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_20A_MSB 31 288 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_20A_MASK 0x00000000ffffffff 289 290 291 292 293 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_21A_OFFSET 0x0000000000000050 294 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_21A_LSB 32 295 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_21A_MSB 63 296 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_21A_MASK 0xffffffff00000000 297 298 299 300 301 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_22A_OFFSET 0x0000000000000058 302 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_22A_LSB 0 303 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_22A_MSB 31 304 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_22A_MASK 0x00000000ffffffff 305 306 307 308 309 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_23A_OFFSET 0x0000000000000058 310 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_23A_LSB 32 311 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_23A_MSB 63 312 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_23A_MASK 0xffffffff00000000 313 314 315 316 317 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_24A_OFFSET 0x0000000000000060 318 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_24A_LSB 0 319 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_24A_MSB 31 320 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_24A_MASK 0x00000000ffffffff 321 322 323 324 325 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_25A_OFFSET 0x0000000000000060 326 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_25A_LSB 32 327 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_25A_MSB 59 328 #define REO_UPDATE_RX_REO_QUEUE_STATUS_RESERVED_25A_MASK 0x0fffffff00000000 329 330 331 332 333 #define REO_UPDATE_RX_REO_QUEUE_STATUS_LOOPING_COUNT_OFFSET 0x0000000000000060 334 #define REO_UPDATE_RX_REO_QUEUE_STATUS_LOOPING_COUNT_LSB 60 335 #define REO_UPDATE_RX_REO_QUEUE_STATUS_LOOPING_COUNT_MSB 63 336 #define REO_UPDATE_RX_REO_QUEUE_STATUS_LOOPING_COUNT_MASK 0xf000000000000000 337 338 339 340 #endif 341