1 2 /* Copyright (c) 2021, Qualcomm Innovation Center, Inc. All rights reserved. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for any 5 * purpose with or without fee is hereby granted, provided that the above 6 * copyright notice and this permission notice appear in all copies. 7 * 8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15 */ 16 17 18 19 20 21 22 23 24 25 26 #ifndef _RX_MSDU_END_H_ 27 #define _RX_MSDU_END_H_ 28 #if !defined(__ASSEMBLER__) 29 #endif 30 31 #define NUM_OF_DWORDS_RX_MSDU_END 32 32 33 #define NUM_OF_QWORDS_RX_MSDU_END 16 34 35 36 struct rx_msdu_end { 37 #ifndef BIG_ENDIAN_HOST 38 uint32_t rxpcu_mpdu_filter_in_category : 2, 39 sw_frame_group_id : 7, 40 reserved_0 : 7, 41 phy_ppdu_id : 16; 42 uint32_t ip_hdr_chksum : 16, 43 reported_mpdu_length : 14, 44 reserved_1a : 2; 45 uint32_t reserved_2a : 8, 46 cce_super_rule : 6, 47 cce_classify_not_done_truncate : 1, 48 cce_classify_not_done_cce_dis : 1, 49 cumulative_l3_checksum : 16; 50 uint32_t rule_indication_31_0 : 32; 51 uint32_t ipv6_options_crc : 32; 52 uint32_t da_offset : 6, 53 sa_offset : 6, 54 da_offset_valid : 1, 55 sa_offset_valid : 1, 56 reserved_5a : 2, 57 l3_type : 16; 58 uint32_t rule_indication_63_32 : 32; 59 uint32_t tcp_seq_number : 32; 60 uint32_t tcp_ack_number : 32; 61 uint32_t tcp_flag : 9, 62 lro_eligible : 1, 63 reserved_9a : 6, 64 window_size : 16; 65 uint32_t sa_sw_peer_id : 16, 66 sa_idx_timeout : 1, 67 da_idx_timeout : 1, 68 to_ds : 1, 69 tid : 4, 70 sa_is_valid : 1, 71 da_is_valid : 1, 72 da_is_mcbc : 1, 73 l3_header_padding : 2, 74 first_msdu : 1, 75 last_msdu : 1, 76 fr_ds : 1, 77 ip_chksum_fail_copy : 1; 78 uint32_t sa_idx : 16, 79 da_idx_or_sw_peer_id : 16; 80 uint32_t msdu_drop : 1, 81 reo_destination_indication : 5, 82 flow_idx : 20, 83 use_ppe : 1, 84 mesh_sta : 2, 85 vlan_ctag_stripped : 1, 86 vlan_stag_stripped : 1, 87 fragment_flag : 1; 88 uint32_t fse_metadata : 32; 89 uint32_t cce_metadata : 16, 90 tcp_udp_chksum : 16; 91 uint32_t aggregation_count : 8, 92 flow_aggregation_continuation : 1, 93 fisa_timeout : 1, 94 tcp_udp_chksum_fail_copy : 1, 95 msdu_limit_error : 1, 96 flow_idx_timeout : 1, 97 flow_idx_invalid : 1, 98 cce_match : 1, 99 amsdu_parser_error : 1, 100 cumulative_ip_length : 16; 101 uint32_t key_id_octet : 8, 102 reserved_16a : 24; 103 uint32_t reserved_17a : 6, 104 service_code : 9, 105 priority_valid : 1, 106 intra_bss : 1, 107 dest_chip_id : 2, 108 multicast_echo : 1, 109 wds_learning_event : 1, 110 wds_roaming_event : 1, 111 wds_keep_alive_event : 1, 112 reserved_17b : 9; 113 uint32_t msdu_length : 14, 114 stbc : 1, 115 ipsec_esp : 1, 116 l3_offset : 7, 117 ipsec_ah : 1, 118 l4_offset : 8; 119 uint32_t msdu_number : 8, 120 decap_format : 2, 121 ipv4_proto : 1, 122 ipv6_proto : 1, 123 tcp_proto : 1, 124 udp_proto : 1, 125 ip_frag : 1, 126 tcp_only_ack : 1, 127 da_is_bcast_mcast : 1, 128 toeplitz_hash_sel : 2, 129 ip_fixed_header_valid : 1, 130 ip_extn_header_valid : 1, 131 tcp_udp_header_valid : 1, 132 mesh_control_present : 1, 133 ldpc : 1, 134 ip4_protocol_ip6_next_header : 8; 135 uint32_t vlan_ctag_ci : 16, 136 vlan_stag_ci : 16; 137 uint32_t peer_meta_data : 32; 138 uint32_t user_rssi : 8, 139 pkt_type : 4, 140 sgi : 2, 141 rate_mcs : 4, 142 receive_bandwidth : 3, 143 reception_type : 3, 144 mimo_ss_bitmap : 7, 145 msdu_done_copy : 1; 146 uint32_t flow_id_toeplitz : 32; 147 uint32_t ppdu_start_timestamp_63_32 : 32; 148 uint32_t sw_phy_meta_data : 32; 149 uint32_t ppdu_start_timestamp_31_0 : 32; 150 uint32_t toeplitz_hash_2_or_4 : 32; 151 uint32_t reserved_28a : 16, 152 sa_15_0 : 16; 153 uint32_t sa_47_16 : 32; 154 uint32_t first_mpdu : 1, 155 reserved_30a : 1, 156 mcast_bcast : 1, 157 ast_index_not_found : 1, 158 ast_index_timeout : 1, 159 power_mgmt : 1, 160 non_qos : 1, 161 null_data : 1, 162 mgmt_type : 1, 163 ctrl_type : 1, 164 more_data : 1, 165 eosp : 1, 166 a_msdu_error : 1, 167 reserved_30b : 1, 168 order : 1, 169 wifi_parser_error : 1, 170 overflow_err : 1, 171 msdu_length_err : 1, 172 tcp_udp_chksum_fail : 1, 173 ip_chksum_fail : 1, 174 sa_idx_invalid : 1, 175 da_idx_invalid : 1, 176 amsdu_addr_mismatch : 1, 177 rx_in_tx_decrypt_byp : 1, 178 encrypt_required : 1, 179 directed : 1, 180 buffer_fragment : 1, 181 mpdu_length_err : 1, 182 tkip_mic_err : 1, 183 decrypt_err : 1, 184 unencrypted_frame_err : 1, 185 fcs_err : 1; 186 uint32_t reserved_31a : 10, 187 decrypt_status_code : 3, 188 rx_bitmap_not_updated : 1, 189 reserved_31b : 17, 190 msdu_done : 1; 191 #else 192 uint32_t phy_ppdu_id : 16, 193 reserved_0 : 7, 194 sw_frame_group_id : 7, 195 rxpcu_mpdu_filter_in_category : 2; 196 uint32_t reserved_1a : 2, 197 reported_mpdu_length : 14, 198 ip_hdr_chksum : 16; 199 uint32_t cumulative_l3_checksum : 16, 200 cce_classify_not_done_cce_dis : 1, 201 cce_classify_not_done_truncate : 1, 202 cce_super_rule : 6, 203 reserved_2a : 8; 204 uint32_t rule_indication_31_0 : 32; 205 uint32_t ipv6_options_crc : 32; 206 uint32_t l3_type : 16, 207 reserved_5a : 2, 208 sa_offset_valid : 1, 209 da_offset_valid : 1, 210 sa_offset : 6, 211 da_offset : 6; 212 uint32_t rule_indication_63_32 : 32; 213 uint32_t tcp_seq_number : 32; 214 uint32_t tcp_ack_number : 32; 215 uint32_t window_size : 16, 216 reserved_9a : 6, 217 lro_eligible : 1, 218 tcp_flag : 9; 219 uint32_t ip_chksum_fail_copy : 1, 220 fr_ds : 1, 221 last_msdu : 1, 222 first_msdu : 1, 223 l3_header_padding : 2, 224 da_is_mcbc : 1, 225 da_is_valid : 1, 226 sa_is_valid : 1, 227 tid : 4, 228 to_ds : 1, 229 da_idx_timeout : 1, 230 sa_idx_timeout : 1, 231 sa_sw_peer_id : 16; 232 uint32_t da_idx_or_sw_peer_id : 16, 233 sa_idx : 16; 234 uint32_t fragment_flag : 1, 235 vlan_stag_stripped : 1, 236 vlan_ctag_stripped : 1, 237 mesh_sta : 2, 238 use_ppe : 1, 239 flow_idx : 20, 240 reo_destination_indication : 5, 241 msdu_drop : 1; 242 uint32_t fse_metadata : 32; 243 uint32_t tcp_udp_chksum : 16, 244 cce_metadata : 16; 245 uint32_t cumulative_ip_length : 16, 246 amsdu_parser_error : 1, 247 cce_match : 1, 248 flow_idx_invalid : 1, 249 flow_idx_timeout : 1, 250 msdu_limit_error : 1, 251 tcp_udp_chksum_fail_copy : 1, 252 fisa_timeout : 1, 253 flow_aggregation_continuation : 1, 254 aggregation_count : 8; 255 uint32_t reserved_16a : 24, 256 key_id_octet : 8; 257 uint32_t reserved_17b : 9, 258 wds_keep_alive_event : 1, 259 wds_roaming_event : 1, 260 wds_learning_event : 1, 261 multicast_echo : 1, 262 dest_chip_id : 2, 263 intra_bss : 1, 264 priority_valid : 1, 265 service_code : 9, 266 reserved_17a : 6; 267 uint32_t l4_offset : 8, 268 ipsec_ah : 1, 269 l3_offset : 7, 270 ipsec_esp : 1, 271 stbc : 1, 272 msdu_length : 14; 273 uint32_t ip4_protocol_ip6_next_header : 8, 274 ldpc : 1, 275 mesh_control_present : 1, 276 tcp_udp_header_valid : 1, 277 ip_extn_header_valid : 1, 278 ip_fixed_header_valid : 1, 279 toeplitz_hash_sel : 2, 280 da_is_bcast_mcast : 1, 281 tcp_only_ack : 1, 282 ip_frag : 1, 283 udp_proto : 1, 284 tcp_proto : 1, 285 ipv6_proto : 1, 286 ipv4_proto : 1, 287 decap_format : 2, 288 msdu_number : 8; 289 uint32_t vlan_stag_ci : 16, 290 vlan_ctag_ci : 16; 291 uint32_t peer_meta_data : 32; 292 uint32_t msdu_done_copy : 1, 293 mimo_ss_bitmap : 7, 294 reception_type : 3, 295 receive_bandwidth : 3, 296 rate_mcs : 4, 297 sgi : 2, 298 pkt_type : 4, 299 user_rssi : 8; 300 uint32_t flow_id_toeplitz : 32; 301 uint32_t ppdu_start_timestamp_63_32 : 32; 302 uint32_t sw_phy_meta_data : 32; 303 uint32_t ppdu_start_timestamp_31_0 : 32; 304 uint32_t toeplitz_hash_2_or_4 : 32; 305 uint32_t sa_15_0 : 16, 306 reserved_28a : 16; 307 uint32_t sa_47_16 : 32; 308 uint32_t fcs_err : 1, 309 unencrypted_frame_err : 1, 310 decrypt_err : 1, 311 tkip_mic_err : 1, 312 mpdu_length_err : 1, 313 buffer_fragment : 1, 314 directed : 1, 315 encrypt_required : 1, 316 rx_in_tx_decrypt_byp : 1, 317 amsdu_addr_mismatch : 1, 318 da_idx_invalid : 1, 319 sa_idx_invalid : 1, 320 ip_chksum_fail : 1, 321 tcp_udp_chksum_fail : 1, 322 msdu_length_err : 1, 323 overflow_err : 1, 324 wifi_parser_error : 1, 325 order : 1, 326 reserved_30b : 1, 327 a_msdu_error : 1, 328 eosp : 1, 329 more_data : 1, 330 ctrl_type : 1, 331 mgmt_type : 1, 332 null_data : 1, 333 non_qos : 1, 334 power_mgmt : 1, 335 ast_index_timeout : 1, 336 ast_index_not_found : 1, 337 mcast_bcast : 1, 338 reserved_30a : 1, 339 first_mpdu : 1; 340 uint32_t msdu_done : 1, 341 reserved_31b : 17, 342 rx_bitmap_not_updated : 1, 343 decrypt_status_code : 3, 344 reserved_31a : 10; 345 #endif 346 }; 347 348 349 350 351 #define RX_MSDU_END_RXPCU_MPDU_FILTER_IN_CATEGORY_OFFSET 0x0000000000000000 352 #define RX_MSDU_END_RXPCU_MPDU_FILTER_IN_CATEGORY_LSB 0 353 #define RX_MSDU_END_RXPCU_MPDU_FILTER_IN_CATEGORY_MSB 1 354 #define RX_MSDU_END_RXPCU_MPDU_FILTER_IN_CATEGORY_MASK 0x0000000000000003 355 356 357 358 359 #define RX_MSDU_END_SW_FRAME_GROUP_ID_OFFSET 0x0000000000000000 360 #define RX_MSDU_END_SW_FRAME_GROUP_ID_LSB 2 361 #define RX_MSDU_END_SW_FRAME_GROUP_ID_MSB 8 362 #define RX_MSDU_END_SW_FRAME_GROUP_ID_MASK 0x00000000000001fc 363 364 365 366 367 #define RX_MSDU_END_RESERVED_0_OFFSET 0x0000000000000000 368 #define RX_MSDU_END_RESERVED_0_LSB 9 369 #define RX_MSDU_END_RESERVED_0_MSB 15 370 #define RX_MSDU_END_RESERVED_0_MASK 0x000000000000fe00 371 372 373 374 375 #define RX_MSDU_END_PHY_PPDU_ID_OFFSET 0x0000000000000000 376 #define RX_MSDU_END_PHY_PPDU_ID_LSB 16 377 #define RX_MSDU_END_PHY_PPDU_ID_MSB 31 378 #define RX_MSDU_END_PHY_PPDU_ID_MASK 0x00000000ffff0000 379 380 381 382 383 #define RX_MSDU_END_IP_HDR_CHKSUM_OFFSET 0x0000000000000000 384 #define RX_MSDU_END_IP_HDR_CHKSUM_LSB 32 385 #define RX_MSDU_END_IP_HDR_CHKSUM_MSB 47 386 #define RX_MSDU_END_IP_HDR_CHKSUM_MASK 0x0000ffff00000000 387 388 389 390 391 #define RX_MSDU_END_REPORTED_MPDU_LENGTH_OFFSET 0x0000000000000000 392 #define RX_MSDU_END_REPORTED_MPDU_LENGTH_LSB 48 393 #define RX_MSDU_END_REPORTED_MPDU_LENGTH_MSB 61 394 #define RX_MSDU_END_REPORTED_MPDU_LENGTH_MASK 0x3fff000000000000 395 396 397 398 399 #define RX_MSDU_END_RESERVED_1A_OFFSET 0x0000000000000000 400 #define RX_MSDU_END_RESERVED_1A_LSB 62 401 #define RX_MSDU_END_RESERVED_1A_MSB 63 402 #define RX_MSDU_END_RESERVED_1A_MASK 0xc000000000000000 403 404 405 406 407 #define RX_MSDU_END_RESERVED_2A_OFFSET 0x0000000000000008 408 #define RX_MSDU_END_RESERVED_2A_LSB 0 409 #define RX_MSDU_END_RESERVED_2A_MSB 7 410 #define RX_MSDU_END_RESERVED_2A_MASK 0x00000000000000ff 411 412 413 414 415 #define RX_MSDU_END_CCE_SUPER_RULE_OFFSET 0x0000000000000008 416 #define RX_MSDU_END_CCE_SUPER_RULE_LSB 8 417 #define RX_MSDU_END_CCE_SUPER_RULE_MSB 13 418 #define RX_MSDU_END_CCE_SUPER_RULE_MASK 0x0000000000003f00 419 420 421 422 423 #define RX_MSDU_END_CCE_CLASSIFY_NOT_DONE_TRUNCATE_OFFSET 0x0000000000000008 424 #define RX_MSDU_END_CCE_CLASSIFY_NOT_DONE_TRUNCATE_LSB 14 425 #define RX_MSDU_END_CCE_CLASSIFY_NOT_DONE_TRUNCATE_MSB 14 426 #define RX_MSDU_END_CCE_CLASSIFY_NOT_DONE_TRUNCATE_MASK 0x0000000000004000 427 428 429 430 431 #define RX_MSDU_END_CCE_CLASSIFY_NOT_DONE_CCE_DIS_OFFSET 0x0000000000000008 432 #define RX_MSDU_END_CCE_CLASSIFY_NOT_DONE_CCE_DIS_LSB 15 433 #define RX_MSDU_END_CCE_CLASSIFY_NOT_DONE_CCE_DIS_MSB 15 434 #define RX_MSDU_END_CCE_CLASSIFY_NOT_DONE_CCE_DIS_MASK 0x0000000000008000 435 436 437 438 439 #define RX_MSDU_END_CUMULATIVE_L3_CHECKSUM_OFFSET 0x0000000000000008 440 #define RX_MSDU_END_CUMULATIVE_L3_CHECKSUM_LSB 16 441 #define RX_MSDU_END_CUMULATIVE_L3_CHECKSUM_MSB 31 442 #define RX_MSDU_END_CUMULATIVE_L3_CHECKSUM_MASK 0x00000000ffff0000 443 444 445 446 447 #define RX_MSDU_END_RULE_INDICATION_31_0_OFFSET 0x0000000000000008 448 #define RX_MSDU_END_RULE_INDICATION_31_0_LSB 32 449 #define RX_MSDU_END_RULE_INDICATION_31_0_MSB 63 450 #define RX_MSDU_END_RULE_INDICATION_31_0_MASK 0xffffffff00000000 451 452 453 454 455 #define RX_MSDU_END_IPV6_OPTIONS_CRC_OFFSET 0x0000000000000010 456 #define RX_MSDU_END_IPV6_OPTIONS_CRC_LSB 0 457 #define RX_MSDU_END_IPV6_OPTIONS_CRC_MSB 31 458 #define RX_MSDU_END_IPV6_OPTIONS_CRC_MASK 0x00000000ffffffff 459 460 461 462 463 #define RX_MSDU_END_DA_OFFSET_OFFSET 0x0000000000000010 464 #define RX_MSDU_END_DA_OFFSET_LSB 32 465 #define RX_MSDU_END_DA_OFFSET_MSB 37 466 #define RX_MSDU_END_DA_OFFSET_MASK 0x0000003f00000000 467 468 469 470 471 #define RX_MSDU_END_SA_OFFSET_OFFSET 0x0000000000000010 472 #define RX_MSDU_END_SA_OFFSET_LSB 38 473 #define RX_MSDU_END_SA_OFFSET_MSB 43 474 #define RX_MSDU_END_SA_OFFSET_MASK 0x00000fc000000000 475 476 477 478 479 #define RX_MSDU_END_DA_OFFSET_VALID_OFFSET 0x0000000000000010 480 #define RX_MSDU_END_DA_OFFSET_VALID_LSB 44 481 #define RX_MSDU_END_DA_OFFSET_VALID_MSB 44 482 #define RX_MSDU_END_DA_OFFSET_VALID_MASK 0x0000100000000000 483 484 485 486 487 #define RX_MSDU_END_SA_OFFSET_VALID_OFFSET 0x0000000000000010 488 #define RX_MSDU_END_SA_OFFSET_VALID_LSB 45 489 #define RX_MSDU_END_SA_OFFSET_VALID_MSB 45 490 #define RX_MSDU_END_SA_OFFSET_VALID_MASK 0x0000200000000000 491 492 493 494 495 #define RX_MSDU_END_RESERVED_5A_OFFSET 0x0000000000000010 496 #define RX_MSDU_END_RESERVED_5A_LSB 46 497 #define RX_MSDU_END_RESERVED_5A_MSB 47 498 #define RX_MSDU_END_RESERVED_5A_MASK 0x0000c00000000000 499 500 501 502 503 #define RX_MSDU_END_L3_TYPE_OFFSET 0x0000000000000010 504 #define RX_MSDU_END_L3_TYPE_LSB 48 505 #define RX_MSDU_END_L3_TYPE_MSB 63 506 #define RX_MSDU_END_L3_TYPE_MASK 0xffff000000000000 507 508 509 510 511 #define RX_MSDU_END_RULE_INDICATION_63_32_OFFSET 0x0000000000000018 512 #define RX_MSDU_END_RULE_INDICATION_63_32_LSB 0 513 #define RX_MSDU_END_RULE_INDICATION_63_32_MSB 31 514 #define RX_MSDU_END_RULE_INDICATION_63_32_MASK 0x00000000ffffffff 515 516 517 518 519 #define RX_MSDU_END_TCP_SEQ_NUMBER_OFFSET 0x0000000000000018 520 #define RX_MSDU_END_TCP_SEQ_NUMBER_LSB 32 521 #define RX_MSDU_END_TCP_SEQ_NUMBER_MSB 63 522 #define RX_MSDU_END_TCP_SEQ_NUMBER_MASK 0xffffffff00000000 523 524 525 526 527 #define RX_MSDU_END_TCP_ACK_NUMBER_OFFSET 0x0000000000000020 528 #define RX_MSDU_END_TCP_ACK_NUMBER_LSB 0 529 #define RX_MSDU_END_TCP_ACK_NUMBER_MSB 31 530 #define RX_MSDU_END_TCP_ACK_NUMBER_MASK 0x00000000ffffffff 531 532 533 534 535 #define RX_MSDU_END_TCP_FLAG_OFFSET 0x0000000000000020 536 #define RX_MSDU_END_TCP_FLAG_LSB 32 537 #define RX_MSDU_END_TCP_FLAG_MSB 40 538 #define RX_MSDU_END_TCP_FLAG_MASK 0x000001ff00000000 539 540 541 542 543 #define RX_MSDU_END_LRO_ELIGIBLE_OFFSET 0x0000000000000020 544 #define RX_MSDU_END_LRO_ELIGIBLE_LSB 41 545 #define RX_MSDU_END_LRO_ELIGIBLE_MSB 41 546 #define RX_MSDU_END_LRO_ELIGIBLE_MASK 0x0000020000000000 547 548 549 550 551 #define RX_MSDU_END_RESERVED_9A_OFFSET 0x0000000000000020 552 #define RX_MSDU_END_RESERVED_9A_LSB 42 553 #define RX_MSDU_END_RESERVED_9A_MSB 47 554 #define RX_MSDU_END_RESERVED_9A_MASK 0x0000fc0000000000 555 556 557 558 559 #define RX_MSDU_END_WINDOW_SIZE_OFFSET 0x0000000000000020 560 #define RX_MSDU_END_WINDOW_SIZE_LSB 48 561 #define RX_MSDU_END_WINDOW_SIZE_MSB 63 562 #define RX_MSDU_END_WINDOW_SIZE_MASK 0xffff000000000000 563 564 565 566 567 #define RX_MSDU_END_SA_SW_PEER_ID_OFFSET 0x0000000000000028 568 #define RX_MSDU_END_SA_SW_PEER_ID_LSB 0 569 #define RX_MSDU_END_SA_SW_PEER_ID_MSB 15 570 #define RX_MSDU_END_SA_SW_PEER_ID_MASK 0x000000000000ffff 571 572 573 574 575 #define RX_MSDU_END_SA_IDX_TIMEOUT_OFFSET 0x0000000000000028 576 #define RX_MSDU_END_SA_IDX_TIMEOUT_LSB 16 577 #define RX_MSDU_END_SA_IDX_TIMEOUT_MSB 16 578 #define RX_MSDU_END_SA_IDX_TIMEOUT_MASK 0x0000000000010000 579 580 581 582 583 #define RX_MSDU_END_DA_IDX_TIMEOUT_OFFSET 0x0000000000000028 584 #define RX_MSDU_END_DA_IDX_TIMEOUT_LSB 17 585 #define RX_MSDU_END_DA_IDX_TIMEOUT_MSB 17 586 #define RX_MSDU_END_DA_IDX_TIMEOUT_MASK 0x0000000000020000 587 588 589 590 591 #define RX_MSDU_END_TO_DS_OFFSET 0x0000000000000028 592 #define RX_MSDU_END_TO_DS_LSB 18 593 #define RX_MSDU_END_TO_DS_MSB 18 594 #define RX_MSDU_END_TO_DS_MASK 0x0000000000040000 595 596 597 598 599 #define RX_MSDU_END_TID_OFFSET 0x0000000000000028 600 #define RX_MSDU_END_TID_LSB 19 601 #define RX_MSDU_END_TID_MSB 22 602 #define RX_MSDU_END_TID_MASK 0x0000000000780000 603 604 605 606 607 #define RX_MSDU_END_SA_IS_VALID_OFFSET 0x0000000000000028 608 #define RX_MSDU_END_SA_IS_VALID_LSB 23 609 #define RX_MSDU_END_SA_IS_VALID_MSB 23 610 #define RX_MSDU_END_SA_IS_VALID_MASK 0x0000000000800000 611 612 613 614 615 #define RX_MSDU_END_DA_IS_VALID_OFFSET 0x0000000000000028 616 #define RX_MSDU_END_DA_IS_VALID_LSB 24 617 #define RX_MSDU_END_DA_IS_VALID_MSB 24 618 #define RX_MSDU_END_DA_IS_VALID_MASK 0x0000000001000000 619 620 621 622 623 #define RX_MSDU_END_DA_IS_MCBC_OFFSET 0x0000000000000028 624 #define RX_MSDU_END_DA_IS_MCBC_LSB 25 625 #define RX_MSDU_END_DA_IS_MCBC_MSB 25 626 #define RX_MSDU_END_DA_IS_MCBC_MASK 0x0000000002000000 627 628 629 630 631 #define RX_MSDU_END_L3_HEADER_PADDING_OFFSET 0x0000000000000028 632 #define RX_MSDU_END_L3_HEADER_PADDING_LSB 26 633 #define RX_MSDU_END_L3_HEADER_PADDING_MSB 27 634 #define RX_MSDU_END_L3_HEADER_PADDING_MASK 0x000000000c000000 635 636 637 638 639 #define RX_MSDU_END_FIRST_MSDU_OFFSET 0x0000000000000028 640 #define RX_MSDU_END_FIRST_MSDU_LSB 28 641 #define RX_MSDU_END_FIRST_MSDU_MSB 28 642 #define RX_MSDU_END_FIRST_MSDU_MASK 0x0000000010000000 643 644 645 646 647 #define RX_MSDU_END_LAST_MSDU_OFFSET 0x0000000000000028 648 #define RX_MSDU_END_LAST_MSDU_LSB 29 649 #define RX_MSDU_END_LAST_MSDU_MSB 29 650 #define RX_MSDU_END_LAST_MSDU_MASK 0x0000000020000000 651 652 653 654 655 #define RX_MSDU_END_FR_DS_OFFSET 0x0000000000000028 656 #define RX_MSDU_END_FR_DS_LSB 30 657 #define RX_MSDU_END_FR_DS_MSB 30 658 #define RX_MSDU_END_FR_DS_MASK 0x0000000040000000 659 660 661 662 663 #define RX_MSDU_END_IP_CHKSUM_FAIL_COPY_OFFSET 0x0000000000000028 664 #define RX_MSDU_END_IP_CHKSUM_FAIL_COPY_LSB 31 665 #define RX_MSDU_END_IP_CHKSUM_FAIL_COPY_MSB 31 666 #define RX_MSDU_END_IP_CHKSUM_FAIL_COPY_MASK 0x0000000080000000 667 668 669 670 671 #define RX_MSDU_END_SA_IDX_OFFSET 0x0000000000000028 672 #define RX_MSDU_END_SA_IDX_LSB 32 673 #define RX_MSDU_END_SA_IDX_MSB 47 674 #define RX_MSDU_END_SA_IDX_MASK 0x0000ffff00000000 675 676 677 678 679 #define RX_MSDU_END_DA_IDX_OR_SW_PEER_ID_OFFSET 0x0000000000000028 680 #define RX_MSDU_END_DA_IDX_OR_SW_PEER_ID_LSB 48 681 #define RX_MSDU_END_DA_IDX_OR_SW_PEER_ID_MSB 63 682 #define RX_MSDU_END_DA_IDX_OR_SW_PEER_ID_MASK 0xffff000000000000 683 684 685 686 687 #define RX_MSDU_END_MSDU_DROP_OFFSET 0x0000000000000030 688 #define RX_MSDU_END_MSDU_DROP_LSB 0 689 #define RX_MSDU_END_MSDU_DROP_MSB 0 690 #define RX_MSDU_END_MSDU_DROP_MASK 0x0000000000000001 691 692 693 694 695 #define RX_MSDU_END_REO_DESTINATION_INDICATION_OFFSET 0x0000000000000030 696 #define RX_MSDU_END_REO_DESTINATION_INDICATION_LSB 1 697 #define RX_MSDU_END_REO_DESTINATION_INDICATION_MSB 5 698 #define RX_MSDU_END_REO_DESTINATION_INDICATION_MASK 0x000000000000003e 699 700 701 702 703 #define RX_MSDU_END_FLOW_IDX_OFFSET 0x0000000000000030 704 #define RX_MSDU_END_FLOW_IDX_LSB 6 705 #define RX_MSDU_END_FLOW_IDX_MSB 25 706 #define RX_MSDU_END_FLOW_IDX_MASK 0x0000000003ffffc0 707 708 709 710 711 #define RX_MSDU_END_USE_PPE_OFFSET 0x0000000000000030 712 #define RX_MSDU_END_USE_PPE_LSB 26 713 #define RX_MSDU_END_USE_PPE_MSB 26 714 #define RX_MSDU_END_USE_PPE_MASK 0x0000000004000000 715 716 717 718 719 #define RX_MSDU_END_MESH_STA_OFFSET 0x0000000000000030 720 #define RX_MSDU_END_MESH_STA_LSB 27 721 #define RX_MSDU_END_MESH_STA_MSB 28 722 #define RX_MSDU_END_MESH_STA_MASK 0x0000000018000000 723 724 725 726 727 #define RX_MSDU_END_VLAN_CTAG_STRIPPED_OFFSET 0x0000000000000030 728 #define RX_MSDU_END_VLAN_CTAG_STRIPPED_LSB 29 729 #define RX_MSDU_END_VLAN_CTAG_STRIPPED_MSB 29 730 #define RX_MSDU_END_VLAN_CTAG_STRIPPED_MASK 0x0000000020000000 731 732 733 734 735 #define RX_MSDU_END_VLAN_STAG_STRIPPED_OFFSET 0x0000000000000030 736 #define RX_MSDU_END_VLAN_STAG_STRIPPED_LSB 30 737 #define RX_MSDU_END_VLAN_STAG_STRIPPED_MSB 30 738 #define RX_MSDU_END_VLAN_STAG_STRIPPED_MASK 0x0000000040000000 739 740 741 742 743 #define RX_MSDU_END_FRAGMENT_FLAG_OFFSET 0x0000000000000030 744 #define RX_MSDU_END_FRAGMENT_FLAG_LSB 31 745 #define RX_MSDU_END_FRAGMENT_FLAG_MSB 31 746 #define RX_MSDU_END_FRAGMENT_FLAG_MASK 0x0000000080000000 747 748 749 750 751 #define RX_MSDU_END_FSE_METADATA_OFFSET 0x0000000000000030 752 #define RX_MSDU_END_FSE_METADATA_LSB 32 753 #define RX_MSDU_END_FSE_METADATA_MSB 63 754 #define RX_MSDU_END_FSE_METADATA_MASK 0xffffffff00000000 755 756 757 758 759 #define RX_MSDU_END_CCE_METADATA_OFFSET 0x0000000000000038 760 #define RX_MSDU_END_CCE_METADATA_LSB 0 761 #define RX_MSDU_END_CCE_METADATA_MSB 15 762 #define RX_MSDU_END_CCE_METADATA_MASK 0x000000000000ffff 763 764 765 766 767 #define RX_MSDU_END_TCP_UDP_CHKSUM_OFFSET 0x0000000000000038 768 #define RX_MSDU_END_TCP_UDP_CHKSUM_LSB 16 769 #define RX_MSDU_END_TCP_UDP_CHKSUM_MSB 31 770 #define RX_MSDU_END_TCP_UDP_CHKSUM_MASK 0x00000000ffff0000 771 772 773 774 775 #define RX_MSDU_END_AGGREGATION_COUNT_OFFSET 0x0000000000000038 776 #define RX_MSDU_END_AGGREGATION_COUNT_LSB 32 777 #define RX_MSDU_END_AGGREGATION_COUNT_MSB 39 778 #define RX_MSDU_END_AGGREGATION_COUNT_MASK 0x000000ff00000000 779 780 781 782 783 #define RX_MSDU_END_FLOW_AGGREGATION_CONTINUATION_OFFSET 0x0000000000000038 784 #define RX_MSDU_END_FLOW_AGGREGATION_CONTINUATION_LSB 40 785 #define RX_MSDU_END_FLOW_AGGREGATION_CONTINUATION_MSB 40 786 #define RX_MSDU_END_FLOW_AGGREGATION_CONTINUATION_MASK 0x0000010000000000 787 788 789 790 791 #define RX_MSDU_END_FISA_TIMEOUT_OFFSET 0x0000000000000038 792 #define RX_MSDU_END_FISA_TIMEOUT_LSB 41 793 #define RX_MSDU_END_FISA_TIMEOUT_MSB 41 794 #define RX_MSDU_END_FISA_TIMEOUT_MASK 0x0000020000000000 795 796 797 798 799 #define RX_MSDU_END_TCP_UDP_CHKSUM_FAIL_COPY_OFFSET 0x0000000000000038 800 #define RX_MSDU_END_TCP_UDP_CHKSUM_FAIL_COPY_LSB 42 801 #define RX_MSDU_END_TCP_UDP_CHKSUM_FAIL_COPY_MSB 42 802 #define RX_MSDU_END_TCP_UDP_CHKSUM_FAIL_COPY_MASK 0x0000040000000000 803 804 805 806 807 #define RX_MSDU_END_MSDU_LIMIT_ERROR_OFFSET 0x0000000000000038 808 #define RX_MSDU_END_MSDU_LIMIT_ERROR_LSB 43 809 #define RX_MSDU_END_MSDU_LIMIT_ERROR_MSB 43 810 #define RX_MSDU_END_MSDU_LIMIT_ERROR_MASK 0x0000080000000000 811 812 813 814 815 #define RX_MSDU_END_FLOW_IDX_TIMEOUT_OFFSET 0x0000000000000038 816 #define RX_MSDU_END_FLOW_IDX_TIMEOUT_LSB 44 817 #define RX_MSDU_END_FLOW_IDX_TIMEOUT_MSB 44 818 #define RX_MSDU_END_FLOW_IDX_TIMEOUT_MASK 0x0000100000000000 819 820 821 822 823 #define RX_MSDU_END_FLOW_IDX_INVALID_OFFSET 0x0000000000000038 824 #define RX_MSDU_END_FLOW_IDX_INVALID_LSB 45 825 #define RX_MSDU_END_FLOW_IDX_INVALID_MSB 45 826 #define RX_MSDU_END_FLOW_IDX_INVALID_MASK 0x0000200000000000 827 828 829 830 831 #define RX_MSDU_END_CCE_MATCH_OFFSET 0x0000000000000038 832 #define RX_MSDU_END_CCE_MATCH_LSB 46 833 #define RX_MSDU_END_CCE_MATCH_MSB 46 834 #define RX_MSDU_END_CCE_MATCH_MASK 0x0000400000000000 835 836 837 838 839 #define RX_MSDU_END_AMSDU_PARSER_ERROR_OFFSET 0x0000000000000038 840 #define RX_MSDU_END_AMSDU_PARSER_ERROR_LSB 47 841 #define RX_MSDU_END_AMSDU_PARSER_ERROR_MSB 47 842 #define RX_MSDU_END_AMSDU_PARSER_ERROR_MASK 0x0000800000000000 843 844 845 846 847 #define RX_MSDU_END_CUMULATIVE_IP_LENGTH_OFFSET 0x0000000000000038 848 #define RX_MSDU_END_CUMULATIVE_IP_LENGTH_LSB 48 849 #define RX_MSDU_END_CUMULATIVE_IP_LENGTH_MSB 63 850 #define RX_MSDU_END_CUMULATIVE_IP_LENGTH_MASK 0xffff000000000000 851 852 853 854 855 #define RX_MSDU_END_KEY_ID_OCTET_OFFSET 0x0000000000000040 856 #define RX_MSDU_END_KEY_ID_OCTET_LSB 0 857 #define RX_MSDU_END_KEY_ID_OCTET_MSB 7 858 #define RX_MSDU_END_KEY_ID_OCTET_MASK 0x00000000000000ff 859 860 861 862 863 #define RX_MSDU_END_RESERVED_16A_OFFSET 0x0000000000000040 864 #define RX_MSDU_END_RESERVED_16A_LSB 8 865 #define RX_MSDU_END_RESERVED_16A_MSB 31 866 #define RX_MSDU_END_RESERVED_16A_MASK 0x00000000ffffff00 867 868 869 870 871 #define RX_MSDU_END_RESERVED_17A_OFFSET 0x0000000000000040 872 #define RX_MSDU_END_RESERVED_17A_LSB 32 873 #define RX_MSDU_END_RESERVED_17A_MSB 37 874 #define RX_MSDU_END_RESERVED_17A_MASK 0x0000003f00000000 875 876 877 878 879 #define RX_MSDU_END_SERVICE_CODE_OFFSET 0x0000000000000040 880 #define RX_MSDU_END_SERVICE_CODE_LSB 38 881 #define RX_MSDU_END_SERVICE_CODE_MSB 46 882 #define RX_MSDU_END_SERVICE_CODE_MASK 0x00007fc000000000 883 884 885 886 887 #define RX_MSDU_END_PRIORITY_VALID_OFFSET 0x0000000000000040 888 #define RX_MSDU_END_PRIORITY_VALID_LSB 47 889 #define RX_MSDU_END_PRIORITY_VALID_MSB 47 890 #define RX_MSDU_END_PRIORITY_VALID_MASK 0x0000800000000000 891 892 893 894 895 #define RX_MSDU_END_INTRA_BSS_OFFSET 0x0000000000000040 896 #define RX_MSDU_END_INTRA_BSS_LSB 48 897 #define RX_MSDU_END_INTRA_BSS_MSB 48 898 #define RX_MSDU_END_INTRA_BSS_MASK 0x0001000000000000 899 900 901 902 903 #define RX_MSDU_END_DEST_CHIP_ID_OFFSET 0x0000000000000040 904 #define RX_MSDU_END_DEST_CHIP_ID_LSB 49 905 #define RX_MSDU_END_DEST_CHIP_ID_MSB 50 906 #define RX_MSDU_END_DEST_CHIP_ID_MASK 0x0006000000000000 907 908 909 910 911 #define RX_MSDU_END_MULTICAST_ECHO_OFFSET 0x0000000000000040 912 #define RX_MSDU_END_MULTICAST_ECHO_LSB 51 913 #define RX_MSDU_END_MULTICAST_ECHO_MSB 51 914 #define RX_MSDU_END_MULTICAST_ECHO_MASK 0x0008000000000000 915 916 917 918 919 #define RX_MSDU_END_WDS_LEARNING_EVENT_OFFSET 0x0000000000000040 920 #define RX_MSDU_END_WDS_LEARNING_EVENT_LSB 52 921 #define RX_MSDU_END_WDS_LEARNING_EVENT_MSB 52 922 #define RX_MSDU_END_WDS_LEARNING_EVENT_MASK 0x0010000000000000 923 924 925 926 927 #define RX_MSDU_END_WDS_ROAMING_EVENT_OFFSET 0x0000000000000040 928 #define RX_MSDU_END_WDS_ROAMING_EVENT_LSB 53 929 #define RX_MSDU_END_WDS_ROAMING_EVENT_MSB 53 930 #define RX_MSDU_END_WDS_ROAMING_EVENT_MASK 0x0020000000000000 931 932 933 934 935 #define RX_MSDU_END_WDS_KEEP_ALIVE_EVENT_OFFSET 0x0000000000000040 936 #define RX_MSDU_END_WDS_KEEP_ALIVE_EVENT_LSB 54 937 #define RX_MSDU_END_WDS_KEEP_ALIVE_EVENT_MSB 54 938 #define RX_MSDU_END_WDS_KEEP_ALIVE_EVENT_MASK 0x0040000000000000 939 940 941 942 943 #define RX_MSDU_END_RESERVED_17B_OFFSET 0x0000000000000040 944 #define RX_MSDU_END_RESERVED_17B_LSB 55 945 #define RX_MSDU_END_RESERVED_17B_MSB 63 946 #define RX_MSDU_END_RESERVED_17B_MASK 0xff80000000000000 947 948 949 950 951 #define RX_MSDU_END_MSDU_LENGTH_OFFSET 0x0000000000000048 952 #define RX_MSDU_END_MSDU_LENGTH_LSB 0 953 #define RX_MSDU_END_MSDU_LENGTH_MSB 13 954 #define RX_MSDU_END_MSDU_LENGTH_MASK 0x0000000000003fff 955 956 957 958 959 #define RX_MSDU_END_STBC_OFFSET 0x0000000000000048 960 #define RX_MSDU_END_STBC_LSB 14 961 #define RX_MSDU_END_STBC_MSB 14 962 #define RX_MSDU_END_STBC_MASK 0x0000000000004000 963 964 965 966 967 #define RX_MSDU_END_IPSEC_ESP_OFFSET 0x0000000000000048 968 #define RX_MSDU_END_IPSEC_ESP_LSB 15 969 #define RX_MSDU_END_IPSEC_ESP_MSB 15 970 #define RX_MSDU_END_IPSEC_ESP_MASK 0x0000000000008000 971 972 973 974 975 #define RX_MSDU_END_L3_OFFSET_OFFSET 0x0000000000000048 976 #define RX_MSDU_END_L3_OFFSET_LSB 16 977 #define RX_MSDU_END_L3_OFFSET_MSB 22 978 #define RX_MSDU_END_L3_OFFSET_MASK 0x00000000007f0000 979 980 981 982 983 #define RX_MSDU_END_IPSEC_AH_OFFSET 0x0000000000000048 984 #define RX_MSDU_END_IPSEC_AH_LSB 23 985 #define RX_MSDU_END_IPSEC_AH_MSB 23 986 #define RX_MSDU_END_IPSEC_AH_MASK 0x0000000000800000 987 988 989 990 991 #define RX_MSDU_END_L4_OFFSET_OFFSET 0x0000000000000048 992 #define RX_MSDU_END_L4_OFFSET_LSB 24 993 #define RX_MSDU_END_L4_OFFSET_MSB 31 994 #define RX_MSDU_END_L4_OFFSET_MASK 0x00000000ff000000 995 996 997 998 999 #define RX_MSDU_END_MSDU_NUMBER_OFFSET 0x0000000000000048 1000 #define RX_MSDU_END_MSDU_NUMBER_LSB 32 1001 #define RX_MSDU_END_MSDU_NUMBER_MSB 39 1002 #define RX_MSDU_END_MSDU_NUMBER_MASK 0x000000ff00000000 1003 1004 1005 1006 1007 #define RX_MSDU_END_DECAP_FORMAT_OFFSET 0x0000000000000048 1008 #define RX_MSDU_END_DECAP_FORMAT_LSB 40 1009 #define RX_MSDU_END_DECAP_FORMAT_MSB 41 1010 #define RX_MSDU_END_DECAP_FORMAT_MASK 0x0000030000000000 1011 1012 1013 1014 1015 #define RX_MSDU_END_IPV4_PROTO_OFFSET 0x0000000000000048 1016 #define RX_MSDU_END_IPV4_PROTO_LSB 42 1017 #define RX_MSDU_END_IPV4_PROTO_MSB 42 1018 #define RX_MSDU_END_IPV4_PROTO_MASK 0x0000040000000000 1019 1020 1021 1022 1023 #define RX_MSDU_END_IPV6_PROTO_OFFSET 0x0000000000000048 1024 #define RX_MSDU_END_IPV6_PROTO_LSB 43 1025 #define RX_MSDU_END_IPV6_PROTO_MSB 43 1026 #define RX_MSDU_END_IPV6_PROTO_MASK 0x0000080000000000 1027 1028 1029 1030 1031 #define RX_MSDU_END_TCP_PROTO_OFFSET 0x0000000000000048 1032 #define RX_MSDU_END_TCP_PROTO_LSB 44 1033 #define RX_MSDU_END_TCP_PROTO_MSB 44 1034 #define RX_MSDU_END_TCP_PROTO_MASK 0x0000100000000000 1035 1036 1037 1038 1039 #define RX_MSDU_END_UDP_PROTO_OFFSET 0x0000000000000048 1040 #define RX_MSDU_END_UDP_PROTO_LSB 45 1041 #define RX_MSDU_END_UDP_PROTO_MSB 45 1042 #define RX_MSDU_END_UDP_PROTO_MASK 0x0000200000000000 1043 1044 1045 1046 1047 #define RX_MSDU_END_IP_FRAG_OFFSET 0x0000000000000048 1048 #define RX_MSDU_END_IP_FRAG_LSB 46 1049 #define RX_MSDU_END_IP_FRAG_MSB 46 1050 #define RX_MSDU_END_IP_FRAG_MASK 0x0000400000000000 1051 1052 1053 1054 1055 #define RX_MSDU_END_TCP_ONLY_ACK_OFFSET 0x0000000000000048 1056 #define RX_MSDU_END_TCP_ONLY_ACK_LSB 47 1057 #define RX_MSDU_END_TCP_ONLY_ACK_MSB 47 1058 #define RX_MSDU_END_TCP_ONLY_ACK_MASK 0x0000800000000000 1059 1060 1061 1062 1063 #define RX_MSDU_END_DA_IS_BCAST_MCAST_OFFSET 0x0000000000000048 1064 #define RX_MSDU_END_DA_IS_BCAST_MCAST_LSB 48 1065 #define RX_MSDU_END_DA_IS_BCAST_MCAST_MSB 48 1066 #define RX_MSDU_END_DA_IS_BCAST_MCAST_MASK 0x0001000000000000 1067 1068 1069 1070 1071 #define RX_MSDU_END_TOEPLITZ_HASH_SEL_OFFSET 0x0000000000000048 1072 #define RX_MSDU_END_TOEPLITZ_HASH_SEL_LSB 49 1073 #define RX_MSDU_END_TOEPLITZ_HASH_SEL_MSB 50 1074 #define RX_MSDU_END_TOEPLITZ_HASH_SEL_MASK 0x0006000000000000 1075 1076 1077 1078 1079 #define RX_MSDU_END_IP_FIXED_HEADER_VALID_OFFSET 0x0000000000000048 1080 #define RX_MSDU_END_IP_FIXED_HEADER_VALID_LSB 51 1081 #define RX_MSDU_END_IP_FIXED_HEADER_VALID_MSB 51 1082 #define RX_MSDU_END_IP_FIXED_HEADER_VALID_MASK 0x0008000000000000 1083 1084 1085 1086 1087 #define RX_MSDU_END_IP_EXTN_HEADER_VALID_OFFSET 0x0000000000000048 1088 #define RX_MSDU_END_IP_EXTN_HEADER_VALID_LSB 52 1089 #define RX_MSDU_END_IP_EXTN_HEADER_VALID_MSB 52 1090 #define RX_MSDU_END_IP_EXTN_HEADER_VALID_MASK 0x0010000000000000 1091 1092 1093 1094 1095 #define RX_MSDU_END_TCP_UDP_HEADER_VALID_OFFSET 0x0000000000000048 1096 #define RX_MSDU_END_TCP_UDP_HEADER_VALID_LSB 53 1097 #define RX_MSDU_END_TCP_UDP_HEADER_VALID_MSB 53 1098 #define RX_MSDU_END_TCP_UDP_HEADER_VALID_MASK 0x0020000000000000 1099 1100 1101 1102 1103 #define RX_MSDU_END_MESH_CONTROL_PRESENT_OFFSET 0x0000000000000048 1104 #define RX_MSDU_END_MESH_CONTROL_PRESENT_LSB 54 1105 #define RX_MSDU_END_MESH_CONTROL_PRESENT_MSB 54 1106 #define RX_MSDU_END_MESH_CONTROL_PRESENT_MASK 0x0040000000000000 1107 1108 1109 1110 1111 #define RX_MSDU_END_LDPC_OFFSET 0x0000000000000048 1112 #define RX_MSDU_END_LDPC_LSB 55 1113 #define RX_MSDU_END_LDPC_MSB 55 1114 #define RX_MSDU_END_LDPC_MASK 0x0080000000000000 1115 1116 1117 1118 1119 #define RX_MSDU_END_IP4_PROTOCOL_IP6_NEXT_HEADER_OFFSET 0x0000000000000048 1120 #define RX_MSDU_END_IP4_PROTOCOL_IP6_NEXT_HEADER_LSB 56 1121 #define RX_MSDU_END_IP4_PROTOCOL_IP6_NEXT_HEADER_MSB 63 1122 #define RX_MSDU_END_IP4_PROTOCOL_IP6_NEXT_HEADER_MASK 0xff00000000000000 1123 1124 1125 1126 1127 #define RX_MSDU_END_VLAN_CTAG_CI_OFFSET 0x0000000000000050 1128 #define RX_MSDU_END_VLAN_CTAG_CI_LSB 0 1129 #define RX_MSDU_END_VLAN_CTAG_CI_MSB 15 1130 #define RX_MSDU_END_VLAN_CTAG_CI_MASK 0x000000000000ffff 1131 1132 1133 1134 1135 #define RX_MSDU_END_VLAN_STAG_CI_OFFSET 0x0000000000000050 1136 #define RX_MSDU_END_VLAN_STAG_CI_LSB 16 1137 #define RX_MSDU_END_VLAN_STAG_CI_MSB 31 1138 #define RX_MSDU_END_VLAN_STAG_CI_MASK 0x00000000ffff0000 1139 1140 1141 1142 1143 #define RX_MSDU_END_PEER_META_DATA_OFFSET 0x0000000000000050 1144 #define RX_MSDU_END_PEER_META_DATA_LSB 32 1145 #define RX_MSDU_END_PEER_META_DATA_MSB 63 1146 #define RX_MSDU_END_PEER_META_DATA_MASK 0xffffffff00000000 1147 1148 1149 1150 1151 #define RX_MSDU_END_USER_RSSI_OFFSET 0x0000000000000058 1152 #define RX_MSDU_END_USER_RSSI_LSB 0 1153 #define RX_MSDU_END_USER_RSSI_MSB 7 1154 #define RX_MSDU_END_USER_RSSI_MASK 0x00000000000000ff 1155 1156 1157 1158 1159 #define RX_MSDU_END_PKT_TYPE_OFFSET 0x0000000000000058 1160 #define RX_MSDU_END_PKT_TYPE_LSB 8 1161 #define RX_MSDU_END_PKT_TYPE_MSB 11 1162 #define RX_MSDU_END_PKT_TYPE_MASK 0x0000000000000f00 1163 1164 1165 1166 1167 #define RX_MSDU_END_SGI_OFFSET 0x0000000000000058 1168 #define RX_MSDU_END_SGI_LSB 12 1169 #define RX_MSDU_END_SGI_MSB 13 1170 #define RX_MSDU_END_SGI_MASK 0x0000000000003000 1171 1172 1173 1174 1175 #define RX_MSDU_END_RATE_MCS_OFFSET 0x0000000000000058 1176 #define RX_MSDU_END_RATE_MCS_LSB 14 1177 #define RX_MSDU_END_RATE_MCS_MSB 17 1178 #define RX_MSDU_END_RATE_MCS_MASK 0x000000000003c000 1179 1180 1181 1182 1183 #define RX_MSDU_END_RECEIVE_BANDWIDTH_OFFSET 0x0000000000000058 1184 #define RX_MSDU_END_RECEIVE_BANDWIDTH_LSB 18 1185 #define RX_MSDU_END_RECEIVE_BANDWIDTH_MSB 20 1186 #define RX_MSDU_END_RECEIVE_BANDWIDTH_MASK 0x00000000001c0000 1187 1188 1189 1190 1191 #define RX_MSDU_END_RECEPTION_TYPE_OFFSET 0x0000000000000058 1192 #define RX_MSDU_END_RECEPTION_TYPE_LSB 21 1193 #define RX_MSDU_END_RECEPTION_TYPE_MSB 23 1194 #define RX_MSDU_END_RECEPTION_TYPE_MASK 0x0000000000e00000 1195 1196 1197 1198 1199 #define RX_MSDU_END_MIMO_SS_BITMAP_OFFSET 0x0000000000000058 1200 #define RX_MSDU_END_MIMO_SS_BITMAP_LSB 24 1201 #define RX_MSDU_END_MIMO_SS_BITMAP_MSB 30 1202 #define RX_MSDU_END_MIMO_SS_BITMAP_MASK 0x000000007f000000 1203 1204 1205 1206 1207 #define RX_MSDU_END_MSDU_DONE_COPY_OFFSET 0x0000000000000058 1208 #define RX_MSDU_END_MSDU_DONE_COPY_LSB 31 1209 #define RX_MSDU_END_MSDU_DONE_COPY_MSB 31 1210 #define RX_MSDU_END_MSDU_DONE_COPY_MASK 0x0000000080000000 1211 1212 1213 1214 1215 #define RX_MSDU_END_FLOW_ID_TOEPLITZ_OFFSET 0x0000000000000058 1216 #define RX_MSDU_END_FLOW_ID_TOEPLITZ_LSB 32 1217 #define RX_MSDU_END_FLOW_ID_TOEPLITZ_MSB 63 1218 #define RX_MSDU_END_FLOW_ID_TOEPLITZ_MASK 0xffffffff00000000 1219 1220 1221 1222 1223 #define RX_MSDU_END_PPDU_START_TIMESTAMP_63_32_OFFSET 0x0000000000000060 1224 #define RX_MSDU_END_PPDU_START_TIMESTAMP_63_32_LSB 0 1225 #define RX_MSDU_END_PPDU_START_TIMESTAMP_63_32_MSB 31 1226 #define RX_MSDU_END_PPDU_START_TIMESTAMP_63_32_MASK 0x00000000ffffffff 1227 1228 1229 1230 1231 #define RX_MSDU_END_SW_PHY_META_DATA_OFFSET 0x0000000000000060 1232 #define RX_MSDU_END_SW_PHY_META_DATA_LSB 32 1233 #define RX_MSDU_END_SW_PHY_META_DATA_MSB 63 1234 #define RX_MSDU_END_SW_PHY_META_DATA_MASK 0xffffffff00000000 1235 1236 1237 1238 1239 #define RX_MSDU_END_PPDU_START_TIMESTAMP_31_0_OFFSET 0x0000000000000068 1240 #define RX_MSDU_END_PPDU_START_TIMESTAMP_31_0_LSB 0 1241 #define RX_MSDU_END_PPDU_START_TIMESTAMP_31_0_MSB 31 1242 #define RX_MSDU_END_PPDU_START_TIMESTAMP_31_0_MASK 0x00000000ffffffff 1243 1244 1245 1246 1247 #define RX_MSDU_END_TOEPLITZ_HASH_2_OR_4_OFFSET 0x0000000000000068 1248 #define RX_MSDU_END_TOEPLITZ_HASH_2_OR_4_LSB 32 1249 #define RX_MSDU_END_TOEPLITZ_HASH_2_OR_4_MSB 63 1250 #define RX_MSDU_END_TOEPLITZ_HASH_2_OR_4_MASK 0xffffffff00000000 1251 1252 1253 1254 1255 #define RX_MSDU_END_RESERVED_28A_OFFSET 0x0000000000000070 1256 #define RX_MSDU_END_RESERVED_28A_LSB 0 1257 #define RX_MSDU_END_RESERVED_28A_MSB 15 1258 #define RX_MSDU_END_RESERVED_28A_MASK 0x000000000000ffff 1259 1260 1261 1262 1263 #define RX_MSDU_END_SA_15_0_OFFSET 0x0000000000000070 1264 #define RX_MSDU_END_SA_15_0_LSB 16 1265 #define RX_MSDU_END_SA_15_0_MSB 31 1266 #define RX_MSDU_END_SA_15_0_MASK 0x00000000ffff0000 1267 1268 1269 1270 1271 #define RX_MSDU_END_SA_47_16_OFFSET 0x0000000000000070 1272 #define RX_MSDU_END_SA_47_16_LSB 32 1273 #define RX_MSDU_END_SA_47_16_MSB 63 1274 #define RX_MSDU_END_SA_47_16_MASK 0xffffffff00000000 1275 1276 1277 1278 1279 #define RX_MSDU_END_FIRST_MPDU_OFFSET 0x0000000000000078 1280 #define RX_MSDU_END_FIRST_MPDU_LSB 0 1281 #define RX_MSDU_END_FIRST_MPDU_MSB 0 1282 #define RX_MSDU_END_FIRST_MPDU_MASK 0x0000000000000001 1283 1284 1285 1286 1287 #define RX_MSDU_END_RESERVED_30A_OFFSET 0x0000000000000078 1288 #define RX_MSDU_END_RESERVED_30A_LSB 1 1289 #define RX_MSDU_END_RESERVED_30A_MSB 1 1290 #define RX_MSDU_END_RESERVED_30A_MASK 0x0000000000000002 1291 1292 1293 1294 1295 #define RX_MSDU_END_MCAST_BCAST_OFFSET 0x0000000000000078 1296 #define RX_MSDU_END_MCAST_BCAST_LSB 2 1297 #define RX_MSDU_END_MCAST_BCAST_MSB 2 1298 #define RX_MSDU_END_MCAST_BCAST_MASK 0x0000000000000004 1299 1300 1301 1302 1303 #define RX_MSDU_END_AST_INDEX_NOT_FOUND_OFFSET 0x0000000000000078 1304 #define RX_MSDU_END_AST_INDEX_NOT_FOUND_LSB 3 1305 #define RX_MSDU_END_AST_INDEX_NOT_FOUND_MSB 3 1306 #define RX_MSDU_END_AST_INDEX_NOT_FOUND_MASK 0x0000000000000008 1307 1308 1309 1310 1311 #define RX_MSDU_END_AST_INDEX_TIMEOUT_OFFSET 0x0000000000000078 1312 #define RX_MSDU_END_AST_INDEX_TIMEOUT_LSB 4 1313 #define RX_MSDU_END_AST_INDEX_TIMEOUT_MSB 4 1314 #define RX_MSDU_END_AST_INDEX_TIMEOUT_MASK 0x0000000000000010 1315 1316 1317 1318 1319 #define RX_MSDU_END_POWER_MGMT_OFFSET 0x0000000000000078 1320 #define RX_MSDU_END_POWER_MGMT_LSB 5 1321 #define RX_MSDU_END_POWER_MGMT_MSB 5 1322 #define RX_MSDU_END_POWER_MGMT_MASK 0x0000000000000020 1323 1324 1325 1326 1327 #define RX_MSDU_END_NON_QOS_OFFSET 0x0000000000000078 1328 #define RX_MSDU_END_NON_QOS_LSB 6 1329 #define RX_MSDU_END_NON_QOS_MSB 6 1330 #define RX_MSDU_END_NON_QOS_MASK 0x0000000000000040 1331 1332 1333 1334 1335 #define RX_MSDU_END_NULL_DATA_OFFSET 0x0000000000000078 1336 #define RX_MSDU_END_NULL_DATA_LSB 7 1337 #define RX_MSDU_END_NULL_DATA_MSB 7 1338 #define RX_MSDU_END_NULL_DATA_MASK 0x0000000000000080 1339 1340 1341 1342 1343 #define RX_MSDU_END_MGMT_TYPE_OFFSET 0x0000000000000078 1344 #define RX_MSDU_END_MGMT_TYPE_LSB 8 1345 #define RX_MSDU_END_MGMT_TYPE_MSB 8 1346 #define RX_MSDU_END_MGMT_TYPE_MASK 0x0000000000000100 1347 1348 1349 1350 1351 #define RX_MSDU_END_CTRL_TYPE_OFFSET 0x0000000000000078 1352 #define RX_MSDU_END_CTRL_TYPE_LSB 9 1353 #define RX_MSDU_END_CTRL_TYPE_MSB 9 1354 #define RX_MSDU_END_CTRL_TYPE_MASK 0x0000000000000200 1355 1356 1357 1358 1359 #define RX_MSDU_END_MORE_DATA_OFFSET 0x0000000000000078 1360 #define RX_MSDU_END_MORE_DATA_LSB 10 1361 #define RX_MSDU_END_MORE_DATA_MSB 10 1362 #define RX_MSDU_END_MORE_DATA_MASK 0x0000000000000400 1363 1364 1365 1366 1367 #define RX_MSDU_END_EOSP_OFFSET 0x0000000000000078 1368 #define RX_MSDU_END_EOSP_LSB 11 1369 #define RX_MSDU_END_EOSP_MSB 11 1370 #define RX_MSDU_END_EOSP_MASK 0x0000000000000800 1371 1372 1373 1374 1375 #define RX_MSDU_END_A_MSDU_ERROR_OFFSET 0x0000000000000078 1376 #define RX_MSDU_END_A_MSDU_ERROR_LSB 12 1377 #define RX_MSDU_END_A_MSDU_ERROR_MSB 12 1378 #define RX_MSDU_END_A_MSDU_ERROR_MASK 0x0000000000001000 1379 1380 1381 1382 1383 #define RX_MSDU_END_RESERVED_30B_OFFSET 0x0000000000000078 1384 #define RX_MSDU_END_RESERVED_30B_LSB 13 1385 #define RX_MSDU_END_RESERVED_30B_MSB 13 1386 #define RX_MSDU_END_RESERVED_30B_MASK 0x0000000000002000 1387 1388 1389 1390 1391 #define RX_MSDU_END_ORDER_OFFSET 0x0000000000000078 1392 #define RX_MSDU_END_ORDER_LSB 14 1393 #define RX_MSDU_END_ORDER_MSB 14 1394 #define RX_MSDU_END_ORDER_MASK 0x0000000000004000 1395 1396 1397 1398 1399 #define RX_MSDU_END_WIFI_PARSER_ERROR_OFFSET 0x0000000000000078 1400 #define RX_MSDU_END_WIFI_PARSER_ERROR_LSB 15 1401 #define RX_MSDU_END_WIFI_PARSER_ERROR_MSB 15 1402 #define RX_MSDU_END_WIFI_PARSER_ERROR_MASK 0x0000000000008000 1403 1404 1405 1406 1407 #define RX_MSDU_END_OVERFLOW_ERR_OFFSET 0x0000000000000078 1408 #define RX_MSDU_END_OVERFLOW_ERR_LSB 16 1409 #define RX_MSDU_END_OVERFLOW_ERR_MSB 16 1410 #define RX_MSDU_END_OVERFLOW_ERR_MASK 0x0000000000010000 1411 1412 1413 1414 1415 #define RX_MSDU_END_MSDU_LENGTH_ERR_OFFSET 0x0000000000000078 1416 #define RX_MSDU_END_MSDU_LENGTH_ERR_LSB 17 1417 #define RX_MSDU_END_MSDU_LENGTH_ERR_MSB 17 1418 #define RX_MSDU_END_MSDU_LENGTH_ERR_MASK 0x0000000000020000 1419 1420 1421 1422 1423 #define RX_MSDU_END_TCP_UDP_CHKSUM_FAIL_OFFSET 0x0000000000000078 1424 #define RX_MSDU_END_TCP_UDP_CHKSUM_FAIL_LSB 18 1425 #define RX_MSDU_END_TCP_UDP_CHKSUM_FAIL_MSB 18 1426 #define RX_MSDU_END_TCP_UDP_CHKSUM_FAIL_MASK 0x0000000000040000 1427 1428 1429 1430 1431 #define RX_MSDU_END_IP_CHKSUM_FAIL_OFFSET 0x0000000000000078 1432 #define RX_MSDU_END_IP_CHKSUM_FAIL_LSB 19 1433 #define RX_MSDU_END_IP_CHKSUM_FAIL_MSB 19 1434 #define RX_MSDU_END_IP_CHKSUM_FAIL_MASK 0x0000000000080000 1435 1436 1437 1438 1439 #define RX_MSDU_END_SA_IDX_INVALID_OFFSET 0x0000000000000078 1440 #define RX_MSDU_END_SA_IDX_INVALID_LSB 20 1441 #define RX_MSDU_END_SA_IDX_INVALID_MSB 20 1442 #define RX_MSDU_END_SA_IDX_INVALID_MASK 0x0000000000100000 1443 1444 1445 1446 1447 #define RX_MSDU_END_DA_IDX_INVALID_OFFSET 0x0000000000000078 1448 #define RX_MSDU_END_DA_IDX_INVALID_LSB 21 1449 #define RX_MSDU_END_DA_IDX_INVALID_MSB 21 1450 #define RX_MSDU_END_DA_IDX_INVALID_MASK 0x0000000000200000 1451 1452 1453 1454 1455 #define RX_MSDU_END_AMSDU_ADDR_MISMATCH_OFFSET 0x0000000000000078 1456 #define RX_MSDU_END_AMSDU_ADDR_MISMATCH_LSB 22 1457 #define RX_MSDU_END_AMSDU_ADDR_MISMATCH_MSB 22 1458 #define RX_MSDU_END_AMSDU_ADDR_MISMATCH_MASK 0x0000000000400000 1459 1460 1461 1462 1463 #define RX_MSDU_END_RX_IN_TX_DECRYPT_BYP_OFFSET 0x0000000000000078 1464 #define RX_MSDU_END_RX_IN_TX_DECRYPT_BYP_LSB 23 1465 #define RX_MSDU_END_RX_IN_TX_DECRYPT_BYP_MSB 23 1466 #define RX_MSDU_END_RX_IN_TX_DECRYPT_BYP_MASK 0x0000000000800000 1467 1468 1469 1470 1471 #define RX_MSDU_END_ENCRYPT_REQUIRED_OFFSET 0x0000000000000078 1472 #define RX_MSDU_END_ENCRYPT_REQUIRED_LSB 24 1473 #define RX_MSDU_END_ENCRYPT_REQUIRED_MSB 24 1474 #define RX_MSDU_END_ENCRYPT_REQUIRED_MASK 0x0000000001000000 1475 1476 1477 1478 1479 #define RX_MSDU_END_DIRECTED_OFFSET 0x0000000000000078 1480 #define RX_MSDU_END_DIRECTED_LSB 25 1481 #define RX_MSDU_END_DIRECTED_MSB 25 1482 #define RX_MSDU_END_DIRECTED_MASK 0x0000000002000000 1483 1484 1485 1486 1487 #define RX_MSDU_END_BUFFER_FRAGMENT_OFFSET 0x0000000000000078 1488 #define RX_MSDU_END_BUFFER_FRAGMENT_LSB 26 1489 #define RX_MSDU_END_BUFFER_FRAGMENT_MSB 26 1490 #define RX_MSDU_END_BUFFER_FRAGMENT_MASK 0x0000000004000000 1491 1492 1493 1494 1495 #define RX_MSDU_END_MPDU_LENGTH_ERR_OFFSET 0x0000000000000078 1496 #define RX_MSDU_END_MPDU_LENGTH_ERR_LSB 27 1497 #define RX_MSDU_END_MPDU_LENGTH_ERR_MSB 27 1498 #define RX_MSDU_END_MPDU_LENGTH_ERR_MASK 0x0000000008000000 1499 1500 1501 1502 1503 #define RX_MSDU_END_TKIP_MIC_ERR_OFFSET 0x0000000000000078 1504 #define RX_MSDU_END_TKIP_MIC_ERR_LSB 28 1505 #define RX_MSDU_END_TKIP_MIC_ERR_MSB 28 1506 #define RX_MSDU_END_TKIP_MIC_ERR_MASK 0x0000000010000000 1507 1508 1509 1510 1511 #define RX_MSDU_END_DECRYPT_ERR_OFFSET 0x0000000000000078 1512 #define RX_MSDU_END_DECRYPT_ERR_LSB 29 1513 #define RX_MSDU_END_DECRYPT_ERR_MSB 29 1514 #define RX_MSDU_END_DECRYPT_ERR_MASK 0x0000000020000000 1515 1516 1517 1518 1519 #define RX_MSDU_END_UNENCRYPTED_FRAME_ERR_OFFSET 0x0000000000000078 1520 #define RX_MSDU_END_UNENCRYPTED_FRAME_ERR_LSB 30 1521 #define RX_MSDU_END_UNENCRYPTED_FRAME_ERR_MSB 30 1522 #define RX_MSDU_END_UNENCRYPTED_FRAME_ERR_MASK 0x0000000040000000 1523 1524 1525 1526 1527 #define RX_MSDU_END_FCS_ERR_OFFSET 0x0000000000000078 1528 #define RX_MSDU_END_FCS_ERR_LSB 31 1529 #define RX_MSDU_END_FCS_ERR_MSB 31 1530 #define RX_MSDU_END_FCS_ERR_MASK 0x0000000080000000 1531 1532 1533 1534 1535 #define RX_MSDU_END_RESERVED_31A_OFFSET 0x0000000000000078 1536 #define RX_MSDU_END_RESERVED_31A_LSB 32 1537 #define RX_MSDU_END_RESERVED_31A_MSB 41 1538 #define RX_MSDU_END_RESERVED_31A_MASK 0x000003ff00000000 1539 1540 1541 1542 1543 #define RX_MSDU_END_DECRYPT_STATUS_CODE_OFFSET 0x0000000000000078 1544 #define RX_MSDU_END_DECRYPT_STATUS_CODE_LSB 42 1545 #define RX_MSDU_END_DECRYPT_STATUS_CODE_MSB 44 1546 #define RX_MSDU_END_DECRYPT_STATUS_CODE_MASK 0x00001c0000000000 1547 1548 1549 1550 1551 #define RX_MSDU_END_RX_BITMAP_NOT_UPDATED_OFFSET 0x0000000000000078 1552 #define RX_MSDU_END_RX_BITMAP_NOT_UPDATED_LSB 45 1553 #define RX_MSDU_END_RX_BITMAP_NOT_UPDATED_MSB 45 1554 #define RX_MSDU_END_RX_BITMAP_NOT_UPDATED_MASK 0x0000200000000000 1555 1556 1557 1558 1559 #define RX_MSDU_END_RESERVED_31B_OFFSET 0x0000000000000078 1560 #define RX_MSDU_END_RESERVED_31B_LSB 46 1561 #define RX_MSDU_END_RESERVED_31B_MSB 62 1562 #define RX_MSDU_END_RESERVED_31B_MASK 0x7fffc00000000000 1563 1564 1565 1566 1567 #define RX_MSDU_END_MSDU_DONE_OFFSET 0x0000000000000078 1568 #define RX_MSDU_END_MSDU_DONE_LSB 63 1569 #define RX_MSDU_END_MSDU_DONE_MSB 63 1570 #define RX_MSDU_END_MSDU_DONE_MASK 0x8000000000000000 1571 1572 1573 1574 #endif 1575