xref: /wlan-driver/fw-api/hw/qcn9224/v2/eht_sig_usr_su_info.h (revision 5113495b16420b49004c444715d2daae2066e7dc)
1 
2 /* Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved.
3  *
4  * Permission to use, copy, modify, and/or distribute this software for any
5  * purpose with or without fee is hereby granted, provided that the above
6  * copyright notice and this permission notice appear in all copies.
7  *
8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15  */
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23 
24 
25 
26 #ifndef _EHT_SIG_USR_SU_INFO_H_
27 #define _EHT_SIG_USR_SU_INFO_H_
28 #if !defined(__ASSEMBLER__)
29 #endif
30 
31 #define NUM_OF_DWORDS_EHT_SIG_USR_SU_INFO 1
32 
33 
34 struct eht_sig_usr_su_info {
35 #ifndef WIFI_BIT_ORDER_BIG_ENDIAN
36              uint32_t sta_id                                                  : 11,
37                       sta_mcs                                                 :  4,
38                       validate_0a                                             :  1,
39                       nss                                                     :  4,
40                       txbf                                                    :  1,
41                       sta_coding                                              :  1,
42                       reserved_0b                                             :  9,
43                       rx_integrity_check_passed                               :  1;
44 #else
45              uint32_t rx_integrity_check_passed                               :  1,
46                       reserved_0b                                             :  9,
47                       sta_coding                                              :  1,
48                       txbf                                                    :  1,
49                       nss                                                     :  4,
50                       validate_0a                                             :  1,
51                       sta_mcs                                                 :  4,
52                       sta_id                                                  : 11;
53 #endif
54 };
55 
56 
57 
58 
59 #define EHT_SIG_USR_SU_INFO_STA_ID_OFFSET                                           0x00000000
60 #define EHT_SIG_USR_SU_INFO_STA_ID_LSB                                              0
61 #define EHT_SIG_USR_SU_INFO_STA_ID_MSB                                              10
62 #define EHT_SIG_USR_SU_INFO_STA_ID_MASK                                             0x000007ff
63 
64 
65 
66 
67 #define EHT_SIG_USR_SU_INFO_STA_MCS_OFFSET                                          0x00000000
68 #define EHT_SIG_USR_SU_INFO_STA_MCS_LSB                                             11
69 #define EHT_SIG_USR_SU_INFO_STA_MCS_MSB                                             14
70 #define EHT_SIG_USR_SU_INFO_STA_MCS_MASK                                            0x00007800
71 
72 
73 
74 
75 #define EHT_SIG_USR_SU_INFO_VALIDATE_0A_OFFSET                                      0x00000000
76 #define EHT_SIG_USR_SU_INFO_VALIDATE_0A_LSB                                         15
77 #define EHT_SIG_USR_SU_INFO_VALIDATE_0A_MSB                                         15
78 #define EHT_SIG_USR_SU_INFO_VALIDATE_0A_MASK                                        0x00008000
79 
80 
81 
82 
83 #define EHT_SIG_USR_SU_INFO_NSS_OFFSET                                              0x00000000
84 #define EHT_SIG_USR_SU_INFO_NSS_LSB                                                 16
85 #define EHT_SIG_USR_SU_INFO_NSS_MSB                                                 19
86 #define EHT_SIG_USR_SU_INFO_NSS_MASK                                                0x000f0000
87 
88 
89 
90 
91 #define EHT_SIG_USR_SU_INFO_TXBF_OFFSET                                             0x00000000
92 #define EHT_SIG_USR_SU_INFO_TXBF_LSB                                                20
93 #define EHT_SIG_USR_SU_INFO_TXBF_MSB                                                20
94 #define EHT_SIG_USR_SU_INFO_TXBF_MASK                                               0x00100000
95 
96 
97 
98 
99 #define EHT_SIG_USR_SU_INFO_STA_CODING_OFFSET                                       0x00000000
100 #define EHT_SIG_USR_SU_INFO_STA_CODING_LSB                                          21
101 #define EHT_SIG_USR_SU_INFO_STA_CODING_MSB                                          21
102 #define EHT_SIG_USR_SU_INFO_STA_CODING_MASK                                         0x00200000
103 
104 
105 
106 
107 #define EHT_SIG_USR_SU_INFO_RESERVED_0B_OFFSET                                      0x00000000
108 #define EHT_SIG_USR_SU_INFO_RESERVED_0B_LSB                                         22
109 #define EHT_SIG_USR_SU_INFO_RESERVED_0B_MSB                                         30
110 #define EHT_SIG_USR_SU_INFO_RESERVED_0B_MASK                                        0x7fc00000
111 
112 
113 
114 
115 #define EHT_SIG_USR_SU_INFO_RX_INTEGRITY_CHECK_PASSED_OFFSET                        0x00000000
116 #define EHT_SIG_USR_SU_INFO_RX_INTEGRITY_CHECK_PASSED_LSB                           31
117 #define EHT_SIG_USR_SU_INFO_RX_INTEGRITY_CHECK_PASSED_MSB                           31
118 #define EHT_SIG_USR_SU_INFO_RX_INTEGRITY_CHECK_PASSED_MASK                          0x80000000
119 
120 
121 
122 #endif
123