xref: /wlan-driver/fw-api/hw/qcn9224/v2/received_response_user_info.h (revision 5113495b16420b49004c444715d2daae2066e7dc)
1 
2 /* Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved.
3  *
4  * Permission to use, copy, modify, and/or distribute this software for any
5  * purpose with or without fee is hereby granted, provided that the above
6  * copyright notice and this permission notice appear in all copies.
7  *
8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15  */
16 
17 
18 
19 
20 
21 
22 
23 
24 
25 
26 #ifndef _RECEIVED_RESPONSE_USER_INFO_H_
27 #define _RECEIVED_RESPONSE_USER_INFO_H_
28 #if !defined(__ASSEMBLER__)
29 #endif
30 
31 #define NUM_OF_DWORDS_RECEIVED_RESPONSE_USER_INFO 8
32 
33 
34 struct received_response_user_info {
35 #ifndef WIFI_BIT_ORDER_BIG_ENDIAN
36              uint32_t mpdu_fcs_pass_count                                     : 12,
37                       mpdu_fcs_fail_count                                     : 12,
38                       qosnull_frame_count                                     :  4,
39                       reserved_0a                                             :  3,
40                       user_info_valid                                         :  1;
41              uint32_t null_delimiter_count                                    : 22,
42                       reserved_1a                                             :  9,
43                       ht_control_valid                                        :  1;
44              uint32_t ht_control                                              : 32;
45              uint32_t qos_control_valid                                       : 16,
46                       eosp                                                    : 16;
47              uint32_t qos_control_15_8_tid_0                                  :  8,
48                       qos_control_15_8_tid_1                                  :  8,
49                       qos_control_15_8_tid_2                                  :  8,
50                       qos_control_15_8_tid_3                                  :  8;
51              uint32_t qos_control_15_8_tid_4                                  :  8,
52                       qos_control_15_8_tid_5                                  :  8,
53                       qos_control_15_8_tid_6                                  :  8,
54                       qos_control_15_8_tid_7                                  :  8;
55              uint32_t qos_control_15_8_tid_8                                  :  8,
56                       qos_control_15_8_tid_9                                  :  8,
57                       qos_control_15_8_tid_10                                 :  8,
58                       qos_control_15_8_tid_11                                 :  8;
59              uint32_t qos_control_15_8_tid_12                                 :  8,
60                       qos_control_15_8_tid_13                                 :  8,
61                       qos_control_15_8_tid_14                                 :  8,
62                       qos_control_15_8_tid_15                                 :  8;
63 #else
64              uint32_t user_info_valid                                         :  1,
65                       reserved_0a                                             :  3,
66                       qosnull_frame_count                                     :  4,
67                       mpdu_fcs_fail_count                                     : 12,
68                       mpdu_fcs_pass_count                                     : 12;
69              uint32_t ht_control_valid                                        :  1,
70                       reserved_1a                                             :  9,
71                       null_delimiter_count                                    : 22;
72              uint32_t ht_control                                              : 32;
73              uint32_t eosp                                                    : 16,
74                       qos_control_valid                                       : 16;
75              uint32_t qos_control_15_8_tid_3                                  :  8,
76                       qos_control_15_8_tid_2                                  :  8,
77                       qos_control_15_8_tid_1                                  :  8,
78                       qos_control_15_8_tid_0                                  :  8;
79              uint32_t qos_control_15_8_tid_7                                  :  8,
80                       qos_control_15_8_tid_6                                  :  8,
81                       qos_control_15_8_tid_5                                  :  8,
82                       qos_control_15_8_tid_4                                  :  8;
83              uint32_t qos_control_15_8_tid_11                                 :  8,
84                       qos_control_15_8_tid_10                                 :  8,
85                       qos_control_15_8_tid_9                                  :  8,
86                       qos_control_15_8_tid_8                                  :  8;
87              uint32_t qos_control_15_8_tid_15                                 :  8,
88                       qos_control_15_8_tid_14                                 :  8,
89                       qos_control_15_8_tid_13                                 :  8,
90                       qos_control_15_8_tid_12                                 :  8;
91 #endif
92 };
93 
94 
95 
96 
97 #define RECEIVED_RESPONSE_USER_INFO_MPDU_FCS_PASS_COUNT_OFFSET                      0x00000000
98 #define RECEIVED_RESPONSE_USER_INFO_MPDU_FCS_PASS_COUNT_LSB                         0
99 #define RECEIVED_RESPONSE_USER_INFO_MPDU_FCS_PASS_COUNT_MSB                         11
100 #define RECEIVED_RESPONSE_USER_INFO_MPDU_FCS_PASS_COUNT_MASK                        0x00000fff
101 
102 
103 
104 
105 #define RECEIVED_RESPONSE_USER_INFO_MPDU_FCS_FAIL_COUNT_OFFSET                      0x00000000
106 #define RECEIVED_RESPONSE_USER_INFO_MPDU_FCS_FAIL_COUNT_LSB                         12
107 #define RECEIVED_RESPONSE_USER_INFO_MPDU_FCS_FAIL_COUNT_MSB                         23
108 #define RECEIVED_RESPONSE_USER_INFO_MPDU_FCS_FAIL_COUNT_MASK                        0x00fff000
109 
110 
111 
112 
113 #define RECEIVED_RESPONSE_USER_INFO_QOSNULL_FRAME_COUNT_OFFSET                      0x00000000
114 #define RECEIVED_RESPONSE_USER_INFO_QOSNULL_FRAME_COUNT_LSB                         24
115 #define RECEIVED_RESPONSE_USER_INFO_QOSNULL_FRAME_COUNT_MSB                         27
116 #define RECEIVED_RESPONSE_USER_INFO_QOSNULL_FRAME_COUNT_MASK                        0x0f000000
117 
118 
119 
120 
121 #define RECEIVED_RESPONSE_USER_INFO_RESERVED_0A_OFFSET                              0x00000000
122 #define RECEIVED_RESPONSE_USER_INFO_RESERVED_0A_LSB                                 28
123 #define RECEIVED_RESPONSE_USER_INFO_RESERVED_0A_MSB                                 30
124 #define RECEIVED_RESPONSE_USER_INFO_RESERVED_0A_MASK                                0x70000000
125 
126 
127 
128 
129 #define RECEIVED_RESPONSE_USER_INFO_USER_INFO_VALID_OFFSET                          0x00000000
130 #define RECEIVED_RESPONSE_USER_INFO_USER_INFO_VALID_LSB                             31
131 #define RECEIVED_RESPONSE_USER_INFO_USER_INFO_VALID_MSB                             31
132 #define RECEIVED_RESPONSE_USER_INFO_USER_INFO_VALID_MASK                            0x80000000
133 
134 
135 
136 
137 #define RECEIVED_RESPONSE_USER_INFO_NULL_DELIMITER_COUNT_OFFSET                     0x00000004
138 #define RECEIVED_RESPONSE_USER_INFO_NULL_DELIMITER_COUNT_LSB                        0
139 #define RECEIVED_RESPONSE_USER_INFO_NULL_DELIMITER_COUNT_MSB                        21
140 #define RECEIVED_RESPONSE_USER_INFO_NULL_DELIMITER_COUNT_MASK                       0x003fffff
141 
142 
143 
144 
145 #define RECEIVED_RESPONSE_USER_INFO_RESERVED_1A_OFFSET                              0x00000004
146 #define RECEIVED_RESPONSE_USER_INFO_RESERVED_1A_LSB                                 22
147 #define RECEIVED_RESPONSE_USER_INFO_RESERVED_1A_MSB                                 30
148 #define RECEIVED_RESPONSE_USER_INFO_RESERVED_1A_MASK                                0x7fc00000
149 
150 
151 
152 
153 #define RECEIVED_RESPONSE_USER_INFO_HT_CONTROL_VALID_OFFSET                         0x00000004
154 #define RECEIVED_RESPONSE_USER_INFO_HT_CONTROL_VALID_LSB                            31
155 #define RECEIVED_RESPONSE_USER_INFO_HT_CONTROL_VALID_MSB                            31
156 #define RECEIVED_RESPONSE_USER_INFO_HT_CONTROL_VALID_MASK                           0x80000000
157 
158 
159 
160 
161 #define RECEIVED_RESPONSE_USER_INFO_HT_CONTROL_OFFSET                               0x00000008
162 #define RECEIVED_RESPONSE_USER_INFO_HT_CONTROL_LSB                                  0
163 #define RECEIVED_RESPONSE_USER_INFO_HT_CONTROL_MSB                                  31
164 #define RECEIVED_RESPONSE_USER_INFO_HT_CONTROL_MASK                                 0xffffffff
165 
166 
167 
168 
169 #define RECEIVED_RESPONSE_USER_INFO_QOS_CONTROL_VALID_OFFSET                        0x0000000c
170 #define RECEIVED_RESPONSE_USER_INFO_QOS_CONTROL_VALID_LSB                           0
171 #define RECEIVED_RESPONSE_USER_INFO_QOS_CONTROL_VALID_MSB                           15
172 #define RECEIVED_RESPONSE_USER_INFO_QOS_CONTROL_VALID_MASK                          0x0000ffff
173 
174 
175 
176 
177 #define RECEIVED_RESPONSE_USER_INFO_EOSP_OFFSET                                     0x0000000c
178 #define RECEIVED_RESPONSE_USER_INFO_EOSP_LSB                                        16
179 #define RECEIVED_RESPONSE_USER_INFO_EOSP_MSB                                        31
180 #define RECEIVED_RESPONSE_USER_INFO_EOSP_MASK                                       0xffff0000
181 
182 
183 
184 
185 #define RECEIVED_RESPONSE_USER_INFO_QOS_CONTROL_15_8_TID_0_OFFSET                   0x00000010
186 #define RECEIVED_RESPONSE_USER_INFO_QOS_CONTROL_15_8_TID_0_LSB                      0
187 #define RECEIVED_RESPONSE_USER_INFO_QOS_CONTROL_15_8_TID_0_MSB                      7
188 #define RECEIVED_RESPONSE_USER_INFO_QOS_CONTROL_15_8_TID_0_MASK                     0x000000ff
189 
190 
191 
192 
193 #define RECEIVED_RESPONSE_USER_INFO_QOS_CONTROL_15_8_TID_1_OFFSET                   0x00000010
194 #define RECEIVED_RESPONSE_USER_INFO_QOS_CONTROL_15_8_TID_1_LSB                      8
195 #define RECEIVED_RESPONSE_USER_INFO_QOS_CONTROL_15_8_TID_1_MSB                      15
196 #define RECEIVED_RESPONSE_USER_INFO_QOS_CONTROL_15_8_TID_1_MASK                     0x0000ff00
197 
198 
199 
200 
201 #define RECEIVED_RESPONSE_USER_INFO_QOS_CONTROL_15_8_TID_2_OFFSET                   0x00000010
202 #define RECEIVED_RESPONSE_USER_INFO_QOS_CONTROL_15_8_TID_2_LSB                      16
203 #define RECEIVED_RESPONSE_USER_INFO_QOS_CONTROL_15_8_TID_2_MSB                      23
204 #define RECEIVED_RESPONSE_USER_INFO_QOS_CONTROL_15_8_TID_2_MASK                     0x00ff0000
205 
206 
207 
208 
209 #define RECEIVED_RESPONSE_USER_INFO_QOS_CONTROL_15_8_TID_3_OFFSET                   0x00000010
210 #define RECEIVED_RESPONSE_USER_INFO_QOS_CONTROL_15_8_TID_3_LSB                      24
211 #define RECEIVED_RESPONSE_USER_INFO_QOS_CONTROL_15_8_TID_3_MSB                      31
212 #define RECEIVED_RESPONSE_USER_INFO_QOS_CONTROL_15_8_TID_3_MASK                     0xff000000
213 
214 
215 
216 
217 #define RECEIVED_RESPONSE_USER_INFO_QOS_CONTROL_15_8_TID_4_OFFSET                   0x00000014
218 #define RECEIVED_RESPONSE_USER_INFO_QOS_CONTROL_15_8_TID_4_LSB                      0
219 #define RECEIVED_RESPONSE_USER_INFO_QOS_CONTROL_15_8_TID_4_MSB                      7
220 #define RECEIVED_RESPONSE_USER_INFO_QOS_CONTROL_15_8_TID_4_MASK                     0x000000ff
221 
222 
223 
224 
225 #define RECEIVED_RESPONSE_USER_INFO_QOS_CONTROL_15_8_TID_5_OFFSET                   0x00000014
226 #define RECEIVED_RESPONSE_USER_INFO_QOS_CONTROL_15_8_TID_5_LSB                      8
227 #define RECEIVED_RESPONSE_USER_INFO_QOS_CONTROL_15_8_TID_5_MSB                      15
228 #define RECEIVED_RESPONSE_USER_INFO_QOS_CONTROL_15_8_TID_5_MASK                     0x0000ff00
229 
230 
231 
232 
233 #define RECEIVED_RESPONSE_USER_INFO_QOS_CONTROL_15_8_TID_6_OFFSET                   0x00000014
234 #define RECEIVED_RESPONSE_USER_INFO_QOS_CONTROL_15_8_TID_6_LSB                      16
235 #define RECEIVED_RESPONSE_USER_INFO_QOS_CONTROL_15_8_TID_6_MSB                      23
236 #define RECEIVED_RESPONSE_USER_INFO_QOS_CONTROL_15_8_TID_6_MASK                     0x00ff0000
237 
238 
239 
240 
241 #define RECEIVED_RESPONSE_USER_INFO_QOS_CONTROL_15_8_TID_7_OFFSET                   0x00000014
242 #define RECEIVED_RESPONSE_USER_INFO_QOS_CONTROL_15_8_TID_7_LSB                      24
243 #define RECEIVED_RESPONSE_USER_INFO_QOS_CONTROL_15_8_TID_7_MSB                      31
244 #define RECEIVED_RESPONSE_USER_INFO_QOS_CONTROL_15_8_TID_7_MASK                     0xff000000
245 
246 
247 
248 
249 #define RECEIVED_RESPONSE_USER_INFO_QOS_CONTROL_15_8_TID_8_OFFSET                   0x00000018
250 #define RECEIVED_RESPONSE_USER_INFO_QOS_CONTROL_15_8_TID_8_LSB                      0
251 #define RECEIVED_RESPONSE_USER_INFO_QOS_CONTROL_15_8_TID_8_MSB                      7
252 #define RECEIVED_RESPONSE_USER_INFO_QOS_CONTROL_15_8_TID_8_MASK                     0x000000ff
253 
254 
255 
256 
257 #define RECEIVED_RESPONSE_USER_INFO_QOS_CONTROL_15_8_TID_9_OFFSET                   0x00000018
258 #define RECEIVED_RESPONSE_USER_INFO_QOS_CONTROL_15_8_TID_9_LSB                      8
259 #define RECEIVED_RESPONSE_USER_INFO_QOS_CONTROL_15_8_TID_9_MSB                      15
260 #define RECEIVED_RESPONSE_USER_INFO_QOS_CONTROL_15_8_TID_9_MASK                     0x0000ff00
261 
262 
263 
264 
265 #define RECEIVED_RESPONSE_USER_INFO_QOS_CONTROL_15_8_TID_10_OFFSET                  0x00000018
266 #define RECEIVED_RESPONSE_USER_INFO_QOS_CONTROL_15_8_TID_10_LSB                     16
267 #define RECEIVED_RESPONSE_USER_INFO_QOS_CONTROL_15_8_TID_10_MSB                     23
268 #define RECEIVED_RESPONSE_USER_INFO_QOS_CONTROL_15_8_TID_10_MASK                    0x00ff0000
269 
270 
271 
272 
273 #define RECEIVED_RESPONSE_USER_INFO_QOS_CONTROL_15_8_TID_11_OFFSET                  0x00000018
274 #define RECEIVED_RESPONSE_USER_INFO_QOS_CONTROL_15_8_TID_11_LSB                     24
275 #define RECEIVED_RESPONSE_USER_INFO_QOS_CONTROL_15_8_TID_11_MSB                     31
276 #define RECEIVED_RESPONSE_USER_INFO_QOS_CONTROL_15_8_TID_11_MASK                    0xff000000
277 
278 
279 
280 
281 #define RECEIVED_RESPONSE_USER_INFO_QOS_CONTROL_15_8_TID_12_OFFSET                  0x0000001c
282 #define RECEIVED_RESPONSE_USER_INFO_QOS_CONTROL_15_8_TID_12_LSB                     0
283 #define RECEIVED_RESPONSE_USER_INFO_QOS_CONTROL_15_8_TID_12_MSB                     7
284 #define RECEIVED_RESPONSE_USER_INFO_QOS_CONTROL_15_8_TID_12_MASK                    0x000000ff
285 
286 
287 
288 
289 #define RECEIVED_RESPONSE_USER_INFO_QOS_CONTROL_15_8_TID_13_OFFSET                  0x0000001c
290 #define RECEIVED_RESPONSE_USER_INFO_QOS_CONTROL_15_8_TID_13_LSB                     8
291 #define RECEIVED_RESPONSE_USER_INFO_QOS_CONTROL_15_8_TID_13_MSB                     15
292 #define RECEIVED_RESPONSE_USER_INFO_QOS_CONTROL_15_8_TID_13_MASK                    0x0000ff00
293 
294 
295 
296 
297 #define RECEIVED_RESPONSE_USER_INFO_QOS_CONTROL_15_8_TID_14_OFFSET                  0x0000001c
298 #define RECEIVED_RESPONSE_USER_INFO_QOS_CONTROL_15_8_TID_14_LSB                     16
299 #define RECEIVED_RESPONSE_USER_INFO_QOS_CONTROL_15_8_TID_14_MSB                     23
300 #define RECEIVED_RESPONSE_USER_INFO_QOS_CONTROL_15_8_TID_14_MASK                    0x00ff0000
301 
302 
303 
304 
305 #define RECEIVED_RESPONSE_USER_INFO_QOS_CONTROL_15_8_TID_15_OFFSET                  0x0000001c
306 #define RECEIVED_RESPONSE_USER_INFO_QOS_CONTROL_15_8_TID_15_LSB                     24
307 #define RECEIVED_RESPONSE_USER_INFO_QOS_CONTROL_15_8_TID_15_MSB                     31
308 #define RECEIVED_RESPONSE_USER_INFO_QOS_CONTROL_15_8_TID_15_MASK                    0xff000000
309 
310 
311 
312 #endif
313