1 2 /* Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for any 5 * purpose with or without fee is hereby granted, provided that the above 6 * copyright notice and this permission notice appear in all copies. 7 * 8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15 */ 16 17 18 19 20 21 22 23 24 25 26 #ifndef _RECEIVED_TRIGGER_INFO_DETAILS_H_ 27 #define _RECEIVED_TRIGGER_INFO_DETAILS_H_ 28 #if !defined(__ASSEMBLER__) 29 #endif 30 31 #define NUM_OF_DWORDS_RECEIVED_TRIGGER_INFO_DETAILS 5 32 33 34 struct received_trigger_info_details { 35 #ifndef WIFI_BIT_ORDER_BIG_ENDIAN 36 uint32_t trigger_type : 4, 37 ax_trigger_source : 1, 38 ax_trigger_type : 4, 39 trigger_source_sta_full_aid : 13, 40 frame_control_valid : 1, 41 qos_control_valid : 1, 42 he_control_info_valid : 1, 43 ranging_trigger_subtype : 4, 44 reserved_0b : 3; 45 uint32_t phy_ppdu_id : 16, 46 lsig_response_length : 12, 47 reserved_1a : 4; 48 uint32_t frame_control : 16, 49 qos_control : 16; 50 uint32_t sw_peer_id : 16, 51 reserved_3a : 16; 52 uint32_t he_control : 32; 53 #else 54 uint32_t reserved_0b : 3, 55 ranging_trigger_subtype : 4, 56 he_control_info_valid : 1, 57 qos_control_valid : 1, 58 frame_control_valid : 1, 59 trigger_source_sta_full_aid : 13, 60 ax_trigger_type : 4, 61 ax_trigger_source : 1, 62 trigger_type : 4; 63 uint32_t reserved_1a : 4, 64 lsig_response_length : 12, 65 phy_ppdu_id : 16; 66 uint32_t qos_control : 16, 67 frame_control : 16; 68 uint32_t reserved_3a : 16, 69 sw_peer_id : 16; 70 uint32_t he_control : 32; 71 #endif 72 }; 73 74 75 76 77 #define RECEIVED_TRIGGER_INFO_DETAILS_TRIGGER_TYPE_OFFSET 0x00000000 78 #define RECEIVED_TRIGGER_INFO_DETAILS_TRIGGER_TYPE_LSB 0 79 #define RECEIVED_TRIGGER_INFO_DETAILS_TRIGGER_TYPE_MSB 3 80 #define RECEIVED_TRIGGER_INFO_DETAILS_TRIGGER_TYPE_MASK 0x0000000f 81 82 83 84 85 #define RECEIVED_TRIGGER_INFO_DETAILS_AX_TRIGGER_SOURCE_OFFSET 0x00000000 86 #define RECEIVED_TRIGGER_INFO_DETAILS_AX_TRIGGER_SOURCE_LSB 4 87 #define RECEIVED_TRIGGER_INFO_DETAILS_AX_TRIGGER_SOURCE_MSB 4 88 #define RECEIVED_TRIGGER_INFO_DETAILS_AX_TRIGGER_SOURCE_MASK 0x00000010 89 90 91 92 93 #define RECEIVED_TRIGGER_INFO_DETAILS_AX_TRIGGER_TYPE_OFFSET 0x00000000 94 #define RECEIVED_TRIGGER_INFO_DETAILS_AX_TRIGGER_TYPE_LSB 5 95 #define RECEIVED_TRIGGER_INFO_DETAILS_AX_TRIGGER_TYPE_MSB 8 96 #define RECEIVED_TRIGGER_INFO_DETAILS_AX_TRIGGER_TYPE_MASK 0x000001e0 97 98 99 100 101 #define RECEIVED_TRIGGER_INFO_DETAILS_TRIGGER_SOURCE_STA_FULL_AID_OFFSET 0x00000000 102 #define RECEIVED_TRIGGER_INFO_DETAILS_TRIGGER_SOURCE_STA_FULL_AID_LSB 9 103 #define RECEIVED_TRIGGER_INFO_DETAILS_TRIGGER_SOURCE_STA_FULL_AID_MSB 21 104 #define RECEIVED_TRIGGER_INFO_DETAILS_TRIGGER_SOURCE_STA_FULL_AID_MASK 0x003ffe00 105 106 107 108 109 #define RECEIVED_TRIGGER_INFO_DETAILS_FRAME_CONTROL_VALID_OFFSET 0x00000000 110 #define RECEIVED_TRIGGER_INFO_DETAILS_FRAME_CONTROL_VALID_LSB 22 111 #define RECEIVED_TRIGGER_INFO_DETAILS_FRAME_CONTROL_VALID_MSB 22 112 #define RECEIVED_TRIGGER_INFO_DETAILS_FRAME_CONTROL_VALID_MASK 0x00400000 113 114 115 116 117 #define RECEIVED_TRIGGER_INFO_DETAILS_QOS_CONTROL_VALID_OFFSET 0x00000000 118 #define RECEIVED_TRIGGER_INFO_DETAILS_QOS_CONTROL_VALID_LSB 23 119 #define RECEIVED_TRIGGER_INFO_DETAILS_QOS_CONTROL_VALID_MSB 23 120 #define RECEIVED_TRIGGER_INFO_DETAILS_QOS_CONTROL_VALID_MASK 0x00800000 121 122 123 124 125 #define RECEIVED_TRIGGER_INFO_DETAILS_HE_CONTROL_INFO_VALID_OFFSET 0x00000000 126 #define RECEIVED_TRIGGER_INFO_DETAILS_HE_CONTROL_INFO_VALID_LSB 24 127 #define RECEIVED_TRIGGER_INFO_DETAILS_HE_CONTROL_INFO_VALID_MSB 24 128 #define RECEIVED_TRIGGER_INFO_DETAILS_HE_CONTROL_INFO_VALID_MASK 0x01000000 129 130 131 132 133 #define RECEIVED_TRIGGER_INFO_DETAILS_RANGING_TRIGGER_SUBTYPE_OFFSET 0x00000000 134 #define RECEIVED_TRIGGER_INFO_DETAILS_RANGING_TRIGGER_SUBTYPE_LSB 25 135 #define RECEIVED_TRIGGER_INFO_DETAILS_RANGING_TRIGGER_SUBTYPE_MSB 28 136 #define RECEIVED_TRIGGER_INFO_DETAILS_RANGING_TRIGGER_SUBTYPE_MASK 0x1e000000 137 138 139 140 141 #define RECEIVED_TRIGGER_INFO_DETAILS_RESERVED_0B_OFFSET 0x00000000 142 #define RECEIVED_TRIGGER_INFO_DETAILS_RESERVED_0B_LSB 29 143 #define RECEIVED_TRIGGER_INFO_DETAILS_RESERVED_0B_MSB 31 144 #define RECEIVED_TRIGGER_INFO_DETAILS_RESERVED_0B_MASK 0xe0000000 145 146 147 148 149 #define RECEIVED_TRIGGER_INFO_DETAILS_PHY_PPDU_ID_OFFSET 0x00000004 150 #define RECEIVED_TRIGGER_INFO_DETAILS_PHY_PPDU_ID_LSB 0 151 #define RECEIVED_TRIGGER_INFO_DETAILS_PHY_PPDU_ID_MSB 15 152 #define RECEIVED_TRIGGER_INFO_DETAILS_PHY_PPDU_ID_MASK 0x0000ffff 153 154 155 156 157 #define RECEIVED_TRIGGER_INFO_DETAILS_LSIG_RESPONSE_LENGTH_OFFSET 0x00000004 158 #define RECEIVED_TRIGGER_INFO_DETAILS_LSIG_RESPONSE_LENGTH_LSB 16 159 #define RECEIVED_TRIGGER_INFO_DETAILS_LSIG_RESPONSE_LENGTH_MSB 27 160 #define RECEIVED_TRIGGER_INFO_DETAILS_LSIG_RESPONSE_LENGTH_MASK 0x0fff0000 161 162 163 164 165 #define RECEIVED_TRIGGER_INFO_DETAILS_RESERVED_1A_OFFSET 0x00000004 166 #define RECEIVED_TRIGGER_INFO_DETAILS_RESERVED_1A_LSB 28 167 #define RECEIVED_TRIGGER_INFO_DETAILS_RESERVED_1A_MSB 31 168 #define RECEIVED_TRIGGER_INFO_DETAILS_RESERVED_1A_MASK 0xf0000000 169 170 171 172 173 #define RECEIVED_TRIGGER_INFO_DETAILS_FRAME_CONTROL_OFFSET 0x00000008 174 #define RECEIVED_TRIGGER_INFO_DETAILS_FRAME_CONTROL_LSB 0 175 #define RECEIVED_TRIGGER_INFO_DETAILS_FRAME_CONTROL_MSB 15 176 #define RECEIVED_TRIGGER_INFO_DETAILS_FRAME_CONTROL_MASK 0x0000ffff 177 178 179 180 181 #define RECEIVED_TRIGGER_INFO_DETAILS_QOS_CONTROL_OFFSET 0x00000008 182 #define RECEIVED_TRIGGER_INFO_DETAILS_QOS_CONTROL_LSB 16 183 #define RECEIVED_TRIGGER_INFO_DETAILS_QOS_CONTROL_MSB 31 184 #define RECEIVED_TRIGGER_INFO_DETAILS_QOS_CONTROL_MASK 0xffff0000 185 186 187 188 189 #define RECEIVED_TRIGGER_INFO_DETAILS_SW_PEER_ID_OFFSET 0x0000000c 190 #define RECEIVED_TRIGGER_INFO_DETAILS_SW_PEER_ID_LSB 0 191 #define RECEIVED_TRIGGER_INFO_DETAILS_SW_PEER_ID_MSB 15 192 #define RECEIVED_TRIGGER_INFO_DETAILS_SW_PEER_ID_MASK 0x0000ffff 193 194 195 196 197 #define RECEIVED_TRIGGER_INFO_DETAILS_RESERVED_3A_OFFSET 0x0000000c 198 #define RECEIVED_TRIGGER_INFO_DETAILS_RESERVED_3A_LSB 16 199 #define RECEIVED_TRIGGER_INFO_DETAILS_RESERVED_3A_MSB 31 200 #define RECEIVED_TRIGGER_INFO_DETAILS_RESERVED_3A_MASK 0xffff0000 201 202 203 204 205 #define RECEIVED_TRIGGER_INFO_DETAILS_HE_CONTROL_OFFSET 0x00000010 206 #define RECEIVED_TRIGGER_INFO_DETAILS_HE_CONTROL_LSB 0 207 #define RECEIVED_TRIGGER_INFO_DETAILS_HE_CONTROL_MSB 31 208 #define RECEIVED_TRIGGER_INFO_DETAILS_HE_CONTROL_MASK 0xffffffff 209 210 211 212 #endif 213