1 2 /* Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for any 5 * purpose with or without fee is hereby granted, provided that the above 6 * copyright notice and this permission notice appear in all copies. 7 * 8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15 */ 16 17 18 19 20 21 22 23 24 25 26 #ifndef _RU_ALLOCATION_160_INFO_H_ 27 #define _RU_ALLOCATION_160_INFO_H_ 28 #if !defined(__ASSEMBLER__) 29 #endif 30 31 #define NUM_OF_DWORDS_RU_ALLOCATION_160_INFO 4 32 33 34 struct ru_allocation_160_info { 35 #ifndef WIFI_BIT_ORDER_BIG_ENDIAN 36 uint32_t ru_allocation_band0_0 : 9, 37 ru_allocation_band0_1 : 9, 38 reserved_0a : 6, 39 ru_allocations_01_subband80_mask : 4, 40 ru_allocations_23_subband80_mask : 4; 41 uint32_t ru_allocation_band0_2 : 9, 42 ru_allocation_band0_3 : 9, 43 reserved_1a : 14; 44 uint32_t ru_allocation_band1_0 : 9, 45 ru_allocation_band1_1 : 9, 46 reserved_2a : 14; 47 uint32_t ru_allocation_band1_2 : 9, 48 ru_allocation_band1_3 : 9, 49 reserved_3a : 14; 50 #else 51 uint32_t ru_allocations_23_subband80_mask : 4, 52 ru_allocations_01_subband80_mask : 4, 53 reserved_0a : 6, 54 ru_allocation_band0_1 : 9, 55 ru_allocation_band0_0 : 9; 56 uint32_t reserved_1a : 14, 57 ru_allocation_band0_3 : 9, 58 ru_allocation_band0_2 : 9; 59 uint32_t reserved_2a : 14, 60 ru_allocation_band1_1 : 9, 61 ru_allocation_band1_0 : 9; 62 uint32_t reserved_3a : 14, 63 ru_allocation_band1_3 : 9, 64 ru_allocation_band1_2 : 9; 65 #endif 66 }; 67 68 69 70 71 #define RU_ALLOCATION_160_INFO_RU_ALLOCATION_BAND0_0_OFFSET 0x00000000 72 #define RU_ALLOCATION_160_INFO_RU_ALLOCATION_BAND0_0_LSB 0 73 #define RU_ALLOCATION_160_INFO_RU_ALLOCATION_BAND0_0_MSB 8 74 #define RU_ALLOCATION_160_INFO_RU_ALLOCATION_BAND0_0_MASK 0x000001ff 75 76 77 78 79 #define RU_ALLOCATION_160_INFO_RU_ALLOCATION_BAND0_1_OFFSET 0x00000000 80 #define RU_ALLOCATION_160_INFO_RU_ALLOCATION_BAND0_1_LSB 9 81 #define RU_ALLOCATION_160_INFO_RU_ALLOCATION_BAND0_1_MSB 17 82 #define RU_ALLOCATION_160_INFO_RU_ALLOCATION_BAND0_1_MASK 0x0003fe00 83 84 85 86 87 #define RU_ALLOCATION_160_INFO_RESERVED_0A_OFFSET 0x00000000 88 #define RU_ALLOCATION_160_INFO_RESERVED_0A_LSB 18 89 #define RU_ALLOCATION_160_INFO_RESERVED_0A_MSB 23 90 #define RU_ALLOCATION_160_INFO_RESERVED_0A_MASK 0x00fc0000 91 92 93 94 95 #define RU_ALLOCATION_160_INFO_RU_ALLOCATIONS_01_SUBBAND80_MASK_OFFSET 0x00000000 96 #define RU_ALLOCATION_160_INFO_RU_ALLOCATIONS_01_SUBBAND80_MASK_LSB 24 97 #define RU_ALLOCATION_160_INFO_RU_ALLOCATIONS_01_SUBBAND80_MASK_MSB 27 98 #define RU_ALLOCATION_160_INFO_RU_ALLOCATIONS_01_SUBBAND80_MASK_MASK 0x0f000000 99 100 101 102 103 #define RU_ALLOCATION_160_INFO_RU_ALLOCATIONS_23_SUBBAND80_MASK_OFFSET 0x00000000 104 #define RU_ALLOCATION_160_INFO_RU_ALLOCATIONS_23_SUBBAND80_MASK_LSB 28 105 #define RU_ALLOCATION_160_INFO_RU_ALLOCATIONS_23_SUBBAND80_MASK_MSB 31 106 #define RU_ALLOCATION_160_INFO_RU_ALLOCATIONS_23_SUBBAND80_MASK_MASK 0xf0000000 107 108 109 110 111 #define RU_ALLOCATION_160_INFO_RU_ALLOCATION_BAND0_2_OFFSET 0x00000004 112 #define RU_ALLOCATION_160_INFO_RU_ALLOCATION_BAND0_2_LSB 0 113 #define RU_ALLOCATION_160_INFO_RU_ALLOCATION_BAND0_2_MSB 8 114 #define RU_ALLOCATION_160_INFO_RU_ALLOCATION_BAND0_2_MASK 0x000001ff 115 116 117 118 119 #define RU_ALLOCATION_160_INFO_RU_ALLOCATION_BAND0_3_OFFSET 0x00000004 120 #define RU_ALLOCATION_160_INFO_RU_ALLOCATION_BAND0_3_LSB 9 121 #define RU_ALLOCATION_160_INFO_RU_ALLOCATION_BAND0_3_MSB 17 122 #define RU_ALLOCATION_160_INFO_RU_ALLOCATION_BAND0_3_MASK 0x0003fe00 123 124 125 126 127 #define RU_ALLOCATION_160_INFO_RESERVED_1A_OFFSET 0x00000004 128 #define RU_ALLOCATION_160_INFO_RESERVED_1A_LSB 18 129 #define RU_ALLOCATION_160_INFO_RESERVED_1A_MSB 31 130 #define RU_ALLOCATION_160_INFO_RESERVED_1A_MASK 0xfffc0000 131 132 133 134 135 #define RU_ALLOCATION_160_INFO_RU_ALLOCATION_BAND1_0_OFFSET 0x00000008 136 #define RU_ALLOCATION_160_INFO_RU_ALLOCATION_BAND1_0_LSB 0 137 #define RU_ALLOCATION_160_INFO_RU_ALLOCATION_BAND1_0_MSB 8 138 #define RU_ALLOCATION_160_INFO_RU_ALLOCATION_BAND1_0_MASK 0x000001ff 139 140 141 142 143 #define RU_ALLOCATION_160_INFO_RU_ALLOCATION_BAND1_1_OFFSET 0x00000008 144 #define RU_ALLOCATION_160_INFO_RU_ALLOCATION_BAND1_1_LSB 9 145 #define RU_ALLOCATION_160_INFO_RU_ALLOCATION_BAND1_1_MSB 17 146 #define RU_ALLOCATION_160_INFO_RU_ALLOCATION_BAND1_1_MASK 0x0003fe00 147 148 149 150 151 #define RU_ALLOCATION_160_INFO_RESERVED_2A_OFFSET 0x00000008 152 #define RU_ALLOCATION_160_INFO_RESERVED_2A_LSB 18 153 #define RU_ALLOCATION_160_INFO_RESERVED_2A_MSB 31 154 #define RU_ALLOCATION_160_INFO_RESERVED_2A_MASK 0xfffc0000 155 156 157 158 159 #define RU_ALLOCATION_160_INFO_RU_ALLOCATION_BAND1_2_OFFSET 0x0000000c 160 #define RU_ALLOCATION_160_INFO_RU_ALLOCATION_BAND1_2_LSB 0 161 #define RU_ALLOCATION_160_INFO_RU_ALLOCATION_BAND1_2_MSB 8 162 #define RU_ALLOCATION_160_INFO_RU_ALLOCATION_BAND1_2_MASK 0x000001ff 163 164 165 166 167 #define RU_ALLOCATION_160_INFO_RU_ALLOCATION_BAND1_3_OFFSET 0x0000000c 168 #define RU_ALLOCATION_160_INFO_RU_ALLOCATION_BAND1_3_LSB 9 169 #define RU_ALLOCATION_160_INFO_RU_ALLOCATION_BAND1_3_MSB 17 170 #define RU_ALLOCATION_160_INFO_RU_ALLOCATION_BAND1_3_MASK 0x0003fe00 171 172 173 174 175 #define RU_ALLOCATION_160_INFO_RESERVED_3A_OFFSET 0x0000000c 176 #define RU_ALLOCATION_160_INFO_RESERVED_3A_LSB 18 177 #define RU_ALLOCATION_160_INFO_RESERVED_3A_MSB 31 178 #define RU_ALLOCATION_160_INFO_RESERVED_3A_MASK 0xfffc0000 179 180 181 182 #endif 183