1 2 /* Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for any 5 * purpose with or without fee is hereby granted, provided that the above 6 * copyright notice and this permission notice appear in all copies. 7 * 8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15 */ 16 17 18 19 20 21 22 23 24 25 26 #ifndef _RX_MSDU_START_H_ 27 #define _RX_MSDU_START_H_ 28 #if !defined(__ASSEMBLER__) 29 #endif 30 31 #define NUM_OF_DWORDS_RX_MSDU_START 10 32 33 #define NUM_OF_QWORDS_RX_MSDU_START 5 34 35 36 struct rx_msdu_start { 37 #ifndef WIFI_BIT_ORDER_BIG_ENDIAN 38 uint32_t rxpcu_mpdu_filter_in_category : 2, 39 sw_frame_group_id : 7, 40 reserved_0 : 7, 41 phy_ppdu_id : 16; 42 uint32_t msdu_length : 14, 43 stbc : 1, 44 ipsec_esp : 1, 45 l3_offset : 7, 46 ipsec_ah : 1, 47 l4_offset : 8; 48 uint32_t msdu_number : 8, 49 decap_format : 2, 50 ipv4_proto : 1, 51 ipv6_proto : 1, 52 tcp_proto : 1, 53 udp_proto : 1, 54 ip_frag : 1, 55 tcp_only_ack : 1, 56 da_is_bcast_mcast : 1, 57 toeplitz_hash_sel : 2, 58 ip_fixed_header_valid : 1, 59 ip_extn_header_valid : 1, 60 tcp_udp_header_valid : 1, 61 mesh_control_present : 1, 62 ldpc : 1, 63 ip4_protocol_ip6_next_header : 8; 64 uint32_t toeplitz_hash_2_or_4 : 32; 65 uint32_t flow_id_toeplitz : 32; 66 uint32_t user_rssi : 8, 67 pkt_type : 4, 68 sgi : 2, 69 rate_mcs : 4, 70 receive_bandwidth : 3, 71 reception_type : 3, 72 mimo_ss_bitmap : 8; 73 uint32_t ppdu_start_timestamp_31_0 : 32; 74 uint32_t ppdu_start_timestamp_63_32 : 32; 75 uint32_t sw_phy_meta_data : 32; 76 uint32_t vlan_ctag_ci : 16, 77 vlan_stag_ci : 16; 78 #else 79 uint32_t phy_ppdu_id : 16, 80 reserved_0 : 7, 81 sw_frame_group_id : 7, 82 rxpcu_mpdu_filter_in_category : 2; 83 uint32_t l4_offset : 8, 84 ipsec_ah : 1, 85 l3_offset : 7, 86 ipsec_esp : 1, 87 stbc : 1, 88 msdu_length : 14; 89 uint32_t ip4_protocol_ip6_next_header : 8, 90 ldpc : 1, 91 mesh_control_present : 1, 92 tcp_udp_header_valid : 1, 93 ip_extn_header_valid : 1, 94 ip_fixed_header_valid : 1, 95 toeplitz_hash_sel : 2, 96 da_is_bcast_mcast : 1, 97 tcp_only_ack : 1, 98 ip_frag : 1, 99 udp_proto : 1, 100 tcp_proto : 1, 101 ipv6_proto : 1, 102 ipv4_proto : 1, 103 decap_format : 2, 104 msdu_number : 8; 105 uint32_t toeplitz_hash_2_or_4 : 32; 106 uint32_t flow_id_toeplitz : 32; 107 uint32_t mimo_ss_bitmap : 8, 108 reception_type : 3, 109 receive_bandwidth : 3, 110 rate_mcs : 4, 111 sgi : 2, 112 pkt_type : 4, 113 user_rssi : 8; 114 uint32_t ppdu_start_timestamp_31_0 : 32; 115 uint32_t ppdu_start_timestamp_63_32 : 32; 116 uint32_t sw_phy_meta_data : 32; 117 uint32_t vlan_stag_ci : 16, 118 vlan_ctag_ci : 16; 119 #endif 120 }; 121 122 123 124 125 #define RX_MSDU_START_RXPCU_MPDU_FILTER_IN_CATEGORY_OFFSET 0x0000000000000000 126 #define RX_MSDU_START_RXPCU_MPDU_FILTER_IN_CATEGORY_LSB 0 127 #define RX_MSDU_START_RXPCU_MPDU_FILTER_IN_CATEGORY_MSB 1 128 #define RX_MSDU_START_RXPCU_MPDU_FILTER_IN_CATEGORY_MASK 0x0000000000000003 129 130 131 132 133 #define RX_MSDU_START_SW_FRAME_GROUP_ID_OFFSET 0x0000000000000000 134 #define RX_MSDU_START_SW_FRAME_GROUP_ID_LSB 2 135 #define RX_MSDU_START_SW_FRAME_GROUP_ID_MSB 8 136 #define RX_MSDU_START_SW_FRAME_GROUP_ID_MASK 0x00000000000001fc 137 138 139 140 141 #define RX_MSDU_START_RESERVED_0_OFFSET 0x0000000000000000 142 #define RX_MSDU_START_RESERVED_0_LSB 9 143 #define RX_MSDU_START_RESERVED_0_MSB 15 144 #define RX_MSDU_START_RESERVED_0_MASK 0x000000000000fe00 145 146 147 148 149 #define RX_MSDU_START_PHY_PPDU_ID_OFFSET 0x0000000000000000 150 #define RX_MSDU_START_PHY_PPDU_ID_LSB 16 151 #define RX_MSDU_START_PHY_PPDU_ID_MSB 31 152 #define RX_MSDU_START_PHY_PPDU_ID_MASK 0x00000000ffff0000 153 154 155 156 157 #define RX_MSDU_START_MSDU_LENGTH_OFFSET 0x0000000000000000 158 #define RX_MSDU_START_MSDU_LENGTH_LSB 32 159 #define RX_MSDU_START_MSDU_LENGTH_MSB 45 160 #define RX_MSDU_START_MSDU_LENGTH_MASK 0x00003fff00000000 161 162 163 164 165 #define RX_MSDU_START_STBC_OFFSET 0x0000000000000000 166 #define RX_MSDU_START_STBC_LSB 46 167 #define RX_MSDU_START_STBC_MSB 46 168 #define RX_MSDU_START_STBC_MASK 0x0000400000000000 169 170 171 172 173 #define RX_MSDU_START_IPSEC_ESP_OFFSET 0x0000000000000000 174 #define RX_MSDU_START_IPSEC_ESP_LSB 47 175 #define RX_MSDU_START_IPSEC_ESP_MSB 47 176 #define RX_MSDU_START_IPSEC_ESP_MASK 0x0000800000000000 177 178 179 180 181 #define RX_MSDU_START_L3_OFFSET_OFFSET 0x0000000000000000 182 #define RX_MSDU_START_L3_OFFSET_LSB 48 183 #define RX_MSDU_START_L3_OFFSET_MSB 54 184 #define RX_MSDU_START_L3_OFFSET_MASK 0x007f000000000000 185 186 187 188 189 #define RX_MSDU_START_IPSEC_AH_OFFSET 0x0000000000000000 190 #define RX_MSDU_START_IPSEC_AH_LSB 55 191 #define RX_MSDU_START_IPSEC_AH_MSB 55 192 #define RX_MSDU_START_IPSEC_AH_MASK 0x0080000000000000 193 194 195 196 197 #define RX_MSDU_START_L4_OFFSET_OFFSET 0x0000000000000000 198 #define RX_MSDU_START_L4_OFFSET_LSB 56 199 #define RX_MSDU_START_L4_OFFSET_MSB 63 200 #define RX_MSDU_START_L4_OFFSET_MASK 0xff00000000000000 201 202 203 204 205 #define RX_MSDU_START_MSDU_NUMBER_OFFSET 0x0000000000000008 206 #define RX_MSDU_START_MSDU_NUMBER_LSB 0 207 #define RX_MSDU_START_MSDU_NUMBER_MSB 7 208 #define RX_MSDU_START_MSDU_NUMBER_MASK 0x00000000000000ff 209 210 211 212 213 #define RX_MSDU_START_DECAP_FORMAT_OFFSET 0x0000000000000008 214 #define RX_MSDU_START_DECAP_FORMAT_LSB 8 215 #define RX_MSDU_START_DECAP_FORMAT_MSB 9 216 #define RX_MSDU_START_DECAP_FORMAT_MASK 0x0000000000000300 217 218 219 220 221 #define RX_MSDU_START_IPV4_PROTO_OFFSET 0x0000000000000008 222 #define RX_MSDU_START_IPV4_PROTO_LSB 10 223 #define RX_MSDU_START_IPV4_PROTO_MSB 10 224 #define RX_MSDU_START_IPV4_PROTO_MASK 0x0000000000000400 225 226 227 228 229 #define RX_MSDU_START_IPV6_PROTO_OFFSET 0x0000000000000008 230 #define RX_MSDU_START_IPV6_PROTO_LSB 11 231 #define RX_MSDU_START_IPV6_PROTO_MSB 11 232 #define RX_MSDU_START_IPV6_PROTO_MASK 0x0000000000000800 233 234 235 236 237 #define RX_MSDU_START_TCP_PROTO_OFFSET 0x0000000000000008 238 #define RX_MSDU_START_TCP_PROTO_LSB 12 239 #define RX_MSDU_START_TCP_PROTO_MSB 12 240 #define RX_MSDU_START_TCP_PROTO_MASK 0x0000000000001000 241 242 243 244 245 #define RX_MSDU_START_UDP_PROTO_OFFSET 0x0000000000000008 246 #define RX_MSDU_START_UDP_PROTO_LSB 13 247 #define RX_MSDU_START_UDP_PROTO_MSB 13 248 #define RX_MSDU_START_UDP_PROTO_MASK 0x0000000000002000 249 250 251 252 253 #define RX_MSDU_START_IP_FRAG_OFFSET 0x0000000000000008 254 #define RX_MSDU_START_IP_FRAG_LSB 14 255 #define RX_MSDU_START_IP_FRAG_MSB 14 256 #define RX_MSDU_START_IP_FRAG_MASK 0x0000000000004000 257 258 259 260 261 #define RX_MSDU_START_TCP_ONLY_ACK_OFFSET 0x0000000000000008 262 #define RX_MSDU_START_TCP_ONLY_ACK_LSB 15 263 #define RX_MSDU_START_TCP_ONLY_ACK_MSB 15 264 #define RX_MSDU_START_TCP_ONLY_ACK_MASK 0x0000000000008000 265 266 267 268 269 #define RX_MSDU_START_DA_IS_BCAST_MCAST_OFFSET 0x0000000000000008 270 #define RX_MSDU_START_DA_IS_BCAST_MCAST_LSB 16 271 #define RX_MSDU_START_DA_IS_BCAST_MCAST_MSB 16 272 #define RX_MSDU_START_DA_IS_BCAST_MCAST_MASK 0x0000000000010000 273 274 275 276 277 #define RX_MSDU_START_TOEPLITZ_HASH_SEL_OFFSET 0x0000000000000008 278 #define RX_MSDU_START_TOEPLITZ_HASH_SEL_LSB 17 279 #define RX_MSDU_START_TOEPLITZ_HASH_SEL_MSB 18 280 #define RX_MSDU_START_TOEPLITZ_HASH_SEL_MASK 0x0000000000060000 281 282 283 284 285 #define RX_MSDU_START_IP_FIXED_HEADER_VALID_OFFSET 0x0000000000000008 286 #define RX_MSDU_START_IP_FIXED_HEADER_VALID_LSB 19 287 #define RX_MSDU_START_IP_FIXED_HEADER_VALID_MSB 19 288 #define RX_MSDU_START_IP_FIXED_HEADER_VALID_MASK 0x0000000000080000 289 290 291 292 293 #define RX_MSDU_START_IP_EXTN_HEADER_VALID_OFFSET 0x0000000000000008 294 #define RX_MSDU_START_IP_EXTN_HEADER_VALID_LSB 20 295 #define RX_MSDU_START_IP_EXTN_HEADER_VALID_MSB 20 296 #define RX_MSDU_START_IP_EXTN_HEADER_VALID_MASK 0x0000000000100000 297 298 299 300 301 #define RX_MSDU_START_TCP_UDP_HEADER_VALID_OFFSET 0x0000000000000008 302 #define RX_MSDU_START_TCP_UDP_HEADER_VALID_LSB 21 303 #define RX_MSDU_START_TCP_UDP_HEADER_VALID_MSB 21 304 #define RX_MSDU_START_TCP_UDP_HEADER_VALID_MASK 0x0000000000200000 305 306 307 308 309 #define RX_MSDU_START_MESH_CONTROL_PRESENT_OFFSET 0x0000000000000008 310 #define RX_MSDU_START_MESH_CONTROL_PRESENT_LSB 22 311 #define RX_MSDU_START_MESH_CONTROL_PRESENT_MSB 22 312 #define RX_MSDU_START_MESH_CONTROL_PRESENT_MASK 0x0000000000400000 313 314 315 316 317 #define RX_MSDU_START_LDPC_OFFSET 0x0000000000000008 318 #define RX_MSDU_START_LDPC_LSB 23 319 #define RX_MSDU_START_LDPC_MSB 23 320 #define RX_MSDU_START_LDPC_MASK 0x0000000000800000 321 322 323 324 325 #define RX_MSDU_START_IP4_PROTOCOL_IP6_NEXT_HEADER_OFFSET 0x0000000000000008 326 #define RX_MSDU_START_IP4_PROTOCOL_IP6_NEXT_HEADER_LSB 24 327 #define RX_MSDU_START_IP4_PROTOCOL_IP6_NEXT_HEADER_MSB 31 328 #define RX_MSDU_START_IP4_PROTOCOL_IP6_NEXT_HEADER_MASK 0x00000000ff000000 329 330 331 332 333 #define RX_MSDU_START_TOEPLITZ_HASH_2_OR_4_OFFSET 0x0000000000000008 334 #define RX_MSDU_START_TOEPLITZ_HASH_2_OR_4_LSB 32 335 #define RX_MSDU_START_TOEPLITZ_HASH_2_OR_4_MSB 63 336 #define RX_MSDU_START_TOEPLITZ_HASH_2_OR_4_MASK 0xffffffff00000000 337 338 339 340 341 #define RX_MSDU_START_FLOW_ID_TOEPLITZ_OFFSET 0x0000000000000010 342 #define RX_MSDU_START_FLOW_ID_TOEPLITZ_LSB 0 343 #define RX_MSDU_START_FLOW_ID_TOEPLITZ_MSB 31 344 #define RX_MSDU_START_FLOW_ID_TOEPLITZ_MASK 0x00000000ffffffff 345 346 347 348 349 #define RX_MSDU_START_USER_RSSI_OFFSET 0x0000000000000010 350 #define RX_MSDU_START_USER_RSSI_LSB 32 351 #define RX_MSDU_START_USER_RSSI_MSB 39 352 #define RX_MSDU_START_USER_RSSI_MASK 0x000000ff00000000 353 354 355 356 357 #define RX_MSDU_START_PKT_TYPE_OFFSET 0x0000000000000010 358 #define RX_MSDU_START_PKT_TYPE_LSB 40 359 #define RX_MSDU_START_PKT_TYPE_MSB 43 360 #define RX_MSDU_START_PKT_TYPE_MASK 0x00000f0000000000 361 362 363 364 365 #define RX_MSDU_START_SGI_OFFSET 0x0000000000000010 366 #define RX_MSDU_START_SGI_LSB 44 367 #define RX_MSDU_START_SGI_MSB 45 368 #define RX_MSDU_START_SGI_MASK 0x0000300000000000 369 370 371 372 373 #define RX_MSDU_START_RATE_MCS_OFFSET 0x0000000000000010 374 #define RX_MSDU_START_RATE_MCS_LSB 46 375 #define RX_MSDU_START_RATE_MCS_MSB 49 376 #define RX_MSDU_START_RATE_MCS_MASK 0x0003c00000000000 377 378 379 380 381 #define RX_MSDU_START_RECEIVE_BANDWIDTH_OFFSET 0x0000000000000010 382 #define RX_MSDU_START_RECEIVE_BANDWIDTH_LSB 50 383 #define RX_MSDU_START_RECEIVE_BANDWIDTH_MSB 52 384 #define RX_MSDU_START_RECEIVE_BANDWIDTH_MASK 0x001c000000000000 385 386 387 388 389 #define RX_MSDU_START_RECEPTION_TYPE_OFFSET 0x0000000000000010 390 #define RX_MSDU_START_RECEPTION_TYPE_LSB 53 391 #define RX_MSDU_START_RECEPTION_TYPE_MSB 55 392 #define RX_MSDU_START_RECEPTION_TYPE_MASK 0x00e0000000000000 393 394 395 396 397 #define RX_MSDU_START_MIMO_SS_BITMAP_OFFSET 0x0000000000000010 398 #define RX_MSDU_START_MIMO_SS_BITMAP_LSB 56 399 #define RX_MSDU_START_MIMO_SS_BITMAP_MSB 63 400 #define RX_MSDU_START_MIMO_SS_BITMAP_MASK 0xff00000000000000 401 402 403 404 405 #define RX_MSDU_START_PPDU_START_TIMESTAMP_31_0_OFFSET 0x0000000000000018 406 #define RX_MSDU_START_PPDU_START_TIMESTAMP_31_0_LSB 0 407 #define RX_MSDU_START_PPDU_START_TIMESTAMP_31_0_MSB 31 408 #define RX_MSDU_START_PPDU_START_TIMESTAMP_31_0_MASK 0x00000000ffffffff 409 410 411 412 413 #define RX_MSDU_START_PPDU_START_TIMESTAMP_63_32_OFFSET 0x0000000000000018 414 #define RX_MSDU_START_PPDU_START_TIMESTAMP_63_32_LSB 32 415 #define RX_MSDU_START_PPDU_START_TIMESTAMP_63_32_MSB 63 416 #define RX_MSDU_START_PPDU_START_TIMESTAMP_63_32_MASK 0xffffffff00000000 417 418 419 420 421 #define RX_MSDU_START_SW_PHY_META_DATA_OFFSET 0x0000000000000020 422 #define RX_MSDU_START_SW_PHY_META_DATA_LSB 0 423 #define RX_MSDU_START_SW_PHY_META_DATA_MSB 31 424 #define RX_MSDU_START_SW_PHY_META_DATA_MASK 0x00000000ffffffff 425 426 427 428 429 #define RX_MSDU_START_VLAN_CTAG_CI_OFFSET 0x0000000000000020 430 #define RX_MSDU_START_VLAN_CTAG_CI_LSB 32 431 #define RX_MSDU_START_VLAN_CTAG_CI_MSB 47 432 #define RX_MSDU_START_VLAN_CTAG_CI_MASK 0x0000ffff00000000 433 434 435 436 437 #define RX_MSDU_START_VLAN_STAG_CI_OFFSET 0x0000000000000020 438 #define RX_MSDU_START_VLAN_STAG_CI_LSB 48 439 #define RX_MSDU_START_VLAN_STAG_CI_MSB 63 440 #define RX_MSDU_START_VLAN_STAG_CI_MASK 0xffff000000000000 441 442 443 444 #endif 445