1 2 /* Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for any 5 * purpose with or without fee is hereby granted, provided that the above 6 * copyright notice and this permission notice appear in all copies. 7 * 8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15 */ 16 17 18 19 20 21 22 23 #ifndef _TLV_HDR_H_ 24 #define _TLV_HDR_H_ 25 #if !defined(__ASSEMBLER__) 26 #endif 27 28 #define _TLV_USERID_WIDTH_ 6 29 #define _TLV_DATA_WIDTH_ 32 30 #define _TLV_TAG_WIDTH_ 9 31 32 #define _TLV_MRV_EN_LEN_WIDTH_ 9 33 #define _TLV_MRV_DIS_LEN_WIDTH_ 12 34 35 #define _TLV_16_DATA_WIDTH_ 16 36 #define _TLV_16_TAG_WIDTH_ 5 37 #define _TLV_16_LEN_WIDTH_ 4 38 #define _TLV_CTAG_WIDTH_ 5 39 #define _TLV_44_DATA_WIDTH_ 44 40 #define _TLV_64_DATA_WIDTH_ 64 41 #define _TLV_76_DATA_WIDTH_ 64 42 #define _TLV_CDATA_WIDTH_ 32 43 #define _TLV_CDATA_76_WIDTH_ 64 44 45 struct tlv_usr_16_tlword_t { 46 #ifndef WIFI_BIT_ORDER_BIG_ENDIAN 47 uint16_t tlv_cflg_reserved : 1, 48 tlv_tag : _TLV_16_TAG_WIDTH_, 49 tlv_len : _TLV_16_LEN_WIDTH_, 50 tlv_usrid : _TLV_USERID_WIDTH_; 51 #else 52 uint16_t tlv_usrid : _TLV_USERID_WIDTH_, 53 tlv_len : _TLV_16_LEN_WIDTH_, 54 tlv_tag : _TLV_16_TAG_WIDTH_, 55 tlv_cflg_reserved : 1; 56 #endif 57 }; 58 59 struct tlv_16_tlword_t { 60 #ifndef WIFI_BIT_ORDER_BIG_ENDIAN 61 uint16_t tlv_cflg_reserved : 1, 62 tlv_len : _TLV_16_LEN_WIDTH_, 63 tlv_tag : _TLV_16_TAG_WIDTH_, 64 tlv_reserved : 6; 65 #else 66 uint16_t tlv_reserved : 6, 67 tlv_tag : _TLV_16_TAG_WIDTH_, 68 tlv_len : _TLV_16_LEN_WIDTH_, 69 tlv_cflg_reserved : 1; 70 #endif 71 }; 72 73 74 75 76 77 78 79 struct tlv_mlo_usr_32_tlword_t { 80 #ifndef WIFI_BIT_ORDER_BIG_ENDIAN 81 uint32_t tlv_cflg_reserved : 1, 82 tlv_tag : _TLV_TAG_WIDTH_, 83 tlv_len : _TLV_MRV_EN_LEN_WIDTH_, 84 tlv_dst_linkid : 3, 85 tlv_src_linkid : 3, 86 tlv_mrv : 1, 87 tlv_usrid : _TLV_USERID_WIDTH_; 88 #else 89 uint32_t tlv_usrid : _TLV_USERID_WIDTH_, 90 tlv_mrv : 1, 91 tlv_src_linkid : 3, 92 tlv_dst_linkid : 3, 93 tlv_len : _TLV_MRV_EN_LEN_WIDTH_, 94 tlv_tag : _TLV_TAG_WIDTH_, 95 tlv_cflg_reserved : 1; 96 #endif 97 }; 98 99 struct tlv_mlo_32_tlword_t { 100 #ifndef WIFI_BIT_ORDER_BIG_ENDIAN 101 uint32_t tlv_cflg_reserved : 1, 102 tlv_tag : _TLV_TAG_WIDTH_, 103 tlv_len : _TLV_MRV_EN_LEN_WIDTH_, 104 tlv_dst_linkid : 3, 105 tlv_src_linkid : 3, 106 tlv_mrv : 1, 107 tlv_reserved : 6; 108 #else 109 uint32_t tlv_reserved : 6, 110 tlv_mrv : 1, 111 tlv_src_linkid : 3, 112 tlv_dst_linkid : 3, 113 tlv_len : _TLV_MRV_EN_LEN_WIDTH_, 114 tlv_tag : _TLV_TAG_WIDTH_, 115 tlv_cflg_reserved : 1; 116 #endif 117 }; 118 119 struct tlv_mlo_usr_64_tlword_t { 120 #ifndef WIFI_BIT_ORDER_BIG_ENDIAN 121 uint64_t tlv_cflg_reserved : 1, 122 tlv_tag : _TLV_TAG_WIDTH_, 123 tlv_len : _TLV_MRV_EN_LEN_WIDTH_, 124 tlv_dst_linkid : 3, 125 tlv_src_linkid : 3, 126 tlv_mrv : 1, 127 tlv_usrid : _TLV_USERID_WIDTH_, 128 #else 129 uint64_t tlv_usrid : _TLV_USERID_WIDTH_, 130 tlv_mrv : 1, 131 tlv_src_linkid : 3, 132 tlv_dst_linkid : 3, 133 tlv_len : _TLV_MRV_EN_LEN_WIDTH_, 134 tlv_tag : _TLV_TAG_WIDTH_, 135 tlv_cflg_reserved : 1, 136 #endif 137 tlv_reserved : 32; 138 }; 139 140 struct tlv_mlo_64_tlword_t { 141 #ifndef WIFI_BIT_ORDER_BIG_ENDIAN 142 uint64_t tlv_cflg_reserved : 1, 143 tlv_tag : _TLV_TAG_WIDTH_, 144 tlv_len : _TLV_MRV_EN_LEN_WIDTH_, 145 tlv_dst_linkid : 3, 146 tlv_src_linkid : 3, 147 tlv_mrv : 1, 148 tlv_reserved : 38; 149 #else 150 uint64_t tlv_usrid_reserved : _TLV_USERID_WIDTH_, 151 tlv_mrv : 1, 152 tlv_src_linkid : 3, 153 tlv_dst_linkid : 3, 154 tlv_len : _TLV_MRV_EN_LEN_WIDTH_, 155 tlv_tag : _TLV_TAG_WIDTH_, 156 tlv_cflg_reserved : 1, 157 tlv_reserved : 32; 158 #endif 159 }; 160 161 struct tlv_mlo_usr_44_tlword_t { 162 #ifndef WIFI_BIT_ORDER_BIG_ENDIAN 163 uint64_t tlv_compression : 1, 164 tlv_tag : _TLV_TAG_WIDTH_, 165 tlv_len : _TLV_MRV_EN_LEN_WIDTH_, 166 tlv_dst_linkid : 3, 167 tlv_src_linkid : 3, 168 tlv_mrv : 1, 169 tlv_usrid : _TLV_USERID_WIDTH_, 170 tlv_reserved : 10, 171 pad_44to64_bit : 22; 172 #else 173 uint64_t tlv_usrid : _TLV_USERID_WIDTH_, 174 tlv_mrv : 1, 175 tlv_src_linkid : 3, 176 tlv_dst_linkid : 3, 177 tlv_len : _TLV_MRV_EN_LEN_WIDTH_, 178 tlv_tag : _TLV_TAG_WIDTH_, 179 tlv_compression : 1, 180 pad_44to64_bit : 22, 181 tlv_reserved : 10; 182 #endif 183 }; 184 185 struct tlv_mlo_44_tlword_t { 186 #ifndef WIFI_BIT_ORDER_BIG_ENDIAN 187 uint64_t tlv_compression : 1, 188 tlv_tag : _TLV_TAG_WIDTH_, 189 tlv_len : _TLV_MRV_EN_LEN_WIDTH_, 190 tlv_dst_linkid : 3, 191 tlv_src_linkid : 3, 192 tlv_mrv : 1, 193 tlv_reserved : 16, 194 pad_44to64_bit : 22; 195 #else 196 uint64_t tlv_usrid_reserved : _TLV_USERID_WIDTH_, 197 tlv_mrv : 1, 198 tlv_src_linkid : 3, 199 tlv_dst_linkid : 3, 200 tlv_len : _TLV_MRV_EN_LEN_WIDTH_, 201 tlv_tag : _TLV_TAG_WIDTH_, 202 tlv_compression : 1, 203 pad_44to64_bit : 22, 204 tlv_reserved : 10; 205 #endif 206 }; 207 208 struct tlv_mlo_usr_76_tlword_t { 209 #ifndef WIFI_BIT_ORDER_BIG_ENDIAN 210 uint64_t tlv_compression : 1, 211 tlv_tag : _TLV_TAG_WIDTH_, 212 tlv_len : _TLV_MRV_EN_LEN_WIDTH_, 213 tlv_dst_linkid : 3, 214 tlv_src_linkid : 3, 215 tlv_mrv : 1, 216 tlv_usrid : _TLV_USERID_WIDTH_, 217 #else 218 uint64_t tlv_usrid : _TLV_USERID_WIDTH_, 219 tlv_mrv : 1, 220 tlv_src_linkid : 3, 221 tlv_dst_linkid : 3, 222 tlv_len : _TLV_MRV_EN_LEN_WIDTH_, 223 tlv_tag : _TLV_TAG_WIDTH_, 224 tlv_compression : 1, 225 #endif 226 tlv_reserved : 32; 227 uint64_t pad_64to128_bit : 64; 228 }; 229 230 struct tlv_mlo_76_tlword_t { 231 #ifndef WIFI_BIT_ORDER_BIG_ENDIAN 232 uint64_t tlv_compression : 1, 233 tlv_tag : _TLV_TAG_WIDTH_, 234 tlv_len : _TLV_MRV_EN_LEN_WIDTH_, 235 tlv_dst_linkid : 3, 236 tlv_src_linkid : 3, 237 tlv_mrv : 1, 238 tlv_reserved : 38; 239 #else 240 uint64_t tlv_usrid_reserved : _TLV_USERID_WIDTH_, 241 tlv_mrv : 1, 242 tlv_src_linkid : 3, 243 tlv_dst_linkid : 3, 244 tlv_len : _TLV_MRV_EN_LEN_WIDTH_, 245 tlv_tag : _TLV_TAG_WIDTH_, 246 tlv_compression : 1, 247 tlv_reserved : 32; 248 #endif 249 uint64_t pad_64to128_bit : 64; 250 }; 251 252 253 254 255 256 257 struct tlv_mac_usr_32_tlword_t { 258 #ifndef WIFI_BIT_ORDER_BIG_ENDIAN 259 uint32_t tlv_cflg_reserved : 1, 260 tlv_tag : _TLV_TAG_WIDTH_, 261 tlv_len : _TLV_MRV_DIS_LEN_WIDTH_, 262 tlv_src_linkid : 3, 263 tlv_mrv : 1, 264 tlv_usrid : _TLV_USERID_WIDTH_; 265 #else 266 uint32_t tlv_usrid : _TLV_USERID_WIDTH_, 267 tlv_mrv : 1, 268 tlv_src_linkid : 3, 269 tlv_len : _TLV_MRV_DIS_LEN_WIDTH_, 270 tlv_tag : _TLV_TAG_WIDTH_, 271 tlv_cflg_reserved : 1; 272 #endif 273 }; 274 275 struct tlv_mac_32_tlword_t { 276 #ifndef WIFI_BIT_ORDER_BIG_ENDIAN 277 uint32_t tlv_cflg_reserved : 1, 278 tlv_tag : _TLV_TAG_WIDTH_, 279 tlv_len : _TLV_MRV_DIS_LEN_WIDTH_, 280 tlv_src_linkid : 3, 281 tlv_mrv : 1, 282 tlv_reserved : 6; 283 #else 284 uint32_t tlv_reserved : 6, 285 tlv_mrv : 1, 286 tlv_src_linkid : 3, 287 tlv_len : _TLV_MRV_DIS_LEN_WIDTH_, 288 tlv_tag : _TLV_TAG_WIDTH_, 289 tlv_cflg_reserved : 1; 290 #endif 291 }; 292 293 struct tlv_mac_usr_64_tlword_t { 294 #ifndef WIFI_BIT_ORDER_BIG_ENDIAN 295 uint64_t tlv_cflg_reserved : 1, 296 tlv_tag : _TLV_TAG_WIDTH_, 297 tlv_len : _TLV_MRV_DIS_LEN_WIDTH_, 298 tlv_src_linkid : 3, 299 tlv_mrv : 1, 300 tlv_usrid : _TLV_USERID_WIDTH_, 301 #else 302 uint64_t tlv_usrid : _TLV_USERID_WIDTH_, 303 tlv_mrv : 1, 304 tlv_src_linkid : 3, 305 tlv_len : _TLV_MRV_DIS_LEN_WIDTH_, 306 tlv_tag : _TLV_TAG_WIDTH_, 307 tlv_cflg_reserved : 1, 308 #endif 309 tlv_reserved : 32; 310 }; 311 312 struct tlv_mac_64_tlword_t { 313 #ifndef WIFI_BIT_ORDER_BIG_ENDIAN 314 uint64_t tlv_cflg_reserved : 1, 315 tlv_tag : _TLV_TAG_WIDTH_, 316 tlv_len : _TLV_MRV_DIS_LEN_WIDTH_, 317 tlv_src_linkid : 3, 318 tlv_mrv : 1, 319 tlv_reserved : 38; 320 #else 321 uint64_t tlv_usrid_reserved : _TLV_USERID_WIDTH_, 322 tlv_mrv : 1, 323 tlv_src_linkid : 3, 324 tlv_len : _TLV_MRV_DIS_LEN_WIDTH_, 325 tlv_tag : _TLV_TAG_WIDTH_, 326 tlv_cflg_reserved : 1, 327 tlv_reserved : 32; 328 #endif 329 }; 330 331 struct tlv_mac_usr_44_tlword_t { 332 #ifndef WIFI_BIT_ORDER_BIG_ENDIAN 333 uint64_t tlv_compression : 1, 334 tlv_tag : _TLV_TAG_WIDTH_, 335 tlv_len : _TLV_MRV_DIS_LEN_WIDTH_, 336 tlv_src_linkid : 3, 337 tlv_mrv : 1, 338 tlv_usrid : _TLV_USERID_WIDTH_, 339 tlv_reserved : 10, 340 pad_44to64_bit : 22; 341 #else 342 uint64_t tlv_usrid : _TLV_USERID_WIDTH_, 343 tlv_mrv : 1, 344 tlv_src_linkid : 3, 345 tlv_len : _TLV_MRV_DIS_LEN_WIDTH_, 346 tlv_tag : _TLV_TAG_WIDTH_, 347 tlv_compression : 1, 348 pad_44to64_bit : 22, 349 tlv_reserved : 10; 350 #endif 351 }; 352 353 struct tlv_mac_44_tlword_t { 354 #ifndef WIFI_BIT_ORDER_BIG_ENDIAN 355 uint64_t tlv_compression : 1, 356 tlv_tag : _TLV_TAG_WIDTH_, 357 tlv_len : _TLV_MRV_DIS_LEN_WIDTH_, 358 tlv_src_linkid : 3, 359 tlv_mrv : 1, 360 tlv_reserved : 16, 361 pad_44to64_bit : 22; 362 #else 363 uint64_t tlv_usrid_reserved : _TLV_USERID_WIDTH_, 364 tlv_mrv : 1, 365 tlv_src_linkid : 3, 366 tlv_len : _TLV_MRV_DIS_LEN_WIDTH_, 367 tlv_tag : _TLV_TAG_WIDTH_, 368 tlv_compression : 1, 369 pad_44to64_bit : 22, 370 tlv_reserved : 10; 371 #endif 372 }; 373 374 struct tlv_mac_usr_76_tlword_t { 375 #ifndef WIFI_BIT_ORDER_BIG_ENDIAN 376 uint64_t tlv_compression : 1, 377 tlv_tag : _TLV_TAG_WIDTH_, 378 tlv_len : _TLV_MRV_DIS_LEN_WIDTH_, 379 tlv_src_linkid : 3, 380 tlv_mrv : 1, 381 tlv_usrid : _TLV_USERID_WIDTH_, 382 #else 383 uint64_t tlv_usrid : _TLV_USERID_WIDTH_, 384 tlv_mrv : 1, 385 tlv_src_linkid : 3, 386 tlv_len : _TLV_MRV_DIS_LEN_WIDTH_, 387 tlv_tag : _TLV_TAG_WIDTH_, 388 tlv_compression : 1, 389 #endif 390 tlv_reserved : 32; 391 uint64_t pad_64to128_bit : 64; 392 }; 393 394 struct tlv_mac_76_tlword_t { 395 #ifndef WIFI_BIT_ORDER_BIG_ENDIAN 396 uint64_t tlv_compression : 1, 397 tlv_tag : _TLV_TAG_WIDTH_, 398 tlv_len : _TLV_MRV_DIS_LEN_WIDTH_, 399 tlv_src_linkid : 3, 400 tlv_mrv : 1, 401 tlv_reserved : 38; 402 #else 403 uint64_t tlv_usrid_reserved : _TLV_USERID_WIDTH_, 404 tlv_mrv : 1, 405 tlv_src_linkid : 3, 406 tlv_len : _TLV_MRV_DIS_LEN_WIDTH_, 407 tlv_tag : _TLV_TAG_WIDTH_, 408 tlv_compression : 1, 409 tlv_reserved : 32; 410 #endif 411 uint64_t pad_64to128_bit : 64; 412 }; 413 414 415 416 417 418 struct tlv_usr_c_44_tlword_t { 419 #ifndef WIFI_BIT_ORDER_BIG_ENDIAN 420 uint64_t tlv_compression : 1, 421 tlv_ctag : _TLV_CTAG_WIDTH_, 422 tlv_usrid : _TLV_USERID_WIDTH_, 423 tlv_cdata : _TLV_CDATA_WIDTH_, 424 pad_44to64_bit : 20; 425 #else 426 uint64_t tlv_cdata_lower_20 : 20, 427 tlv_usrid : _TLV_USERID_WIDTH_, 428 tlv_ctag : _TLV_CTAG_WIDTH_, 429 tlv_compression : 1, 430 pad_44to64_bit : 20, 431 tlv_cdata_upper_12 : 12; 432 #endif 433 }; 434 435 struct tlv_usr_c_76_tlword_t { 436 #ifndef WIFI_BIT_ORDER_BIG_ENDIAN 437 uint64_t tlv_compression : 1, 438 tlv_ctag : _TLV_CTAG_WIDTH_, 439 tlv_usrid : _TLV_USERID_WIDTH_, 440 tlv_cdata_lower_52 : 52; 441 uint64_t tlv_cdata_upper_12 : 12, 442 pad_76to128_bit : 52; 443 #else 444 uint64_t tlv_cdata_lower_20 : 20, 445 tlv_usrid : _TLV_USERID_WIDTH_, 446 tlv_ctag : _TLV_CTAG_WIDTH_, 447 tlv_compression : 1, 448 tlv_cdata_middle_32 : 32; 449 uint64_t pad_76to96_bit : 20, 450 tlv_cdata_upper_12 : 12, 451 pad_96to128_bit : 32; 452 #endif 453 }; 454 455 456 457 458 459 460 461 struct tlv_usr_32_hdr { 462 #ifndef WIFI_BIT_ORDER_BIG_ENDIAN 463 uint64_t tlv_cflg_reserved : 1, 464 tlv_tag : _TLV_TAG_WIDTH_, 465 tlv_len : _TLV_MRV_DIS_LEN_WIDTH_, 466 tlv_src_linkid : 3, 467 tlv_mrv : 1, 468 tlv_usrid : _TLV_USERID_WIDTH_, 469 #else 470 uint32_t tlv_usrid : _TLV_USERID_WIDTH_, 471 tlv_mrv : 1, 472 tlv_src_linkid : 3, 473 tlv_len : _TLV_MRV_DIS_LEN_WIDTH_, 474 tlv_tag : _TLV_TAG_WIDTH_, 475 tlv_cflg_reserved : 1, 476 #endif 477 tlv_reserved : 32; 478 }; 479 480 struct tlv_32_hdr { 481 #ifndef WIFI_BIT_ORDER_BIG_ENDIAN 482 uint64_t tlv_cflg_reserved : 1, 483 tlv_tag : _TLV_TAG_WIDTH_, 484 tlv_len : _TLV_MRV_DIS_LEN_WIDTH_, 485 tlv_src_linkid : 3, 486 tlv_mrv : 1, 487 tlv_reserved : 38; 488 #else 489 uint64_t tlv_usrid_reserved : _TLV_USERID_WIDTH_, 490 tlv_mrv : 1, 491 tlv_src_linkid : 3, 492 tlv_len : _TLV_MRV_DIS_LEN_WIDTH_, 493 tlv_tag : _TLV_TAG_WIDTH_, 494 tlv_cflg_reserved : 1, 495 tlv_reserved : 32; 496 #endif 497 }; 498 499 500 501 502 503 504 505 506 struct tlv_mlo_usr_64_tlw32_t { 507 #ifndef WIFI_BIT_ORDER_BIG_ENDIAN 508 uint32_t tlv_cflg_reserved : 1, 509 tlv_tag : _TLV_TAG_WIDTH_, 510 tlv_len : _TLV_MRV_EN_LEN_WIDTH_, 511 tlv_dst_linkid : 3, 512 tlv_src_linkid : 3, 513 tlv_mrv : 1, 514 tlv_usrid : _TLV_USERID_WIDTH_; 515 #else 516 uint32_t tlv_usrid : _TLV_USERID_WIDTH_, 517 tlv_mrv : 1, 518 tlv_src_linkid : 3, 519 tlv_dst_linkid : 3, 520 tlv_len : _TLV_MRV_EN_LEN_WIDTH_, 521 tlv_tag : _TLV_TAG_WIDTH_, 522 tlv_cflg_reserved : 1; 523 #endif 524 uint32_t pad_32to64_bit : 32; 525 }; 526 527 struct tlv_mlo_64_tlw32_t { 528 #ifndef WIFI_BIT_ORDER_BIG_ENDIAN 529 uint32_t tlv_cflg_reserved : 1, 530 tlv_tag : _TLV_TAG_WIDTH_, 531 tlv_len : _TLV_MRV_EN_LEN_WIDTH_, 532 tlv_dst_linkid : 3, 533 tlv_src_linkid : 3, 534 tlv_mrv : 1, 535 tlv_reserved : _TLV_USERID_WIDTH_; 536 #else 537 uint32_t tlv_reserved : _TLV_USERID_WIDTH_, 538 tlv_mrv : 1, 539 tlv_src_linkid : 3, 540 tlv_dst_linkid : 3, 541 tlv_len : _TLV_MRV_EN_LEN_WIDTH_, 542 tlv_tag : _TLV_TAG_WIDTH_, 543 tlv_cflg_reserved : 1; 544 #endif 545 uint32_t pad_32to64_bit : 32; 546 }; 547 548 struct tlv_mac_usr_64_tlw32_t { 549 #ifndef WIFI_BIT_ORDER_BIG_ENDIAN 550 uint32_t tlv_cflg_reserved : 1, 551 tlv_tag : _TLV_TAG_WIDTH_, 552 tlv_len : _TLV_MRV_DIS_LEN_WIDTH_, 553 tlv_src_linkid : 3, 554 tlv_mrv : 1, 555 tlv_usrid : _TLV_USERID_WIDTH_; 556 #else 557 uint32_t tlv_usrid : _TLV_USERID_WIDTH_, 558 tlv_mrv : 1, 559 tlv_src_linkid : 3, 560 tlv_len : _TLV_MRV_DIS_LEN_WIDTH_, 561 tlv_tag : _TLV_TAG_WIDTH_, 562 tlv_cflg_reserved : 1; 563 #endif 564 uint32_t pad_32to64_bit : 32; 565 }; 566 567 struct tlv_mac_64_tlw32_t { 568 #ifndef WIFI_BIT_ORDER_BIG_ENDIAN 569 uint32_t tlv_cflg_reserved : 1, 570 tlv_tag : _TLV_TAG_WIDTH_, 571 tlv_len : _TLV_MRV_DIS_LEN_WIDTH_, 572 tlv_src_linkid : 3, 573 tlv_mrv : 1, 574 tlv_reserved : _TLV_USERID_WIDTH_; 575 #else 576 uint32_t tlv_reserved : _TLV_USERID_WIDTH_, 577 tlv_mrv : 1, 578 tlv_src_linkid : 3, 579 tlv_len : _TLV_MRV_DIS_LEN_WIDTH_, 580 tlv_tag : _TLV_TAG_WIDTH_, 581 tlv_cflg_reserved : 1; 582 #endif 583 uint32_t pad_32to64_bit : 32; 584 }; 585 586 587 588 589 590 struct tlv_usr_c_44_tlw32_t { 591 #ifndef WIFI_BIT_ORDER_BIG_ENDIAN 592 uint32_t tlv_compression : 1, 593 tlv_ctag : _TLV_CTAG_WIDTH_, 594 tlv_usrid : _TLV_USERID_WIDTH_, 595 tlv_cdata_lower_20 : 20; 596 uint32_t tlv_cdata_upper_12 : 12, 597 pad_44to64_bit : 20; 598 #else 599 uint32_t tlv_cdata_lower_20 : 20, 600 tlv_usrid : _TLV_USERID_WIDTH_, 601 tlv_ctag : _TLV_CTAG_WIDTH_, 602 tlv_compression : 1; 603 uint32_t pad_44to64_bit : 20, 604 tlv_cdata_upper_12 : 12; 605 #endif 606 }; 607 608 struct tlv_usr_c_76_tlw32_t { 609 #ifndef WIFI_BIT_ORDER_BIG_ENDIAN 610 uint32_t tlv_compression : 1, 611 tlv_ctag : _TLV_CTAG_WIDTH_, 612 tlv_usrid : _TLV_USERID_WIDTH_, 613 tlv_cdata_lower_20 : 20; 614 uint32_t tlv_cdata_middle_32 : 32; 615 uint32_t tlv_cdata_upper_12 : 12, 616 pad_76to96_bit : 20; 617 uint32_t pad_96to128_bit : 32; 618 #else 619 uint32_t tlv_cdata_lower_20 : 20, 620 tlv_usrid : _TLV_USERID_WIDTH_, 621 tlv_ctag : _TLV_CTAG_WIDTH_, 622 tlv_compression : 1; 623 uint32_t tlv_cdata_middle_32 : 32; 624 uint32_t pad_76to96_bit : 20, 625 tlv_cdata_upper_12 : 12; 626 uint32_t pad_96to128_bit : 32; 627 #endif 628 }; 629 630 631 632 #endif 633