xref: /wlan-driver/fw-api/hw/qcn9224/v2/tx_fes_status_ack_or_ba.h (revision 5113495b16420b49004c444715d2daae2066e7dc)
1 
2 /* Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved.
3  *
4  * Permission to use, copy, modify, and/or distribute this software for any
5  * purpose with or without fee is hereby granted, provided that the above
6  * copyright notice and this permission notice appear in all copies.
7  *
8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15  */
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17 
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19 
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21 
22 
23 
24 
25 
26 #ifndef _TX_FES_STATUS_ACK_OR_BA_H_
27 #define _TX_FES_STATUS_ACK_OR_BA_H_
28 #if !defined(__ASSEMBLER__)
29 #endif
30 
31 #define NUM_OF_DWORDS_TX_FES_STATUS_ACK_OR_BA 10
32 
33 #define NUM_OF_QWORDS_TX_FES_STATUS_ACK_OR_BA 5
34 
35 
36 struct tx_fes_status_ack_or_ba {
37 #ifndef WIFI_BIT_ORDER_BIG_ENDIAN
38              uint32_t ack_ba_status_type                                      :  1,
39                       ba_type                                                 :  1,
40                       ba_tid                                                  :  4,
41                       unexpected_ack_or_ba                                    :  1,
42                       response_timeout                                        :  1,
43                       ack_frame_rssi                                          :  8,
44                       ssn                                                     : 12,
45                       reserved_0b                                             :  4;
46              uint32_t sw_peer_id                                              : 16,
47                       reserved_1a                                             : 16;
48              uint32_t ba_bitmap_31_0                                          : 32;
49              uint32_t ba_bitmap_63_32                                         : 32;
50              uint32_t ba_bitmap_95_64                                         : 32;
51              uint32_t ba_bitmap_127_96                                        : 32;
52              uint32_t ba_bitmap_159_128                                       : 32;
53              uint32_t ba_bitmap_191_160                                       : 32;
54              uint32_t ba_bitmap_223_192                                       : 32;
55              uint32_t ba_bitmap_255_224                                       : 32;
56 #else
57              uint32_t reserved_0b                                             :  4,
58                       ssn                                                     : 12,
59                       ack_frame_rssi                                          :  8,
60                       response_timeout                                        :  1,
61                       unexpected_ack_or_ba                                    :  1,
62                       ba_tid                                                  :  4,
63                       ba_type                                                 :  1,
64                       ack_ba_status_type                                      :  1;
65              uint32_t reserved_1a                                             : 16,
66                       sw_peer_id                                              : 16;
67              uint32_t ba_bitmap_31_0                                          : 32;
68              uint32_t ba_bitmap_63_32                                         : 32;
69              uint32_t ba_bitmap_95_64                                         : 32;
70              uint32_t ba_bitmap_127_96                                        : 32;
71              uint32_t ba_bitmap_159_128                                       : 32;
72              uint32_t ba_bitmap_191_160                                       : 32;
73              uint32_t ba_bitmap_223_192                                       : 32;
74              uint32_t ba_bitmap_255_224                                       : 32;
75 #endif
76 };
77 
78 
79 
80 
81 #define TX_FES_STATUS_ACK_OR_BA_ACK_BA_STATUS_TYPE_OFFSET                           0x0000000000000000
82 #define TX_FES_STATUS_ACK_OR_BA_ACK_BA_STATUS_TYPE_LSB                              0
83 #define TX_FES_STATUS_ACK_OR_BA_ACK_BA_STATUS_TYPE_MSB                              0
84 #define TX_FES_STATUS_ACK_OR_BA_ACK_BA_STATUS_TYPE_MASK                             0x0000000000000001
85 
86 
87 
88 
89 #define TX_FES_STATUS_ACK_OR_BA_BA_TYPE_OFFSET                                      0x0000000000000000
90 #define TX_FES_STATUS_ACK_OR_BA_BA_TYPE_LSB                                         1
91 #define TX_FES_STATUS_ACK_OR_BA_BA_TYPE_MSB                                         1
92 #define TX_FES_STATUS_ACK_OR_BA_BA_TYPE_MASK                                        0x0000000000000002
93 
94 
95 
96 
97 #define TX_FES_STATUS_ACK_OR_BA_BA_TID_OFFSET                                       0x0000000000000000
98 #define TX_FES_STATUS_ACK_OR_BA_BA_TID_LSB                                          2
99 #define TX_FES_STATUS_ACK_OR_BA_BA_TID_MSB                                          5
100 #define TX_FES_STATUS_ACK_OR_BA_BA_TID_MASK                                         0x000000000000003c
101 
102 
103 
104 
105 #define TX_FES_STATUS_ACK_OR_BA_UNEXPECTED_ACK_OR_BA_OFFSET                         0x0000000000000000
106 #define TX_FES_STATUS_ACK_OR_BA_UNEXPECTED_ACK_OR_BA_LSB                            6
107 #define TX_FES_STATUS_ACK_OR_BA_UNEXPECTED_ACK_OR_BA_MSB                            6
108 #define TX_FES_STATUS_ACK_OR_BA_UNEXPECTED_ACK_OR_BA_MASK                           0x0000000000000040
109 
110 
111 
112 
113 #define TX_FES_STATUS_ACK_OR_BA_RESPONSE_TIMEOUT_OFFSET                             0x0000000000000000
114 #define TX_FES_STATUS_ACK_OR_BA_RESPONSE_TIMEOUT_LSB                                7
115 #define TX_FES_STATUS_ACK_OR_BA_RESPONSE_TIMEOUT_MSB                                7
116 #define TX_FES_STATUS_ACK_OR_BA_RESPONSE_TIMEOUT_MASK                               0x0000000000000080
117 
118 
119 
120 
121 #define TX_FES_STATUS_ACK_OR_BA_ACK_FRAME_RSSI_OFFSET                               0x0000000000000000
122 #define TX_FES_STATUS_ACK_OR_BA_ACK_FRAME_RSSI_LSB                                  8
123 #define TX_FES_STATUS_ACK_OR_BA_ACK_FRAME_RSSI_MSB                                  15
124 #define TX_FES_STATUS_ACK_OR_BA_ACK_FRAME_RSSI_MASK                                 0x000000000000ff00
125 
126 
127 
128 
129 #define TX_FES_STATUS_ACK_OR_BA_SSN_OFFSET                                          0x0000000000000000
130 #define TX_FES_STATUS_ACK_OR_BA_SSN_LSB                                             16
131 #define TX_FES_STATUS_ACK_OR_BA_SSN_MSB                                             27
132 #define TX_FES_STATUS_ACK_OR_BA_SSN_MASK                                            0x000000000fff0000
133 
134 
135 
136 
137 #define TX_FES_STATUS_ACK_OR_BA_RESERVED_0B_OFFSET                                  0x0000000000000000
138 #define TX_FES_STATUS_ACK_OR_BA_RESERVED_0B_LSB                                     28
139 #define TX_FES_STATUS_ACK_OR_BA_RESERVED_0B_MSB                                     31
140 #define TX_FES_STATUS_ACK_OR_BA_RESERVED_0B_MASK                                    0x00000000f0000000
141 
142 
143 
144 
145 #define TX_FES_STATUS_ACK_OR_BA_SW_PEER_ID_OFFSET                                   0x0000000000000000
146 #define TX_FES_STATUS_ACK_OR_BA_SW_PEER_ID_LSB                                      32
147 #define TX_FES_STATUS_ACK_OR_BA_SW_PEER_ID_MSB                                      47
148 #define TX_FES_STATUS_ACK_OR_BA_SW_PEER_ID_MASK                                     0x0000ffff00000000
149 
150 
151 
152 
153 #define TX_FES_STATUS_ACK_OR_BA_RESERVED_1A_OFFSET                                  0x0000000000000000
154 #define TX_FES_STATUS_ACK_OR_BA_RESERVED_1A_LSB                                     48
155 #define TX_FES_STATUS_ACK_OR_BA_RESERVED_1A_MSB                                     63
156 #define TX_FES_STATUS_ACK_OR_BA_RESERVED_1A_MASK                                    0xffff000000000000
157 
158 
159 
160 
161 #define TX_FES_STATUS_ACK_OR_BA_BA_BITMAP_31_0_OFFSET                               0x0000000000000008
162 #define TX_FES_STATUS_ACK_OR_BA_BA_BITMAP_31_0_LSB                                  0
163 #define TX_FES_STATUS_ACK_OR_BA_BA_BITMAP_31_0_MSB                                  31
164 #define TX_FES_STATUS_ACK_OR_BA_BA_BITMAP_31_0_MASK                                 0x00000000ffffffff
165 
166 
167 
168 
169 #define TX_FES_STATUS_ACK_OR_BA_BA_BITMAP_63_32_OFFSET                              0x0000000000000008
170 #define TX_FES_STATUS_ACK_OR_BA_BA_BITMAP_63_32_LSB                                 32
171 #define TX_FES_STATUS_ACK_OR_BA_BA_BITMAP_63_32_MSB                                 63
172 #define TX_FES_STATUS_ACK_OR_BA_BA_BITMAP_63_32_MASK                                0xffffffff00000000
173 
174 
175 
176 
177 #define TX_FES_STATUS_ACK_OR_BA_BA_BITMAP_95_64_OFFSET                              0x0000000000000010
178 #define TX_FES_STATUS_ACK_OR_BA_BA_BITMAP_95_64_LSB                                 0
179 #define TX_FES_STATUS_ACK_OR_BA_BA_BITMAP_95_64_MSB                                 31
180 #define TX_FES_STATUS_ACK_OR_BA_BA_BITMAP_95_64_MASK                                0x00000000ffffffff
181 
182 
183 
184 
185 #define TX_FES_STATUS_ACK_OR_BA_BA_BITMAP_127_96_OFFSET                             0x0000000000000010
186 #define TX_FES_STATUS_ACK_OR_BA_BA_BITMAP_127_96_LSB                                32
187 #define TX_FES_STATUS_ACK_OR_BA_BA_BITMAP_127_96_MSB                                63
188 #define TX_FES_STATUS_ACK_OR_BA_BA_BITMAP_127_96_MASK                               0xffffffff00000000
189 
190 
191 
192 
193 #define TX_FES_STATUS_ACK_OR_BA_BA_BITMAP_159_128_OFFSET                            0x0000000000000018
194 #define TX_FES_STATUS_ACK_OR_BA_BA_BITMAP_159_128_LSB                               0
195 #define TX_FES_STATUS_ACK_OR_BA_BA_BITMAP_159_128_MSB                               31
196 #define TX_FES_STATUS_ACK_OR_BA_BA_BITMAP_159_128_MASK                              0x00000000ffffffff
197 
198 
199 
200 
201 #define TX_FES_STATUS_ACK_OR_BA_BA_BITMAP_191_160_OFFSET                            0x0000000000000018
202 #define TX_FES_STATUS_ACK_OR_BA_BA_BITMAP_191_160_LSB                               32
203 #define TX_FES_STATUS_ACK_OR_BA_BA_BITMAP_191_160_MSB                               63
204 #define TX_FES_STATUS_ACK_OR_BA_BA_BITMAP_191_160_MASK                              0xffffffff00000000
205 
206 
207 
208 
209 #define TX_FES_STATUS_ACK_OR_BA_BA_BITMAP_223_192_OFFSET                            0x0000000000000020
210 #define TX_FES_STATUS_ACK_OR_BA_BA_BITMAP_223_192_LSB                               0
211 #define TX_FES_STATUS_ACK_OR_BA_BA_BITMAP_223_192_MSB                               31
212 #define TX_FES_STATUS_ACK_OR_BA_BA_BITMAP_223_192_MASK                              0x00000000ffffffff
213 
214 
215 
216 
217 #define TX_FES_STATUS_ACK_OR_BA_BA_BITMAP_255_224_OFFSET                            0x0000000000000020
218 #define TX_FES_STATUS_ACK_OR_BA_BA_BITMAP_255_224_LSB                               32
219 #define TX_FES_STATUS_ACK_OR_BA_BA_BITMAP_255_224_MSB                               63
220 #define TX_FES_STATUS_ACK_OR_BA_BA_BITMAP_255_224_MASK                              0xffffffff00000000
221 
222 
223 
224 #endif
225