1*5113495bSYour Name 2*5113495bSYour Name /* Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved. 3*5113495bSYour Name * 4*5113495bSYour Name * Permission to use, copy, modify, and/or distribute this software for any 5*5113495bSYour Name * purpose with or without fee is hereby granted, provided that the above 6*5113495bSYour Name * copyright notice and this permission notice appear in all copies. 7*5113495bSYour Name * 8*5113495bSYour Name * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9*5113495bSYour Name * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10*5113495bSYour Name * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11*5113495bSYour Name * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12*5113495bSYour Name * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13*5113495bSYour Name * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14*5113495bSYour Name * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15*5113495bSYour Name */ 16*5113495bSYour Name 17*5113495bSYour Name 18*5113495bSYour Name 19*5113495bSYour Name 20*5113495bSYour Name 21*5113495bSYour Name 22*5113495bSYour Name 23*5113495bSYour Name 24*5113495bSYour Name 25*5113495bSYour Name 26*5113495bSYour Name #ifndef _TX_FLUSH_REQ_H_ 27*5113495bSYour Name #define _TX_FLUSH_REQ_H_ 28*5113495bSYour Name #if !defined(__ASSEMBLER__) 29*5113495bSYour Name #endif 30*5113495bSYour Name 31*5113495bSYour Name #define NUM_OF_DWORDS_TX_FLUSH_REQ 2 32*5113495bSYour Name 33*5113495bSYour Name #define NUM_OF_QWORDS_TX_FLUSH_REQ 1 34*5113495bSYour Name 35*5113495bSYour Name 36*5113495bSYour Name struct tx_flush_req { 37*5113495bSYour Name #ifndef WIFI_BIT_ORDER_BIG_ENDIAN 38*5113495bSYour Name uint32_t flush_req_reason : 8, 39*5113495bSYour Name phytx_abort_reason : 8, 40*5113495bSYour Name flush_req_user_number_or_link_id : 6, 41*5113495bSYour Name mlo_abort_reason : 5, 42*5113495bSYour Name reserved_0a : 5; 43*5113495bSYour Name uint32_t tlv64_padding : 32; 44*5113495bSYour Name #else 45*5113495bSYour Name uint32_t reserved_0a : 5, 46*5113495bSYour Name mlo_abort_reason : 5, 47*5113495bSYour Name flush_req_user_number_or_link_id : 6, 48*5113495bSYour Name phytx_abort_reason : 8, 49*5113495bSYour Name flush_req_reason : 8; 50*5113495bSYour Name uint32_t tlv64_padding : 32; 51*5113495bSYour Name #endif 52*5113495bSYour Name }; 53*5113495bSYour Name 54*5113495bSYour Name 55*5113495bSYour Name 56*5113495bSYour Name 57*5113495bSYour Name #define TX_FLUSH_REQ_FLUSH_REQ_REASON_OFFSET 0x0000000000000000 58*5113495bSYour Name #define TX_FLUSH_REQ_FLUSH_REQ_REASON_LSB 0 59*5113495bSYour Name #define TX_FLUSH_REQ_FLUSH_REQ_REASON_MSB 7 60*5113495bSYour Name #define TX_FLUSH_REQ_FLUSH_REQ_REASON_MASK 0x00000000000000ff 61*5113495bSYour Name 62*5113495bSYour Name 63*5113495bSYour Name 64*5113495bSYour Name 65*5113495bSYour Name #define TX_FLUSH_REQ_PHYTX_ABORT_REASON_OFFSET 0x0000000000000000 66*5113495bSYour Name #define TX_FLUSH_REQ_PHYTX_ABORT_REASON_LSB 8 67*5113495bSYour Name #define TX_FLUSH_REQ_PHYTX_ABORT_REASON_MSB 15 68*5113495bSYour Name #define TX_FLUSH_REQ_PHYTX_ABORT_REASON_MASK 0x000000000000ff00 69*5113495bSYour Name 70*5113495bSYour Name 71*5113495bSYour Name 72*5113495bSYour Name 73*5113495bSYour Name #define TX_FLUSH_REQ_FLUSH_REQ_USER_NUMBER_OR_LINK_ID_OFFSET 0x0000000000000000 74*5113495bSYour Name #define TX_FLUSH_REQ_FLUSH_REQ_USER_NUMBER_OR_LINK_ID_LSB 16 75*5113495bSYour Name #define TX_FLUSH_REQ_FLUSH_REQ_USER_NUMBER_OR_LINK_ID_MSB 21 76*5113495bSYour Name #define TX_FLUSH_REQ_FLUSH_REQ_USER_NUMBER_OR_LINK_ID_MASK 0x00000000003f0000 77*5113495bSYour Name 78*5113495bSYour Name 79*5113495bSYour Name 80*5113495bSYour Name 81*5113495bSYour Name #define TX_FLUSH_REQ_MLO_ABORT_REASON_OFFSET 0x0000000000000000 82*5113495bSYour Name #define TX_FLUSH_REQ_MLO_ABORT_REASON_LSB 22 83*5113495bSYour Name #define TX_FLUSH_REQ_MLO_ABORT_REASON_MSB 26 84*5113495bSYour Name #define TX_FLUSH_REQ_MLO_ABORT_REASON_MASK 0x0000000007c00000 85*5113495bSYour Name 86*5113495bSYour Name 87*5113495bSYour Name 88*5113495bSYour Name 89*5113495bSYour Name #define TX_FLUSH_REQ_RESERVED_0A_OFFSET 0x0000000000000000 90*5113495bSYour Name #define TX_FLUSH_REQ_RESERVED_0A_LSB 27 91*5113495bSYour Name #define TX_FLUSH_REQ_RESERVED_0A_MSB 31 92*5113495bSYour Name #define TX_FLUSH_REQ_RESERVED_0A_MASK 0x00000000f8000000 93*5113495bSYour Name 94*5113495bSYour Name 95*5113495bSYour Name 96*5113495bSYour Name 97*5113495bSYour Name #define TX_FLUSH_REQ_TLV64_PADDING_OFFSET 0x0000000000000000 98*5113495bSYour Name #define TX_FLUSH_REQ_TLV64_PADDING_LSB 32 99*5113495bSYour Name #define TX_FLUSH_REQ_TLV64_PADDING_MSB 63 100*5113495bSYour Name #define TX_FLUSH_REQ_TLV64_PADDING_MASK 0xffffffff00000000 101*5113495bSYour Name 102*5113495bSYour Name 103*5113495bSYour Name 104*5113495bSYour Name #endif 105