xref: /wlan-driver/fw-api/hw/qcn9224/v2/tx_flush_req.h (revision 5113495b16420b49004c444715d2daae2066e7dc)
1 
2 /* Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved.
3  *
4  * Permission to use, copy, modify, and/or distribute this software for any
5  * purpose with or without fee is hereby granted, provided that the above
6  * copyright notice and this permission notice appear in all copies.
7  *
8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15  */
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24 
25 
26 #ifndef _TX_FLUSH_REQ_H_
27 #define _TX_FLUSH_REQ_H_
28 #if !defined(__ASSEMBLER__)
29 #endif
30 
31 #define NUM_OF_DWORDS_TX_FLUSH_REQ 2
32 
33 #define NUM_OF_QWORDS_TX_FLUSH_REQ 1
34 
35 
36 struct tx_flush_req {
37 #ifndef WIFI_BIT_ORDER_BIG_ENDIAN
38              uint32_t flush_req_reason                                        :  8,
39                       phytx_abort_reason                                      :  8,
40                       flush_req_user_number_or_link_id                        :  6,
41                       mlo_abort_reason                                        :  5,
42                       reserved_0a                                             :  5;
43              uint32_t tlv64_padding                                           : 32;
44 #else
45              uint32_t reserved_0a                                             :  5,
46                       mlo_abort_reason                                        :  5,
47                       flush_req_user_number_or_link_id                        :  6,
48                       phytx_abort_reason                                      :  8,
49                       flush_req_reason                                        :  8;
50              uint32_t tlv64_padding                                           : 32;
51 #endif
52 };
53 
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56 
57 #define TX_FLUSH_REQ_FLUSH_REQ_REASON_OFFSET                                        0x0000000000000000
58 #define TX_FLUSH_REQ_FLUSH_REQ_REASON_LSB                                           0
59 #define TX_FLUSH_REQ_FLUSH_REQ_REASON_MSB                                           7
60 #define TX_FLUSH_REQ_FLUSH_REQ_REASON_MASK                                          0x00000000000000ff
61 
62 
63 
64 
65 #define TX_FLUSH_REQ_PHYTX_ABORT_REASON_OFFSET                                      0x0000000000000000
66 #define TX_FLUSH_REQ_PHYTX_ABORT_REASON_LSB                                         8
67 #define TX_FLUSH_REQ_PHYTX_ABORT_REASON_MSB                                         15
68 #define TX_FLUSH_REQ_PHYTX_ABORT_REASON_MASK                                        0x000000000000ff00
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72 
73 #define TX_FLUSH_REQ_FLUSH_REQ_USER_NUMBER_OR_LINK_ID_OFFSET                        0x0000000000000000
74 #define TX_FLUSH_REQ_FLUSH_REQ_USER_NUMBER_OR_LINK_ID_LSB                           16
75 #define TX_FLUSH_REQ_FLUSH_REQ_USER_NUMBER_OR_LINK_ID_MSB                           21
76 #define TX_FLUSH_REQ_FLUSH_REQ_USER_NUMBER_OR_LINK_ID_MASK                          0x00000000003f0000
77 
78 
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80 
81 #define TX_FLUSH_REQ_MLO_ABORT_REASON_OFFSET                                        0x0000000000000000
82 #define TX_FLUSH_REQ_MLO_ABORT_REASON_LSB                                           22
83 #define TX_FLUSH_REQ_MLO_ABORT_REASON_MSB                                           26
84 #define TX_FLUSH_REQ_MLO_ABORT_REASON_MASK                                          0x0000000007c00000
85 
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88 
89 #define TX_FLUSH_REQ_RESERVED_0A_OFFSET                                             0x0000000000000000
90 #define TX_FLUSH_REQ_RESERVED_0A_LSB                                                27
91 #define TX_FLUSH_REQ_RESERVED_0A_MSB                                                31
92 #define TX_FLUSH_REQ_RESERVED_0A_MASK                                               0x00000000f8000000
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96 
97 #define TX_FLUSH_REQ_TLV64_PADDING_OFFSET                                           0x0000000000000000
98 #define TX_FLUSH_REQ_TLV64_PADDING_LSB                                              32
99 #define TX_FLUSH_REQ_TLV64_PADDING_MSB                                              63
100 #define TX_FLUSH_REQ_TLV64_PADDING_MASK                                             0xffffffff00000000
101 
102 
103 
104 #endif
105