1 2 /* Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for any 5 * purpose with or without fee is hereby granted, provided that the above 6 * copyright notice and this permission notice appear in all copies. 7 * 8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15 */ 16 17 18 19 20 21 22 23 24 25 26 #ifndef _TX_MSDU_START_H_ 27 #define _TX_MSDU_START_H_ 28 #if !defined(__ASSEMBLER__) 29 #endif 30 31 #define NUM_OF_DWORDS_TX_MSDU_START 8 32 33 #define NUM_OF_QWORDS_TX_MSDU_START 4 34 35 36 struct tx_msdu_start { 37 #ifndef WIFI_BIT_ORDER_BIG_ENDIAN 38 uint32_t msdu_len : 14, 39 first_msdu : 1, 40 last_msdu : 1, 41 encap_type : 2, 42 epd_en : 1, 43 da_sa_present : 2, 44 ipv4_checksum_en : 1, 45 udp_over_ipv4_checksum_en : 1, 46 udp_over_ipv6_checksum_en : 1, 47 tcp_over_ipv4_checksum_en : 1, 48 tcp_over_ipv6_checksum_en : 1, 49 dummy_msdu_delimitation : 1, 50 reserved_0a : 5; 51 uint32_t tso_enable : 1, 52 reserved_1a : 6, 53 tcp_flag : 9, 54 tcp_flag_mask : 9, 55 mesh_enable : 1, 56 reserved_1b : 6; 57 uint32_t l2_length : 16, 58 ip_length : 16; 59 uint32_t tcp_seq_number : 32; 60 uint32_t ip_identification : 16, 61 checksum_offset : 13, 62 partial_checksum_en : 1, 63 reserved_4 : 2; 64 uint32_t payload_start_offset : 14, 65 reserved_5a : 2, 66 payload_end_offset : 14, 67 reserved_5b : 2; 68 uint32_t udp_length : 16, 69 reserved_6 : 16; 70 uint32_t tlv64_padding : 32; 71 #else 72 uint32_t reserved_0a : 5, 73 dummy_msdu_delimitation : 1, 74 tcp_over_ipv6_checksum_en : 1, 75 tcp_over_ipv4_checksum_en : 1, 76 udp_over_ipv6_checksum_en : 1, 77 udp_over_ipv4_checksum_en : 1, 78 ipv4_checksum_en : 1, 79 da_sa_present : 2, 80 epd_en : 1, 81 encap_type : 2, 82 last_msdu : 1, 83 first_msdu : 1, 84 msdu_len : 14; 85 uint32_t reserved_1b : 6, 86 mesh_enable : 1, 87 tcp_flag_mask : 9, 88 tcp_flag : 9, 89 reserved_1a : 6, 90 tso_enable : 1; 91 uint32_t ip_length : 16, 92 l2_length : 16; 93 uint32_t tcp_seq_number : 32; 94 uint32_t reserved_4 : 2, 95 partial_checksum_en : 1, 96 checksum_offset : 13, 97 ip_identification : 16; 98 uint32_t reserved_5b : 2, 99 payload_end_offset : 14, 100 reserved_5a : 2, 101 payload_start_offset : 14; 102 uint32_t reserved_6 : 16, 103 udp_length : 16; 104 uint32_t tlv64_padding : 32; 105 #endif 106 }; 107 108 109 110 111 #define TX_MSDU_START_MSDU_LEN_OFFSET 0x0000000000000000 112 #define TX_MSDU_START_MSDU_LEN_LSB 0 113 #define TX_MSDU_START_MSDU_LEN_MSB 13 114 #define TX_MSDU_START_MSDU_LEN_MASK 0x0000000000003fff 115 116 117 118 119 #define TX_MSDU_START_FIRST_MSDU_OFFSET 0x0000000000000000 120 #define TX_MSDU_START_FIRST_MSDU_LSB 14 121 #define TX_MSDU_START_FIRST_MSDU_MSB 14 122 #define TX_MSDU_START_FIRST_MSDU_MASK 0x0000000000004000 123 124 125 126 127 #define TX_MSDU_START_LAST_MSDU_OFFSET 0x0000000000000000 128 #define TX_MSDU_START_LAST_MSDU_LSB 15 129 #define TX_MSDU_START_LAST_MSDU_MSB 15 130 #define TX_MSDU_START_LAST_MSDU_MASK 0x0000000000008000 131 132 133 134 135 #define TX_MSDU_START_ENCAP_TYPE_OFFSET 0x0000000000000000 136 #define TX_MSDU_START_ENCAP_TYPE_LSB 16 137 #define TX_MSDU_START_ENCAP_TYPE_MSB 17 138 #define TX_MSDU_START_ENCAP_TYPE_MASK 0x0000000000030000 139 140 141 142 143 #define TX_MSDU_START_EPD_EN_OFFSET 0x0000000000000000 144 #define TX_MSDU_START_EPD_EN_LSB 18 145 #define TX_MSDU_START_EPD_EN_MSB 18 146 #define TX_MSDU_START_EPD_EN_MASK 0x0000000000040000 147 148 149 150 151 #define TX_MSDU_START_DA_SA_PRESENT_OFFSET 0x0000000000000000 152 #define TX_MSDU_START_DA_SA_PRESENT_LSB 19 153 #define TX_MSDU_START_DA_SA_PRESENT_MSB 20 154 #define TX_MSDU_START_DA_SA_PRESENT_MASK 0x0000000000180000 155 156 157 158 159 #define TX_MSDU_START_IPV4_CHECKSUM_EN_OFFSET 0x0000000000000000 160 #define TX_MSDU_START_IPV4_CHECKSUM_EN_LSB 21 161 #define TX_MSDU_START_IPV4_CHECKSUM_EN_MSB 21 162 #define TX_MSDU_START_IPV4_CHECKSUM_EN_MASK 0x0000000000200000 163 164 165 166 167 #define TX_MSDU_START_UDP_OVER_IPV4_CHECKSUM_EN_OFFSET 0x0000000000000000 168 #define TX_MSDU_START_UDP_OVER_IPV4_CHECKSUM_EN_LSB 22 169 #define TX_MSDU_START_UDP_OVER_IPV4_CHECKSUM_EN_MSB 22 170 #define TX_MSDU_START_UDP_OVER_IPV4_CHECKSUM_EN_MASK 0x0000000000400000 171 172 173 174 175 #define TX_MSDU_START_UDP_OVER_IPV6_CHECKSUM_EN_OFFSET 0x0000000000000000 176 #define TX_MSDU_START_UDP_OVER_IPV6_CHECKSUM_EN_LSB 23 177 #define TX_MSDU_START_UDP_OVER_IPV6_CHECKSUM_EN_MSB 23 178 #define TX_MSDU_START_UDP_OVER_IPV6_CHECKSUM_EN_MASK 0x0000000000800000 179 180 181 182 183 #define TX_MSDU_START_TCP_OVER_IPV4_CHECKSUM_EN_OFFSET 0x0000000000000000 184 #define TX_MSDU_START_TCP_OVER_IPV4_CHECKSUM_EN_LSB 24 185 #define TX_MSDU_START_TCP_OVER_IPV4_CHECKSUM_EN_MSB 24 186 #define TX_MSDU_START_TCP_OVER_IPV4_CHECKSUM_EN_MASK 0x0000000001000000 187 188 189 190 191 #define TX_MSDU_START_TCP_OVER_IPV6_CHECKSUM_EN_OFFSET 0x0000000000000000 192 #define TX_MSDU_START_TCP_OVER_IPV6_CHECKSUM_EN_LSB 25 193 #define TX_MSDU_START_TCP_OVER_IPV6_CHECKSUM_EN_MSB 25 194 #define TX_MSDU_START_TCP_OVER_IPV6_CHECKSUM_EN_MASK 0x0000000002000000 195 196 197 198 199 #define TX_MSDU_START_DUMMY_MSDU_DELIMITATION_OFFSET 0x0000000000000000 200 #define TX_MSDU_START_DUMMY_MSDU_DELIMITATION_LSB 26 201 #define TX_MSDU_START_DUMMY_MSDU_DELIMITATION_MSB 26 202 #define TX_MSDU_START_DUMMY_MSDU_DELIMITATION_MASK 0x0000000004000000 203 204 205 206 207 #define TX_MSDU_START_RESERVED_0A_OFFSET 0x0000000000000000 208 #define TX_MSDU_START_RESERVED_0A_LSB 27 209 #define TX_MSDU_START_RESERVED_0A_MSB 31 210 #define TX_MSDU_START_RESERVED_0A_MASK 0x00000000f8000000 211 212 213 214 215 #define TX_MSDU_START_TSO_ENABLE_OFFSET 0x0000000000000000 216 #define TX_MSDU_START_TSO_ENABLE_LSB 32 217 #define TX_MSDU_START_TSO_ENABLE_MSB 32 218 #define TX_MSDU_START_TSO_ENABLE_MASK 0x0000000100000000 219 220 221 222 223 #define TX_MSDU_START_RESERVED_1A_OFFSET 0x0000000000000000 224 #define TX_MSDU_START_RESERVED_1A_LSB 33 225 #define TX_MSDU_START_RESERVED_1A_MSB 38 226 #define TX_MSDU_START_RESERVED_1A_MASK 0x0000007e00000000 227 228 229 230 231 #define TX_MSDU_START_TCP_FLAG_OFFSET 0x0000000000000000 232 #define TX_MSDU_START_TCP_FLAG_LSB 39 233 #define TX_MSDU_START_TCP_FLAG_MSB 47 234 #define TX_MSDU_START_TCP_FLAG_MASK 0x0000ff8000000000 235 236 237 238 239 #define TX_MSDU_START_TCP_FLAG_MASK_OFFSET 0x0000000000000000 240 #define TX_MSDU_START_TCP_FLAG_MASK_LSB 48 241 #define TX_MSDU_START_TCP_FLAG_MASK_MSB 56 242 #define TX_MSDU_START_TCP_FLAG_MASK_MASK 0x01ff000000000000 243 244 245 246 247 #define TX_MSDU_START_MESH_ENABLE_OFFSET 0x0000000000000000 248 #define TX_MSDU_START_MESH_ENABLE_LSB 57 249 #define TX_MSDU_START_MESH_ENABLE_MSB 57 250 #define TX_MSDU_START_MESH_ENABLE_MASK 0x0200000000000000 251 252 253 254 255 #define TX_MSDU_START_RESERVED_1B_OFFSET 0x0000000000000000 256 #define TX_MSDU_START_RESERVED_1B_LSB 58 257 #define TX_MSDU_START_RESERVED_1B_MSB 63 258 #define TX_MSDU_START_RESERVED_1B_MASK 0xfc00000000000000 259 260 261 262 263 #define TX_MSDU_START_L2_LENGTH_OFFSET 0x0000000000000008 264 #define TX_MSDU_START_L2_LENGTH_LSB 0 265 #define TX_MSDU_START_L2_LENGTH_MSB 15 266 #define TX_MSDU_START_L2_LENGTH_MASK 0x000000000000ffff 267 268 269 270 271 #define TX_MSDU_START_IP_LENGTH_OFFSET 0x0000000000000008 272 #define TX_MSDU_START_IP_LENGTH_LSB 16 273 #define TX_MSDU_START_IP_LENGTH_MSB 31 274 #define TX_MSDU_START_IP_LENGTH_MASK 0x00000000ffff0000 275 276 277 278 279 #define TX_MSDU_START_TCP_SEQ_NUMBER_OFFSET 0x0000000000000008 280 #define TX_MSDU_START_TCP_SEQ_NUMBER_LSB 32 281 #define TX_MSDU_START_TCP_SEQ_NUMBER_MSB 63 282 #define TX_MSDU_START_TCP_SEQ_NUMBER_MASK 0xffffffff00000000 283 284 285 286 287 #define TX_MSDU_START_IP_IDENTIFICATION_OFFSET 0x0000000000000010 288 #define TX_MSDU_START_IP_IDENTIFICATION_LSB 0 289 #define TX_MSDU_START_IP_IDENTIFICATION_MSB 15 290 #define TX_MSDU_START_IP_IDENTIFICATION_MASK 0x000000000000ffff 291 292 293 294 295 #define TX_MSDU_START_CHECKSUM_OFFSET_OFFSET 0x0000000000000010 296 #define TX_MSDU_START_CHECKSUM_OFFSET_LSB 16 297 #define TX_MSDU_START_CHECKSUM_OFFSET_MSB 28 298 #define TX_MSDU_START_CHECKSUM_OFFSET_MASK 0x000000001fff0000 299 300 301 302 303 #define TX_MSDU_START_PARTIAL_CHECKSUM_EN_OFFSET 0x0000000000000010 304 #define TX_MSDU_START_PARTIAL_CHECKSUM_EN_LSB 29 305 #define TX_MSDU_START_PARTIAL_CHECKSUM_EN_MSB 29 306 #define TX_MSDU_START_PARTIAL_CHECKSUM_EN_MASK 0x0000000020000000 307 308 309 310 311 #define TX_MSDU_START_RESERVED_4_OFFSET 0x0000000000000010 312 #define TX_MSDU_START_RESERVED_4_LSB 30 313 #define TX_MSDU_START_RESERVED_4_MSB 31 314 #define TX_MSDU_START_RESERVED_4_MASK 0x00000000c0000000 315 316 317 318 319 #define TX_MSDU_START_PAYLOAD_START_OFFSET_OFFSET 0x0000000000000010 320 #define TX_MSDU_START_PAYLOAD_START_OFFSET_LSB 32 321 #define TX_MSDU_START_PAYLOAD_START_OFFSET_MSB 45 322 #define TX_MSDU_START_PAYLOAD_START_OFFSET_MASK 0x00003fff00000000 323 324 325 326 327 #define TX_MSDU_START_RESERVED_5A_OFFSET 0x0000000000000010 328 #define TX_MSDU_START_RESERVED_5A_LSB 46 329 #define TX_MSDU_START_RESERVED_5A_MSB 47 330 #define TX_MSDU_START_RESERVED_5A_MASK 0x0000c00000000000 331 332 333 334 335 #define TX_MSDU_START_PAYLOAD_END_OFFSET_OFFSET 0x0000000000000010 336 #define TX_MSDU_START_PAYLOAD_END_OFFSET_LSB 48 337 #define TX_MSDU_START_PAYLOAD_END_OFFSET_MSB 61 338 #define TX_MSDU_START_PAYLOAD_END_OFFSET_MASK 0x3fff000000000000 339 340 341 342 343 #define TX_MSDU_START_RESERVED_5B_OFFSET 0x0000000000000010 344 #define TX_MSDU_START_RESERVED_5B_LSB 62 345 #define TX_MSDU_START_RESERVED_5B_MSB 63 346 #define TX_MSDU_START_RESERVED_5B_MASK 0xc000000000000000 347 348 349 350 351 #define TX_MSDU_START_UDP_LENGTH_OFFSET 0x0000000000000018 352 #define TX_MSDU_START_UDP_LENGTH_LSB 0 353 #define TX_MSDU_START_UDP_LENGTH_MSB 15 354 #define TX_MSDU_START_UDP_LENGTH_MASK 0x000000000000ffff 355 356 357 358 359 #define TX_MSDU_START_RESERVED_6_OFFSET 0x0000000000000018 360 #define TX_MSDU_START_RESERVED_6_LSB 16 361 #define TX_MSDU_START_RESERVED_6_MSB 31 362 #define TX_MSDU_START_RESERVED_6_MASK 0x00000000ffff0000 363 364 365 366 367 #define TX_MSDU_START_TLV64_PADDING_OFFSET 0x0000000000000018 368 #define TX_MSDU_START_TLV64_PADDING_LSB 32 369 #define TX_MSDU_START_TLV64_PADDING_MSB 63 370 #define TX_MSDU_START_TLV64_PADDING_MASK 0xffffffff00000000 371 372 373 374 #endif 375