1 2 /* Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for any 5 * purpose with or without fee is hereby granted, provided that the above 6 * copyright notice and this permission notice appear in all copies. 7 * 8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15 */ 16 17 18 19 20 21 22 23 24 25 26 #ifndef _U_SIG_EHT_TB_INFO_H_ 27 #define _U_SIG_EHT_TB_INFO_H_ 28 #if !defined(__ASSEMBLER__) 29 #endif 30 31 #define NUM_OF_DWORDS_U_SIG_EHT_TB_INFO 2 32 33 34 struct u_sig_eht_tb_info { 35 #ifndef WIFI_BIT_ORDER_BIG_ENDIAN 36 uint32_t phy_version : 3, 37 transmit_bw : 3, 38 dl_ul_flag : 1, 39 bss_color_id : 6, 40 txop_duration : 7, 41 disregard_0a : 6, 42 reserved_0c : 6; 43 uint32_t eht_ppdu_sig_cmn_type : 2, 44 validate_1a : 1, 45 spatial_reuse : 8, 46 disregard_1b : 5, 47 crc : 4, 48 tail : 6, 49 reserved_1c : 5, 50 rx_integrity_check_passed : 1; 51 #else 52 uint32_t reserved_0c : 6, 53 disregard_0a : 6, 54 txop_duration : 7, 55 bss_color_id : 6, 56 dl_ul_flag : 1, 57 transmit_bw : 3, 58 phy_version : 3; 59 uint32_t rx_integrity_check_passed : 1, 60 reserved_1c : 5, 61 tail : 6, 62 crc : 4, 63 disregard_1b : 5, 64 spatial_reuse : 8, 65 validate_1a : 1, 66 eht_ppdu_sig_cmn_type : 2; 67 #endif 68 }; 69 70 71 72 73 #define U_SIG_EHT_TB_INFO_PHY_VERSION_OFFSET 0x00000000 74 #define U_SIG_EHT_TB_INFO_PHY_VERSION_LSB 0 75 #define U_SIG_EHT_TB_INFO_PHY_VERSION_MSB 2 76 #define U_SIG_EHT_TB_INFO_PHY_VERSION_MASK 0x00000007 77 78 79 80 81 #define U_SIG_EHT_TB_INFO_TRANSMIT_BW_OFFSET 0x00000000 82 #define U_SIG_EHT_TB_INFO_TRANSMIT_BW_LSB 3 83 #define U_SIG_EHT_TB_INFO_TRANSMIT_BW_MSB 5 84 #define U_SIG_EHT_TB_INFO_TRANSMIT_BW_MASK 0x00000038 85 86 87 88 89 #define U_SIG_EHT_TB_INFO_DL_UL_FLAG_OFFSET 0x00000000 90 #define U_SIG_EHT_TB_INFO_DL_UL_FLAG_LSB 6 91 #define U_SIG_EHT_TB_INFO_DL_UL_FLAG_MSB 6 92 #define U_SIG_EHT_TB_INFO_DL_UL_FLAG_MASK 0x00000040 93 94 95 96 97 #define U_SIG_EHT_TB_INFO_BSS_COLOR_ID_OFFSET 0x00000000 98 #define U_SIG_EHT_TB_INFO_BSS_COLOR_ID_LSB 7 99 #define U_SIG_EHT_TB_INFO_BSS_COLOR_ID_MSB 12 100 #define U_SIG_EHT_TB_INFO_BSS_COLOR_ID_MASK 0x00001f80 101 102 103 104 105 #define U_SIG_EHT_TB_INFO_TXOP_DURATION_OFFSET 0x00000000 106 #define U_SIG_EHT_TB_INFO_TXOP_DURATION_LSB 13 107 #define U_SIG_EHT_TB_INFO_TXOP_DURATION_MSB 19 108 #define U_SIG_EHT_TB_INFO_TXOP_DURATION_MASK 0x000fe000 109 110 111 112 113 #define U_SIG_EHT_TB_INFO_DISREGARD_0A_OFFSET 0x00000000 114 #define U_SIG_EHT_TB_INFO_DISREGARD_0A_LSB 20 115 #define U_SIG_EHT_TB_INFO_DISREGARD_0A_MSB 25 116 #define U_SIG_EHT_TB_INFO_DISREGARD_0A_MASK 0x03f00000 117 118 119 120 121 #define U_SIG_EHT_TB_INFO_RESERVED_0C_OFFSET 0x00000000 122 #define U_SIG_EHT_TB_INFO_RESERVED_0C_LSB 26 123 #define U_SIG_EHT_TB_INFO_RESERVED_0C_MSB 31 124 #define U_SIG_EHT_TB_INFO_RESERVED_0C_MASK 0xfc000000 125 126 127 128 129 #define U_SIG_EHT_TB_INFO_EHT_PPDU_SIG_CMN_TYPE_OFFSET 0x00000004 130 #define U_SIG_EHT_TB_INFO_EHT_PPDU_SIG_CMN_TYPE_LSB 0 131 #define U_SIG_EHT_TB_INFO_EHT_PPDU_SIG_CMN_TYPE_MSB 1 132 #define U_SIG_EHT_TB_INFO_EHT_PPDU_SIG_CMN_TYPE_MASK 0x00000003 133 134 135 136 137 #define U_SIG_EHT_TB_INFO_VALIDATE_1A_OFFSET 0x00000004 138 #define U_SIG_EHT_TB_INFO_VALIDATE_1A_LSB 2 139 #define U_SIG_EHT_TB_INFO_VALIDATE_1A_MSB 2 140 #define U_SIG_EHT_TB_INFO_VALIDATE_1A_MASK 0x00000004 141 142 143 144 145 #define U_SIG_EHT_TB_INFO_SPATIAL_REUSE_OFFSET 0x00000004 146 #define U_SIG_EHT_TB_INFO_SPATIAL_REUSE_LSB 3 147 #define U_SIG_EHT_TB_INFO_SPATIAL_REUSE_MSB 10 148 #define U_SIG_EHT_TB_INFO_SPATIAL_REUSE_MASK 0x000007f8 149 150 151 152 153 #define U_SIG_EHT_TB_INFO_DISREGARD_1B_OFFSET 0x00000004 154 #define U_SIG_EHT_TB_INFO_DISREGARD_1B_LSB 11 155 #define U_SIG_EHT_TB_INFO_DISREGARD_1B_MSB 15 156 #define U_SIG_EHT_TB_INFO_DISREGARD_1B_MASK 0x0000f800 157 158 159 160 161 #define U_SIG_EHT_TB_INFO_CRC_OFFSET 0x00000004 162 #define U_SIG_EHT_TB_INFO_CRC_LSB 16 163 #define U_SIG_EHT_TB_INFO_CRC_MSB 19 164 #define U_SIG_EHT_TB_INFO_CRC_MASK 0x000f0000 165 166 167 168 169 #define U_SIG_EHT_TB_INFO_TAIL_OFFSET 0x00000004 170 #define U_SIG_EHT_TB_INFO_TAIL_LSB 20 171 #define U_SIG_EHT_TB_INFO_TAIL_MSB 25 172 #define U_SIG_EHT_TB_INFO_TAIL_MASK 0x03f00000 173 174 175 176 177 #define U_SIG_EHT_TB_INFO_RESERVED_1C_OFFSET 0x00000004 178 #define U_SIG_EHT_TB_INFO_RESERVED_1C_LSB 26 179 #define U_SIG_EHT_TB_INFO_RESERVED_1C_MSB 30 180 #define U_SIG_EHT_TB_INFO_RESERVED_1C_MASK 0x7c000000 181 182 183 184 185 #define U_SIG_EHT_TB_INFO_RX_INTEGRITY_CHECK_PASSED_OFFSET 0x00000004 186 #define U_SIG_EHT_TB_INFO_RX_INTEGRITY_CHECK_PASSED_LSB 31 187 #define U_SIG_EHT_TB_INFO_RX_INTEGRITY_CHECK_PASSED_MSB 31 188 #define U_SIG_EHT_TB_INFO_RX_INTEGRITY_CHECK_PASSED_MASK 0x80000000 189 190 191 192 #endif 193