1*5113495bSYour Name 2*5113495bSYour Name /* Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved. 3*5113495bSYour Name * 4*5113495bSYour Name * Permission to use, copy, modify, and/or distribute this software for any 5*5113495bSYour Name * purpose with or without fee is hereby granted, provided that the above 6*5113495bSYour Name * copyright notice and this permission notice appear in all copies. 7*5113495bSYour Name * 8*5113495bSYour Name * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9*5113495bSYour Name * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10*5113495bSYour Name * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11*5113495bSYour Name * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12*5113495bSYour Name * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13*5113495bSYour Name * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14*5113495bSYour Name * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15*5113495bSYour Name */ 16*5113495bSYour Name 17*5113495bSYour Name 18*5113495bSYour Name 19*5113495bSYour Name 20*5113495bSYour Name 21*5113495bSYour Name 22*5113495bSYour Name 23*5113495bSYour Name 24*5113495bSYour Name 25*5113495bSYour Name 26*5113495bSYour Name #ifndef _WBM2SW_COMPLETION_RING_TX_H_ 27*5113495bSYour Name #define _WBM2SW_COMPLETION_RING_TX_H_ 28*5113495bSYour Name #if !defined(__ASSEMBLER__) 29*5113495bSYour Name #endif 30*5113495bSYour Name 31*5113495bSYour Name #include "tx_rate_stats_info.h" 32*5113495bSYour Name #define NUM_OF_DWORDS_WBM2SW_COMPLETION_RING_TX 8 33*5113495bSYour Name 34*5113495bSYour Name 35*5113495bSYour Name struct wbm2sw_completion_ring_tx { 36*5113495bSYour Name #ifndef WIFI_BIT_ORDER_BIG_ENDIAN 37*5113495bSYour Name uint32_t buffer_virt_addr_31_0 : 32; 38*5113495bSYour Name uint32_t buffer_virt_addr_63_32 : 32; 39*5113495bSYour Name uint32_t release_source_module : 3, 40*5113495bSYour Name cache_id : 1, 41*5113495bSYour Name reserved_2a : 2, 42*5113495bSYour Name buffer_or_desc_type : 3, 43*5113495bSYour Name return_buffer_manager : 4, 44*5113495bSYour Name tqm_release_reason : 4, 45*5113495bSYour Name rbm_override_valid : 1, 46*5113495bSYour Name sw_buffer_cookie_11_0 : 12, 47*5113495bSYour Name cookie_conversion_status : 1, 48*5113495bSYour Name wbm_internal_error : 1; 49*5113495bSYour Name uint32_t tqm_status_number : 24, 50*5113495bSYour Name transmit_count : 7, 51*5113495bSYour Name sw_release_details_valid : 1; 52*5113495bSYour Name uint32_t ack_frame_rssi : 8, 53*5113495bSYour Name first_msdu : 1, 54*5113495bSYour Name last_msdu : 1, 55*5113495bSYour Name fw_tx_notify_frame : 3, 56*5113495bSYour Name buffer_timestamp : 19; 57*5113495bSYour Name struct tx_rate_stats_info tx_rate_stats; 58*5113495bSYour Name uint32_t sw_peer_id : 16, 59*5113495bSYour Name tid : 4, 60*5113495bSYour Name sw_buffer_cookie_19_12 : 8, 61*5113495bSYour Name looping_count : 4; 62*5113495bSYour Name #else 63*5113495bSYour Name uint32_t buffer_virt_addr_31_0 : 32; 64*5113495bSYour Name uint32_t buffer_virt_addr_63_32 : 32; 65*5113495bSYour Name uint32_t wbm_internal_error : 1, 66*5113495bSYour Name cookie_conversion_status : 1, 67*5113495bSYour Name sw_buffer_cookie_11_0 : 12, 68*5113495bSYour Name rbm_override_valid : 1, 69*5113495bSYour Name tqm_release_reason : 4, 70*5113495bSYour Name return_buffer_manager : 4, 71*5113495bSYour Name buffer_or_desc_type : 3, 72*5113495bSYour Name reserved_2a : 2, 73*5113495bSYour Name cache_id : 1, 74*5113495bSYour Name release_source_module : 3; 75*5113495bSYour Name uint32_t sw_release_details_valid : 1, 76*5113495bSYour Name transmit_count : 7, 77*5113495bSYour Name tqm_status_number : 24; 78*5113495bSYour Name uint32_t buffer_timestamp : 19, 79*5113495bSYour Name fw_tx_notify_frame : 3, 80*5113495bSYour Name last_msdu : 1, 81*5113495bSYour Name first_msdu : 1, 82*5113495bSYour Name ack_frame_rssi : 8; 83*5113495bSYour Name struct tx_rate_stats_info tx_rate_stats; 84*5113495bSYour Name uint32_t looping_count : 4, 85*5113495bSYour Name sw_buffer_cookie_19_12 : 8, 86*5113495bSYour Name tid : 4, 87*5113495bSYour Name sw_peer_id : 16; 88*5113495bSYour Name #endif 89*5113495bSYour Name }; 90*5113495bSYour Name 91*5113495bSYour Name 92*5113495bSYour Name 93*5113495bSYour Name 94*5113495bSYour Name #define WBM2SW_COMPLETION_RING_TX_BUFFER_VIRT_ADDR_31_0_OFFSET 0x00000000 95*5113495bSYour Name #define WBM2SW_COMPLETION_RING_TX_BUFFER_VIRT_ADDR_31_0_LSB 0 96*5113495bSYour Name #define WBM2SW_COMPLETION_RING_TX_BUFFER_VIRT_ADDR_31_0_MSB 31 97*5113495bSYour Name #define WBM2SW_COMPLETION_RING_TX_BUFFER_VIRT_ADDR_31_0_MASK 0xffffffff 98*5113495bSYour Name 99*5113495bSYour Name 100*5113495bSYour Name 101*5113495bSYour Name 102*5113495bSYour Name #define WBM2SW_COMPLETION_RING_TX_BUFFER_VIRT_ADDR_63_32_OFFSET 0x00000004 103*5113495bSYour Name #define WBM2SW_COMPLETION_RING_TX_BUFFER_VIRT_ADDR_63_32_LSB 0 104*5113495bSYour Name #define WBM2SW_COMPLETION_RING_TX_BUFFER_VIRT_ADDR_63_32_MSB 31 105*5113495bSYour Name #define WBM2SW_COMPLETION_RING_TX_BUFFER_VIRT_ADDR_63_32_MASK 0xffffffff 106*5113495bSYour Name 107*5113495bSYour Name 108*5113495bSYour Name 109*5113495bSYour Name 110*5113495bSYour Name #define WBM2SW_COMPLETION_RING_TX_RELEASE_SOURCE_MODULE_OFFSET 0x00000008 111*5113495bSYour Name #define WBM2SW_COMPLETION_RING_TX_RELEASE_SOURCE_MODULE_LSB 0 112*5113495bSYour Name #define WBM2SW_COMPLETION_RING_TX_RELEASE_SOURCE_MODULE_MSB 2 113*5113495bSYour Name #define WBM2SW_COMPLETION_RING_TX_RELEASE_SOURCE_MODULE_MASK 0x00000007 114*5113495bSYour Name 115*5113495bSYour Name 116*5113495bSYour Name 117*5113495bSYour Name 118*5113495bSYour Name #define WBM2SW_COMPLETION_RING_TX_CACHE_ID_OFFSET 0x00000008 119*5113495bSYour Name #define WBM2SW_COMPLETION_RING_TX_CACHE_ID_LSB 3 120*5113495bSYour Name #define WBM2SW_COMPLETION_RING_TX_CACHE_ID_MSB 3 121*5113495bSYour Name #define WBM2SW_COMPLETION_RING_TX_CACHE_ID_MASK 0x00000008 122*5113495bSYour Name 123*5113495bSYour Name 124*5113495bSYour Name 125*5113495bSYour Name 126*5113495bSYour Name #define WBM2SW_COMPLETION_RING_TX_RESERVED_2A_OFFSET 0x00000008 127*5113495bSYour Name #define WBM2SW_COMPLETION_RING_TX_RESERVED_2A_LSB 4 128*5113495bSYour Name #define WBM2SW_COMPLETION_RING_TX_RESERVED_2A_MSB 5 129*5113495bSYour Name #define WBM2SW_COMPLETION_RING_TX_RESERVED_2A_MASK 0x00000030 130*5113495bSYour Name 131*5113495bSYour Name 132*5113495bSYour Name 133*5113495bSYour Name 134*5113495bSYour Name #define WBM2SW_COMPLETION_RING_TX_BUFFER_OR_DESC_TYPE_OFFSET 0x00000008 135*5113495bSYour Name #define WBM2SW_COMPLETION_RING_TX_BUFFER_OR_DESC_TYPE_LSB 6 136*5113495bSYour Name #define WBM2SW_COMPLETION_RING_TX_BUFFER_OR_DESC_TYPE_MSB 8 137*5113495bSYour Name #define WBM2SW_COMPLETION_RING_TX_BUFFER_OR_DESC_TYPE_MASK 0x000001c0 138*5113495bSYour Name 139*5113495bSYour Name 140*5113495bSYour Name 141*5113495bSYour Name 142*5113495bSYour Name #define WBM2SW_COMPLETION_RING_TX_RETURN_BUFFER_MANAGER_OFFSET 0x00000008 143*5113495bSYour Name #define WBM2SW_COMPLETION_RING_TX_RETURN_BUFFER_MANAGER_LSB 9 144*5113495bSYour Name #define WBM2SW_COMPLETION_RING_TX_RETURN_BUFFER_MANAGER_MSB 12 145*5113495bSYour Name #define WBM2SW_COMPLETION_RING_TX_RETURN_BUFFER_MANAGER_MASK 0x00001e00 146*5113495bSYour Name 147*5113495bSYour Name 148*5113495bSYour Name 149*5113495bSYour Name 150*5113495bSYour Name #define WBM2SW_COMPLETION_RING_TX_TQM_RELEASE_REASON_OFFSET 0x00000008 151*5113495bSYour Name #define WBM2SW_COMPLETION_RING_TX_TQM_RELEASE_REASON_LSB 13 152*5113495bSYour Name #define WBM2SW_COMPLETION_RING_TX_TQM_RELEASE_REASON_MSB 16 153*5113495bSYour Name #define WBM2SW_COMPLETION_RING_TX_TQM_RELEASE_REASON_MASK 0x0001e000 154*5113495bSYour Name 155*5113495bSYour Name 156*5113495bSYour Name 157*5113495bSYour Name 158*5113495bSYour Name #define WBM2SW_COMPLETION_RING_TX_RBM_OVERRIDE_VALID_OFFSET 0x00000008 159*5113495bSYour Name #define WBM2SW_COMPLETION_RING_TX_RBM_OVERRIDE_VALID_LSB 17 160*5113495bSYour Name #define WBM2SW_COMPLETION_RING_TX_RBM_OVERRIDE_VALID_MSB 17 161*5113495bSYour Name #define WBM2SW_COMPLETION_RING_TX_RBM_OVERRIDE_VALID_MASK 0x00020000 162*5113495bSYour Name 163*5113495bSYour Name 164*5113495bSYour Name 165*5113495bSYour Name 166*5113495bSYour Name #define WBM2SW_COMPLETION_RING_TX_SW_BUFFER_COOKIE_11_0_OFFSET 0x00000008 167*5113495bSYour Name #define WBM2SW_COMPLETION_RING_TX_SW_BUFFER_COOKIE_11_0_LSB 18 168*5113495bSYour Name #define WBM2SW_COMPLETION_RING_TX_SW_BUFFER_COOKIE_11_0_MSB 29 169*5113495bSYour Name #define WBM2SW_COMPLETION_RING_TX_SW_BUFFER_COOKIE_11_0_MASK 0x3ffc0000 170*5113495bSYour Name 171*5113495bSYour Name 172*5113495bSYour Name 173*5113495bSYour Name 174*5113495bSYour Name #define WBM2SW_COMPLETION_RING_TX_COOKIE_CONVERSION_STATUS_OFFSET 0x00000008 175*5113495bSYour Name #define WBM2SW_COMPLETION_RING_TX_COOKIE_CONVERSION_STATUS_LSB 30 176*5113495bSYour Name #define WBM2SW_COMPLETION_RING_TX_COOKIE_CONVERSION_STATUS_MSB 30 177*5113495bSYour Name #define WBM2SW_COMPLETION_RING_TX_COOKIE_CONVERSION_STATUS_MASK 0x40000000 178*5113495bSYour Name 179*5113495bSYour Name 180*5113495bSYour Name 181*5113495bSYour Name 182*5113495bSYour Name #define WBM2SW_COMPLETION_RING_TX_WBM_INTERNAL_ERROR_OFFSET 0x00000008 183*5113495bSYour Name #define WBM2SW_COMPLETION_RING_TX_WBM_INTERNAL_ERROR_LSB 31 184*5113495bSYour Name #define WBM2SW_COMPLETION_RING_TX_WBM_INTERNAL_ERROR_MSB 31 185*5113495bSYour Name #define WBM2SW_COMPLETION_RING_TX_WBM_INTERNAL_ERROR_MASK 0x80000000 186*5113495bSYour Name 187*5113495bSYour Name 188*5113495bSYour Name 189*5113495bSYour Name 190*5113495bSYour Name #define WBM2SW_COMPLETION_RING_TX_TQM_STATUS_NUMBER_OFFSET 0x0000000c 191*5113495bSYour Name #define WBM2SW_COMPLETION_RING_TX_TQM_STATUS_NUMBER_LSB 0 192*5113495bSYour Name #define WBM2SW_COMPLETION_RING_TX_TQM_STATUS_NUMBER_MSB 23 193*5113495bSYour Name #define WBM2SW_COMPLETION_RING_TX_TQM_STATUS_NUMBER_MASK 0x00ffffff 194*5113495bSYour Name 195*5113495bSYour Name 196*5113495bSYour Name 197*5113495bSYour Name 198*5113495bSYour Name #define WBM2SW_COMPLETION_RING_TX_TRANSMIT_COUNT_OFFSET 0x0000000c 199*5113495bSYour Name #define WBM2SW_COMPLETION_RING_TX_TRANSMIT_COUNT_LSB 24 200*5113495bSYour Name #define WBM2SW_COMPLETION_RING_TX_TRANSMIT_COUNT_MSB 30 201*5113495bSYour Name #define WBM2SW_COMPLETION_RING_TX_TRANSMIT_COUNT_MASK 0x7f000000 202*5113495bSYour Name 203*5113495bSYour Name 204*5113495bSYour Name 205*5113495bSYour Name 206*5113495bSYour Name #define WBM2SW_COMPLETION_RING_TX_SW_RELEASE_DETAILS_VALID_OFFSET 0x0000000c 207*5113495bSYour Name #define WBM2SW_COMPLETION_RING_TX_SW_RELEASE_DETAILS_VALID_LSB 31 208*5113495bSYour Name #define WBM2SW_COMPLETION_RING_TX_SW_RELEASE_DETAILS_VALID_MSB 31 209*5113495bSYour Name #define WBM2SW_COMPLETION_RING_TX_SW_RELEASE_DETAILS_VALID_MASK 0x80000000 210*5113495bSYour Name 211*5113495bSYour Name 212*5113495bSYour Name 213*5113495bSYour Name 214*5113495bSYour Name #define WBM2SW_COMPLETION_RING_TX_ACK_FRAME_RSSI_OFFSET 0x00000010 215*5113495bSYour Name #define WBM2SW_COMPLETION_RING_TX_ACK_FRAME_RSSI_LSB 0 216*5113495bSYour Name #define WBM2SW_COMPLETION_RING_TX_ACK_FRAME_RSSI_MSB 7 217*5113495bSYour Name #define WBM2SW_COMPLETION_RING_TX_ACK_FRAME_RSSI_MASK 0x000000ff 218*5113495bSYour Name 219*5113495bSYour Name 220*5113495bSYour Name 221*5113495bSYour Name 222*5113495bSYour Name #define WBM2SW_COMPLETION_RING_TX_FIRST_MSDU_OFFSET 0x00000010 223*5113495bSYour Name #define WBM2SW_COMPLETION_RING_TX_FIRST_MSDU_LSB 8 224*5113495bSYour Name #define WBM2SW_COMPLETION_RING_TX_FIRST_MSDU_MSB 8 225*5113495bSYour Name #define WBM2SW_COMPLETION_RING_TX_FIRST_MSDU_MASK 0x00000100 226*5113495bSYour Name 227*5113495bSYour Name 228*5113495bSYour Name 229*5113495bSYour Name 230*5113495bSYour Name #define WBM2SW_COMPLETION_RING_TX_LAST_MSDU_OFFSET 0x00000010 231*5113495bSYour Name #define WBM2SW_COMPLETION_RING_TX_LAST_MSDU_LSB 9 232*5113495bSYour Name #define WBM2SW_COMPLETION_RING_TX_LAST_MSDU_MSB 9 233*5113495bSYour Name #define WBM2SW_COMPLETION_RING_TX_LAST_MSDU_MASK 0x00000200 234*5113495bSYour Name 235*5113495bSYour Name 236*5113495bSYour Name 237*5113495bSYour Name 238*5113495bSYour Name #define WBM2SW_COMPLETION_RING_TX_FW_TX_NOTIFY_FRAME_OFFSET 0x00000010 239*5113495bSYour Name #define WBM2SW_COMPLETION_RING_TX_FW_TX_NOTIFY_FRAME_LSB 10 240*5113495bSYour Name #define WBM2SW_COMPLETION_RING_TX_FW_TX_NOTIFY_FRAME_MSB 12 241*5113495bSYour Name #define WBM2SW_COMPLETION_RING_TX_FW_TX_NOTIFY_FRAME_MASK 0x00001c00 242*5113495bSYour Name 243*5113495bSYour Name 244*5113495bSYour Name 245*5113495bSYour Name 246*5113495bSYour Name #define WBM2SW_COMPLETION_RING_TX_BUFFER_TIMESTAMP_OFFSET 0x00000010 247*5113495bSYour Name #define WBM2SW_COMPLETION_RING_TX_BUFFER_TIMESTAMP_LSB 13 248*5113495bSYour Name #define WBM2SW_COMPLETION_RING_TX_BUFFER_TIMESTAMP_MSB 31 249*5113495bSYour Name #define WBM2SW_COMPLETION_RING_TX_BUFFER_TIMESTAMP_MASK 0xffffe000 250*5113495bSYour Name 251*5113495bSYour Name 252*5113495bSYour Name 253*5113495bSYour Name 254*5113495bSYour Name 255*5113495bSYour Name 256*5113495bSYour Name 257*5113495bSYour Name #define WBM2SW_COMPLETION_RING_TX_TX_RATE_STATS_TX_RATE_STATS_INFO_VALID_OFFSET 0x00000014 258*5113495bSYour Name #define WBM2SW_COMPLETION_RING_TX_TX_RATE_STATS_TX_RATE_STATS_INFO_VALID_LSB 0 259*5113495bSYour Name #define WBM2SW_COMPLETION_RING_TX_TX_RATE_STATS_TX_RATE_STATS_INFO_VALID_MSB 0 260*5113495bSYour Name #define WBM2SW_COMPLETION_RING_TX_TX_RATE_STATS_TX_RATE_STATS_INFO_VALID_MASK 0x00000001 261*5113495bSYour Name 262*5113495bSYour Name 263*5113495bSYour Name 264*5113495bSYour Name 265*5113495bSYour Name #define WBM2SW_COMPLETION_RING_TX_TX_RATE_STATS_TRANSMIT_BW_OFFSET 0x00000014 266*5113495bSYour Name #define WBM2SW_COMPLETION_RING_TX_TX_RATE_STATS_TRANSMIT_BW_LSB 1 267*5113495bSYour Name #define WBM2SW_COMPLETION_RING_TX_TX_RATE_STATS_TRANSMIT_BW_MSB 3 268*5113495bSYour Name #define WBM2SW_COMPLETION_RING_TX_TX_RATE_STATS_TRANSMIT_BW_MASK 0x0000000e 269*5113495bSYour Name 270*5113495bSYour Name 271*5113495bSYour Name 272*5113495bSYour Name 273*5113495bSYour Name #define WBM2SW_COMPLETION_RING_TX_TX_RATE_STATS_TRANSMIT_PKT_TYPE_OFFSET 0x00000014 274*5113495bSYour Name #define WBM2SW_COMPLETION_RING_TX_TX_RATE_STATS_TRANSMIT_PKT_TYPE_LSB 4 275*5113495bSYour Name #define WBM2SW_COMPLETION_RING_TX_TX_RATE_STATS_TRANSMIT_PKT_TYPE_MSB 7 276*5113495bSYour Name #define WBM2SW_COMPLETION_RING_TX_TX_RATE_STATS_TRANSMIT_PKT_TYPE_MASK 0x000000f0 277*5113495bSYour Name 278*5113495bSYour Name 279*5113495bSYour Name 280*5113495bSYour Name 281*5113495bSYour Name #define WBM2SW_COMPLETION_RING_TX_TX_RATE_STATS_TRANSMIT_STBC_OFFSET 0x00000014 282*5113495bSYour Name #define WBM2SW_COMPLETION_RING_TX_TX_RATE_STATS_TRANSMIT_STBC_LSB 8 283*5113495bSYour Name #define WBM2SW_COMPLETION_RING_TX_TX_RATE_STATS_TRANSMIT_STBC_MSB 8 284*5113495bSYour Name #define WBM2SW_COMPLETION_RING_TX_TX_RATE_STATS_TRANSMIT_STBC_MASK 0x00000100 285*5113495bSYour Name 286*5113495bSYour Name 287*5113495bSYour Name 288*5113495bSYour Name 289*5113495bSYour Name #define WBM2SW_COMPLETION_RING_TX_TX_RATE_STATS_TRANSMIT_LDPC_OFFSET 0x00000014 290*5113495bSYour Name #define WBM2SW_COMPLETION_RING_TX_TX_RATE_STATS_TRANSMIT_LDPC_LSB 9 291*5113495bSYour Name #define WBM2SW_COMPLETION_RING_TX_TX_RATE_STATS_TRANSMIT_LDPC_MSB 9 292*5113495bSYour Name #define WBM2SW_COMPLETION_RING_TX_TX_RATE_STATS_TRANSMIT_LDPC_MASK 0x00000200 293*5113495bSYour Name 294*5113495bSYour Name 295*5113495bSYour Name 296*5113495bSYour Name 297*5113495bSYour Name #define WBM2SW_COMPLETION_RING_TX_TX_RATE_STATS_TRANSMIT_SGI_OFFSET 0x00000014 298*5113495bSYour Name #define WBM2SW_COMPLETION_RING_TX_TX_RATE_STATS_TRANSMIT_SGI_LSB 10 299*5113495bSYour Name #define WBM2SW_COMPLETION_RING_TX_TX_RATE_STATS_TRANSMIT_SGI_MSB 11 300*5113495bSYour Name #define WBM2SW_COMPLETION_RING_TX_TX_RATE_STATS_TRANSMIT_SGI_MASK 0x00000c00 301*5113495bSYour Name 302*5113495bSYour Name 303*5113495bSYour Name 304*5113495bSYour Name 305*5113495bSYour Name #define WBM2SW_COMPLETION_RING_TX_TX_RATE_STATS_TRANSMIT_MCS_OFFSET 0x00000014 306*5113495bSYour Name #define WBM2SW_COMPLETION_RING_TX_TX_RATE_STATS_TRANSMIT_MCS_LSB 12 307*5113495bSYour Name #define WBM2SW_COMPLETION_RING_TX_TX_RATE_STATS_TRANSMIT_MCS_MSB 15 308*5113495bSYour Name #define WBM2SW_COMPLETION_RING_TX_TX_RATE_STATS_TRANSMIT_MCS_MASK 0x0000f000 309*5113495bSYour Name 310*5113495bSYour Name 311*5113495bSYour Name 312*5113495bSYour Name 313*5113495bSYour Name #define WBM2SW_COMPLETION_RING_TX_TX_RATE_STATS_OFDMA_TRANSMISSION_OFFSET 0x00000014 314*5113495bSYour Name #define WBM2SW_COMPLETION_RING_TX_TX_RATE_STATS_OFDMA_TRANSMISSION_LSB 16 315*5113495bSYour Name #define WBM2SW_COMPLETION_RING_TX_TX_RATE_STATS_OFDMA_TRANSMISSION_MSB 16 316*5113495bSYour Name #define WBM2SW_COMPLETION_RING_TX_TX_RATE_STATS_OFDMA_TRANSMISSION_MASK 0x00010000 317*5113495bSYour Name 318*5113495bSYour Name 319*5113495bSYour Name 320*5113495bSYour Name 321*5113495bSYour Name #define WBM2SW_COMPLETION_RING_TX_TX_RATE_STATS_TONES_IN_RU_OFFSET 0x00000014 322*5113495bSYour Name #define WBM2SW_COMPLETION_RING_TX_TX_RATE_STATS_TONES_IN_RU_LSB 17 323*5113495bSYour Name #define WBM2SW_COMPLETION_RING_TX_TX_RATE_STATS_TONES_IN_RU_MSB 28 324*5113495bSYour Name #define WBM2SW_COMPLETION_RING_TX_TX_RATE_STATS_TONES_IN_RU_MASK 0x1ffe0000 325*5113495bSYour Name 326*5113495bSYour Name 327*5113495bSYour Name 328*5113495bSYour Name 329*5113495bSYour Name #define WBM2SW_COMPLETION_RING_TX_TX_RATE_STATS_RESERVED_0A_OFFSET 0x00000014 330*5113495bSYour Name #define WBM2SW_COMPLETION_RING_TX_TX_RATE_STATS_RESERVED_0A_LSB 29 331*5113495bSYour Name #define WBM2SW_COMPLETION_RING_TX_TX_RATE_STATS_RESERVED_0A_MSB 31 332*5113495bSYour Name #define WBM2SW_COMPLETION_RING_TX_TX_RATE_STATS_RESERVED_0A_MASK 0xe0000000 333*5113495bSYour Name 334*5113495bSYour Name 335*5113495bSYour Name 336*5113495bSYour Name 337*5113495bSYour Name #define WBM2SW_COMPLETION_RING_TX_TX_RATE_STATS_PPDU_TRANSMISSION_TSF_OFFSET 0x00000018 338*5113495bSYour Name #define WBM2SW_COMPLETION_RING_TX_TX_RATE_STATS_PPDU_TRANSMISSION_TSF_LSB 0 339*5113495bSYour Name #define WBM2SW_COMPLETION_RING_TX_TX_RATE_STATS_PPDU_TRANSMISSION_TSF_MSB 31 340*5113495bSYour Name #define WBM2SW_COMPLETION_RING_TX_TX_RATE_STATS_PPDU_TRANSMISSION_TSF_MASK 0xffffffff 341*5113495bSYour Name 342*5113495bSYour Name 343*5113495bSYour Name 344*5113495bSYour Name 345*5113495bSYour Name #define WBM2SW_COMPLETION_RING_TX_SW_PEER_ID_OFFSET 0x0000001c 346*5113495bSYour Name #define WBM2SW_COMPLETION_RING_TX_SW_PEER_ID_LSB 0 347*5113495bSYour Name #define WBM2SW_COMPLETION_RING_TX_SW_PEER_ID_MSB 15 348*5113495bSYour Name #define WBM2SW_COMPLETION_RING_TX_SW_PEER_ID_MASK 0x0000ffff 349*5113495bSYour Name 350*5113495bSYour Name 351*5113495bSYour Name 352*5113495bSYour Name 353*5113495bSYour Name #define WBM2SW_COMPLETION_RING_TX_TID_OFFSET 0x0000001c 354*5113495bSYour Name #define WBM2SW_COMPLETION_RING_TX_TID_LSB 16 355*5113495bSYour Name #define WBM2SW_COMPLETION_RING_TX_TID_MSB 19 356*5113495bSYour Name #define WBM2SW_COMPLETION_RING_TX_TID_MASK 0x000f0000 357*5113495bSYour Name 358*5113495bSYour Name 359*5113495bSYour Name 360*5113495bSYour Name 361*5113495bSYour Name #define WBM2SW_COMPLETION_RING_TX_SW_BUFFER_COOKIE_19_12_OFFSET 0x0000001c 362*5113495bSYour Name #define WBM2SW_COMPLETION_RING_TX_SW_BUFFER_COOKIE_19_12_LSB 20 363*5113495bSYour Name #define WBM2SW_COMPLETION_RING_TX_SW_BUFFER_COOKIE_19_12_MSB 27 364*5113495bSYour Name #define WBM2SW_COMPLETION_RING_TX_SW_BUFFER_COOKIE_19_12_MASK 0x0ff00000 365*5113495bSYour Name 366*5113495bSYour Name 367*5113495bSYour Name 368*5113495bSYour Name 369*5113495bSYour Name #define WBM2SW_COMPLETION_RING_TX_LOOPING_COUNT_OFFSET 0x0000001c 370*5113495bSYour Name #define WBM2SW_COMPLETION_RING_TX_LOOPING_COUNT_LSB 28 371*5113495bSYour Name #define WBM2SW_COMPLETION_RING_TX_LOOPING_COUNT_MSB 31 372*5113495bSYour Name #define WBM2SW_COMPLETION_RING_TX_LOOPING_COUNT_MASK 0xf0000000 373*5113495bSYour Name 374*5113495bSYour Name 375*5113495bSYour Name 376*5113495bSYour Name #endif 377