1 2 /* Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for any 5 * purpose with or without fee is hereby granted, provided that the above 6 * copyright notice and this permission notice appear in all copies. 7 * 8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15 */ 16 17 #ifndef __WCSS_SEQ_HWIOBASE_H__ 18 #define __WCSS_SEQ_HWIOBASE_H__ 19 20 21 22 23 24 25 #define WCSS_CFGBUS_BASE 0x00008000 26 #define WCSS_CFGBUS_BASE_SIZE 0x00008000 27 #define WCSS_CFGBUS_BASE_PHYS 0x00008000 28 29 30 31 #define UMAC_NOC_BASE 0x00140000 32 #define UMAC_NOC_BASE_SIZE 0x00004400 33 #define UMAC_NOC_BASE_PHYS 0x00140000 34 35 36 37 #define PHYA0_BASE 0x00300000 38 #define PHYA0_BASE_SIZE 0x00300000 39 #define PHYA0_BASE_PHYS 0x00300000 40 41 42 43 #define PHYA1_BASE 0x00600000 44 #define PHYA1_BASE_SIZE 0x00300000 45 #define PHYA1_BASE_PHYS 0x00600000 46 47 48 49 #define DMAC_BASE 0x00900000 50 #define DMAC_BASE_SIZE 0x00080000 51 #define DMAC_BASE_PHYS 0x00900000 52 53 54 55 #define UMAC_BASE 0x00a00000 56 #define UMAC_BASE_SIZE 0x0004d000 57 #define UMAC_BASE_PHYS 0x00a00000 58 59 60 61 #define PMAC0_BASE 0x00a80000 62 #define PMAC0_BASE_SIZE 0x00040000 63 #define PMAC0_BASE_PHYS 0x00a80000 64 65 66 67 #define PMAC1_BASE 0x00ac0000 68 #define PMAC1_BASE_SIZE 0x00040000 69 #define PMAC1_BASE_PHYS 0x00ac0000 70 71 72 73 #define MAC_WSIB_BASE 0x00b3c000 74 #define MAC_WSIB_BASE_SIZE 0x00004000 75 #define MAC_WSIB_BASE_PHYS 0x00b3c000 76 77 78 79 #define CXC_BASE 0x00b40000 80 #define CXC_BASE_SIZE 0x00010000 81 #define CXC_BASE_PHYS 0x00b40000 82 83 84 85 #define WFSS_PMM_BASE 0x00b50000 86 #define WFSS_PMM_BASE_SIZE 0x00002401 87 #define WFSS_PMM_BASE_PHYS 0x00b50000 88 89 90 91 #define WFSS_CC_BASE 0x00b60000 92 #define WFSS_CC_BASE_SIZE 0x00008000 93 #define WFSS_CC_BASE_PHYS 0x00b60000 94 95 96 97 #define WCMN_CORE_BASE 0x00b68000 98 #define WCMN_CORE_BASE_SIZE 0x000008a9 99 #define WCMN_CORE_BASE_PHYS 0x00b68000 100 101 102 103 #define WIFI_CFGBUS_APB_TSLV_BASE 0x00b6b000 104 #define WIFI_CFGBUS_APB_TSLV_BASE_SIZE 0x00001000 105 #define WIFI_CFGBUS_APB_TSLV_BASE_PHYS 0x00b6b000 106 107 108 109 #define WFSS_CFGBUS_BASE 0x00b6c000 110 #define WFSS_CFGBUS_BASE_SIZE 0x000000a0 111 #define WFSS_CFGBUS_BASE_PHYS 0x00b6c000 112 113 114 115 #define WIFI_CFGBUS_AHB_TSLV_BASE 0x00b6d000 116 #define WIFI_CFGBUS_AHB_TSLV_BASE_SIZE 0x00001000 117 #define WIFI_CFGBUS_AHB_TSLV_BASE_PHYS 0x00b6d000 118 119 120 121 #define UMAC_ACMT_BASE 0x00b6e000 122 #define UMAC_ACMT_BASE_SIZE 0x00001000 123 #define UMAC_ACMT_BASE_PHYS 0x00b6e000 124 125 126 127 #define WCSS_CC_BASE 0x00b80000 128 #define WCSS_CC_BASE_SIZE 0x00010000 129 #define WCSS_CC_BASE_PHYS 0x00b80000 130 131 132 133 #define PMM_TOP_BASE 0x00b90000 134 #define PMM_TOP_BASE_SIZE 0x00010000 135 #define PMM_TOP_BASE_PHYS 0x00b90000 136 137 138 139 #define WCSS_TOP_CMN_BASE 0x00ba0000 140 #define WCSS_TOP_CMN_BASE_SIZE 0x00004000 141 #define WCSS_TOP_CMN_BASE_PHYS 0x00ba0000 142 143 144 145 #define MSIP_BASE 0x00bb0000 146 #define MSIP_BASE_SIZE 0x00010000 147 #define MSIP_BASE_PHYS 0x00bb0000 148 149 150 151 #define DBG_BASE 0x01000000 152 #define DBG_BASE_SIZE 0x00100000 153 #define DBG_BASE_PHYS 0x01000000 154 155 156 157 #define Q6SS_WLAN_BASE 0x01100000 158 #define Q6SS_WLAN_BASE_SIZE 0x00100000 159 #define Q6SS_WLAN_BASE_PHYS 0x01100000 160 161 162 #endif 163