1 2 /* 3 * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. 4 * 5 * Permission to use, copy, modify, and/or distribute this software for 6 * any purpose with or without fee is hereby granted, provided that the 7 * above copyright notice and this permission notice appear in all 8 * copies. 9 * 10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL 11 * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED 12 * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE 13 * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL 14 * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR 15 * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER 16 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR 17 * PERFORMANCE OF THIS SOFTWARE. 18 */ 19 20 21 22 #ifndef _CE_SRC_DESC_H_ 23 #define _CE_SRC_DESC_H_ 24 #if !defined(__ASSEMBLER__) 25 #endif 26 27 #define NUM_OF_DWORDS_CE_SRC_DESC 4 28 29 struct ce_src_desc { 30 uint32_t src_buffer_low : 32; 31 uint32_t src_buffer_high : 8, 32 toeplitz_en : 1, 33 src_swap : 1, 34 dest_swap : 1, 35 gather : 1, 36 ce_res_0 : 4, 37 length : 16; 38 uint32_t fw_metadata : 16, 39 ce_res_1 : 16; 40 uint32_t ce_res_2 : 20, 41 ring_id : 8, 42 looping_count : 4; 43 }; 44 45 #define CE_SRC_DESC_0_SRC_BUFFER_LOW_OFFSET 0x00000000 46 #define CE_SRC_DESC_0_SRC_BUFFER_LOW_LSB 0 47 #define CE_SRC_DESC_0_SRC_BUFFER_LOW_MASK 0xffffffff 48 49 #define CE_SRC_DESC_1_SRC_BUFFER_HIGH_OFFSET 0x00000004 50 #define CE_SRC_DESC_1_SRC_BUFFER_HIGH_LSB 0 51 #define CE_SRC_DESC_1_SRC_BUFFER_HIGH_MASK 0x000000ff 52 53 #define CE_SRC_DESC_1_TOEPLITZ_EN_OFFSET 0x00000004 54 #define CE_SRC_DESC_1_TOEPLITZ_EN_LSB 8 55 #define CE_SRC_DESC_1_TOEPLITZ_EN_MASK 0x00000100 56 57 #define CE_SRC_DESC_1_SRC_SWAP_OFFSET 0x00000004 58 #define CE_SRC_DESC_1_SRC_SWAP_LSB 9 59 #define CE_SRC_DESC_1_SRC_SWAP_MASK 0x00000200 60 61 #define CE_SRC_DESC_1_DEST_SWAP_OFFSET 0x00000004 62 #define CE_SRC_DESC_1_DEST_SWAP_LSB 10 63 #define CE_SRC_DESC_1_DEST_SWAP_MASK 0x00000400 64 65 #define CE_SRC_DESC_1_GATHER_OFFSET 0x00000004 66 #define CE_SRC_DESC_1_GATHER_LSB 11 67 #define CE_SRC_DESC_1_GATHER_MASK 0x00000800 68 69 #define CE_SRC_DESC_1_CE_RES_0_OFFSET 0x00000004 70 #define CE_SRC_DESC_1_CE_RES_0_LSB 12 71 #define CE_SRC_DESC_1_CE_RES_0_MASK 0x0000f000 72 73 #define CE_SRC_DESC_1_LENGTH_OFFSET 0x00000004 74 #define CE_SRC_DESC_1_LENGTH_LSB 16 75 #define CE_SRC_DESC_1_LENGTH_MASK 0xffff0000 76 77 #define CE_SRC_DESC_2_FW_METADATA_OFFSET 0x00000008 78 #define CE_SRC_DESC_2_FW_METADATA_LSB 0 79 #define CE_SRC_DESC_2_FW_METADATA_MASK 0x0000ffff 80 81 #define CE_SRC_DESC_2_CE_RES_1_OFFSET 0x00000008 82 #define CE_SRC_DESC_2_CE_RES_1_LSB 16 83 #define CE_SRC_DESC_2_CE_RES_1_MASK 0xffff0000 84 85 #define CE_SRC_DESC_3_CE_RES_2_OFFSET 0x0000000c 86 #define CE_SRC_DESC_3_CE_RES_2_LSB 0 87 #define CE_SRC_DESC_3_CE_RES_2_MASK 0x000fffff 88 89 #define CE_SRC_DESC_3_RING_ID_OFFSET 0x0000000c 90 #define CE_SRC_DESC_3_RING_ID_LSB 20 91 #define CE_SRC_DESC_3_RING_ID_MASK 0x0ff00000 92 93 #define CE_SRC_DESC_3_LOOPING_COUNT_OFFSET 0x0000000c 94 #define CE_SRC_DESC_3_LOOPING_COUNT_LSB 28 95 #define CE_SRC_DESC_3_LOOPING_COUNT_MASK 0xf0000000 96 97 #endif 98