1 2 /* 3 * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. 4 * 5 * Permission to use, copy, modify, and/or distribute this software for 6 * any purpose with or without fee is hereby granted, provided that the 7 * above copyright notice and this permission notice appear in all 8 * copies. 9 * 10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL 11 * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED 12 * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE 13 * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL 14 * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR 15 * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER 16 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR 17 * PERFORMANCE OF THIS SOFTWARE. 18 */ 19 20 21 22 #ifndef _HE_SIG_A_MU_UL_INFO_H_ 23 #define _HE_SIG_A_MU_UL_INFO_H_ 24 #if !defined(__ASSEMBLER__) 25 #endif 26 27 #define NUM_OF_DWORDS_HE_SIG_A_MU_UL_INFO 2 28 29 struct he_sig_a_mu_ul_info { 30 uint32_t format_indication : 1, 31 bss_color_id : 6, 32 spatial_reuse : 16, 33 reserved_0a : 1, 34 transmit_bw : 2, 35 reserved_0b : 6; 36 uint32_t txop_duration : 7, 37 reserved_1a : 9, 38 crc : 4, 39 tail : 6, 40 reserved_1b : 6; 41 }; 42 43 #define HE_SIG_A_MU_UL_INFO_0_FORMAT_INDICATION_OFFSET 0x00000000 44 #define HE_SIG_A_MU_UL_INFO_0_FORMAT_INDICATION_LSB 0 45 #define HE_SIG_A_MU_UL_INFO_0_FORMAT_INDICATION_MASK 0x00000001 46 47 #define HE_SIG_A_MU_UL_INFO_0_BSS_COLOR_ID_OFFSET 0x00000000 48 #define HE_SIG_A_MU_UL_INFO_0_BSS_COLOR_ID_LSB 1 49 #define HE_SIG_A_MU_UL_INFO_0_BSS_COLOR_ID_MASK 0x0000007e 50 51 #define HE_SIG_A_MU_UL_INFO_0_SPATIAL_REUSE_OFFSET 0x00000000 52 #define HE_SIG_A_MU_UL_INFO_0_SPATIAL_REUSE_LSB 7 53 #define HE_SIG_A_MU_UL_INFO_0_SPATIAL_REUSE_MASK 0x007fff80 54 55 #define HE_SIG_A_MU_UL_INFO_0_RESERVED_0A_OFFSET 0x00000000 56 #define HE_SIG_A_MU_UL_INFO_0_RESERVED_0A_LSB 23 57 #define HE_SIG_A_MU_UL_INFO_0_RESERVED_0A_MASK 0x00800000 58 59 #define HE_SIG_A_MU_UL_INFO_0_TRANSMIT_BW_OFFSET 0x00000000 60 #define HE_SIG_A_MU_UL_INFO_0_TRANSMIT_BW_LSB 24 61 #define HE_SIG_A_MU_UL_INFO_0_TRANSMIT_BW_MASK 0x03000000 62 63 #define HE_SIG_A_MU_UL_INFO_0_RESERVED_0B_OFFSET 0x00000000 64 #define HE_SIG_A_MU_UL_INFO_0_RESERVED_0B_LSB 26 65 #define HE_SIG_A_MU_UL_INFO_0_RESERVED_0B_MASK 0xfc000000 66 67 #define HE_SIG_A_MU_UL_INFO_1_TXOP_DURATION_OFFSET 0x00000004 68 #define HE_SIG_A_MU_UL_INFO_1_TXOP_DURATION_LSB 0 69 #define HE_SIG_A_MU_UL_INFO_1_TXOP_DURATION_MASK 0x0000007f 70 71 #define HE_SIG_A_MU_UL_INFO_1_RESERVED_1A_OFFSET 0x00000004 72 #define HE_SIG_A_MU_UL_INFO_1_RESERVED_1A_LSB 7 73 #define HE_SIG_A_MU_UL_INFO_1_RESERVED_1A_MASK 0x0000ff80 74 75 #define HE_SIG_A_MU_UL_INFO_1_CRC_OFFSET 0x00000004 76 #define HE_SIG_A_MU_UL_INFO_1_CRC_LSB 16 77 #define HE_SIG_A_MU_UL_INFO_1_CRC_MASK 0x000f0000 78 79 #define HE_SIG_A_MU_UL_INFO_1_TAIL_OFFSET 0x00000004 80 #define HE_SIG_A_MU_UL_INFO_1_TAIL_LSB 20 81 #define HE_SIG_A_MU_UL_INFO_1_TAIL_MASK 0x03f00000 82 83 #define HE_SIG_A_MU_UL_INFO_1_RESERVED_1B_OFFSET 0x00000004 84 #define HE_SIG_A_MU_UL_INFO_1_RESERVED_1B_LSB 26 85 #define HE_SIG_A_MU_UL_INFO_1_RESERVED_1B_MASK 0xfc000000 86 87 #endif 88