xref: /wlan-driver/fw-api/hw/wcn6450/v1/he_sig_a_su_info.h (revision 5113495b16420b49004c444715d2daae2066e7dc)
1 
2 /*
3  * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
4  *
5  * Permission to use, copy, modify, and/or distribute this software for
6  * any purpose with or without fee is hereby granted, provided that the
7  * above copyright notice and this permission notice appear in all
8  * copies.
9  *
10  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
11  * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
12  * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
13  * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
14  * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
15  * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
16  * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
17  * PERFORMANCE OF THIS SOFTWARE.
18  */
19 
20 
21 
22 #ifndef _HE_SIG_A_SU_INFO_H_
23 #define _HE_SIG_A_SU_INFO_H_
24 #if !defined(__ASSEMBLER__)
25 #endif
26 
27 #define NUM_OF_DWORDS_HE_SIG_A_SU_INFO 2
28 
29 struct he_sig_a_su_info {
30              uint32_t format_indication               :  1,
31                       beam_change                     :  1,
32                       dl_ul_flag                      :  1,
33                       transmit_mcs                    :  4,
34                       dcm                             :  1,
35                       bss_color_id                    :  6,
36                       reserved_0a                     :  1,
37                       spatial_reuse                   :  4,
38                       transmit_bw                     :  2,
39                       cp_ltf_size                     :  2,
40                       nsts                            :  3,
41                       reserved_0b                     :  6;
42              uint32_t txop_duration                   :  7,
43                       coding                          :  1,
44                       ldpc_extra_symbol               :  1,
45                       stbc                            :  1,
46                       txbf                            :  1,
47                       packet_extension_a_factor       :  2,
48                       packet_extension_pe_disambiguity:  1,
49                       reserved_1a                     :  1,
50                       doppler_indication              :  1,
51                       crc                             :  4,
52                       tail                            :  6,
53                       dot11ax_su_extended             :  1,
54                       dot11ax_ext_ru_size             :  4,
55                       rx_ndp                          :  1;
56 };
57 
58 #define HE_SIG_A_SU_INFO_0_FORMAT_INDICATION_OFFSET                  0x00000000
59 #define HE_SIG_A_SU_INFO_0_FORMAT_INDICATION_LSB                     0
60 #define HE_SIG_A_SU_INFO_0_FORMAT_INDICATION_MASK                    0x00000001
61 
62 #define HE_SIG_A_SU_INFO_0_BEAM_CHANGE_OFFSET                        0x00000000
63 #define HE_SIG_A_SU_INFO_0_BEAM_CHANGE_LSB                           1
64 #define HE_SIG_A_SU_INFO_0_BEAM_CHANGE_MASK                          0x00000002
65 
66 #define HE_SIG_A_SU_INFO_0_DL_UL_FLAG_OFFSET                         0x00000000
67 #define HE_SIG_A_SU_INFO_0_DL_UL_FLAG_LSB                            2
68 #define HE_SIG_A_SU_INFO_0_DL_UL_FLAG_MASK                           0x00000004
69 
70 #define HE_SIG_A_SU_INFO_0_TRANSMIT_MCS_OFFSET                       0x00000000
71 #define HE_SIG_A_SU_INFO_0_TRANSMIT_MCS_LSB                          3
72 #define HE_SIG_A_SU_INFO_0_TRANSMIT_MCS_MASK                         0x00000078
73 
74 #define HE_SIG_A_SU_INFO_0_DCM_OFFSET                                0x00000000
75 #define HE_SIG_A_SU_INFO_0_DCM_LSB                                   7
76 #define HE_SIG_A_SU_INFO_0_DCM_MASK                                  0x00000080
77 
78 #define HE_SIG_A_SU_INFO_0_BSS_COLOR_ID_OFFSET                       0x00000000
79 #define HE_SIG_A_SU_INFO_0_BSS_COLOR_ID_LSB                          8
80 #define HE_SIG_A_SU_INFO_0_BSS_COLOR_ID_MASK                         0x00003f00
81 
82 #define HE_SIG_A_SU_INFO_0_RESERVED_0A_OFFSET                        0x00000000
83 #define HE_SIG_A_SU_INFO_0_RESERVED_0A_LSB                           14
84 #define HE_SIG_A_SU_INFO_0_RESERVED_0A_MASK                          0x00004000
85 
86 #define HE_SIG_A_SU_INFO_0_SPATIAL_REUSE_OFFSET                      0x00000000
87 #define HE_SIG_A_SU_INFO_0_SPATIAL_REUSE_LSB                         15
88 #define HE_SIG_A_SU_INFO_0_SPATIAL_REUSE_MASK                        0x00078000
89 
90 #define HE_SIG_A_SU_INFO_0_TRANSMIT_BW_OFFSET                        0x00000000
91 #define HE_SIG_A_SU_INFO_0_TRANSMIT_BW_LSB                           19
92 #define HE_SIG_A_SU_INFO_0_TRANSMIT_BW_MASK                          0x00180000
93 
94 #define HE_SIG_A_SU_INFO_0_CP_LTF_SIZE_OFFSET                        0x00000000
95 #define HE_SIG_A_SU_INFO_0_CP_LTF_SIZE_LSB                           21
96 #define HE_SIG_A_SU_INFO_0_CP_LTF_SIZE_MASK                          0x00600000
97 
98 #define HE_SIG_A_SU_INFO_0_NSTS_OFFSET                               0x00000000
99 #define HE_SIG_A_SU_INFO_0_NSTS_LSB                                  23
100 #define HE_SIG_A_SU_INFO_0_NSTS_MASK                                 0x03800000
101 
102 #define HE_SIG_A_SU_INFO_0_RESERVED_0B_OFFSET                        0x00000000
103 #define HE_SIG_A_SU_INFO_0_RESERVED_0B_LSB                           26
104 #define HE_SIG_A_SU_INFO_0_RESERVED_0B_MASK                          0xfc000000
105 
106 #define HE_SIG_A_SU_INFO_1_TXOP_DURATION_OFFSET                      0x00000004
107 #define HE_SIG_A_SU_INFO_1_TXOP_DURATION_LSB                         0
108 #define HE_SIG_A_SU_INFO_1_TXOP_DURATION_MASK                        0x0000007f
109 
110 #define HE_SIG_A_SU_INFO_1_CODING_OFFSET                             0x00000004
111 #define HE_SIG_A_SU_INFO_1_CODING_LSB                                7
112 #define HE_SIG_A_SU_INFO_1_CODING_MASK                               0x00000080
113 
114 #define HE_SIG_A_SU_INFO_1_LDPC_EXTRA_SYMBOL_OFFSET                  0x00000004
115 #define HE_SIG_A_SU_INFO_1_LDPC_EXTRA_SYMBOL_LSB                     8
116 #define HE_SIG_A_SU_INFO_1_LDPC_EXTRA_SYMBOL_MASK                    0x00000100
117 
118 #define HE_SIG_A_SU_INFO_1_STBC_OFFSET                               0x00000004
119 #define HE_SIG_A_SU_INFO_1_STBC_LSB                                  9
120 #define HE_SIG_A_SU_INFO_1_STBC_MASK                                 0x00000200
121 
122 #define HE_SIG_A_SU_INFO_1_TXBF_OFFSET                               0x00000004
123 #define HE_SIG_A_SU_INFO_1_TXBF_LSB                                  10
124 #define HE_SIG_A_SU_INFO_1_TXBF_MASK                                 0x00000400
125 
126 #define HE_SIG_A_SU_INFO_1_PACKET_EXTENSION_A_FACTOR_OFFSET          0x00000004
127 #define HE_SIG_A_SU_INFO_1_PACKET_EXTENSION_A_FACTOR_LSB             11
128 #define HE_SIG_A_SU_INFO_1_PACKET_EXTENSION_A_FACTOR_MASK            0x00001800
129 
130 #define HE_SIG_A_SU_INFO_1_PACKET_EXTENSION_PE_DISAMBIGUITY_OFFSET   0x00000004
131 #define HE_SIG_A_SU_INFO_1_PACKET_EXTENSION_PE_DISAMBIGUITY_LSB      13
132 #define HE_SIG_A_SU_INFO_1_PACKET_EXTENSION_PE_DISAMBIGUITY_MASK     0x00002000
133 
134 #define HE_SIG_A_SU_INFO_1_RESERVED_1A_OFFSET                        0x00000004
135 #define HE_SIG_A_SU_INFO_1_RESERVED_1A_LSB                           14
136 #define HE_SIG_A_SU_INFO_1_RESERVED_1A_MASK                          0x00004000
137 
138 #define HE_SIG_A_SU_INFO_1_DOPPLER_INDICATION_OFFSET                 0x00000004
139 #define HE_SIG_A_SU_INFO_1_DOPPLER_INDICATION_LSB                    15
140 #define HE_SIG_A_SU_INFO_1_DOPPLER_INDICATION_MASK                   0x00008000
141 
142 #define HE_SIG_A_SU_INFO_1_CRC_OFFSET                                0x00000004
143 #define HE_SIG_A_SU_INFO_1_CRC_LSB                                   16
144 #define HE_SIG_A_SU_INFO_1_CRC_MASK                                  0x000f0000
145 
146 #define HE_SIG_A_SU_INFO_1_TAIL_OFFSET                               0x00000004
147 #define HE_SIG_A_SU_INFO_1_TAIL_LSB                                  20
148 #define HE_SIG_A_SU_INFO_1_TAIL_MASK                                 0x03f00000
149 
150 #define HE_SIG_A_SU_INFO_1_DOT11AX_SU_EXTENDED_OFFSET                0x00000004
151 #define HE_SIG_A_SU_INFO_1_DOT11AX_SU_EXTENDED_LSB                   26
152 #define HE_SIG_A_SU_INFO_1_DOT11AX_SU_EXTENDED_MASK                  0x04000000
153 
154 #define HE_SIG_A_SU_INFO_1_DOT11AX_EXT_RU_SIZE_OFFSET                0x00000004
155 #define HE_SIG_A_SU_INFO_1_DOT11AX_EXT_RU_SIZE_LSB                   27
156 #define HE_SIG_A_SU_INFO_1_DOT11AX_EXT_RU_SIZE_MASK                  0x78000000
157 
158 #define HE_SIG_A_SU_INFO_1_RX_NDP_OFFSET                             0x00000004
159 #define HE_SIG_A_SU_INFO_1_RX_NDP_LSB                                31
160 #define HE_SIG_A_SU_INFO_1_RX_NDP_MASK                               0x80000000
161 
162 #endif
163