1*5113495bSYour Name 2*5113495bSYour Name /* 3*5113495bSYour Name * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. 4*5113495bSYour Name * 5*5113495bSYour Name * Permission to use, copy, modify, and/or distribute this software for 6*5113495bSYour Name * any purpose with or without fee is hereby granted, provided that the 7*5113495bSYour Name * above copyright notice and this permission notice appear in all 8*5113495bSYour Name * copies. 9*5113495bSYour Name * 10*5113495bSYour Name * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL 11*5113495bSYour Name * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED 12*5113495bSYour Name * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE 13*5113495bSYour Name * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL 14*5113495bSYour Name * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR 15*5113495bSYour Name * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER 16*5113495bSYour Name * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR 17*5113495bSYour Name * PERFORMANCE OF THIS SOFTWARE. 18*5113495bSYour Name */ 19*5113495bSYour Name 20*5113495bSYour Name 21*5113495bSYour Name 22*5113495bSYour Name #ifndef _REO_FLUSH_CACHE_H_ 23*5113495bSYour Name #define _REO_FLUSH_CACHE_H_ 24*5113495bSYour Name #if !defined(__ASSEMBLER__) 25*5113495bSYour Name #endif 26*5113495bSYour Name 27*5113495bSYour Name #include "uniform_reo_cmd_header.h" 28*5113495bSYour Name 29*5113495bSYour Name #define NUM_OF_DWORDS_REO_FLUSH_CACHE 9 30*5113495bSYour Name 31*5113495bSYour Name struct reo_flush_cache { 32*5113495bSYour Name struct uniform_reo_cmd_header cmd_header; 33*5113495bSYour Name uint32_t flush_addr_31_0 : 32; 34*5113495bSYour Name uint32_t flush_addr_39_32 : 8, 35*5113495bSYour Name forward_all_mpdus_in_queue : 1, 36*5113495bSYour Name release_cache_block_index : 1, 37*5113495bSYour Name cache_block_resource_index : 2, 38*5113495bSYour Name flush_without_invalidate : 1, 39*5113495bSYour Name block_cache_usage_after_flush : 1, 40*5113495bSYour Name flush_entire_cache : 1, 41*5113495bSYour Name reserved_2b : 17; 42*5113495bSYour Name uint32_t reserved_3a : 32; 43*5113495bSYour Name uint32_t reserved_4a : 32; 44*5113495bSYour Name uint32_t reserved_5a : 32; 45*5113495bSYour Name uint32_t reserved_6a : 32; 46*5113495bSYour Name uint32_t reserved_7a : 32; 47*5113495bSYour Name uint32_t reserved_8a : 32; 48*5113495bSYour Name }; 49*5113495bSYour Name 50*5113495bSYour Name #define REO_FLUSH_CACHE_0_CMD_HEADER_REO_CMD_NUMBER_OFFSET 0x00000000 51*5113495bSYour Name #define REO_FLUSH_CACHE_0_CMD_HEADER_REO_CMD_NUMBER_LSB 0 52*5113495bSYour Name #define REO_FLUSH_CACHE_0_CMD_HEADER_REO_CMD_NUMBER_MASK 0x0000ffff 53*5113495bSYour Name 54*5113495bSYour Name #define REO_FLUSH_CACHE_0_CMD_HEADER_REO_STATUS_REQUIRED_OFFSET 0x00000000 55*5113495bSYour Name #define REO_FLUSH_CACHE_0_CMD_HEADER_REO_STATUS_REQUIRED_LSB 16 56*5113495bSYour Name #define REO_FLUSH_CACHE_0_CMD_HEADER_REO_STATUS_REQUIRED_MASK 0x00010000 57*5113495bSYour Name 58*5113495bSYour Name #define REO_FLUSH_CACHE_0_CMD_HEADER_RESERVED_0A_OFFSET 0x00000000 59*5113495bSYour Name #define REO_FLUSH_CACHE_0_CMD_HEADER_RESERVED_0A_LSB 17 60*5113495bSYour Name #define REO_FLUSH_CACHE_0_CMD_HEADER_RESERVED_0A_MASK 0xfffe0000 61*5113495bSYour Name 62*5113495bSYour Name #define REO_FLUSH_CACHE_1_FLUSH_ADDR_31_0_OFFSET 0x00000004 63*5113495bSYour Name #define REO_FLUSH_CACHE_1_FLUSH_ADDR_31_0_LSB 0 64*5113495bSYour Name #define REO_FLUSH_CACHE_1_FLUSH_ADDR_31_0_MASK 0xffffffff 65*5113495bSYour Name 66*5113495bSYour Name #define REO_FLUSH_CACHE_2_FLUSH_ADDR_39_32_OFFSET 0x00000008 67*5113495bSYour Name #define REO_FLUSH_CACHE_2_FLUSH_ADDR_39_32_LSB 0 68*5113495bSYour Name #define REO_FLUSH_CACHE_2_FLUSH_ADDR_39_32_MASK 0x000000ff 69*5113495bSYour Name 70*5113495bSYour Name #define REO_FLUSH_CACHE_2_FORWARD_ALL_MPDUS_IN_QUEUE_OFFSET 0x00000008 71*5113495bSYour Name #define REO_FLUSH_CACHE_2_FORWARD_ALL_MPDUS_IN_QUEUE_LSB 8 72*5113495bSYour Name #define REO_FLUSH_CACHE_2_FORWARD_ALL_MPDUS_IN_QUEUE_MASK 0x00000100 73*5113495bSYour Name 74*5113495bSYour Name #define REO_FLUSH_CACHE_2_RELEASE_CACHE_BLOCK_INDEX_OFFSET 0x00000008 75*5113495bSYour Name #define REO_FLUSH_CACHE_2_RELEASE_CACHE_BLOCK_INDEX_LSB 9 76*5113495bSYour Name #define REO_FLUSH_CACHE_2_RELEASE_CACHE_BLOCK_INDEX_MASK 0x00000200 77*5113495bSYour Name 78*5113495bSYour Name #define REO_FLUSH_CACHE_2_CACHE_BLOCK_RESOURCE_INDEX_OFFSET 0x00000008 79*5113495bSYour Name #define REO_FLUSH_CACHE_2_CACHE_BLOCK_RESOURCE_INDEX_LSB 10 80*5113495bSYour Name #define REO_FLUSH_CACHE_2_CACHE_BLOCK_RESOURCE_INDEX_MASK 0x00000c00 81*5113495bSYour Name 82*5113495bSYour Name #define REO_FLUSH_CACHE_2_FLUSH_WITHOUT_INVALIDATE_OFFSET 0x00000008 83*5113495bSYour Name #define REO_FLUSH_CACHE_2_FLUSH_WITHOUT_INVALIDATE_LSB 12 84*5113495bSYour Name #define REO_FLUSH_CACHE_2_FLUSH_WITHOUT_INVALIDATE_MASK 0x00001000 85*5113495bSYour Name 86*5113495bSYour Name #define REO_FLUSH_CACHE_2_BLOCK_CACHE_USAGE_AFTER_FLUSH_OFFSET 0x00000008 87*5113495bSYour Name #define REO_FLUSH_CACHE_2_BLOCK_CACHE_USAGE_AFTER_FLUSH_LSB 13 88*5113495bSYour Name #define REO_FLUSH_CACHE_2_BLOCK_CACHE_USAGE_AFTER_FLUSH_MASK 0x00002000 89*5113495bSYour Name 90*5113495bSYour Name #define REO_FLUSH_CACHE_2_FLUSH_ENTIRE_CACHE_OFFSET 0x00000008 91*5113495bSYour Name #define REO_FLUSH_CACHE_2_FLUSH_ENTIRE_CACHE_LSB 14 92*5113495bSYour Name #define REO_FLUSH_CACHE_2_FLUSH_ENTIRE_CACHE_MASK 0x00004000 93*5113495bSYour Name 94*5113495bSYour Name #define REO_FLUSH_CACHE_2_RESERVED_2B_OFFSET 0x00000008 95*5113495bSYour Name #define REO_FLUSH_CACHE_2_RESERVED_2B_LSB 15 96*5113495bSYour Name #define REO_FLUSH_CACHE_2_RESERVED_2B_MASK 0xffff8000 97*5113495bSYour Name 98*5113495bSYour Name #define REO_FLUSH_CACHE_3_RESERVED_3A_OFFSET 0x0000000c 99*5113495bSYour Name #define REO_FLUSH_CACHE_3_RESERVED_3A_LSB 0 100*5113495bSYour Name #define REO_FLUSH_CACHE_3_RESERVED_3A_MASK 0xffffffff 101*5113495bSYour Name 102*5113495bSYour Name #define REO_FLUSH_CACHE_4_RESERVED_4A_OFFSET 0x00000010 103*5113495bSYour Name #define REO_FLUSH_CACHE_4_RESERVED_4A_LSB 0 104*5113495bSYour Name #define REO_FLUSH_CACHE_4_RESERVED_4A_MASK 0xffffffff 105*5113495bSYour Name 106*5113495bSYour Name #define REO_FLUSH_CACHE_5_RESERVED_5A_OFFSET 0x00000014 107*5113495bSYour Name #define REO_FLUSH_CACHE_5_RESERVED_5A_LSB 0 108*5113495bSYour Name #define REO_FLUSH_CACHE_5_RESERVED_5A_MASK 0xffffffff 109*5113495bSYour Name 110*5113495bSYour Name #define REO_FLUSH_CACHE_6_RESERVED_6A_OFFSET 0x00000018 111*5113495bSYour Name #define REO_FLUSH_CACHE_6_RESERVED_6A_LSB 0 112*5113495bSYour Name #define REO_FLUSH_CACHE_6_RESERVED_6A_MASK 0xffffffff 113*5113495bSYour Name 114*5113495bSYour Name #define REO_FLUSH_CACHE_7_RESERVED_7A_OFFSET 0x0000001c 115*5113495bSYour Name #define REO_FLUSH_CACHE_7_RESERVED_7A_LSB 0 116*5113495bSYour Name #define REO_FLUSH_CACHE_7_RESERVED_7A_MASK 0xffffffff 117*5113495bSYour Name 118*5113495bSYour Name #define REO_FLUSH_CACHE_8_RESERVED_8A_OFFSET 0x00000020 119*5113495bSYour Name #define REO_FLUSH_CACHE_8_RESERVED_8A_LSB 0 120*5113495bSYour Name #define REO_FLUSH_CACHE_8_RESERVED_8A_MASK 0xffffffff 121*5113495bSYour Name 122*5113495bSYour Name #endif 123