xref: /wlan-driver/fw-api/hw/wcn6450/v1/reo_flush_queue.h (revision 5113495b16420b49004c444715d2daae2066e7dc) 
1*5113495bSYour Name 
2*5113495bSYour Name /*
3*5113495bSYour Name  * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
4*5113495bSYour Name  *
5*5113495bSYour Name  * Permission to use, copy, modify, and/or distribute this software for
6*5113495bSYour Name  * any purpose with or without fee is hereby granted, provided that the
7*5113495bSYour Name  * above copyright notice and this permission notice appear in all
8*5113495bSYour Name  * copies.
9*5113495bSYour Name  *
10*5113495bSYour Name  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
11*5113495bSYour Name  * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
12*5113495bSYour Name  * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
13*5113495bSYour Name  * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
14*5113495bSYour Name  * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
15*5113495bSYour Name  * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
16*5113495bSYour Name  * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
17*5113495bSYour Name  * PERFORMANCE OF THIS SOFTWARE.
18*5113495bSYour Name  */
19*5113495bSYour Name 
20*5113495bSYour Name 
21*5113495bSYour Name 
22*5113495bSYour Name #ifndef _REO_FLUSH_QUEUE_H_
23*5113495bSYour Name #define _REO_FLUSH_QUEUE_H_
24*5113495bSYour Name #if !defined(__ASSEMBLER__)
25*5113495bSYour Name #endif
26*5113495bSYour Name 
27*5113495bSYour Name #include "uniform_reo_cmd_header.h"
28*5113495bSYour Name 
29*5113495bSYour Name #define NUM_OF_DWORDS_REO_FLUSH_QUEUE 9
30*5113495bSYour Name 
31*5113495bSYour Name struct reo_flush_queue {
32*5113495bSYour Name     struct            uniform_reo_cmd_header                       cmd_header;
33*5113495bSYour Name              uint32_t flush_desc_addr_31_0            : 32;
34*5113495bSYour Name              uint32_t flush_desc_addr_39_32           :  8,
35*5113495bSYour Name                       block_desc_addr_usage_after_flush:  1,
36*5113495bSYour Name                       block_resource_index            :  2,
37*5113495bSYour Name                       invalidate_queue_and_flush      :  1,
38*5113495bSYour Name                       reserved_2a                     : 20;
39*5113495bSYour Name              uint32_t reserved_3a                     : 32;
40*5113495bSYour Name              uint32_t reserved_4a                     : 32;
41*5113495bSYour Name              uint32_t reserved_5a                     : 32;
42*5113495bSYour Name              uint32_t reserved_6a                     : 32;
43*5113495bSYour Name              uint32_t reserved_7a                     : 32;
44*5113495bSYour Name              uint32_t reserved_8a                     : 32;
45*5113495bSYour Name };
46*5113495bSYour Name 
47*5113495bSYour Name #define REO_FLUSH_QUEUE_0_CMD_HEADER_REO_CMD_NUMBER_OFFSET           0x00000000
48*5113495bSYour Name #define REO_FLUSH_QUEUE_0_CMD_HEADER_REO_CMD_NUMBER_LSB              0
49*5113495bSYour Name #define REO_FLUSH_QUEUE_0_CMD_HEADER_REO_CMD_NUMBER_MASK             0x0000ffff
50*5113495bSYour Name 
51*5113495bSYour Name #define REO_FLUSH_QUEUE_0_CMD_HEADER_REO_STATUS_REQUIRED_OFFSET      0x00000000
52*5113495bSYour Name #define REO_FLUSH_QUEUE_0_CMD_HEADER_REO_STATUS_REQUIRED_LSB         16
53*5113495bSYour Name #define REO_FLUSH_QUEUE_0_CMD_HEADER_REO_STATUS_REQUIRED_MASK        0x00010000
54*5113495bSYour Name 
55*5113495bSYour Name #define REO_FLUSH_QUEUE_0_CMD_HEADER_RESERVED_0A_OFFSET              0x00000000
56*5113495bSYour Name #define REO_FLUSH_QUEUE_0_CMD_HEADER_RESERVED_0A_LSB                 17
57*5113495bSYour Name #define REO_FLUSH_QUEUE_0_CMD_HEADER_RESERVED_0A_MASK                0xfffe0000
58*5113495bSYour Name 
59*5113495bSYour Name #define REO_FLUSH_QUEUE_1_FLUSH_DESC_ADDR_31_0_OFFSET                0x00000004
60*5113495bSYour Name #define REO_FLUSH_QUEUE_1_FLUSH_DESC_ADDR_31_0_LSB                   0
61*5113495bSYour Name #define REO_FLUSH_QUEUE_1_FLUSH_DESC_ADDR_31_0_MASK                  0xffffffff
62*5113495bSYour Name 
63*5113495bSYour Name #define REO_FLUSH_QUEUE_2_FLUSH_DESC_ADDR_39_32_OFFSET               0x00000008
64*5113495bSYour Name #define REO_FLUSH_QUEUE_2_FLUSH_DESC_ADDR_39_32_LSB                  0
65*5113495bSYour Name #define REO_FLUSH_QUEUE_2_FLUSH_DESC_ADDR_39_32_MASK                 0x000000ff
66*5113495bSYour Name 
67*5113495bSYour Name #define REO_FLUSH_QUEUE_2_BLOCK_DESC_ADDR_USAGE_AFTER_FLUSH_OFFSET   0x00000008
68*5113495bSYour Name #define REO_FLUSH_QUEUE_2_BLOCK_DESC_ADDR_USAGE_AFTER_FLUSH_LSB      8
69*5113495bSYour Name #define REO_FLUSH_QUEUE_2_BLOCK_DESC_ADDR_USAGE_AFTER_FLUSH_MASK     0x00000100
70*5113495bSYour Name 
71*5113495bSYour Name #define REO_FLUSH_QUEUE_2_BLOCK_RESOURCE_INDEX_OFFSET                0x00000008
72*5113495bSYour Name #define REO_FLUSH_QUEUE_2_BLOCK_RESOURCE_INDEX_LSB                   9
73*5113495bSYour Name #define REO_FLUSH_QUEUE_2_BLOCK_RESOURCE_INDEX_MASK                  0x00000600
74*5113495bSYour Name 
75*5113495bSYour Name #define REO_FLUSH_QUEUE_2_INVALIDATE_QUEUE_AND_FLUSH_OFFSET          0x00000008
76*5113495bSYour Name #define REO_FLUSH_QUEUE_2_INVALIDATE_QUEUE_AND_FLUSH_LSB             11
77*5113495bSYour Name #define REO_FLUSH_QUEUE_2_INVALIDATE_QUEUE_AND_FLUSH_MASK            0x00000800
78*5113495bSYour Name 
79*5113495bSYour Name #define REO_FLUSH_QUEUE_2_RESERVED_2A_OFFSET                         0x00000008
80*5113495bSYour Name #define REO_FLUSH_QUEUE_2_RESERVED_2A_LSB                            12
81*5113495bSYour Name #define REO_FLUSH_QUEUE_2_RESERVED_2A_MASK                           0xfffff000
82*5113495bSYour Name 
83*5113495bSYour Name #define REO_FLUSH_QUEUE_3_RESERVED_3A_OFFSET                         0x0000000c
84*5113495bSYour Name #define REO_FLUSH_QUEUE_3_RESERVED_3A_LSB                            0
85*5113495bSYour Name #define REO_FLUSH_QUEUE_3_RESERVED_3A_MASK                           0xffffffff
86*5113495bSYour Name 
87*5113495bSYour Name #define REO_FLUSH_QUEUE_4_RESERVED_4A_OFFSET                         0x00000010
88*5113495bSYour Name #define REO_FLUSH_QUEUE_4_RESERVED_4A_LSB                            0
89*5113495bSYour Name #define REO_FLUSH_QUEUE_4_RESERVED_4A_MASK                           0xffffffff
90*5113495bSYour Name 
91*5113495bSYour Name #define REO_FLUSH_QUEUE_5_RESERVED_5A_OFFSET                         0x00000014
92*5113495bSYour Name #define REO_FLUSH_QUEUE_5_RESERVED_5A_LSB                            0
93*5113495bSYour Name #define REO_FLUSH_QUEUE_5_RESERVED_5A_MASK                           0xffffffff
94*5113495bSYour Name 
95*5113495bSYour Name #define REO_FLUSH_QUEUE_6_RESERVED_6A_OFFSET                         0x00000018
96*5113495bSYour Name #define REO_FLUSH_QUEUE_6_RESERVED_6A_LSB                            0
97*5113495bSYour Name #define REO_FLUSH_QUEUE_6_RESERVED_6A_MASK                           0xffffffff
98*5113495bSYour Name 
99*5113495bSYour Name #define REO_FLUSH_QUEUE_7_RESERVED_7A_OFFSET                         0x0000001c
100*5113495bSYour Name #define REO_FLUSH_QUEUE_7_RESERVED_7A_LSB                            0
101*5113495bSYour Name #define REO_FLUSH_QUEUE_7_RESERVED_7A_MASK                           0xffffffff
102*5113495bSYour Name 
103*5113495bSYour Name #define REO_FLUSH_QUEUE_8_RESERVED_8A_OFFSET                         0x00000020
104*5113495bSYour Name #define REO_FLUSH_QUEUE_8_RESERVED_8A_LSB                            0
105*5113495bSYour Name #define REO_FLUSH_QUEUE_8_RESERVED_8A_MASK                           0xffffffff
106*5113495bSYour Name 
107*5113495bSYour Name #endif
108