1*5113495bSYour Name 2*5113495bSYour Name /* 3*5113495bSYour Name * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. 4*5113495bSYour Name * 5*5113495bSYour Name * Permission to use, copy, modify, and/or distribute this software for 6*5113495bSYour Name * any purpose with or without fee is hereby granted, provided that the 7*5113495bSYour Name * above copyright notice and this permission notice appear in all 8*5113495bSYour Name * copies. 9*5113495bSYour Name * 10*5113495bSYour Name * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL 11*5113495bSYour Name * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED 12*5113495bSYour Name * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE 13*5113495bSYour Name * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL 14*5113495bSYour Name * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR 15*5113495bSYour Name * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER 16*5113495bSYour Name * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR 17*5113495bSYour Name * PERFORMANCE OF THIS SOFTWARE. 18*5113495bSYour Name */ 19*5113495bSYour Name 20*5113495bSYour Name 21*5113495bSYour Name 22*5113495bSYour Name #ifndef _REO_FLUSH_TIMEOUT_LIST_H_ 23*5113495bSYour Name #define _REO_FLUSH_TIMEOUT_LIST_H_ 24*5113495bSYour Name #if !defined(__ASSEMBLER__) 25*5113495bSYour Name #endif 26*5113495bSYour Name 27*5113495bSYour Name #include "uniform_reo_cmd_header.h" 28*5113495bSYour Name 29*5113495bSYour Name #define NUM_OF_DWORDS_REO_FLUSH_TIMEOUT_LIST 9 30*5113495bSYour Name 31*5113495bSYour Name struct reo_flush_timeout_list { 32*5113495bSYour Name struct uniform_reo_cmd_header cmd_header; 33*5113495bSYour Name uint32_t ac_timout_list : 2, 34*5113495bSYour Name reserved_1 : 30; 35*5113495bSYour Name uint32_t minimum_release_desc_count : 16, 36*5113495bSYour Name minimum_forward_buf_count : 16; 37*5113495bSYour Name uint32_t reserved_3a : 32; 38*5113495bSYour Name uint32_t reserved_4a : 32; 39*5113495bSYour Name uint32_t reserved_5a : 32; 40*5113495bSYour Name uint32_t reserved_6a : 32; 41*5113495bSYour Name uint32_t reserved_7a : 32; 42*5113495bSYour Name uint32_t reserved_8a : 32; 43*5113495bSYour Name }; 44*5113495bSYour Name 45*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_0_CMD_HEADER_REO_CMD_NUMBER_OFFSET 0x00000000 46*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_0_CMD_HEADER_REO_CMD_NUMBER_LSB 0 47*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_0_CMD_HEADER_REO_CMD_NUMBER_MASK 0x0000ffff 48*5113495bSYour Name 49*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_0_CMD_HEADER_REO_STATUS_REQUIRED_OFFSET 0x00000000 50*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_0_CMD_HEADER_REO_STATUS_REQUIRED_LSB 16 51*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_0_CMD_HEADER_REO_STATUS_REQUIRED_MASK 0x00010000 52*5113495bSYour Name 53*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_0_CMD_HEADER_RESERVED_0A_OFFSET 0x00000000 54*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_0_CMD_HEADER_RESERVED_0A_LSB 17 55*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_0_CMD_HEADER_RESERVED_0A_MASK 0xfffe0000 56*5113495bSYour Name 57*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_1_AC_TIMOUT_LIST_OFFSET 0x00000004 58*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_1_AC_TIMOUT_LIST_LSB 0 59*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_1_AC_TIMOUT_LIST_MASK 0x00000003 60*5113495bSYour Name 61*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_1_RESERVED_1_OFFSET 0x00000004 62*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_1_RESERVED_1_LSB 2 63*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_1_RESERVED_1_MASK 0xfffffffc 64*5113495bSYour Name 65*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_2_MINIMUM_RELEASE_DESC_COUNT_OFFSET 0x00000008 66*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_2_MINIMUM_RELEASE_DESC_COUNT_LSB 0 67*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_2_MINIMUM_RELEASE_DESC_COUNT_MASK 0x0000ffff 68*5113495bSYour Name 69*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_2_MINIMUM_FORWARD_BUF_COUNT_OFFSET 0x00000008 70*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_2_MINIMUM_FORWARD_BUF_COUNT_LSB 16 71*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_2_MINIMUM_FORWARD_BUF_COUNT_MASK 0xffff0000 72*5113495bSYour Name 73*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_3_RESERVED_3A_OFFSET 0x0000000c 74*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_3_RESERVED_3A_LSB 0 75*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_3_RESERVED_3A_MASK 0xffffffff 76*5113495bSYour Name 77*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_4_RESERVED_4A_OFFSET 0x00000010 78*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_4_RESERVED_4A_LSB 0 79*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_4_RESERVED_4A_MASK 0xffffffff 80*5113495bSYour Name 81*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_5_RESERVED_5A_OFFSET 0x00000014 82*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_5_RESERVED_5A_LSB 0 83*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_5_RESERVED_5A_MASK 0xffffffff 84*5113495bSYour Name 85*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_6_RESERVED_6A_OFFSET 0x00000018 86*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_6_RESERVED_6A_LSB 0 87*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_6_RESERVED_6A_MASK 0xffffffff 88*5113495bSYour Name 89*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_7_RESERVED_7A_OFFSET 0x0000001c 90*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_7_RESERVED_7A_LSB 0 91*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_7_RESERVED_7A_MASK 0xffffffff 92*5113495bSYour Name 93*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_8_RESERVED_8A_OFFSET 0x00000020 94*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_8_RESERVED_8A_LSB 0 95*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_8_RESERVED_8A_MASK 0xffffffff 96*5113495bSYour Name 97*5113495bSYour Name #endif 98