xref: /wlan-driver/fw-api/hw/wcn6450/v1/rx_mpdu_end.h (revision 5113495b16420b49004c444715d2daae2066e7dc)
1 
2 /*
3  * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
4  *
5  * Permission to use, copy, modify, and/or distribute this software for
6  * any purpose with or without fee is hereby granted, provided that the
7  * above copyright notice and this permission notice appear in all
8  * copies.
9  *
10  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
11  * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
12  * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
13  * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
14  * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
15  * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
16  * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
17  * PERFORMANCE OF THIS SOFTWARE.
18  */
19 
20 
21 
22 #ifndef _RX_MPDU_END_H_
23 #define _RX_MPDU_END_H_
24 #if !defined(__ASSEMBLER__)
25 #endif
26 
27 #define NUM_OF_DWORDS_RX_MPDU_END 2
28 
29 struct rx_mpdu_end {
30              uint32_t rxpcu_mpdu_filter_in_category   :  2,
31                       sw_frame_group_id               :  7,
32                       reserved_0                      :  7,
33                       phy_ppdu_id                     : 16;
34              uint32_t reserved_1a                     : 11,
35                       unsup_ktype_short_frame         :  1,
36                       rx_in_tx_decrypt_byp            :  1,
37                       overflow_err                    :  1,
38                       mpdu_length_err                 :  1,
39                       tkip_mic_err                    :  1,
40                       decrypt_err                     :  1,
41                       unencrypted_frame_err           :  1,
42                       pn_fields_contain_valid_info    :  1,
43                       fcs_err                         :  1,
44                       msdu_length_err                 :  1,
45                       rxdma0_destination_ring         :  2,
46                       rxdma1_destination_ring         :  2,
47                       decrypt_status_code             :  3,
48                       rx_bitmap_not_updated           :  1,
49                       reserved_1b                     :  3;
50 };
51 
52 #define RX_MPDU_END_0_RXPCU_MPDU_FILTER_IN_CATEGORY_OFFSET           0x00000000
53 #define RX_MPDU_END_0_RXPCU_MPDU_FILTER_IN_CATEGORY_LSB              0
54 #define RX_MPDU_END_0_RXPCU_MPDU_FILTER_IN_CATEGORY_MASK             0x00000003
55 
56 #define RX_MPDU_END_0_SW_FRAME_GROUP_ID_OFFSET                       0x00000000
57 #define RX_MPDU_END_0_SW_FRAME_GROUP_ID_LSB                          2
58 #define RX_MPDU_END_0_SW_FRAME_GROUP_ID_MASK                         0x000001fc
59 
60 #define RX_MPDU_END_0_RESERVED_0_OFFSET                              0x00000000
61 #define RX_MPDU_END_0_RESERVED_0_LSB                                 9
62 #define RX_MPDU_END_0_RESERVED_0_MASK                                0x0000fe00
63 
64 #define RX_MPDU_END_0_PHY_PPDU_ID_OFFSET                             0x00000000
65 #define RX_MPDU_END_0_PHY_PPDU_ID_LSB                                16
66 #define RX_MPDU_END_0_PHY_PPDU_ID_MASK                               0xffff0000
67 
68 #define RX_MPDU_END_1_RESERVED_1A_OFFSET                             0x00000004
69 #define RX_MPDU_END_1_RESERVED_1A_LSB                                0
70 #define RX_MPDU_END_1_RESERVED_1A_MASK                               0x000007ff
71 
72 #define RX_MPDU_END_1_UNSUP_KTYPE_SHORT_FRAME_OFFSET                 0x00000004
73 #define RX_MPDU_END_1_UNSUP_KTYPE_SHORT_FRAME_LSB                    11
74 #define RX_MPDU_END_1_UNSUP_KTYPE_SHORT_FRAME_MASK                   0x00000800
75 
76 #define RX_MPDU_END_1_RX_IN_TX_DECRYPT_BYP_OFFSET                    0x00000004
77 #define RX_MPDU_END_1_RX_IN_TX_DECRYPT_BYP_LSB                       12
78 #define RX_MPDU_END_1_RX_IN_TX_DECRYPT_BYP_MASK                      0x00001000
79 
80 #define RX_MPDU_END_1_OVERFLOW_ERR_OFFSET                            0x00000004
81 #define RX_MPDU_END_1_OVERFLOW_ERR_LSB                               13
82 #define RX_MPDU_END_1_OVERFLOW_ERR_MASK                              0x00002000
83 
84 #define RX_MPDU_END_1_MPDU_LENGTH_ERR_OFFSET                         0x00000004
85 #define RX_MPDU_END_1_MPDU_LENGTH_ERR_LSB                            14
86 #define RX_MPDU_END_1_MPDU_LENGTH_ERR_MASK                           0x00004000
87 
88 #define RX_MPDU_END_1_TKIP_MIC_ERR_OFFSET                            0x00000004
89 #define RX_MPDU_END_1_TKIP_MIC_ERR_LSB                               15
90 #define RX_MPDU_END_1_TKIP_MIC_ERR_MASK                              0x00008000
91 
92 #define RX_MPDU_END_1_DECRYPT_ERR_OFFSET                             0x00000004
93 #define RX_MPDU_END_1_DECRYPT_ERR_LSB                                16
94 #define RX_MPDU_END_1_DECRYPT_ERR_MASK                               0x00010000
95 
96 #define RX_MPDU_END_1_UNENCRYPTED_FRAME_ERR_OFFSET                   0x00000004
97 #define RX_MPDU_END_1_UNENCRYPTED_FRAME_ERR_LSB                      17
98 #define RX_MPDU_END_1_UNENCRYPTED_FRAME_ERR_MASK                     0x00020000
99 
100 #define RX_MPDU_END_1_PN_FIELDS_CONTAIN_VALID_INFO_OFFSET            0x00000004
101 #define RX_MPDU_END_1_PN_FIELDS_CONTAIN_VALID_INFO_LSB               18
102 #define RX_MPDU_END_1_PN_FIELDS_CONTAIN_VALID_INFO_MASK              0x00040000
103 
104 #define RX_MPDU_END_1_FCS_ERR_OFFSET                                 0x00000004
105 #define RX_MPDU_END_1_FCS_ERR_LSB                                    19
106 #define RX_MPDU_END_1_FCS_ERR_MASK                                   0x00080000
107 
108 #define RX_MPDU_END_1_MSDU_LENGTH_ERR_OFFSET                         0x00000004
109 #define RX_MPDU_END_1_MSDU_LENGTH_ERR_LSB                            20
110 #define RX_MPDU_END_1_MSDU_LENGTH_ERR_MASK                           0x00100000
111 
112 #define RX_MPDU_END_1_RXDMA0_DESTINATION_RING_OFFSET                 0x00000004
113 #define RX_MPDU_END_1_RXDMA0_DESTINATION_RING_LSB                    21
114 #define RX_MPDU_END_1_RXDMA0_DESTINATION_RING_MASK                   0x00600000
115 
116 #define RX_MPDU_END_1_RXDMA1_DESTINATION_RING_OFFSET                 0x00000004
117 #define RX_MPDU_END_1_RXDMA1_DESTINATION_RING_LSB                    23
118 #define RX_MPDU_END_1_RXDMA1_DESTINATION_RING_MASK                   0x01800000
119 
120 #define RX_MPDU_END_1_DECRYPT_STATUS_CODE_OFFSET                     0x00000004
121 #define RX_MPDU_END_1_DECRYPT_STATUS_CODE_LSB                        25
122 #define RX_MPDU_END_1_DECRYPT_STATUS_CODE_MASK                       0x0e000000
123 
124 #define RX_MPDU_END_1_RX_BITMAP_NOT_UPDATED_OFFSET                   0x00000004
125 #define RX_MPDU_END_1_RX_BITMAP_NOT_UPDATED_LSB                      28
126 #define RX_MPDU_END_1_RX_BITMAP_NOT_UPDATED_MASK                     0x10000000
127 
128 #define RX_MPDU_END_1_RESERVED_1B_OFFSET                             0x00000004
129 #define RX_MPDU_END_1_RESERVED_1B_LSB                                29
130 #define RX_MPDU_END_1_RESERVED_1B_MASK                               0xe0000000
131 
132 #endif
133