1 2 /* 3 * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. 4 * 5 * Permission to use, copy, modify, and/or distribute this software for 6 * any purpose with or without fee is hereby granted, provided that the 7 * above copyright notice and this permission notice appear in all 8 * copies. 9 * 10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL 11 * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED 12 * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE 13 * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL 14 * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR 15 * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER 16 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR 17 * PERFORMANCE OF THIS SOFTWARE. 18 */ 19 20 21 22 #ifndef _TX_RATE_STATS_INFO_H_ 23 #define _TX_RATE_STATS_INFO_H_ 24 #if !defined(__ASSEMBLER__) 25 #endif 26 27 #define NUM_OF_DWORDS_TX_RATE_STATS_INFO 2 28 29 struct tx_rate_stats_info { 30 uint32_t tx_rate_stats_info_valid : 1, 31 transmit_bw : 2, 32 transmit_pkt_type : 4, 33 transmit_stbc : 1, 34 transmit_ldpc : 1, 35 transmit_sgi : 2, 36 transmit_mcs : 4, 37 ofdma_transmission : 1, 38 tones_in_ru : 12, 39 reserved_0a : 4; 40 uint32_t ppdu_transmission_tsf : 32; 41 }; 42 43 #define TX_RATE_STATS_INFO_0_TX_RATE_STATS_INFO_VALID_OFFSET 0x00000000 44 #define TX_RATE_STATS_INFO_0_TX_RATE_STATS_INFO_VALID_LSB 0 45 #define TX_RATE_STATS_INFO_0_TX_RATE_STATS_INFO_VALID_MASK 0x00000001 46 47 #define TX_RATE_STATS_INFO_0_TRANSMIT_BW_OFFSET 0x00000000 48 #define TX_RATE_STATS_INFO_0_TRANSMIT_BW_LSB 1 49 #define TX_RATE_STATS_INFO_0_TRANSMIT_BW_MASK 0x00000006 50 51 #define TX_RATE_STATS_INFO_0_TRANSMIT_PKT_TYPE_OFFSET 0x00000000 52 #define TX_RATE_STATS_INFO_0_TRANSMIT_PKT_TYPE_LSB 3 53 #define TX_RATE_STATS_INFO_0_TRANSMIT_PKT_TYPE_MASK 0x00000078 54 55 #define TX_RATE_STATS_INFO_0_TRANSMIT_STBC_OFFSET 0x00000000 56 #define TX_RATE_STATS_INFO_0_TRANSMIT_STBC_LSB 7 57 #define TX_RATE_STATS_INFO_0_TRANSMIT_STBC_MASK 0x00000080 58 59 #define TX_RATE_STATS_INFO_0_TRANSMIT_LDPC_OFFSET 0x00000000 60 #define TX_RATE_STATS_INFO_0_TRANSMIT_LDPC_LSB 8 61 #define TX_RATE_STATS_INFO_0_TRANSMIT_LDPC_MASK 0x00000100 62 63 #define TX_RATE_STATS_INFO_0_TRANSMIT_SGI_OFFSET 0x00000000 64 #define TX_RATE_STATS_INFO_0_TRANSMIT_SGI_LSB 9 65 #define TX_RATE_STATS_INFO_0_TRANSMIT_SGI_MASK 0x00000600 66 67 #define TX_RATE_STATS_INFO_0_TRANSMIT_MCS_OFFSET 0x00000000 68 #define TX_RATE_STATS_INFO_0_TRANSMIT_MCS_LSB 11 69 #define TX_RATE_STATS_INFO_0_TRANSMIT_MCS_MASK 0x00007800 70 71 #define TX_RATE_STATS_INFO_0_OFDMA_TRANSMISSION_OFFSET 0x00000000 72 #define TX_RATE_STATS_INFO_0_OFDMA_TRANSMISSION_LSB 15 73 #define TX_RATE_STATS_INFO_0_OFDMA_TRANSMISSION_MASK 0x00008000 74 75 #define TX_RATE_STATS_INFO_0_TONES_IN_RU_OFFSET 0x00000000 76 #define TX_RATE_STATS_INFO_0_TONES_IN_RU_LSB 16 77 #define TX_RATE_STATS_INFO_0_TONES_IN_RU_MASK 0x0fff0000 78 79 #define TX_RATE_STATS_INFO_0_RESERVED_0A_OFFSET 0x00000000 80 #define TX_RATE_STATS_INFO_0_RESERVED_0A_LSB 28 81 #define TX_RATE_STATS_INFO_0_RESERVED_0A_MASK 0xf0000000 82 83 #define TX_RATE_STATS_INFO_1_PPDU_TRANSMISSION_TSF_OFFSET 0x00000004 84 #define TX_RATE_STATS_INFO_1_PPDU_TRANSMISSION_TSF_LSB 0 85 #define TX_RATE_STATS_INFO_1_PPDU_TRANSMISSION_TSF_MASK 0xffffffff 86 87 #endif 88